Series comparison

-[PULL 0/4] tcg patch queue
+[PULL v2 00/62] tcg patch queue
-Pretty small still, but there are two patches that ought
+v2: Fix mis-attributed --author.
-to get backported to stable, so no point in delaying.
 r~
-The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:
-  Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)
+The following changes since commit 627634031092e1514f363fd8659a579398de0f0e:
   Merge tag 'buildsys-qom-qdev-ui-20230227' of https://github.com/philmd/qemu into staging (2023-02-28 15:09:18 +0000)
 are available in the Git repository at:
-  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241212
+  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230301
-for you to fetch changes up to 7ac87b14a92234b6a89b701b4043ad6cf8bdcccf:
+for you to fetch changes up to 9644e7142a2a2bb4b4743a3a4c940edbab16ca11:
-  target/sparc: Use memcpy() and remove memcpy32() (2024-12-12 14:28:38 -0600)
+  tcg: Update docs/devel/tcg-ops.rst for temporary changes (2023-03-01 07:33:28 -1000)
 ----------------------------------------------------------------
-tcg: Reset free_temps before tcg_optimize
+helper-head: Add fpu/softfloat-types.h
-tcg/riscv: Fix StoreStore barrier generation
+softmmu: Use memmove in flatview_write_continue
-include/exec: Introduce fpst alias in helper-head.h.inc
+tcg: Add sign param to probe_access_flags, probe_access_full
-target/sparc: Use memcpy() and remove memcpy32()
+tcg: Convert TARGET_TB_PCREL to CF_PCREL
 tcg: Simplify temporary lifetimes for translators
 ----------------------------------------------------------------
+Akihiko Odaki (1):
+      softmmu: Use memmove in flatview_write_continue
+Anton Johansson (27):
+      include/exec: Introduce `CF_PCREL`
+      target/i386: set `CF_PCREL` in `x86_cpu_realizefn`
+      target/arm: set `CF_PCREL` in `arm_cpu_realizefn`
+      accel/tcg: Replace `TARGET_TB_PCREL` with `CF_PCREL`
+      include/exec: Replace `TARGET_TB_PCREL` with `CF_PCREL`
+      target/arm: Replace `TARGET_TB_PCREL` with `CF_PCREL`
+      target/i386: Replace `TARGET_TB_PCREL` with `CF_PCREL`
+      include/exec: Remove `TARGET_TB_PCREL` define
+      target/arm: Remove `TARGET_TB_PCREL` define
+      target/i386: Remove `TARGET_TB_PCREL` define
+      accel/tcg: Move jmp-cache `CF_PCREL` checks to caller
+      accel/tcg: Replace `tb_pc()` with `tb->pc`
+      target/tricore: Replace `tb_pc()` with `tb->pc`
+      target/sparc: Replace `tb_pc()` with `tb->pc`
+      target/sh4: Replace `tb_pc()` with `tb->pc`
+      target/rx: Replace `tb_pc()` with `tb->pc`
+      target/riscv: Replace `tb_pc()` with `tb->pc`
+      target/openrisc: Replace `tb_pc()` with `tb->pc`
+      target/mips: Replace `tb_pc()` with `tb->pc`
+      target/microblaze: Replace `tb_pc()` with `tb->pc`
+      target/loongarch: Replace `tb_pc()` with `tb->pc`
+      target/i386: Replace `tb_pc()` with `tb->pc`
+      target/hppa: Replace `tb_pc()` with `tb->pc`
+      target/hexagon: Replace `tb_pc()` with `tb->pc`
+      target/avr: Replace `tb_pc()` with `tb->pc`
+      target/arm: Replace `tb_pc()` with `tb->pc`
+      include/exec: Remove `tb_pc()`
+Daniel Henrique Barboza (1):
+      accel/tcg: Add 'size' param to probe_access_flags()
 Philippe Mathieu-Daudé (1):
-      target/sparc: Use memcpy() and remove memcpy32()
+      exec/helper-head: Include missing "fpu/softfloat-types.h" header
-Richard Henderson (2):
+Richard Henderson (32):
-      tcg: Reset free_temps before tcg_optimize
+      accel/tcg: Add 'size' param to probe_access_full
-      include/exec: Introduce fpst alias in helper-head.h.inc
+      tcg: Adjust TCGContext.temps_in_use check
       accel/tcg: Pass max_insn to gen_intermediate_code by pointer
       accel/tcg: Use more accurate max_insns for tb_overflow
       tcg: Remove branch-to-next regardless of reference count
       tcg: Rename TEMP_LOCAL to TEMP_TB
       tcg: Use noinline for major tcg_gen_code subroutines
       tcg: Add liveness_pass_0
       tcg: Remove TEMP_NORMAL
       tcg: Pass TCGTempKind to tcg_temp_new_internal
       tcg: Use tcg_constant_i32 in tcg_gen_io_start
       tcg: Add tcg_gen_movi_ptr
       tcg: Add tcg_temp_ebb_new_{i32,i64,ptr}
       tcg: Use tcg_temp_ebb_new_* in tcg/
       tcg: Use tcg_constant_ptr in do_dup
       accel/tcg/plugin: Use tcg_temp_ebb_*
       accel/tcg/plugin: Tidy plugin_gen_disable_mem_helpers
       tcg: Don't re-use TEMP_TB temporaries
       tcg: Change default temp lifetime to TEMP_TB
       target/arm: Drop copies in gen_sve_{ldr,str}
       target/arm: Don't use tcg_temp_local_new_*
       target/cris: Don't use tcg_temp_local_new
       target/hexagon: Don't use tcg_temp_local_new_*
       target/hexagon/idef-parser: Drop gen_tmp_local
       target/hppa: Don't use tcg_temp_local_new
       target/i386: Don't use tcg_temp_local_new
       target/mips: Don't use tcg_temp_local_new
       target/ppc: Don't use tcg_temp_local_new
       target/xtensa: Don't use tcg_temp_local_new_*
       exec/gen-icount: Don't use tcg_temp_local_new_i32
       tcg: Remove tcg_temp_local_new_*, tcg_const_local_*
       tcg: Update docs/devel/tcg-ops.rst for temporary changes
-Roman Artemev (1):
+ docs/devel/tcg-ops.rst                      | 230 +++++++++++++----------
-      tcg/riscv: Fix StoreStore barrier generation
+ target/hexagon/idef-parser/README.rst       |   4 +-
  accel/tcg/internal.h                        |  10 +-
  accel/tcg/tb-jmp-cache.h                    |  42 +----
  include/exec/cpu-defs.h                     |   3 -
  include/exec/exec-all.h                     |  26 +--
  include/exec/gen-icount.h                   |  12 +-
  include/exec/helper-head.h                  |   2 +
  include/exec/translator.h                   |   4 +-
  include/tcg/tcg-op.h                        |   7 +-
  include/tcg/tcg.h                           |  64 ++++---
  target/arm/cpu-param.h                      |   2 -
  target/arm/tcg/translate-a64.h              |   1 -
  target/arm/tcg/translate.h                  |   2 +-
  target/hexagon/gen_tcg.h                    |   4 +-
  target/i386/cpu-param.h                     |   4 -
  accel/stubs/tcg-stub.c                      |   2 +-
  accel/tcg/cpu-exec.c                        |  62 ++++--
  accel/tcg/cputlb.c                          |  21 ++-
  accel/tcg/perf.c                            |   2 +-
  accel/tcg/plugin-gen.c                      |  32 ++--
  accel/tcg/tb-maint.c                        |  10 +-
  accel/tcg/translate-all.c                   |  18 +-
  accel/tcg/translator.c                      |   6 +-
  accel/tcg/user-exec.c                       |   5 +-
  semihosting/uaccess.c                       |   2 +-
  softmmu/physmem.c                           |   2 +-
  target/alpha/translate.c                    |   2 +-
  target/arm/cpu.c                            |  17 +-
  target/arm/ptw.c                            |   4 +-
  target/arm/tcg/mte_helper.c                 |   4 +-
  target/arm/tcg/sve_helper.c                 |   4 +-
  target/arm/tcg/translate-a64.c              |  16 +-
  target/arm/tcg/translate-sve.c              |  38 +---
  target/arm/tcg/translate.c                  |  14 +-
  target/avr/cpu.c                            |   3 +-
  target/avr/translate.c                      |   2 +-
  target/cris/translate.c                     |   8 +-
  target/hexagon/cpu.c                        |   4 +-
  target/hexagon/genptr.c                     |  16 +-
  target/hexagon/idef-parser/parser-helpers.c |  26 +--
  target/hexagon/translate.c                  |   4 +-
  target/hppa/cpu.c                           |   8 +-
  target/hppa/translate.c                     |   5 +-
  target/i386/cpu.c                           |   5 +
  target/i386/helper.c                        |   2 +-
  target/i386/tcg/sysemu/excp_helper.c        |   4 +-
  target/i386/tcg/tcg-cpu.c                   |   8 +-
  target/i386/tcg/translate.c                 |  55 +++---
  target/loongarch/cpu.c                      |   6 +-
  target/loongarch/translate.c                |   2 +-
  target/m68k/translate.c                     |   2 +-
  target/microblaze/cpu.c                     |   4 +-
  target/microblaze/translate.c               |   2 +-
  target/mips/tcg/exception.c                 |   3 +-
  target/mips/tcg/sysemu/special_helper.c     |   2 +-
  target/mips/tcg/translate.c                 |  59 ++----
  target/nios2/translate.c                    |   2 +-
  target/openrisc/cpu.c                       |   4 +-
  target/openrisc/translate.c                 |   2 +-
  target/ppc/translate.c                      |   8 +-
  target/riscv/cpu.c                          |   7 +-
  target/riscv/translate.c                    |   2 +-
  target/rx/cpu.c                             |   3 +-
  target/rx/translate.c                       |   2 +-
  target/s390x/tcg/mem_helper.c               |   2 +-
  target/s390x/tcg/translate.c                |   2 +-
  target/sh4/cpu.c                            |   6 +-
  target/sh4/translate.c                      |   2 +-
  target/sparc/cpu.c                          |   4 +-
  target/sparc/translate.c                    |   2 +-
  target/tricore/cpu.c                        |   3 +-
  target/tricore/translate.c                  |   2 +-
  target/xtensa/translate.c                   |  18 +-
  tcg/optimize.c                              |   2 +-
  tcg/tcg-op-gvec.c                           | 189 ++++++++++---------
  tcg/tcg-op.c                                | 258 ++++++++++++-------------
  tcg/tcg.c                                   | 280 ++++++++++++++++------------
  target/cris/translate_v10.c.inc             |  10 +-
  target/mips/tcg/nanomips_translate.c.inc    |   4 +-
  target/ppc/translate/spe-impl.c.inc         |   8 +-
  target/ppc/translate/vmx-impl.c.inc         |   4 +-
  target/hexagon/README                       |   8 +-
  target/hexagon/gen_tcg_funcs.py             |  18 +-
 files changed, 870 insertions(+), 890 deletions(-)
- include/tcg/tcg-temp-internal.h |  6 ++++++
- accel/tcg/plugin-gen.c          |  2 +-
- target/sparc/win_helper.c       | 26 ++++++++------------------
- tcg/tcg.c                       |  5 ++++-
- include/exec/helper-head.h.inc  |  3 +++
- tcg/riscv/tcg-target.c.inc      |  2 +-
-files changed, 23 insertions(+), 21 deletions(-)

-[PULL 1/4] tcg: Reset free_temps before tcg_optimize
+Deleted patch
-When allocating new temps during tcg_optmize, do not re-use
-any EBB temps that were used within the TB.  We do not have
-any idea what span of the TB in which the temp was live.
-Introduce tcg_temp_ebb_reset_freed and use before tcg_optimize,
-as well as replacing the equivalent in plugin_gen_inject and
-tcg_func_start.
-Cc: qemu-stable@nongnu.org
-Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported")
-Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2711
-Reported-by: wannacu <wannacu2049@gmail.com>
-Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
-Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
----
- include/tcg/tcg-temp-internal.h | 6 ++++++
- accel/tcg/plugin-gen.c          | 2 +-
- tcg/tcg.c                       | 5 ++++-
-files changed, 11 insertions(+), 2 deletions(-)
-diff --git a/include/tcg/tcg-temp-internal.h b/include/tcg/tcg-temp-internal.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/tcg/tcg-temp-internal.h
-+++ b/include/tcg/tcg-temp-internal.h
-@@ -XXX,XX +XXX,XX @@ TCGv_i64 tcg_temp_ebb_new_i64(void);
- TCGv_ptr tcg_temp_ebb_new_ptr(void);
- TCGv_i128 tcg_temp_ebb_new_i128(void);
-+/* Forget all freed EBB temps, so that new allocations produce new temps. */
-+static inline void tcg_temp_ebb_reset_freed(TCGContext *s)
-+{
-+    memset(s->free_temps, 0, sizeof(s->free_temps));
-+}
-+
- #endif /* TCG_TEMP_FREE_H */
-diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
-index XXXXXXX..XXXXXXX 100644
---- a/accel/tcg/plugin-gen.c
-+++ b/accel/tcg/plugin-gen.c
-@@ -XXX,XX +XXX,XX @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb)
-      * that might be live within the existing opcode stream.
-      * The simplest solution is to release them all and create new.
-      */
--    memset(tcg_ctx->free_temps, 0, sizeof(tcg_ctx->free_temps));
-+    tcg_temp_ebb_reset_freed(tcg_ctx);
-     QTAILQ_FOREACH_SAFE(op, &tcg_ctx->ops, link, next) {
-         switch (op->opc) {
-diff --git a/tcg/tcg.c b/tcg/tcg.c
-index XXXXXXX..XXXXXXX 100644
---- a/tcg/tcg.c
-+++ b/tcg/tcg.c
-@@ -XXX,XX +XXX,XX @@ void tcg_func_start(TCGContext *s)
-     s->nb_temps = s->nb_globals;
-     /* No temps have been previously allocated for size or locality.  */
--    memset(s->free_temps, 0, sizeof(s->free_temps));
-+    tcg_temp_ebb_reset_freed(s);
-     /* No constant temps have been previously allocated. */
-     for (int i = 0; i < TCG_TYPE_COUNT; ++i) {
-@@ -XXX,XX +XXX,XX @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start)
-     }
- #endif
-+    /* Do not reuse any EBB that may be allocated within the TB. */
-+    tcg_temp_ebb_reset_freed(s);
-+
-     tcg_optimize(s);
-     reachable_code_pass(s);
---
-.43.0

-[PULL 2/4] tcg/riscv: Fix StoreStore barrier generation
+Deleted patch
-From: Roman Artemev <roman.artemev@syntacore.com>
-On RISC-V to StoreStore barrier corresponds
-`fence w, w` not `fence r, r`
-Cc: qemu-stable@nongnu.org
-Fixes: efbea94c76b ("tcg/riscv: Add slowpath load and store instructions")
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-Signed-off-by: Denis Tomashev <denis.tomashev@syntacore.com>
-Signed-off-by: Roman Artemev <roman.artemev@syntacore.com>
-Message-ID: <e2f2131e294a49e79959d4fa9ec02cf4@syntacore.com>
-Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
----
- tcg/riscv/tcg-target.c.inc | 2 +-
-file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
-index XXXXXXX..XXXXXXX 100644
---- a/tcg/riscv/tcg-target.c.inc
-+++ b/tcg/riscv/tcg-target.c.inc
-@@ -XXX,XX +XXX,XX @@ static void tcg_out_mb(TCGContext *s, TCGArg a0)
-         insn |= 0x02100000;
-     }
-     if (a0 & TCG_MO_ST_ST) {
--        insn |= 0x02200000;
-+        insn |= 0x01100000;
-     }
-     tcg_out32(s, insn);
- }
---
-.43.0

-[PULL 3/4] include/exec: Introduce fpst alias in helper-head.h.inc
+Deleted patch
-This allows targets to declare that the helper requires a
-float_status pointer and instead of a generic void pointer.
-Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
-Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
----
- include/exec/helper-head.h.inc | 3 +++
-file changed, 3 insertions(+)
-diff --git a/include/exec/helper-head.h.inc b/include/exec/helper-head.h.inc
-index XXXXXXX..XXXXXXX 100644
---- a/include/exec/helper-head.h.inc
-+++ b/include/exec/helper-head.h.inc
-@@ -XXX,XX +XXX,XX @@
- #define dh_alias_ptr ptr
- #define dh_alias_cptr ptr
- #define dh_alias_env ptr
-+#define dh_alias_fpst ptr
- #define dh_alias_void void
- #define dh_alias_noreturn noreturn
- #define dh_alias(t) glue(dh_alias_, t)
-@@ -XXX,XX +XXX,XX @@
- #define dh_ctype_ptr void *
- #define dh_ctype_cptr const void *
- #define dh_ctype_env CPUArchState *
-+#define dh_ctype_fpst float_status *
- #define dh_ctype_void void
- #define dh_ctype_noreturn G_NORETURN void
- #define dh_ctype(t) dh_ctype_##t
-@@ -XXX,XX +XXX,XX @@
- #define dh_typecode_f64 dh_typecode_i64
- #define dh_typecode_cptr dh_typecode_ptr
- #define dh_typecode_env dh_typecode_ptr
-+#define dh_typecode_fpst dh_typecode_ptr
- #define dh_typecode(t) dh_typecode_##t
- #define dh_callflag_i32  0
---
-.43.0

-[PULL 4/4] target/sparc: Use memcpy() and remove memcpy32()
+Deleted patch
-From: Philippe Mathieu-Daudé <philmd@linaro.org>
-Rather than manually copying each register, use
-the libc memcpy(), which is well optimized nowadays.
-Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
-Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
-Message-ID: <20241205205418.67613-1-philmd@linaro.org>
-Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
----
- target/sparc/win_helper.c | 26 ++++++++------------------
-file changed, 8 insertions(+), 18 deletions(-)
-diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c
-index XXXXXXX..XXXXXXX 100644
---- a/target/sparc/win_helper.c
-+++ b/target/sparc/win_helper.c
-@@ -XXX,XX +XXX,XX @@
- #include "exec/helper-proto.h"
- #include "trace.h"
--static inline void memcpy32(target_ulong *dst, const target_ulong *src)
--{
--    dst[0] = src[0];
--    dst[1] = src[1];
--    dst[2] = src[2];
--    dst[3] = src[3];
--    dst[4] = src[4];
--    dst[5] = src[5];
--    dst[6] = src[6];
--    dst[7] = src[7];
--}
--
- void cpu_set_cwp(CPUSPARCState *env, int new_cwp)
- {
-     /* put the modified wrap registers at their proper location */
-     if (env->cwp == env->nwindows - 1) {
--        memcpy32(env->regbase, env->regbase + env->nwindows * 16);
-+        memcpy(env->regbase, env->regbase + env->nwindows * 16,
-+               sizeof(env->gregs));
-     }
-     env->cwp = new_cwp;
-     /* put the wrap registers at their temporary location */
-     if (new_cwp == env->nwindows - 1) {
--        memcpy32(env->regbase + env->nwindows * 16, env->regbase);
-+        memcpy(env->regbase + env->nwindows * 16, env->regbase,
-+               sizeof(env->gregs));
-     }
-     env->regwptr = env->regbase + (new_cwp * 16);
- }
-@@ -XXX,XX +XXX,XX @@ void cpu_gl_switch_gregs(CPUSPARCState *env, uint32_t new_gl)
-     dst = get_gl_gregset(env, env->gl);
-     if (src != dst) {
--        memcpy32(dst, env->gregs);
--        memcpy32(env->gregs, src);
-+        memcpy(dst, env->gregs, sizeof(env->gregs));
-+        memcpy(env->gregs, src, sizeof(env->gregs));
-     }
- }
-@@ -XXX,XX +XXX,XX @@ void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate)
-         /* Switch global register bank */
-         src = get_gregset(env, new_pstate_regs);
-         dst = get_gregset(env, pstate_regs);
--        memcpy32(dst, env->gregs);
--        memcpy32(env->gregs, src);
-+        memcpy(dst, env->gregs, sizeof(env->gregs));
-+        memcpy(env->gregs, src, sizeof(env->gregs));
-     } else {
-         trace_win_helper_no_switch_pstate(new_pstate_regs);
-     }
---
-.43.0

Pretty small still, but there are two patches that ought
to get backported to stable, so no point in delaying.

The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:

Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)

are available in the Git repository at:

https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241212

for you to fetch changes up to 7ac87b14a92234b6a89b701b4043ad6cf8bdcccf:

target/sparc: Use memcpy() and remove memcpy32() (2024-12-12 14:28:38 -0600)

----------------------------------------------------------------
tcg: Reset free_temps before tcg_optimize
tcg/riscv: Fix StoreStore barrier generation
include/exec: Introduce fpst alias in helper-head.h.inc
target/sparc: Use memcpy() and remove memcpy32()

----------------------------------------------------------------
Philippe Mathieu-Daudé (1):
      target/sparc: Use memcpy() and remove memcpy32()

Richard Henderson (2):
      tcg: Reset free_temps before tcg_optimize
      include/exec: Introduce fpst alias in helper-head.h.inc

Roman Artemev (1):
      tcg/riscv: Fix StoreStore barrier generation

When allocating new temps during tcg_optmize, do not re-use
any EBB temps that were used within the TB.  We do not have
any idea what span of the TB in which the temp was live.

Introduce tcg_temp_ebb_reset_freed and use before tcg_optimize,
as well as replacing the equivalent in plugin_gen_inject and
tcg_func_start.

Cc: qemu-stable@nongnu.org
Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2711
Reported-by: wannacu <wannacu2049@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/tcg/tcg-temp-internal.h | 6 ++++++
 accel/tcg/plugin-gen.c          | 2 +-
 tcg/tcg.c                       | 5 ++++-
 3 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/include/tcg/tcg-temp-internal.h b/include/tcg/tcg-temp-internal.h
index XXXXXXX..XXXXXXX 100644
--- a/include/tcg/tcg-temp-internal.h
+++ b/include/tcg/tcg-temp-internal.h
@@ -XXX,XX +XXX,XX @@ TCGv_i64 tcg_temp_ebb_new_i64(void);
 TCGv_ptr tcg_temp_ebb_new_ptr(void);
 TCGv_i128 tcg_temp_ebb_new_i128(void);
 
+/* Forget all freed EBB temps, so that new allocations produce new temps. */
+static inline void tcg_temp_ebb_reset_freed(TCGContext *s)
+{
+    memset(s->free_temps, 0, sizeof(s->free_temps));
+}
+
 #endif /* TCG_TEMP_FREE_H */
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
index XXXXXXX..XXXXXXX 100644
--- a/accel/tcg/plugin-gen.c
+++ b/accel/tcg/plugin-gen.c
@@ -XXX,XX +XXX,XX @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb)
      * that might be live within the existing opcode stream.
      * The simplest solution is to release them all and create new.
      */
-    memset(tcg_ctx->free_temps, 0, sizeof(tcg_ctx->free_temps));
+    tcg_temp_ebb_reset_freed(tcg_ctx);
 
     QTAILQ_FOREACH_SAFE(op, &tcg_ctx->ops, link, next) {
         switch (op->opc) {
diff --git a/tcg/tcg.c b/tcg/tcg.c
index XXXXXXX..XXXXXXX 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -XXX,XX +XXX,XX @@ void tcg_func_start(TCGContext *s)
     s->nb_temps = s->nb_globals;
 
     /* No temps have been previously allocated for size or locality.  */
-    memset(s->free_temps, 0, sizeof(s->free_temps));
+    tcg_temp_ebb_reset_freed(s);
 
     /* No constant temps have been previously allocated. */
     for (int i = 0; i < TCG_TYPE_COUNT; ++i) {
@@ -XXX,XX +XXX,XX @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start)
     }
 #endif
 
+    /* Do not reuse any EBB that may be allocated within the TB. */
+    tcg_temp_ebb_reset_freed(s);
+
     tcg_optimize(s);
 
     reachable_code_pass(s);
-- 
2.43.0

From: Roman Artemev <roman.artemev@syntacore.com>

On RISC-V to StoreStore barrier corresponds
`fence w, w` not `fence r, r`

Cc: qemu-stable@nongnu.org
Fixes: efbea94c76b ("tcg/riscv: Add slowpath load and store instructions")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Denis Tomashev <denis.tomashev@syntacore.com>
Signed-off-by: Roman Artemev <roman.artemev@syntacore.com>
Message-ID: <e2f2131e294a49e79959d4fa9ec02cf4@syntacore.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/riscv/tcg-target.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -XXX,XX +XXX,XX @@ static void tcg_out_mb(TCGContext *s, TCGArg a0)
         insn |= 0x02100000;
     }
     if (a0 & TCG_MO_ST_ST) {
-        insn |= 0x02200000;
+        insn |= 0x01100000;
     }
     tcg_out32(s, insn);
 }
-- 
2.43.0

This allows targets to declare that the helper requires a
float_status pointer and instead of a generic void pointer.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/exec/helper-head.h.inc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/exec/helper-head.h.inc b/include/exec/helper-head.h.inc
index XXXXXXX..XXXXXXX 100644
--- a/include/exec/helper-head.h.inc
+++ b/include/exec/helper-head.h.inc
@@ -XXX,XX +XXX,XX @@
 #define dh_alias_ptr ptr
 #define dh_alias_cptr ptr
 #define dh_alias_env ptr
+#define dh_alias_fpst ptr
 #define dh_alias_void void
 #define dh_alias_noreturn noreturn
 #define dh_alias(t) glue(dh_alias_, t)
@@ -XXX,XX +XXX,XX @@
 #define dh_ctype_ptr void *
 #define dh_ctype_cptr const void *
 #define dh_ctype_env CPUArchState *
+#define dh_ctype_fpst float_status *
 #define dh_ctype_void void
 #define dh_ctype_noreturn G_NORETURN void
 #define dh_ctype(t) dh_ctype_##t
@@ -XXX,XX +XXX,XX @@
 #define dh_typecode_f64 dh_typecode_i64
 #define dh_typecode_cptr dh_typecode_ptr
 #define dh_typecode_env dh_typecode_ptr
+#define dh_typecode_fpst dh_typecode_ptr
 #define dh_typecode(t) dh_typecode_##t
 
 #define dh_callflag_i32  0
-- 
2.43.0

From: Philippe Mathieu-Daudé <philmd@linaro.org>

Rather than manually copying each register, use
the libc memcpy(), which is well optimized nowadays.

Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20241205205418.67613-1-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/sparc/win_helper.c | 26 ++++++++------------------
 1 file changed, 8 insertions(+), 18 deletions(-)

diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c
index XXXXXXX..XXXXXXX 100644
--- a/target/sparc/win_helper.c
+++ b/target/sparc/win_helper.c
@@ -XXX,XX +XXX,XX @@
 #include "exec/helper-proto.h"
 #include "trace.h"
 
-static inline void memcpy32(target_ulong *dst, const target_ulong *src)
-{
-    dst[0] = src[0];
-    dst[1] = src[1];
-    dst[2] = src[2];
-    dst[3] = src[3];
-    dst[4] = src[4];
-    dst[5] = src[5];
-    dst[6] = src[6];
-    dst[7] = src[7];
-}
-
 void cpu_set_cwp(CPUSPARCState *env, int new_cwp)
 {
     /* put the modified wrap registers at their proper location */
     if (env->cwp == env->nwindows - 1) {
-        memcpy32(env->regbase, env->regbase + env->nwindows * 16);
+        memcpy(env->regbase, env->regbase + env->nwindows * 16,
+               sizeof(env->gregs));
     }
     env->cwp = new_cwp;
 
     /* put the wrap registers at their temporary location */
     if (new_cwp == env->nwindows - 1) {
-        memcpy32(env->regbase + env->nwindows * 16, env->regbase);
+        memcpy(env->regbase + env->nwindows * 16, env->regbase,
+               sizeof(env->gregs));
     }
     env->regwptr = env->regbase + (new_cwp * 16);
 }
@@ -XXX,XX +XXX,XX @@ void cpu_gl_switch_gregs(CPUSPARCState *env, uint32_t new_gl)
     dst = get_gl_gregset(env, env->gl);
 
     if (src != dst) {
-        memcpy32(dst, env->gregs);
-        memcpy32(env->gregs, src);
+        memcpy(dst, env->gregs, sizeof(env->gregs));
+        memcpy(env->gregs, src, sizeof(env->gregs));
     }
 }
 
@@ -XXX,XX +XXX,XX @@ void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate)
         /* Switch global register bank */
         src = get_gregset(env, new_pstate_regs);
         dst = get_gregset(env, pstate_regs);
-        memcpy32(dst, env->gregs);
-        memcpy32(env->gregs, src);
+        memcpy(dst, env->gregs, sizeof(env->gregs));
+        memcpy(env->gregs, src, sizeof(env->gregs));
     } else {
         trace_win_helper_no_switch_pstate(new_pstate_regs);
     }
-- 
2.43.0

v2: Fix mis-attributed --author.

The following changes since commit 627634031092e1514f363fd8659a579398de0f0e:

Merge tag 'buildsys-qom-qdev-ui-20230227' of https://github.com/philmd/qemu into staging (2023-02-28 15:09:18 +0000)

are available in the Git repository at:

https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230301

for you to fetch changes up to 9644e7142a2a2bb4b4743a3a4c940edbab16ca11:

tcg: Update docs/devel/tcg-ops.rst for temporary changes (2023-03-01 07:33:28 -1000)

----------------------------------------------------------------
helper-head: Add fpu/softfloat-types.h
softmmu: Use memmove in flatview_write_continue
tcg: Add sign param to probe_access_flags, probe_access_full
tcg: Convert TARGET_TB_PCREL to CF_PCREL
tcg: Simplify temporary lifetimes for translators

----------------------------------------------------------------
Akihiko Odaki (1):
      softmmu: Use memmove in flatview_write_continue

Anton Johansson (27):
      include/exec: Introduce `CF_PCREL`
      target/i386: set `CF_PCREL` in `x86_cpu_realizefn`
      target/arm: set `CF_PCREL` in `arm_cpu_realizefn`
      accel/tcg: Replace `TARGET_TB_PCREL` with `CF_PCREL`
      include/exec: Replace `TARGET_TB_PCREL` with `CF_PCREL`
      target/arm: Replace `TARGET_TB_PCREL` with `CF_PCREL`
      target/i386: Replace `TARGET_TB_PCREL` with `CF_PCREL`
      include/exec: Remove `TARGET_TB_PCREL` define
      target/arm: Remove `TARGET_TB_PCREL` define
      target/i386: Remove `TARGET_TB_PCREL` define
      accel/tcg: Move jmp-cache `CF_PCREL` checks to caller
      accel/tcg: Replace `tb_pc()` with `tb->pc`
      target/tricore: Replace `tb_pc()` with `tb->pc`
      target/sparc: Replace `tb_pc()` with `tb->pc`
      target/sh4: Replace `tb_pc()` with `tb->pc`
      target/rx: Replace `tb_pc()` with `tb->pc`
      target/riscv: Replace `tb_pc()` with `tb->pc`
      target/openrisc: Replace `tb_pc()` with `tb->pc`
      target/mips: Replace `tb_pc()` with `tb->pc`
      target/microblaze: Replace `tb_pc()` with `tb->pc`
      target/loongarch: Replace `tb_pc()` with `tb->pc`
      target/i386: Replace `tb_pc()` with `tb->pc`
      target/hppa: Replace `tb_pc()` with `tb->pc`
      target/hexagon: Replace `tb_pc()` with `tb->pc`
      target/avr: Replace `tb_pc()` with `tb->pc`
      target/arm: Replace `tb_pc()` with `tb->pc`
      include/exec: Remove `tb_pc()`

Daniel Henrique Barboza (1):
      accel/tcg: Add 'size' param to probe_access_flags()

Philippe Mathieu-Daudé (1):
      exec/helper-head: Include missing "fpu/softfloat-types.h" header

Richard Henderson (32):
      accel/tcg: Add 'size' param to probe_access_full
      tcg: Adjust TCGContext.temps_in_use check
      accel/tcg: Pass max_insn to gen_intermediate_code by pointer
      accel/tcg: Use more accurate max_insns for tb_overflow
      tcg: Remove branch-to-next regardless of reference count
      tcg: Rename TEMP_LOCAL to TEMP_TB
      tcg: Use noinline for major tcg_gen_code subroutines
      tcg: Add liveness_pass_0
      tcg: Remove TEMP_NORMAL
      tcg: Pass TCGTempKind to tcg_temp_new_internal
      tcg: Use tcg_constant_i32 in tcg_gen_io_start
      tcg: Add tcg_gen_movi_ptr
      tcg: Add tcg_temp_ebb_new_{i32,i64,ptr}
      tcg: Use tcg_temp_ebb_new_* in tcg/
      tcg: Use tcg_constant_ptr in do_dup
      accel/tcg/plugin: Use tcg_temp_ebb_*
      accel/tcg/plugin: Tidy plugin_gen_disable_mem_helpers
      tcg: Don't re-use TEMP_TB temporaries
      tcg: Change default temp lifetime to TEMP_TB
      target/arm: Drop copies in gen_sve_{ldr,str}
      target/arm: Don't use tcg_temp_local_new_*
      target/cris: Don't use tcg_temp_local_new
      target/hexagon: Don't use tcg_temp_local_new_*
      target/hexagon/idef-parser: Drop gen_tmp_local
      target/hppa: Don't use tcg_temp_local_new
      target/i386: Don't use tcg_temp_local_new
      target/mips: Don't use tcg_temp_local_new
      target/ppc: Don't use tcg_temp_local_new
      target/xtensa: Don't use tcg_temp_local_new_*
      exec/gen-icount: Don't use tcg_temp_local_new_i32
      tcg: Remove tcg_temp_local_new_*, tcg_const_local_*
      tcg: Update docs/devel/tcg-ops.rst for temporary changes