[PULL 0/4] tcg patch queue
[PULL v2 00/21] tcg patch queue
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Pretty small still, but there are two patches that ought
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Version 2: Drop signed 32-bit guest patches while CI failure examined.
2
to get backported to stable, so no point in delaying.
3
2
4
r~
5
3
6
The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:
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4
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Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)
5
The following changes since commit 3d1fbc59665ff8a5d74b0fd30583044fe99e1117:
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7
Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' into staging (2022-03-04 15:31:23 +0000)
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8
10
are available in the Git repository at:
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are available in the Git repository at:
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10
12
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241212
11
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220304
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12
14
for you to fetch changes up to 7ac87b14a92234b6a89b701b4043ad6cf8bdcccf:
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for you to fetch changes up to cf320769476c3e2820be2a6280bfa1e15baf396f:
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14
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target/sparc: Use memcpy() and remove memcpy32() (2024-12-12 14:28:38 -0600)
15
tcg/i386: Implement bitsel for avx512 (2022-03-04 08:50:41 -1000)
17
16
18
----------------------------------------------------------------
17
----------------------------------------------------------------
19
tcg: Reset free_temps before tcg_optimize
18
Reorder do_constant_folding_cond test to satisfy valgrind.
20
tcg/riscv: Fix StoreStore barrier generation
19
Fix value of MAX_OPC_PARAM_IARGS.
21
include/exec: Introduce fpst alias in helper-head.h.inc
20
Add opcodes for vector nand, nor, eqv.
22
target/sparc: Use memcpy() and remove memcpy32()
21
Support vector nand, nor, eqv on PPC and S390X hosts.
22
Support AVX512VL, AVX512BW, AVX512DQ, and AVX512VBMI2.
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23
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----------------------------------------------------------------
24
----------------------------------------------------------------
25
Philippe Mathieu-Daudé (1):
25
Alex Bennée (1):
26
target/sparc: Use memcpy() and remove memcpy32()
26
tcg/optimize: only read val after const check
27
27
28
Richard Henderson (2):
28
Richard Henderson (19):
29
tcg: Reset free_temps before tcg_optimize
29
tcg: Add opcodes for vector nand, nor, eqv
30
include/exec: Introduce fpst alias in helper-head.h.inc
30
tcg/ppc: Implement vector NAND, NOR, EQV
31
tcg/s390x: Implement vector NAND, NOR, EQV
32
tcg/i386: Detect AVX512
33
tcg/i386: Add tcg_out_evex_opc
34
tcg/i386: Use tcg_can_emit_vec_op in expand_vec_cmp_noinv
35
tcg/i386: Implement avx512 variable shifts
36
tcg/i386: Implement avx512 scalar shift
37
tcg/i386: Implement avx512 immediate sari shift
38
tcg/i386: Implement avx512 immediate rotate
39
tcg/i386: Implement avx512 variable rotate
40
tcg/i386: Support avx512vbmi2 vector shift-double instructions
41
tcg/i386: Expand vector word rotate as avx512vbmi2 shift-double
42
tcg/i386: Remove rotls_vec from tcg_target_op_def
43
tcg/i386: Expand scalar rotate with avx512 insns
44
tcg/i386: Implement avx512 min/max/abs
45
tcg/i386: Implement avx512 multiply
46
tcg/i386: Implement more logical operations for avx512
47
tcg/i386: Implement bitsel for avx512
31
48
32
Roman Artemev (1):
49
Ziqiao Kong (1):
33
tcg/riscv: Fix StoreStore barrier generation
50
tcg: Set MAX_OPC_PARAM_IARGS to 7
34
51
35
include/tcg/tcg-temp-internal.h | 6 ++++++
52
include/qemu/cpuid.h | 20 ++-
36
accel/tcg/plugin-gen.c | 2 +-
53
include/tcg/tcg-opc.h | 3 +
37
target/sparc/win_helper.c | 26 ++++++++------------------
54
include/tcg/tcg.h | 5 +-
38
tcg/tcg.c | 5 ++++-
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tcg/aarch64/tcg-target.h | 3 +
39
include/exec/helper-head.h.inc | 3 +++
56
tcg/arm/tcg-target.h | 3 +
40
tcg/riscv/tcg-target.c.inc | 2 +-
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tcg/i386/tcg-target-con-set.h | 1 +
41
6 files changed, 23 insertions(+), 21 deletions(-)
58
tcg/i386/tcg-target.h | 17 +-
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tcg/i386/tcg-target.opc.h | 3 +
60
tcg/ppc/tcg-target.h | 3 +
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tcg/s390x/tcg-target.h | 3 +
62
tcg/optimize.c | 20 +--
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tcg/tcg-op-vec.c | 27 ++-
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tcg/tcg.c | 6 +
65
tcg/i386/tcg-target.c.inc | 387 +++++++++++++++++++++++++++++++++++-------
66
tcg/ppc/tcg-target.c.inc | 15 ++
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tcg/s390x/tcg-target.c.inc | 17 ++
68
tcg/tci/tcg-target.c.inc | 2 +-
69
17 files changed, 441 insertions(+), 94 deletions(-)
42
70
diff view generated by jsdifflib
[PULL 1/4] tcg: Reset free_temps before tcg_optimize
Deleted patch
1
When allocating new temps during tcg_optmize, do not re-use
2
any EBB temps that were used within the TB. We do not have
3
any idea what span of the TB in which the temp was live.
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1
5
Introduce tcg_temp_ebb_reset_freed and use before tcg_optimize,
6
as well as replacing the equivalent in plugin_gen_inject and
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tcg_func_start.
8
9
Cc: qemu-stable@nongnu.org
10
Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported")
11
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2711
12
Reported-by: wannacu <wannacu2049@gmail.com>
13
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
15
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
16
---
17
include/tcg/tcg-temp-internal.h | 6 ++++++
18
accel/tcg/plugin-gen.c | 2 +-
19
tcg/tcg.c | 5 ++++-
20
3 files changed, 11 insertions(+), 2 deletions(-)
21
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diff --git a/include/tcg/tcg-temp-internal.h b/include/tcg/tcg-temp-internal.h
23
index XXXXXXX..XXXXXXX 100644
24
--- a/include/tcg/tcg-temp-internal.h
25
+++ b/include/tcg/tcg-temp-internal.h
26
@@ -XXX,XX +XXX,XX @@ TCGv_i64 tcg_temp_ebb_new_i64(void);
27
TCGv_ptr tcg_temp_ebb_new_ptr(void);
28
TCGv_i128 tcg_temp_ebb_new_i128(void);
29
30
+/* Forget all freed EBB temps, so that new allocations produce new temps. */
31
+static inline void tcg_temp_ebb_reset_freed(TCGContext *s)
32
+{
33
+ memset(s->free_temps, 0, sizeof(s->free_temps));
34
+}
35
+
36
#endif /* TCG_TEMP_FREE_H */
37
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
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index XXXXXXX..XXXXXXX 100644
39
--- a/accel/tcg/plugin-gen.c
40
+++ b/accel/tcg/plugin-gen.c
41
@@ -XXX,XX +XXX,XX @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb)
42
* that might be live within the existing opcode stream.
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* The simplest solution is to release them all and create new.
44
*/
45
- memset(tcg_ctx->free_temps, 0, sizeof(tcg_ctx->free_temps));
46
+ tcg_temp_ebb_reset_freed(tcg_ctx);
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QTAILQ_FOREACH_SAFE(op, &tcg_ctx->ops, link, next) {
49
switch (op->opc) {
50
diff --git a/tcg/tcg.c b/tcg/tcg.c
51
index XXXXXXX..XXXXXXX 100644
52
--- a/tcg/tcg.c
53
+++ b/tcg/tcg.c
54
@@ -XXX,XX +XXX,XX @@ void tcg_func_start(TCGContext *s)
55
s->nb_temps = s->nb_globals;
56
57
/* No temps have been previously allocated for size or locality. */
58
- memset(s->free_temps, 0, sizeof(s->free_temps));
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+ tcg_temp_ebb_reset_freed(s);
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/* No constant temps have been previously allocated. */
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for (int i = 0; i < TCG_TYPE_COUNT; ++i) {
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@@ -XXX,XX +XXX,XX @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start)
64
}
65
#endif
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+ /* Do not reuse any EBB that may be allocated within the TB. */
68
+ tcg_temp_ebb_reset_freed(s);
69
+
70
tcg_optimize(s);
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reachable_code_pass(s);
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--
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2.43.0
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76
diff view generated by jsdifflib
[PULL 2/4] tcg/riscv: Fix StoreStore barrier generation
Deleted patch
1
From: Roman Artemev <roman.artemev@syntacore.com>
2
1
3
On RISC-V to StoreStore barrier corresponds
4
`fence w, w` not `fence r, r`
5
6
Cc: qemu-stable@nongnu.org
7
Fixes: efbea94c76b ("tcg/riscv: Add slowpath load and store instructions")
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Signed-off-by: Denis Tomashev <denis.tomashev@syntacore.com>
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Signed-off-by: Roman Artemev <roman.artemev@syntacore.com>
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Message-ID: <e2f2131e294a49e79959d4fa9ec02cf4@syntacore.com>
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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---
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tcg/riscv/tcg-target.c.inc | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
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index XXXXXXX..XXXXXXX 100644
19
--- a/tcg/riscv/tcg-target.c.inc
20
+++ b/tcg/riscv/tcg-target.c.inc
21
@@ -XXX,XX +XXX,XX @@ static void tcg_out_mb(TCGContext *s, TCGArg a0)
22
insn |= 0x02100000;
23
}
24
if (a0 & TCG_MO_ST_ST) {
25
- insn |= 0x02200000;
26
+ insn |= 0x01100000;
27
}
28
tcg_out32(s, insn);
29
}
30
--
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2.43.0
diff view generated by jsdifflib
[PULL 3/4] include/exec: Introduce fpst alias in helper-head.h.inc
Deleted patch
1
This allows targets to declare that the helper requires a
2
float_status pointer and instead of a generic void pointer.
3
1
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
include/exec/helper-head.h.inc | 3 +++
8
1 file changed, 3 insertions(+)
9
10
diff --git a/include/exec/helper-head.h.inc b/include/exec/helper-head.h.inc
11
index XXXXXXX..XXXXXXX 100644
12
--- a/include/exec/helper-head.h.inc
13
+++ b/include/exec/helper-head.h.inc
14
@@ -XXX,XX +XXX,XX @@
15
#define dh_alias_ptr ptr
16
#define dh_alias_cptr ptr
17
#define dh_alias_env ptr
18
+#define dh_alias_fpst ptr
19
#define dh_alias_void void
20
#define dh_alias_noreturn noreturn
21
#define dh_alias(t) glue(dh_alias_, t)
22
@@ -XXX,XX +XXX,XX @@
23
#define dh_ctype_ptr void *
24
#define dh_ctype_cptr const void *
25
#define dh_ctype_env CPUArchState *
26
+#define dh_ctype_fpst float_status *
27
#define dh_ctype_void void
28
#define dh_ctype_noreturn G_NORETURN void
29
#define dh_ctype(t) dh_ctype_##t
30
@@ -XXX,XX +XXX,XX @@
31
#define dh_typecode_f64 dh_typecode_i64
32
#define dh_typecode_cptr dh_typecode_ptr
33
#define dh_typecode_env dh_typecode_ptr
34
+#define dh_typecode_fpst dh_typecode_ptr
35
#define dh_typecode(t) dh_typecode_##t
36
37
#define dh_callflag_i32 0
38
--
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2.43.0
40
41
diff view generated by jsdifflib
[PULL 4/4] target/sparc: Use memcpy() and remove memcpy32()
Deleted patch
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
1
3
Rather than manually copying each register, use
4
the libc memcpy(), which is well optimized nowadays.
5
6
Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
7
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
10
Message-ID: <20241205205418.67613-1-philmd@linaro.org>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
12
---
13
target/sparc/win_helper.c | 26 ++++++++------------------
14
1 file changed, 8 insertions(+), 18 deletions(-)
15
16
diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c
17
index XXXXXXX..XXXXXXX 100644
18
--- a/target/sparc/win_helper.c
19
+++ b/target/sparc/win_helper.c
20
@@ -XXX,XX +XXX,XX @@
21
#include "exec/helper-proto.h"
22
#include "trace.h"
23
24
-static inline void memcpy32(target_ulong *dst, const target_ulong *src)
25
-{
26
- dst[0] = src[0];
27
- dst[1] = src[1];
28
- dst[2] = src[2];
29
- dst[3] = src[3];
30
- dst[4] = src[4];
31
- dst[5] = src[5];
32
- dst[6] = src[6];
33
- dst[7] = src[7];
34
-}
35
-
36
void cpu_set_cwp(CPUSPARCState *env, int new_cwp)
37
{
38
/* put the modified wrap registers at their proper location */
39
if (env->cwp == env->nwindows - 1) {
40
- memcpy32(env->regbase, env->regbase + env->nwindows * 16);
41
+ memcpy(env->regbase, env->regbase + env->nwindows * 16,
42
+ sizeof(env->gregs));
43
}
44
env->cwp = new_cwp;
45
46
/* put the wrap registers at their temporary location */
47
if (new_cwp == env->nwindows - 1) {
48
- memcpy32(env->regbase + env->nwindows * 16, env->regbase);
49
+ memcpy(env->regbase + env->nwindows * 16, env->regbase,
50
+ sizeof(env->gregs));
51
}
52
env->regwptr = env->regbase + (new_cwp * 16);
53
}
54
@@ -XXX,XX +XXX,XX @@ void cpu_gl_switch_gregs(CPUSPARCState *env, uint32_t new_gl)
55
dst = get_gl_gregset(env, env->gl);
56
57
if (src != dst) {
58
- memcpy32(dst, env->gregs);
59
- memcpy32(env->gregs, src);
60
+ memcpy(dst, env->gregs, sizeof(env->gregs));
61
+ memcpy(env->gregs, src, sizeof(env->gregs));
62
}
63
}
64
65
@@ -XXX,XX +XXX,XX @@ void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate)
66
/* Switch global register bank */
67
src = get_gregset(env, new_pstate_regs);
68
dst = get_gregset(env, pstate_regs);
69
- memcpy32(dst, env->gregs);
70
- memcpy32(env->gregs, src);
71
+ memcpy(dst, env->gregs, sizeof(env->gregs));
72
+ memcpy(env->gregs, src, sizeof(env->gregs));
73
} else {
74
trace_win_helper_no_switch_pstate(new_pstate_regs);
75
}
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--
77
2.43.0
78
79
diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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