Series comparison

-[PULL 0/4] tcg patch queue
+[PULL v2 00/10] tcg patch queue
-Pretty small still, but there are two patches that ought
+V2 replaces the tcg const temp overflow patch.
-to get backported to stable, so no point in delaying.
 r~
-The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:
-  Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)
+The following changes since commit 0e32462630687a18039464511bd0447ada5709c3:
   Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.0-pull-request' into staging (2021-01-22 10:35:55 +0000)
 are available in the Git repository at:
-  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241212
+  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210124
-for you to fetch changes up to 7ac87b14a92234b6a89b701b4043ad6cf8bdcccf:
+for you to fetch changes up to ae30e86661b0f48562cd95918d37cbeec5d02262:
-  target/sparc: Use memcpy() and remove memcpy32() (2024-12-12 14:28:38 -0600)
+  tcg: Restart code generation when we run out of temps (2021-01-24 08:03:27 -1000)
 ----------------------------------------------------------------
-tcg: Reset free_temps before tcg_optimize
+Fix tcg constant temp overflow.
-tcg/riscv: Fix StoreStore barrier generation
+Fix running during atomic single-step.
-include/exec: Introduce fpst alias in helper-head.h.inc
+Partial support for apple silicon.
-target/sparc: Use memcpy() and remove memcpy32()
+Cleanups for accel/tcg.
 ----------------------------------------------------------------
-Philippe Mathieu-Daudé (1):
+Douglas Crosher (1):
-      target/sparc: Use memcpy() and remove memcpy32()
+      tcg: update the cpu running flag in cpu_exec_step_atomic
-Richard Henderson (2):
+Philippe Mathieu-Daudé (4):
-      tcg: Reset free_temps before tcg_optimize
+      accel/tcg: Make cpu_gen_init() static
-      include/exec: Introduce fpst alias in helper-head.h.inc
+      accel/tcg: Restrict tb_gen_code() from other accelerators
       accel/tcg: Declare missing cpu_loop_exit*() stubs
       accel/tcg: Restrict cpu_io_recompile() from other accelerators
-Roman Artemev (1):
+Richard Henderson (4):
-      tcg/riscv: Fix StoreStore barrier generation
+      qemu/compiler: Split out qemu_build_not_reached_always
       tcg: Optimize inline dup_const for MO_64
       accel/tcg: Move tb_flush_jmp_cache() to cputlb.c
       tcg: Restart code generation when we run out of temps
- include/tcg/tcg-temp-internal.h |  6 ++++++
+Roman Bolshakov (1):
- accel/tcg/plugin-gen.c          |  2 +-
+      tcg: Toggle page execution for Apple Silicon
  target/sparc/win_helper.c       | 26 ++++++++------------------
  tcg/tcg.c                       |  5 ++++-
  include/exec/helper-head.h.inc  |  3 +++
  tcg/riscv/tcg-target.c.inc      |  2 +-
 files changed, 23 insertions(+), 21 deletions(-)
+ accel/tcg/internal.h      | 20 ++++++++++++++++++++
+ include/exec/exec-all.h   | 11 -----------
+ include/qemu/compiler.h   |  5 +++--
+ include/qemu/osdep.h      | 28 ++++++++++++++++++++++++++++
+ include/tcg/tcg.h         |  6 +++++-
+ accel/stubs/tcg-stub.c    | 10 ++++++++++
+ accel/tcg/cpu-exec.c      |  7 +++++++
+ accel/tcg/cputlb.c        | 19 +++++++++++++++++++
+ accel/tcg/translate-all.c | 38 +++++++++++++++++++-------------------
+ tcg/tcg.c                 | 12 +++++++++---
+files changed, 120 insertions(+), 36 deletions(-)
+ create mode 100644 accel/tcg/internal.h

-[PULL 1/4] tcg: Reset free_temps before tcg_optimize
+[PULL v2 10/10] tcg: Restart code generation when we run out of temps
-When allocating new temps during tcg_optmize, do not re-use
+Some large translation blocks can generate so many unique
-any EBB temps that were used within the TB.  We do not have
+constants that we run out of temps to hold them.  In this
-any idea what span of the TB in which the temp was live.
+case, longjmp back to the start of code generation and
 restart with a smaller translation block.
-Introduce tcg_temp_ebb_reset_freed and use before tcg_optimize,
+Buglink: https://bugs.launchpad.net/bugs/1912065
-as well as replacing the equivalent in plugin_gen_inject and
+Tested-by: BALATON Zoltan <balaton@eik.bme.hu>
-tcg_func_start.
+Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 ---
  include/tcg/tcg.h         |  3 +++
  accel/tcg/translate-all.c | 15 ++++++++++++++-
  tcg/tcg.c                 | 11 ++++++++---
 files changed, 25 insertions(+), 4 deletions(-)
-Cc: qemu-stable@nongnu.org
+diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
 Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported")
 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2711
 Reported-by: wannacu <wannacu2049@gmail.com>
 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
 ---
  include/tcg/tcg-temp-internal.h | 6 ++++++
  accel/tcg/plugin-gen.c          | 2 +-
  tcg/tcg.c                       | 5 ++++-
 files changed, 11 insertions(+), 2 deletions(-)
 diff --git a/include/tcg/tcg-temp-internal.h b/include/tcg/tcg-temp-internal.h
 index XXXXXXX..XXXXXXX 100644
---- a/include/tcg/tcg-temp-internal.h
+--- a/include/tcg/tcg.h
-+++ b/include/tcg/tcg-temp-internal.h
++++ b/include/tcg/tcg.h
-@@ -XXX,XX +XXX,XX @@ TCGv_i64 tcg_temp_ebb_new_i64(void);
+@@ -XXX,XX +XXX,XX @@ struct TCGContext {
- TCGv_ptr tcg_temp_ebb_new_ptr(void);
- TCGv_i128 tcg_temp_ebb_new_i128(void);
+     uint16_t gen_insn_end_off[TCG_MAX_INSNS];
+     target_ulong gen_insn_data[TCG_MAX_INSNS][TARGET_INSN_START_WORDS];
 +/* Forget all freed EBB temps, so that new allocations produce new temps. */
 +static inline void tcg_temp_ebb_reset_freed(TCGContext *s)
 +{
 +    memset(s->free_temps, 0, sizeof(s->free_temps));
 +}
 +
- #endif /* TCG_TEMP_FREE_H */
++    /* Exit to translator on overflow. */
-diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
++    sigjmp_buf jmp_trans;
  };
  static inline bool temp_readonly(TCGTemp *ts)
 diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
 index XXXXXXX..XXXXXXX 100644
---- a/accel/tcg/plugin-gen.c
+--- a/accel/tcg/translate-all.c
-+++ b/accel/tcg/plugin-gen.c
++++ b/accel/tcg/translate-all.c
-@@ -XXX,XX +XXX,XX @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb)
+@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
-      * that might be live within the existing opcode stream.
+     ti = profile_getclock();
-      * The simplest solution is to release them all and create new.
+ #endif
-      */
--    memset(tcg_ctx->free_temps, 0, sizeof(tcg_ctx->free_temps));
++    gen_code_size = sigsetjmp(tcg_ctx->jmp_trans, 0);
-+    tcg_temp_ebb_reset_freed(tcg_ctx);
++    if (unlikely(gen_code_size != 0)) {
++        goto error_return;
-     QTAILQ_FOREACH_SAFE(op, &tcg_ctx->ops, link, next) {
++    }
-         switch (op->opc) {
++
      tcg_func_start(tcg_ctx);
      tcg_ctx->cpu = env_cpu(env);
      gen_intermediate_code(cpu, tb, max_insns);
      tcg_ctx->cpu = NULL;
 +    max_insns = tb->icount;
      trace_translate_block(tb, tb->pc, tb->tc.ptr);
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
      gen_code_size = tcg_gen_code(tcg_ctx, tb);
      if (unlikely(gen_code_size < 0)) {
 + error_return:
          switch (gen_code_size) {
          case -1:
              /*
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
               * flush the TBs, allocate a new TB, re-initialize it per
               * above, and re-do the actual code generation.
               */
 +            qemu_log_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT,
 +                          "Restarting code generation for "
 +                          "code_gen_buffer overflow\n");
              goto buffer_overflow;
          case -2:
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
               * Try again with half as many insns as we attempted this time.
               * If a single insn overflows, there's a bug somewhere...
               */
 -            max_insns = tb->icount;
              assert(max_insns > 1);
              max_insns /= 2;
 +            qemu_log_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT,
 +                          "Restarting code generation with "
 +                          "smaller translation block (max %d insns)\n",
 +                          max_insns);
              goto tb_overflow;
          default:
 diff --git a/tcg/tcg.c b/tcg/tcg.c
 index XXXXXXX..XXXXXXX 100644
 --- a/tcg/tcg.c
 +++ b/tcg/tcg.c
 @@ -XXX,XX +XXX,XX @@ void tcg_func_start(TCGContext *s)
-     s->nb_temps = s->nb_globals;
+     QSIMPLEQ_INIT(&s->labels);
+ }
-     /* No temps have been previously allocated for size or locality.  */
--    memset(s->free_temps, 0, sizeof(s->free_temps));
+-static inline TCGTemp *tcg_temp_alloc(TCGContext *s)
-+    tcg_temp_ebb_reset_freed(s);
++static TCGTemp *tcg_temp_alloc(TCGContext *s)
+ {
-     /* No constant temps have been previously allocated. */
+     int n = s->nb_temps++;
-     for (int i = 0; i < TCG_TYPE_COUNT; ++i) {
+-    tcg_debug_assert(n < TCG_MAX_TEMPS);
@@ -XXX,XX +XXX,XX @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start)
      }
  #endif
 +    /* Do not reuse any EBB that may be allocated within the TB. */
 +    tcg_temp_ebb_reset_freed(s);
 +
-     tcg_optimize(s);
++    if (n >= TCG_MAX_TEMPS) {
++        /* Signal overflow, starting over with fewer guest insns. */
-     reachable_code_pass(s);
++        siglongjmp(s->jmp_trans, -2);
 +    }
      return memset(&s->temps[n], 0, sizeof(TCGTemp));
  }
 -static inline TCGTemp *tcg_global_alloc(TCGContext *s)
 +static TCGTemp *tcg_global_alloc(TCGContext *s)
  {
      TCGTemp *ts;
      tcg_debug_assert(s->nb_globals == s->nb_temps);
 +    tcg_debug_assert(s->nb_globals < TCG_MAX_TEMPS);
      s->nb_globals++;
      ts = tcg_temp_alloc(s);
      ts->kind = TEMP_GLOBAL;
 --
-.43.0
+.25.1

-[PULL 2/4] tcg/riscv: Fix StoreStore barrier generation
+Deleted patch
-From: Roman Artemev <roman.artemev@syntacore.com>
-On RISC-V to StoreStore barrier corresponds
-`fence w, w` not `fence r, r`
-Cc: qemu-stable@nongnu.org
-Fixes: efbea94c76b ("tcg/riscv: Add slowpath load and store instructions")
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-Signed-off-by: Denis Tomashev <denis.tomashev@syntacore.com>
-Signed-off-by: Roman Artemev <roman.artemev@syntacore.com>
-Message-ID: <e2f2131e294a49e79959d4fa9ec02cf4@syntacore.com>
-Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
----
- tcg/riscv/tcg-target.c.inc | 2 +-
-file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
-index XXXXXXX..XXXXXXX 100644
---- a/tcg/riscv/tcg-target.c.inc
-+++ b/tcg/riscv/tcg-target.c.inc
-@@ -XXX,XX +XXX,XX @@ static void tcg_out_mb(TCGContext *s, TCGArg a0)
-         insn |= 0x02100000;
-     }
-     if (a0 & TCG_MO_ST_ST) {
--        insn |= 0x02200000;
-+        insn |= 0x01100000;
-     }
-     tcg_out32(s, insn);
- }
---
-.43.0

-[PULL 3/4] include/exec: Introduce fpst alias in helper-head.h.inc
+Deleted patch
-This allows targets to declare that the helper requires a
-float_status pointer and instead of a generic void pointer.
-Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
-Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
----
- include/exec/helper-head.h.inc | 3 +++
-file changed, 3 insertions(+)
-diff --git a/include/exec/helper-head.h.inc b/include/exec/helper-head.h.inc
-index XXXXXXX..XXXXXXX 100644
---- a/include/exec/helper-head.h.inc
-+++ b/include/exec/helper-head.h.inc
-@@ -XXX,XX +XXX,XX @@
- #define dh_alias_ptr ptr
- #define dh_alias_cptr ptr
- #define dh_alias_env ptr
-+#define dh_alias_fpst ptr
- #define dh_alias_void void
- #define dh_alias_noreturn noreturn
- #define dh_alias(t) glue(dh_alias_, t)
-@@ -XXX,XX +XXX,XX @@
- #define dh_ctype_ptr void *
- #define dh_ctype_cptr const void *
- #define dh_ctype_env CPUArchState *
-+#define dh_ctype_fpst float_status *
- #define dh_ctype_void void
- #define dh_ctype_noreturn G_NORETURN void
- #define dh_ctype(t) dh_ctype_##t
-@@ -XXX,XX +XXX,XX @@
- #define dh_typecode_f64 dh_typecode_i64
- #define dh_typecode_cptr dh_typecode_ptr
- #define dh_typecode_env dh_typecode_ptr
-+#define dh_typecode_fpst dh_typecode_ptr
- #define dh_typecode(t) dh_typecode_##t
- #define dh_callflag_i32  0
---
-.43.0

-[PULL 4/4] target/sparc: Use memcpy() and remove memcpy32()
+Deleted patch
-From: Philippe Mathieu-Daudé <philmd@linaro.org>
-Rather than manually copying each register, use
-the libc memcpy(), which is well optimized nowadays.
-Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
-Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
-Message-ID: <20241205205418.67613-1-philmd@linaro.org>
-Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
----
- target/sparc/win_helper.c | 26 ++++++++------------------
-file changed, 8 insertions(+), 18 deletions(-)
-diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c
-index XXXXXXX..XXXXXXX 100644
---- a/target/sparc/win_helper.c
-+++ b/target/sparc/win_helper.c
-@@ -XXX,XX +XXX,XX @@
- #include "exec/helper-proto.h"
- #include "trace.h"
--static inline void memcpy32(target_ulong *dst, const target_ulong *src)
--{
--    dst[0] = src[0];
--    dst[1] = src[1];
--    dst[2] = src[2];
--    dst[3] = src[3];
--    dst[4] = src[4];
--    dst[5] = src[5];
--    dst[6] = src[6];
--    dst[7] = src[7];
--}
--
- void cpu_set_cwp(CPUSPARCState *env, int new_cwp)
- {
-     /* put the modified wrap registers at their proper location */
-     if (env->cwp == env->nwindows - 1) {
--        memcpy32(env->regbase, env->regbase + env->nwindows * 16);
-+        memcpy(env->regbase, env->regbase + env->nwindows * 16,
-+               sizeof(env->gregs));
-     }
-     env->cwp = new_cwp;
-     /* put the wrap registers at their temporary location */
-     if (new_cwp == env->nwindows - 1) {
--        memcpy32(env->regbase + env->nwindows * 16, env->regbase);
-+        memcpy(env->regbase + env->nwindows * 16, env->regbase,
-+               sizeof(env->gregs));
-     }
-     env->regwptr = env->regbase + (new_cwp * 16);
- }
-@@ -XXX,XX +XXX,XX @@ void cpu_gl_switch_gregs(CPUSPARCState *env, uint32_t new_gl)
-     dst = get_gl_gregset(env, env->gl);
-     if (src != dst) {
--        memcpy32(dst, env->gregs);
--        memcpy32(env->gregs, src);
-+        memcpy(dst, env->gregs, sizeof(env->gregs));
-+        memcpy(env->gregs, src, sizeof(env->gregs));
-     }
- }
-@@ -XXX,XX +XXX,XX @@ void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate)
-         /* Switch global register bank */
-         src = get_gregset(env, new_pstate_regs);
-         dst = get_gregset(env, pstate_regs);
--        memcpy32(dst, env->gregs);
--        memcpy32(env->gregs, src);
-+        memcpy(dst, env->gregs, sizeof(env->gregs));
-+        memcpy(env->gregs, src, sizeof(env->gregs));
-     } else {
-         trace_win_helper_no_switch_pstate(new_pstate_regs);
-     }
---
-.43.0

Pretty small still, but there are two patches that ought
to get backported to stable, so no point in delaying.

The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:

Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)

are available in the Git repository at:

https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241212

for you to fetch changes up to 7ac87b14a92234b6a89b701b4043ad6cf8bdcccf:

target/sparc: Use memcpy() and remove memcpy32() (2024-12-12 14:28:38 -0600)

----------------------------------------------------------------
tcg: Reset free_temps before tcg_optimize
tcg/riscv: Fix StoreStore barrier generation
include/exec: Introduce fpst alias in helper-head.h.inc
target/sparc: Use memcpy() and remove memcpy32()

----------------------------------------------------------------
Philippe Mathieu-Daudé (1):
      target/sparc: Use memcpy() and remove memcpy32()

Richard Henderson (2):
      tcg: Reset free_temps before tcg_optimize
      include/exec: Introduce fpst alias in helper-head.h.inc

Roman Artemev (1):
      tcg/riscv: Fix StoreStore barrier generation

When allocating new temps during tcg_optmize, do not re-use
any EBB temps that were used within the TB.  We do not have
any idea what span of the TB in which the temp was live.

Introduce tcg_temp_ebb_reset_freed and use before tcg_optimize,
as well as replacing the equivalent in plugin_gen_inject and
tcg_func_start.

Cc: qemu-stable@nongnu.org
Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2711
Reported-by: wannacu <wannacu2049@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/tcg/tcg-temp-internal.h | 6 ++++++
 accel/tcg/plugin-gen.c          | 2 +-
 tcg/tcg.c                       | 5 ++++-
 3 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/include/tcg/tcg-temp-internal.h b/include/tcg/tcg-temp-internal.h
index XXXXXXX..XXXXXXX 100644
--- a/include/tcg/tcg-temp-internal.h
+++ b/include/tcg/tcg-temp-internal.h
@@ -XXX,XX +XXX,XX @@ TCGv_i64 tcg_temp_ebb_new_i64(void);
 TCGv_ptr tcg_temp_ebb_new_ptr(void);
 TCGv_i128 tcg_temp_ebb_new_i128(void);
 
+/* Forget all freed EBB temps, so that new allocations produce new temps. */
+static inline void tcg_temp_ebb_reset_freed(TCGContext *s)
+{
+    memset(s->free_temps, 0, sizeof(s->free_temps));
+}
+
 #endif /* TCG_TEMP_FREE_H */
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
index XXXXXXX..XXXXXXX 100644
--- a/accel/tcg/plugin-gen.c
+++ b/accel/tcg/plugin-gen.c
@@ -XXX,XX +XXX,XX @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb)
      * that might be live within the existing opcode stream.
      * The simplest solution is to release them all and create new.
      */
-    memset(tcg_ctx->free_temps, 0, sizeof(tcg_ctx->free_temps));
+    tcg_temp_ebb_reset_freed(tcg_ctx);
 
     QTAILQ_FOREACH_SAFE(op, &tcg_ctx->ops, link, next) {
         switch (op->opc) {
diff --git a/tcg/tcg.c b/tcg/tcg.c
index XXXXXXX..XXXXXXX 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -XXX,XX +XXX,XX @@ void tcg_func_start(TCGContext *s)
     s->nb_temps = s->nb_globals;
 
     /* No temps have been previously allocated for size or locality.  */
-    memset(s->free_temps, 0, sizeof(s->free_temps));
+    tcg_temp_ebb_reset_freed(s);
 
     /* No constant temps have been previously allocated. */
     for (int i = 0; i < TCG_TYPE_COUNT; ++i) {
@@ -XXX,XX +XXX,XX @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start)
     }
 #endif
 
+    /* Do not reuse any EBB that may be allocated within the TB. */
+    tcg_temp_ebb_reset_freed(s);
+
     tcg_optimize(s);
 
     reachable_code_pass(s);
-- 
2.43.0

From: Roman Artemev <roman.artemev@syntacore.com>

On RISC-V to StoreStore barrier corresponds
`fence w, w` not `fence r, r`

Cc: qemu-stable@nongnu.org
Fixes: efbea94c76b ("tcg/riscv: Add slowpath load and store instructions")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Denis Tomashev <denis.tomashev@syntacore.com>
Signed-off-by: Roman Artemev <roman.artemev@syntacore.com>
Message-ID: <e2f2131e294a49e79959d4fa9ec02cf4@syntacore.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/riscv/tcg-target.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -XXX,XX +XXX,XX @@ static void tcg_out_mb(TCGContext *s, TCGArg a0)
         insn |= 0x02100000;
     }
     if (a0 & TCG_MO_ST_ST) {
-        insn |= 0x02200000;
+        insn |= 0x01100000;
     }
     tcg_out32(s, insn);
 }
-- 
2.43.0

This allows targets to declare that the helper requires a
float_status pointer and instead of a generic void pointer.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/exec/helper-head.h.inc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/exec/helper-head.h.inc b/include/exec/helper-head.h.inc
index XXXXXXX..XXXXXXX 100644
--- a/include/exec/helper-head.h.inc
+++ b/include/exec/helper-head.h.inc
@@ -XXX,XX +XXX,XX @@
 #define dh_alias_ptr ptr
 #define dh_alias_cptr ptr
 #define dh_alias_env ptr
+#define dh_alias_fpst ptr
 #define dh_alias_void void
 #define dh_alias_noreturn noreturn
 #define dh_alias(t) glue(dh_alias_, t)
@@ -XXX,XX +XXX,XX @@
 #define dh_ctype_ptr void *
 #define dh_ctype_cptr const void *
 #define dh_ctype_env CPUArchState *
+#define dh_ctype_fpst float_status *
 #define dh_ctype_void void
 #define dh_ctype_noreturn G_NORETURN void
 #define dh_ctype(t) dh_ctype_##t
@@ -XXX,XX +XXX,XX @@
 #define dh_typecode_f64 dh_typecode_i64
 #define dh_typecode_cptr dh_typecode_ptr
 #define dh_typecode_env dh_typecode_ptr
+#define dh_typecode_fpst dh_typecode_ptr
 #define dh_typecode(t) dh_typecode_##t
 
 #define dh_callflag_i32  0
-- 
2.43.0

From: Philippe Mathieu-Daudé <philmd@linaro.org>

Rather than manually copying each register, use
the libc memcpy(), which is well optimized nowadays.

Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20241205205418.67613-1-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/sparc/win_helper.c | 26 ++++++++------------------
 1 file changed, 8 insertions(+), 18 deletions(-)

diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c
index XXXXXXX..XXXXXXX 100644
--- a/target/sparc/win_helper.c
+++ b/target/sparc/win_helper.c
@@ -XXX,XX +XXX,XX @@
 #include "exec/helper-proto.h"
 #include "trace.h"
 
-static inline void memcpy32(target_ulong *dst, const target_ulong *src)
-{
-    dst[0] = src[0];
-    dst[1] = src[1];
-    dst[2] = src[2];
-    dst[3] = src[3];
-    dst[4] = src[4];
-    dst[5] = src[5];
-    dst[6] = src[6];
-    dst[7] = src[7];
-}
-
 void cpu_set_cwp(CPUSPARCState *env, int new_cwp)
 {
     /* put the modified wrap registers at their proper location */
     if (env->cwp == env->nwindows - 1) {
-        memcpy32(env->regbase, env->regbase + env->nwindows * 16);
+        memcpy(env->regbase, env->regbase + env->nwindows * 16,
+               sizeof(env->gregs));
     }
     env->cwp = new_cwp;
 
     /* put the wrap registers at their temporary location */
     if (new_cwp == env->nwindows - 1) {
-        memcpy32(env->regbase + env->nwindows * 16, env->regbase);
+        memcpy(env->regbase + env->nwindows * 16, env->regbase,
+               sizeof(env->gregs));
     }
     env->regwptr = env->regbase + (new_cwp * 16);
 }
@@ -XXX,XX +XXX,XX @@ void cpu_gl_switch_gregs(CPUSPARCState *env, uint32_t new_gl)
     dst = get_gl_gregset(env, env->gl);
 
     if (src != dst) {
-        memcpy32(dst, env->gregs);
-        memcpy32(env->gregs, src);
+        memcpy(dst, env->gregs, sizeof(env->gregs));
+        memcpy(env->gregs, src, sizeof(env->gregs));
     }
 }
 
@@ -XXX,XX +XXX,XX @@ void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate)
         /* Switch global register bank */
         src = get_gregset(env, new_pstate_regs);
         dst = get_gregset(env, pstate_regs);
-        memcpy32(dst, env->gregs);
-        memcpy32(env->gregs, src);
+        memcpy(dst, env->gregs, sizeof(env->gregs));
+        memcpy(env->gregs, src, sizeof(env->gregs));
     } else {
         trace_win_helper_no_switch_pstate(new_pstate_regs);
     }
-- 
2.43.0

V2 replaces the tcg const temp overflow patch.

The following changes since commit 0e32462630687a18039464511bd0447ada5709c3:

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.0-pull-request' into staging (2021-01-22 10:35:55 +0000)

are available in the Git repository at:

https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210124

for you to fetch changes up to ae30e86661b0f48562cd95918d37cbeec5d02262:

tcg: Restart code generation when we run out of temps (2021-01-24 08:03:27 -1000)

----------------------------------------------------------------
Fix tcg constant temp overflow.
Fix running during atomic single-step.
Partial support for apple silicon.
Cleanups for accel/tcg.

----------------------------------------------------------------
Douglas Crosher (1):
      tcg: update the cpu running flag in cpu_exec_step_atomic

Philippe Mathieu-Daudé (4):
      accel/tcg: Make cpu_gen_init() static
      accel/tcg: Restrict tb_gen_code() from other accelerators
      accel/tcg: Declare missing cpu_loop_exit*() stubs
      accel/tcg: Restrict cpu_io_recompile() from other accelerators

Richard Henderson (4):
      qemu/compiler: Split out qemu_build_not_reached_always
      tcg: Optimize inline dup_const for MO_64
      accel/tcg: Move tb_flush_jmp_cache() to cputlb.c
      tcg: Restart code generation when we run out of temps

Roman Bolshakov (1):
      tcg: Toggle page execution for Apple Silicon

accel/tcg/internal.h      | 20 ++++++++++++++++++++
 include/exec/exec-all.h   | 11 -----------
 include/qemu/compiler.h   |  5 +++--
 include/qemu/osdep.h      | 28 ++++++++++++++++++++++++++++
 include/tcg/tcg.h         |  6 +++++-
 accel/stubs/tcg-stub.c    | 10 ++++++++++
 accel/tcg/cpu-exec.c      |  7 +++++++
 accel/tcg/cputlb.c        | 19 +++++++++++++++++++
 accel/tcg/translate-all.c | 38 +++++++++++++++++++-------------------
 tcg/tcg.c                 | 12 +++++++++---
 10 files changed, 120 insertions(+), 36 deletions(-)
 create mode 100644 accel/tcg/internal.h

Some large translation blocks can generate so many unique
constants that we run out of temps to hold them.  In this
case, longjmp back to the start of code generation and
restart with a smaller translation block.

Buglink: https://bugs.launchpad.net/bugs/1912065
Tested-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/tcg/tcg.h         |  3 +++
 accel/tcg/translate-all.c | 15 ++++++++++++++-
 tcg/tcg.c                 | 11 ++++++++---
 3 files changed, 25 insertions(+), 4 deletions(-)

diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index XXXXXXX..XXXXXXX 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -XXX,XX +XXX,XX @@ struct TCGContext {
 
     uint16_t gen_insn_end_off[TCG_MAX_INSNS];
     target_ulong gen_insn_data[TCG_MAX_INSNS][TARGET_INSN_START_WORDS];
+
+    /* Exit to translator on overflow. */
+    sigjmp_buf jmp_trans;
 };
 
 static inline bool temp_readonly(TCGTemp *ts)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index XXXXXXX..XXXXXXX 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
     ti = profile_getclock();
 #endif
 
+    gen_code_size = sigsetjmp(tcg_ctx->jmp_trans, 0);
+    if (unlikely(gen_code_size != 0)) {
+        goto error_return;
+    }
+
     tcg_func_start(tcg_ctx);
 
     tcg_ctx->cpu = env_cpu(env);
     gen_intermediate_code(cpu, tb, max_insns);
     tcg_ctx->cpu = NULL;
+    max_insns = tb->icount;
 
     trace_translate_block(tb, tb->pc, tb->tc.ptr);
 
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
 
     gen_code_size = tcg_gen_code(tcg_ctx, tb);
     if (unlikely(gen_code_size < 0)) {
+ error_return:
         switch (gen_code_size) {
         case -1:
             /*
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
              * flush the TBs, allocate a new TB, re-initialize it per
              * above, and re-do the actual code generation.
              */
+            qemu_log_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT,
+                          "Restarting code generation for "
+                          "code_gen_buffer overflow\n");
             goto buffer_overflow;
 
         case -2:
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
              * Try again with half as many insns as we attempted this time.
              * If a single insn overflows, there's a bug somewhere...
              */
-            max_insns = tb->icount;
             assert(max_insns > 1);
             max_insns /= 2;
+            qemu_log_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT,
+                          "Restarting code generation with "
+                          "smaller translation block (max %d insns)\n",
+                          max_insns);
             goto tb_overflow;
 
         default:
diff --git a/tcg/tcg.c b/tcg/tcg.c
index XXXXXXX..XXXXXXX 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -XXX,XX +XXX,XX @@ void tcg_func_start(TCGContext *s)
     QSIMPLEQ_INIT(&s->labels);
 }
 
-static inline TCGTemp *tcg_temp_alloc(TCGContext *s)
+static TCGTemp *tcg_temp_alloc(TCGContext *s)
 {
     int n = s->nb_temps++;
-    tcg_debug_assert(n < TCG_MAX_TEMPS);
+
+    if (n >= TCG_MAX_TEMPS) {
+        /* Signal overflow, starting over with fewer guest insns. */
+        siglongjmp(s->jmp_trans, -2);
+    }
     return memset(&s->temps[n], 0, sizeof(TCGTemp));
 }
 
-static inline TCGTemp *tcg_global_alloc(TCGContext *s)
+static TCGTemp *tcg_global_alloc(TCGContext *s)
 {
     TCGTemp *ts;
 
     tcg_debug_assert(s->nb_globals == s->nb_temps);
+    tcg_debug_assert(s->nb_globals < TCG_MAX_TEMPS);
     s->nb_globals++;
     ts = tcg_temp_alloc(s);
     ts->kind = TEMP_GLOBAL;
-- 
2.25.1