Set the default NaN pattern explicitly for SPARC, and remove
the ifdef from parts64_default_nan.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241202131347.498124-50-peter.maydell@linaro.org
target/sparc/cpu.c | 2 ++
fpu/softfloat-specialize.c.inc | 5 +----
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 0f2997a85e6..6b66ecb3f59 100644
@@ -818,6 +818,8 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
set_float_3nan_prop_rule(float_3nan_prop_s_cba, &env->fp_status);
/* For inf * 0 + NaN, return the input NaN */
set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->fp_status);
+ /* Default NaN value: sign bit clear, all frac bits set */
+ set_float_default_nan_pattern(0b01111111, &env->fp_status);
cpu_exec_realizefn(cs, &local_err);
if (local_err != NULL) {
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
index ecb7a52ae7c..06185237d0f 100644
@@ -136,10 +136,7 @@ static void parts64_default_nan(FloatParts64 *p, float_status *status)
uint8_t dnan_pattern = status->default_nan_pattern;
if (dnan_pattern == 0) {
-#if defined(TARGET_SPARC)
- /* Sign bit clear, all frac bits set */
- dnan_pattern = 0b01111111;
-#elif defined(TARGET_HEXAGON)
+#if defined(TARGET_HEXAGON)
/* Sign bit set, all frac bits set. */
dnan_pattern = 0b11111111;
#else
--
2.34.1