On 12/11/24 08:44, Peter Maydell wrote:
> From: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
>
> The DSB nXS variant is always both a reads and writes request type.
> Ignore the domain field like we do in plain DSB and perform a full
> system barrier operation.
>
> The DSB nXS variant is part of FEAT_XS made mandatory from Armv8.7.
>
> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
> [PMM: added missing "UNDEF unless feature present" check]
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> target/arm/tcg/a64.decode | 3 +++
> target/arm/tcg/translate-a64.c | 9 +++++++++
> 2 files changed, 12 insertions(+)
>
> diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
> index 331a8e180c0..c4f516abc18 100644
> --- a/target/arm/tcg/a64.decode
> +++ b/target/arm/tcg/a64.decode
> @@ -245,6 +245,9 @@ WFIT 1101 0101 0000 0011 0001 0000 001 rd:5
>
> CLREX 1101 0101 0000 0011 0011 ---- 010 11111
> DSB_DMB 1101 0101 0000 0011 0011 domain:2 types:2 10- 11111
> +# For the DSB nXS variant, types always equals MBReqTypes_All and we ignore the
> +# domain bits.
> +DSB_nXS 1101 0101 0000 0011 0011 -- 10 001 11111
> ISB 1101 0101 0000 0011 0011 ---- 110 11111
> SB 1101 0101 0000 0011 0011 0000 111 11111
>
> diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
> index b2851ea5032..953386c0416 100644
> --- a/target/arm/tcg/translate-a64.c
> +++ b/target/arm/tcg/translate-a64.c
> @@ -1959,6 +1959,15 @@ static bool trans_DSB_DMB(DisasContext *s, arg_DSB_DMB *a)
> return true;
> }
>
> +static bool trans_DSB_nXS(DisasContext *s, arg_DSB_nXS *a)
> +{
> + if (!dc_isar_feature(aa64_xs, s)) {
> + return false;
> + }
> + tcg_gen_mb(TCG_BAR_SC | TCG_MO_ALL);
> + return true;
> +}
> +
> static bool trans_ISB(DisasContext *s, arg_ISB *a)
> {
> /*
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~