On 12/8/2024 4:48 PM, Richard Henderson wrote:
> This instruction has a special case that 0 * x + c returns c
> without the normal sign folding that comes with 0 + -0.
> Use the new float_muladd_suppress_add_product_zero to
> describe this.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/hexagon/op_helper.c | 11 +++--------
> 1 file changed, 3 insertions(+), 8 deletions(-)
>
> diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
> index aa5ab4a31f..eb010422bf 100644
> --- a/target/hexagon/op_helper.c
> +++ b/target/hexagon/op_helper.c
> @@ -1192,15 +1192,10 @@ static float32 check_nan(float32 dst, float32 x, float_status *fp_status)
> float32 HELPER(sffma_sc)(CPUHexagonState *env, float32 RxV,
> float32 RsV, float32 RtV, float32 PuV)
> {
> - size4s_t tmp;
> arch_fpop_start(env);
> - RxV = check_nan(RxV, RxV, &env->fp_status);
> - RxV = check_nan(RxV, RsV, &env->fp_status);
> - RxV = check_nan(RxV, RtV, &env->fp_status);
> - tmp = internal_fmafx(RsV, RtV, RxV, fSXTN(8, 64, PuV), &env->fp_status);
> - if (!(float32_is_zero(RxV) && is_zero_prod(RsV, RtV))) {
> - RxV = tmp;
> - }
> + RxV = float32_muladd_scalbn(RsV, RtV, RxV, fSXTN(8, 64, PuV),
> + float_muladd_suppress_add_product_zero,
> + &env->fp_status);
> arch_fpop_end(env);
> return RxV;
> }
Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com>