Similarly to the gen_move_low32_tl() helper which sign-extract
the 32-lower bits of a target-wide TCG register, add a helper
to sign-extract from 32-bit TCG register.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/mips/tcg/translate.h | 1 +
 target/mips/tcg/translate.c | 5 +++++
 2 files changed, 6 insertions(+)

diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h
index d9faa82ff70..d5d74faad92 100644
--- a/target/mips/tcg/translate.h
+++ b/target/mips/tcg/translate.h
@@ -154,6 +154,7 @@ void check_cop1x(DisasContext *ctx);
 
 void gen_base_offset_addr_tl(DisasContext *ctx, TCGv addr, int base, int offset);
 void gen_move_low32_tl(TCGv ret, TCGv_i64 arg);
+void gen_move_low32_i32(TCGv_i32 ret, TCGv_i64 arg);
 void gen_move_high32_tl(TCGv ret, TCGv_i64 arg);
 void gen_load_gpr_tl(TCGv t, int reg);
 void gen_load_gpr_i32(TCGv_i32 t, int reg);
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 6ac0734d1b2..80e2a8e5256 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -1479,6 +1479,11 @@ void gen_move_low32_tl(TCGv ret, TCGv_i64 arg)
 #endif
 }
 
+void gen_move_low32_i32(TCGv_i32 ret, TCGv_i64 arg)
+{
+    tcg_gen_extrl_i64_i32(ret, arg);
+}
+
 /* Sign-extract the high 32-bits to a target_long.  */
 void gen_move_high32_tl(TCGv ret, TCGv_i64 arg)
 {
-- 
2.45.2

On 11/26/24 07:15, Philippe Mathieu-Daudé wrote:
> Similarly to the gen_move_low32_tl() helper which sign-extract
> the 32-lower bits of a target-wide TCG register, add a helper
> to sign-extract from 32-bit TCG register.

"to a 32-bit TCG register"

I'm not sure "sign-extract" is really correct in either case, since it's always truncation.

But for the code,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>