...
...
8
- reviewed all Arm features (FEAT_) from: https://developer.arm.com/documentation/109697/2024_09/Feature-descriptions/
8
- reviewed all Arm features (FEAT_) from: https://developer.arm.com/documentation/109697/2024_09/Feature-descriptions/
9
9
10
The Arm section of the documentation is in very good shape, and this series only
10
The Arm section of the documentation is in very good shape, and this series only
11
has minors fixes.
11
has minors fixes.
12
12
13
Pierrick Bouvier (12):
13
v2:
14
docs/system/arm/emulation: mention armv9
14
- ensure link for orangepi is http, so we can't switch to https
15
docs/system/arm/emulation: fix typo in feature name
15
- left patches from v1
16
docs/system/arm/emulation: add FEAT_SSBS2
16
17
target/arm/tcg/: fix typo in FEAT name
17
v3:
18
docs/system/arm/: add FEAT_MTE_ASYNC
18
- fix for fby35 asked by Cédric Le Goater
19
docs/system/arm/: add FEAT_DoubleLock
19
20
docs/system/arm/fby35: update link to product page
20
Pierrick Bouvier (4):
21
docs/system/arm/orangepi: update links
21
docs/system/arm/orangepi: update links
22
docs/system/arm/fby35: document execute-in-place property
22
docs/system/arm/fby35: document execute-in-place property
23
docs/system/arm/xlnx-versal-virt: document ospi-flash property
23
docs/system/arm/xlnx-versal-virt: document ospi-flash property
24
docs/system/arm/virt: document missing properties
24
docs/system/arm/virt: document missing properties
25
docs/system/arm/aspeed: add missing model supermicrox11spi-bmc
26
25
27
docs/bypass-iommu.txt | 2 ++
26
docs/system/arm/fby35.rst | 5 +++++
28
docs/system/arm/aspeed.rst | 7 ++++---
29
docs/system/arm/emulation.rst | 11 +++++++----
30
docs/system/arm/fby35.rst | 5 ++++-
31
docs/system/arm/orangepi.rst | 4 ++--
27
docs/system/arm/orangepi.rst | 4 ++--
32
docs/system/arm/virt.rst | 15 +++++++++++++++
28
docs/system/arm/virt.rst | 16 ++++++++++++++++
33
docs/system/arm/xlnx-versal-virt.rst | 3 +++
29
docs/system/arm/xlnx-versal-virt.rst | 3 +++
34
target/arm/tcg/cpu32.c | 2 +-
30
4 files changed, 26 insertions(+), 2 deletions(-)
35
8 files changed, 38 insertions(+), 11 deletions(-)
36
31
37
--
32
--
38
2.39.5
33
2.39.5
34
35
diff view generated by jsdifflib
Deleted patch
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
3
docs/system/arm/emulation.rst | 6 +++---
4
1 file changed, 3 insertions(+), 3 deletions(-)
5
1
6
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
7
index XXXXXXX..XXXXXXX 100644
8
--- a/docs/system/arm/emulation.rst
9
+++ b/docs/system/arm/emulation.rst
10
@@ -XXX,XX +XXX,XX @@
11
A-profile CPU architecture support
12
==================================
13
14
-QEMU's TCG emulation includes support for the Armv5, Armv6, Armv7 and
15
-Armv8 versions of the A-profile architecture. It also has support for
16
+QEMU's TCG emulation includes support for the Armv5, Armv6, Armv7,
17
+Armv8 and Armv9 versions of the A-profile architecture. It also has support for
18
the following architecture extensions:
19
20
- FEAT_AA32BF16 (AArch32 BFloat16 instructions)
21
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
22
- FEAT_XNX (Translation table stage 2 Unprivileged Execute-never)
23
24
For information on the specifics of these extensions, please refer
25
-to the `Armv8-A Arm Architecture Reference Manual
26
+to the `Arm Architecture Reference Manual for A-profile architecture
27
<https://developer.arm.com/documentation/ddi0487/latest>`_.
28
29
When a specific named CPU is being emulated, only those features which
30
--
31
2.39.5
diff view generated by jsdifflib
Deleted patch
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
3
docs/system/arm/emulation.rst | 2 +-
4
1 file changed, 1 insertion(+), 1 deletion(-)
5
1
6
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
7
index XXXXXXX..XXXXXXX 100644
8
--- a/docs/system/arm/emulation.rst
9
+++ b/docs/system/arm/emulation.rst
10
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
11
- FEAT_LSE2 (Large System Extensions v2)
12
- FEAT_LVA (Large Virtual Address space)
13
- FEAT_MixedEnd (Mixed-endian support)
14
-- FEAT_MixdEndEL0 (Mixed-endian support at EL0)
15
+- FEAT_MixedEndEL0 (Mixed-endian support at EL0)
16
- FEAT_MOPS (Standardization of memory operations)
17
- FEAT_MTE (Memory Tagging Extension)
18
- FEAT_MTE2 (Memory Tagging Extension)
19
--
20
2.39.5
diff view generated by jsdifflib
Deleted patch
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
3
docs/system/arm/emulation.rst | 1 +
4
1 file changed, 1 insertion(+)
5
1
6
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
7
index XXXXXXX..XXXXXXX 100644
8
--- a/docs/system/arm/emulation.rst
9
+++ b/docs/system/arm/emulation.rst
10
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
11
- FEAT_SVE2 (Scalable Vector Extension version 2)
12
- FEAT_SPECRES (Speculation restriction instructions)
13
- FEAT_SSBS (Speculative Store Bypass Safe)
14
+- FEAT_SSBS2 (MRS and MSR instructions for SSBS version 2)
15
- FEAT_TGran16K (Support for 16KB memory translation granule size at stage 1)
16
- FEAT_TGran4K (Support for 4KB memory translation granule size at stage 1)
17
- FEAT_TGran64K (Support for 64KB memory translation granule size at stage 1)
18
--
19
2.39.5
diff view generated by jsdifflib
Deleted patch
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
3
target/arm/tcg/cpu32.c | 2 +-
4
1 file changed, 1 insertion(+), 1 deletion(-)
5
1
6
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
7
index XXXXXXX..XXXXXXX 100644
8
--- a/target/arm/tcg/cpu32.c
9
+++ b/target/arm/tcg/cpu32.c
10
@@ -XXX,XX +XXX,XX @@ void aa32_max_features(ARMCPU *cpu)
11
cpu->isar.id_mmfr5 = t;
12
13
t = cpu->isar.id_pfr0;
14
- t = FIELD_DP32(t, ID_PFR0, CSV2, 2); /* FEAT_CVS2 */
15
+ t = FIELD_DP32(t, ID_PFR0, CSV2, 2); /* FEAT_CSV2 */
16
t = FIELD_DP32(t, ID_PFR0, DIT, 1); /* FEAT_DIT */
17
t = FIELD_DP32(t, ID_PFR0, RAS, 1); /* FEAT_RAS */
18
cpu->isar.id_pfr0 = t;
19
--
20
2.39.5
diff view generated by jsdifflib
Deleted patch
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
3
docs/system/arm/emulation.rst | 1 +
4
1 file changed, 1 insertion(+)
5
1
6
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
7
index XXXXXXX..XXXXXXX 100644
8
--- a/docs/system/arm/emulation.rst
9
+++ b/docs/system/arm/emulation.rst
10
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
11
- FEAT_MTE2 (Memory Tagging Extension)
12
- FEAT_MTE3 (MTE Asymmetric Fault Handling)
13
- FEAT_MTE_ASYM_FAULT (Memory tagging asymmetric faults)
14
+- FEAT_MTE_ASYNC (Asynchronous reporting of Tag Check Fault)
15
- FEAT_NMI (Non-maskable Interrupt)
16
- FEAT_NV (Nested Virtualization)
17
- FEAT_NV2 (Enhanced nested virtualization support)
18
--
19
2.39.5
diff view generated by jsdifflib
Deleted patch
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
3
docs/system/arm/emulation.rst | 1 +
4
1 file changed, 1 insertion(+)
5
1
6
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
7
index XXXXXXX..XXXXXXX 100644
8
--- a/docs/system/arm/emulation.rst
9
+++ b/docs/system/arm/emulation.rst
10
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
11
- FEAT_CSV3 (Cache speculation variant 3)
12
- FEAT_DGH (Data gathering hint)
13
- FEAT_DIT (Data Independent Timing instructions)
14
+- FEAT_DoubleLock (Double Lock)
15
- FEAT_DPB (DC CVAP instruction)
16
- FEAT_DPB2 (DC CVADP instruction)
17
- FEAT_Debugv8p1 (Debug with VHE)
18
--
19
2.39.5
diff view generated by jsdifflib
Deleted patch
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
3
docs/system/arm/fby35.rst | 2 +-
4
1 file changed, 1 insertion(+), 1 deletion(-)
5
1
6
diff --git a/docs/system/arm/fby35.rst b/docs/system/arm/fby35.rst
7
index XXXXXXX..XXXXXXX 100644
8
--- a/docs/system/arm/fby35.rst
9
+++ b/docs/system/arm/fby35.rst
10
@@ -XXX,XX +XXX,XX @@ include various compute accelerators (video, inferencing, etc). At the moment,
11
only the first server slot's BIC is included.
12
13
Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds
14
-can be fit into a chassis. See `here <https://www.opencompute.org/products/423/wiwynn-yosemite-v3-server>`__
15
+can be fit into a chassis. See `here <https://www.opencompute.org/products-chiplets/237/wiwynn-yosemite-v3-server>`__
16
for an example.
17
18
In this generation, the BMC is an AST2600 and each BIC is an AST1030. The BMC
19
--
20
2.39.5
diff view generated by jsdifflib
1
www.orangepi.org does not support https, it's expected to stick to http.
2
3
Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com>
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
5
---
3
docs/system/arm/orangepi.rst | 4 ++--
6
docs/system/arm/orangepi.rst | 4 ++--
4
1 file changed, 2 insertions(+), 2 deletions(-)
7
1 file changed, 2 insertions(+), 2 deletions(-)
5
8
...
...
diff view generated by jsdifflib
1
Reviewed-by: Cédric Le Goater <clg@redhat.com>
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
3
---
3
docs/system/arm/fby35.rst | 3 +++
4
docs/system/arm/fby35.rst | 5 +++++
4
1 file changed, 3 insertions(+)
5
1 file changed, 5 insertions(+)
5
6
6
diff --git a/docs/system/arm/fby35.rst b/docs/system/arm/fby35.rst
7
diff --git a/docs/system/arm/fby35.rst b/docs/system/arm/fby35.rst
7
index XXXXXXX..XXXXXXX 100644
8
index XXXXXXX..XXXXXXX 100644
8
--- a/docs/system/arm/fby35.rst
9
--- a/docs/system/arm/fby35.rst
9
+++ b/docs/system/arm/fby35.rst
10
+++ b/docs/system/arm/fby35.rst
10
@@ -XXX,XX +XXX,XX @@ process starts.
11
@@ -XXX,XX +XXX,XX @@ process starts.
11
$ screen /dev/tty0 # In a separate TMUX pane, terminal window, etc.
12
$ screen /dev/tty0 # In a separate TMUX pane, terminal window, etc.
12
$ screen /dev/tty1
13
$ screen /dev/tty1
13
$ (qemu) c         # Start the boot process once screen is setup.
14
$ (qemu) c         # Start the boot process once screen is setup.
14
+
15
+
15
+This machine model supports emulation of the boot from the CEO flash device by
16
+This machine model supports emulation of the boot from the CE0 flash device by
16
+setting option ``execute-in-place``.
17
+setting option ``execute-in-place``. When using this option, the CPU fetches
18
+instructions to execute by reading CE0 and not from a preloaded ROM
19
+initialized at machine init time. As a result, execution will be slower.
17
--
20
--
18
2.39.5
21
2.39.5
22
23
diff view generated by jsdifflib
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
2
---
3
docs/system/arm/xlnx-versal-virt.rst | 3 +++
3
docs/system/arm/xlnx-versal-virt.rst | 3 +++
4
1 file changed, 3 insertions(+)
4
1 file changed, 3 insertions(+)
5
5
6
diff --git a/docs/system/arm/xlnx-versal-virt.rst b/docs/system/arm/xlnx-versal-virt.rst
6
diff --git a/docs/system/arm/xlnx-versal-virt.rst b/docs/system/arm/xlnx-versal-virt.rst
7
index XXXXXXX..XXXXXXX 100644
7
index XXXXXXX..XXXXXXX 100644
8
--- a/docs/system/arm/xlnx-versal-virt.rst
8
--- a/docs/system/arm/xlnx-versal-virt.rst
9
+++ b/docs/system/arm/xlnx-versal-virt.rst
9
+++ b/docs/system/arm/xlnx-versal-virt.rst
10
@@ -XXX,XX +XXX,XX @@ Run the following at the U-Boot prompt:
10
@@ -XXX,XX +XXX,XX @@ Run the following at the U-Boot prompt:
11
fdt set /chosen/dom0 reg <0x00000000 0x40000000 0x0 0x03100000>
11
fdt set /chosen/dom0 reg <0x00000000 0x40000000 0x0 0x03100000>
12
booti 30000000 - 20000000
12
booti 30000000 - 20000000
13
13
14
+It's possible to change the OSPI flash model emulated by using the machine model
14
+It's possible to change the OSPI flash model emulated by using the machine model
15
+option ``ospi-flash``.
15
+option ``ospi-flash``.
16
+
16
+
17
BBRAM File Backend
17
BBRAM File Backend
18
""""""""""""""""""
18
""""""""""""""""""
19
BBRAM can have an optional file backend, which must be a seekable
19
BBRAM can have an optional file backend, which must be a seekable
20
--
20
--
21
2.39.5
21
2.39.5
diff view generated by jsdifflib
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
2
---
3
docs/bypass-iommu.txt | 2 ++
3
docs/system/arm/virt.rst | 16 ++++++++++++++++
4
docs/system/arm/virt.rst | 15 +++++++++++++++
4
1 file changed, 16 insertions(+)
5
2 files changed, 17 insertions(+)
6
5
7
diff --git a/docs/bypass-iommu.txt b/docs/bypass-iommu.txt
8
index XXXXXXX..XXXXXXX 100644
9
--- a/docs/bypass-iommu.txt
10
+++ b/docs/bypass-iommu.txt
11
@@ -XXX,XX +XXX,XX @@
12
+.. _bypass_iommu:
13
+
14
BYPASS IOMMU PROPERTY
15
=====================
16
17
diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
6
diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
18
index XXXXXXX..XXXXXXX 100644
7
index XXXXXXX..XXXXXXX 100644
19
--- a/docs/system/arm/virt.rst
8
--- a/docs/system/arm/virt.rst
20
+++ b/docs/system/arm/virt.rst
9
+++ b/docs/system/arm/virt.rst
21
@@ -XXX,XX +XXX,XX @@ iommu
10
@@ -XXX,XX +XXX,XX @@ iommu
22
``smmuv3``
11
``smmuv3``
23
Create an SMMUv3
12
Create an SMMUv3
24
13
25
+default-bus-bypass-iommu
14
+default-bus-bypass-iommu
26
+ Set ``on``/``off`` to enable/disable `bypass_iommu <bypass_iommu>`_ for
15
+ Set ``on``/``off`` to enable/disable `bypass_iommu
27
+ default root bus.
16
+ <https://gitlab.com/qemu-project/qemu/-/blob/master/docs/bypass-iommu.txt>`_
17
+ for default root bus.
28
+
18
+
29
ras
19
ras
30
Set ``on``/``off`` to enable/disable reporting host memory errors to a guest
20
Set ``on``/``off`` to enable/disable reporting host memory errors to a guest
31
using ACPI and guest external abort exceptions. The default is off.
21
using ACPI and guest external abort exceptions. The default is off.
32
22
...
...
diff view generated by jsdifflib
Deleted patch
1
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
---
3
docs/system/arm/aspeed.rst | 7 ++++---
4
1 file changed, 4 insertions(+), 3 deletions(-)
5
1
6
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
7
index XXXXXXX..XXXXXXX 100644
8
--- a/docs/system/arm/aspeed.rst
9
+++ b/docs/system/arm/aspeed.rst
10
@@ -XXX,XX +XXX,XX @@
11
-Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``tiogapass-bmc``, ``tacoma-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``)
12
-========================================================================================================================================================================================================================================================================================================================================================================================================
13
+Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``supermicrox11spi-bmc``, ``tiogapass-bmc``, ``tacoma-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``)
14
+==================================================================================================================================================================================================================================================================================================================================================================================================================================
15
16
The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
17
Aspeed evaluation boards. They are based on different releases of the
18
@@ -XXX,XX +XXX,XX @@ AST2400 SoC based machines :
19
20
- ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC
21
- ``quanta-q71l-bmc`` OpenBMC Quanta BMC
22
-- ``supermicrox11-bmc`` Supermicro X11 BMC
23
+- ``supermicrox11-bmc`` Supermicro X11 BMC (ARM926EJ-S)
24
+- ``supermicrox11spi-bmc`` Supermicro X11 SPI BMC (ARM1176)
25
26
AST2500 SoC based machines :
27
28
--
29
2.39.5
diff view generated by jsdifflib