New patch
1
This series fixes some runtime overhead when handling interrupts in AHCIState.
2
It then extracts the SysBus implementation into a dedicated file for separation
3
of concerns.
1
4
5
v4:
6
* Port away from qemu_allocate_irq() while at it
7
8
v3:
9
* Remove extra PCI include in ahci-internal.h
10
* Extract SysBus implementation into dedicated file
11
12
Supersedes: 20241205114453.1848-1-shentey@gmail.com
13
14
Bernhard Beschow (2):
15
hw/ide/ahci: Decouple from PCI
16
hw/ide/ahci: Extract TYPE_SYSBUS_AHCI into dedicated file
17
18
hw/ide/ahci-internal.h | 1 -
19
include/hw/ide/ahci-pci.h | 2 +
20
include/hw/ide/ahci.h | 2 -
21
hw/ide/ahci-sysbus.c | 91 ++++++++++++++++++++++++++++++++
22
hw/ide/ahci.c | 106 ++------------------------------------
23
hw/ide/ich.c | 19 +++++--
24
hw/arm/Kconfig | 10 ++--
25
hw/ide/Kconfig | 4 ++
26
hw/ide/meson.build | 1 +
27
9 files changed, 122 insertions(+), 114 deletions(-)
28
create mode 100644 hw/ide/ahci-sysbus.c
29
30
--
31
2.47.1
32
diff view generated by jsdifflib
1
object_dynamic_cast() is expensive; IRQ helpers are certainly
1
In some adhoc profiling booting Linux VMs, it's observed that ahci_irq_lower()
2
a bad place to call it. Since the device type won't change at
2
can be a hot path (10000+ triggers until login prompt appears). Even though the
3
runtime, resolve it once when the AHCI context is initialized
3
parent device never changes, this method re-determines whether the parent device
4
in ahci_init().
4
is a PCI device or not using the rather expensive object_dynamic_cast()
5
function. Avoid this overhead by pushing the interrupt handling to the parent
6
device, essentially turning AHCIState into an "IP block".
7
8
Note that this change also frees AHCIState from the PCI dependency which wasn't
9
reflected in Kconfig.
5
10
6
Reported-by: Peter Xu <peterx@redhat.com>
11
Reported-by: Peter Xu <peterx@redhat.com>
7
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
12
Inspired-by: Philippe Mathieu-Daudé <philmd@linaro.org>
13
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
8
---
14
---
9
include/hw/ide/ahci.h | 2 +-
15
hw/ide/ahci-internal.h | 1 -
10
hw/ide/ahci.c | 17 +++++------------
16
include/hw/ide/ahci-pci.h | 2 ++
11
2 files changed, 6 insertions(+), 13 deletions(-)
17
include/hw/ide/ahci.h | 2 --
12
18
hw/ide/ahci.c | 39 ++++-----------------------------------
19
hw/ide/ich.c | 19 +++++++++++++++----
20
5 files changed, 21 insertions(+), 42 deletions(-)
21
22
diff --git a/hw/ide/ahci-internal.h b/hw/ide/ahci-internal.h
23
index XXXXXXX..XXXXXXX 100644
24
--- a/hw/ide/ahci-internal.h
25
+++ b/hw/ide/ahci-internal.h
26
@@ -XXX,XX +XXX,XX @@
27
#define HW_IDE_AHCI_INTERNAL_H
28
29
#include "hw/ide/ahci.h"
30
-#include "hw/pci/pci_device.h"
31
#include "ide-internal.h"
32
33
#define AHCI_MEM_BAR_SIZE 0x1000
34
diff --git a/include/hw/ide/ahci-pci.h b/include/hw/ide/ahci-pci.h
35
index XXXXXXX..XXXXXXX 100644
36
--- a/include/hw/ide/ahci-pci.h
37
+++ b/include/hw/ide/ahci-pci.h
38
@@ -XXX,XX +XXX,XX @@
39
#include "qom/object.h"
40
#include "hw/ide/ahci.h"
41
#include "hw/pci/pci_device.h"
42
+#include "hw/irq.h"
43
44
#define TYPE_ICH9_AHCI "ich9-ahci"
45
OBJECT_DECLARE_SIMPLE_TYPE(AHCIPCIState, ICH9_AHCI)
46
@@ -XXX,XX +XXX,XX @@ struct AHCIPCIState {
47
PCIDevice parent_obj;
48
49
AHCIState ahci;
50
+ IRQState irq;
51
};
52
53
#endif
13
diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h
54
diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h
14
index XXXXXXX..XXXXXXX 100644
55
index XXXXXXX..XXXXXXX 100644
15
--- a/include/hw/ide/ahci.h
56
--- a/include/hw/ide/ahci.h
16
+++ b/include/hw/ide/ahci.h
57
+++ b/include/hw/ide/ahci.h
17
@@ -XXX,XX +XXX,XX @@ typedef struct AHCIControlRegs {
58
@@ -XXX,XX +XXX,XX @@ typedef struct AHCIControlRegs {
18
} AHCIControlRegs;
59
} AHCIControlRegs;
19
60
20
typedef struct AHCIState {
61
typedef struct AHCIState {
21
- DeviceState *container;
62
- DeviceState *container;
22
+ PCIDevice *pci_dev;
63
-
23
24
AHCIDevice *dev;
64
AHCIDevice *dev;
25
AHCIControlRegs control_regs;
65
AHCIControlRegs control_regs;
66
MemoryRegion mem;
26
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
67
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
27
index XXXXXXX..XXXXXXX 100644
68
index XXXXXXX..XXXXXXX 100644
28
--- a/hw/ide/ahci.c
69
--- a/hw/ide/ahci.c
29
+++ b/hw/ide/ahci.c
70
+++ b/hw/ide/ahci.c
71
@@ -XXX,XX +XXX,XX @@
72
73
#include "qemu/osdep.h"
74
#include "hw/irq.h"
75
-#include "hw/pci/msi.h"
76
-#include "hw/pci/pci.h"
77
#include "hw/qdev-properties.h"
78
#include "migration/vmstate.h"
79
80
@@ -XXX,XX +XXX,XX @@
81
#include "qemu/module.h"
82
#include "sysemu/block-backend.h"
83
#include "sysemu/dma.h"
84
-#include "hw/ide/pci.h"
85
-#include "hw/ide/ahci-pci.h"
86
#include "hw/ide/ahci-sysbus.h"
87
#include "ahci-internal.h"
88
#include "ide-internal.h"
30
@@ -XXX,XX +XXX,XX @@ static uint32_t ahci_port_read(AHCIState *s, int port, int offset)
89
@@ -XXX,XX +XXX,XX @@ static uint32_t ahci_port_read(AHCIState *s, int port, int offset)
31
90
return val;
32
static void ahci_irq_raise(AHCIState *s)
91
}
33
{
92
93
-static void ahci_irq_raise(AHCIState *s)
94
-{
34
- DeviceState *dev_state = s->container;
95
- DeviceState *dev_state = s->container;
35
- PCIDevice *pci_dev = (PCIDevice *) object_dynamic_cast(OBJECT(dev_state),
96
- PCIDevice *pci_dev = (PCIDevice *) object_dynamic_cast(OBJECT(dev_state),
36
- TYPE_PCI_DEVICE);
97
- TYPE_PCI_DEVICE);
37
-
98
-
38
trace_ahci_irq_raise(s);
99
- trace_ahci_irq_raise(s);
39
100
-
40
- if (pci_dev && msi_enabled(pci_dev)) {
101
- if (pci_dev && msi_enabled(pci_dev)) {
41
- msi_notify(pci_dev, 0);
102
- msi_notify(pci_dev, 0);
42
+ if (s->pci_dev && msi_enabled(s->pci_dev)) {
103
- } else {
43
+ msi_notify(s->pci_dev, 0);
104
- qemu_irq_raise(s->irq);
44
} else {
105
- }
45
qemu_irq_raise(s->irq);
106
-}
46
}
107
-
47
@@ -XXX,XX +XXX,XX @@ static void ahci_irq_raise(AHCIState *s)
108
-static void ahci_irq_lower(AHCIState *s)
48
109
-{
49
static void ahci_irq_lower(AHCIState *s)
50
{
51
- DeviceState *dev_state = s->container;
110
- DeviceState *dev_state = s->container;
52
- PCIDevice *pci_dev = (PCIDevice *) object_dynamic_cast(OBJECT(dev_state),
111
- PCIDevice *pci_dev = (PCIDevice *) object_dynamic_cast(OBJECT(dev_state),
53
- TYPE_PCI_DEVICE);
112
- TYPE_PCI_DEVICE);
54
-
113
-
55
trace_ahci_irq_lower(s);
114
- trace_ahci_irq_lower(s);
56
115
-
57
- if (!pci_dev || !msi_enabled(pci_dev)) {
116
- if (!pci_dev || !msi_enabled(pci_dev)) {
58
+ if (!s->pci_dev || !msi_enabled(s->pci_dev)) {
117
- qemu_irq_lower(s->irq);
59
qemu_irq_lower(s->irq);
118
- }
119
-}
120
-
121
static void ahci_check_irq(AHCIState *s)
122
{
123
int i;
124
@@ -XXX,XX +XXX,XX @@ static void ahci_check_irq(AHCIState *s)
125
trace_ahci_check_irq(s, old_irq, s->control_regs.irqstatus);
126
if (s->control_regs.irqstatus &&
127
(s->control_regs.ghc & HOST_CTL_IRQ_EN)) {
128
- ahci_irq_raise(s);
129
+ trace_ahci_irq_raise(s);
130
+ qemu_irq_raise(s->irq);
131
} else {
132
- ahci_irq_lower(s);
133
+ trace_ahci_irq_lower(s);
134
+ qemu_irq_lower(s->irq);
60
}
135
}
61
}
136
}
137
62
@@ -XXX,XX +XXX,XX @@ static const IDEDMAOps ahci_dma_ops = {
138
@@ -XXX,XX +XXX,XX @@ static const IDEDMAOps ahci_dma_ops = {
63
139
64
void ahci_init(AHCIState *s, DeviceState *qdev)
140
void ahci_init(AHCIState *s, DeviceState *qdev)
65
{
141
{
66
- s->container = qdev;
142
- s->container = qdev;
67
+ s->pci_dev = (PCIDevice *)object_dynamic_cast(OBJECT(qdev), TYPE_PCI_DEVICE);
68
+
69
/* XXX BAR size should be 1k, but that breaks, so bump it to 4k for now */
143
/* XXX BAR size should be 1k, but that breaks, so bump it to 4k for now */
70
memory_region_init_io(&s->mem, OBJECT(qdev), &ahci_mem_ops, s,
144
memory_region_init_io(&s->mem, OBJECT(qdev), &ahci_mem_ops, s,
71
"ahci", AHCI_MEM_BAR_SIZE);
145
"ahci", AHCI_MEM_BAR_SIZE);
146
diff --git a/hw/ide/ich.c b/hw/ide/ich.c
147
index XXXXXXX..XXXXXXX 100644
148
--- a/hw/ide/ich.c
149
+++ b/hw/ide/ich.c
150
@@ -XXX,XX +XXX,XX @@
151
*/
152
153
#include "qemu/osdep.h"
154
-#include "hw/irq.h"
155
#include "hw/pci/msi.h"
156
#include "hw/pci/pci.h"
157
#include "migration/vmstate.h"
158
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_ich9_ahci = {
159
},
160
};
161
162
+static void pci_ich9_ahci_update_irq(void *opaque, int irq_num, int level)
163
+{
164
+ PCIDevice *pci_dev = opaque;
165
+
166
+ if (msi_enabled(pci_dev)) {
167
+ if (level) {
168
+ msi_notify(pci_dev, 0);
169
+ }
170
+ } else {
171
+ pci_set_irq(pci_dev, level);
172
+ }
173
+}
174
+
175
static void pci_ich9_reset(DeviceState *dev)
176
{
177
AHCIPCIState *d = ICH9_AHCI(dev);
178
@@ -XXX,XX +XXX,XX @@ static void pci_ich9_ahci_init(Object *obj)
179
{
180
AHCIPCIState *d = ICH9_AHCI(obj);
181
182
+ qemu_init_irq(&d->irq, pci_ich9_ahci_update_irq, d, 0);
183
ahci_init(&d->ahci, DEVICE(obj));
184
+ d->ahci.irq = &d->irq;
185
}
186
187
static void pci_ich9_ahci_realize(PCIDevice *dev, Error **errp)
188
@@ -XXX,XX +XXX,XX @@ static void pci_ich9_ahci_realize(PCIDevice *dev, Error **errp)
189
/* XXX Software should program this register */
190
dev->config[0x90] = 1 << 6; /* Address Map Register - AHCI mode */
191
192
- d->ahci.irq = pci_allocate_irq(dev);
193
-
194
pci_register_bar(dev, ICH9_IDP_BAR, PCI_BASE_ADDRESS_SPACE_IO,
195
&d->ahci.idp);
196
pci_register_bar(dev, ICH9_MEM_BAR, PCI_BASE_ADDRESS_SPACE_MEMORY,
197
@@ -XXX,XX +XXX,XX @@ static void pci_ich9_uninit(PCIDevice *dev)
198
199
msi_uninit(dev);
200
ahci_uninit(&d->ahci);
201
- qemu_free_irq(d->ahci.irq);
202
}
203
204
static void ich_ahci_class_init(ObjectClass *klass, void *data)
72
--
205
--
73
2.45.2
206
2.47.1
74
207
75
208
diff view generated by jsdifflib
New patch
1
Implement in dedicated file, just like TYPE_ICH9_AHCI.
1
2
3
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
4
---
5
hw/ide/ahci-sysbus.c | 91 ++++++++++++++++++++++++++++++++++++++++++++
6
hw/ide/ahci.c | 67 --------------------------------
7
hw/arm/Kconfig | 10 ++---
8
hw/ide/Kconfig | 4 ++
9
hw/ide/meson.build | 1 +
10
5 files changed, 101 insertions(+), 72 deletions(-)
11
create mode 100644 hw/ide/ahci-sysbus.c
12
13
diff --git a/hw/ide/ahci-sysbus.c b/hw/ide/ahci-sysbus.c
14
new file mode 100644
15
index XXXXXXX..XXXXXXX
16
--- /dev/null
17
+++ b/hw/ide/ahci-sysbus.c
18
@@ -XXX,XX +XXX,XX @@
19
+/*
20
+ * QEMU AHCI Emulation (MMIO-mapped devices)
21
+ *
22
+ * Copyright (c) 2010 qiaochong@loongson.cn
23
+ * Copyright (c) 2010 Roland Elek <elek.roland@gmail.com>
24
+ * Copyright (c) 2010 Sebastian Herbszt <herbszt@gmx.de>
25
+ * Copyright (c) 2010 Alexander Graf <agraf@suse.de>
26
+ *
27
+ * This library is free software; you can redistribute it and/or
28
+ * modify it under the terms of the GNU Lesser General Public
29
+ * License as published by the Free Software Foundation; either
30
+ * version 2.1 of the License, or (at your option) any later version.
31
+ *
32
+ * This library is distributed in the hope that it will be useful,
33
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
34
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
35
+ * Lesser General Public License for more details.
36
+ *
37
+ * You should have received a copy of the GNU Lesser General Public
38
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
39
+ *
40
+ */
41
+
42
+#include "qemu/osdep.h"
43
+#include "exec/address-spaces.h"
44
+#include "hw/qdev-properties.h"
45
+#include "migration/vmstate.h"
46
+
47
+#include "hw/ide/ahci-sysbus.h"
48
+#include "ahci-internal.h"
49
+
50
+static const VMStateDescription vmstate_sysbus_ahci = {
51
+ .name = "sysbus-ahci",
52
+ .fields = (const VMStateField[]) {
53
+ VMSTATE_AHCI(ahci, SysbusAHCIState),
54
+ VMSTATE_END_OF_LIST()
55
+ },
56
+};
57
+
58
+static void sysbus_ahci_reset(DeviceState *dev)
59
+{
60
+ SysbusAHCIState *s = SYSBUS_AHCI(dev);
61
+
62
+ ahci_reset(&s->ahci);
63
+}
64
+
65
+static void sysbus_ahci_init(Object *obj)
66
+{
67
+ SysbusAHCIState *s = SYSBUS_AHCI(obj);
68
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
69
+
70
+ ahci_init(&s->ahci, DEVICE(obj));
71
+
72
+ sysbus_init_mmio(sbd, &s->ahci.mem);
73
+ sysbus_init_irq(sbd, &s->ahci.irq);
74
+}
75
+
76
+static void sysbus_ahci_realize(DeviceState *dev, Error **errp)
77
+{
78
+ SysbusAHCIState *s = SYSBUS_AHCI(dev);
79
+
80
+ ahci_realize(&s->ahci, dev, &address_space_memory);
81
+}
82
+
83
+static Property sysbus_ahci_properties[] = {
84
+ DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, ahci.ports, 1),
85
+ DEFINE_PROP_END_OF_LIST(),
86
+};
87
+
88
+static void sysbus_ahci_class_init(ObjectClass *klass, void *data)
89
+{
90
+ DeviceClass *dc = DEVICE_CLASS(klass);
91
+
92
+ dc->realize = sysbus_ahci_realize;
93
+ dc->vmsd = &vmstate_sysbus_ahci;
94
+ device_class_set_props(dc, sysbus_ahci_properties);
95
+ device_class_set_legacy_reset(dc, sysbus_ahci_reset);
96
+ set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
97
+}
98
+
99
+static const TypeInfo sysbus_ahci_types[] = {
100
+ {
101
+ .name = TYPE_SYSBUS_AHCI,
102
+ .parent = TYPE_SYS_BUS_DEVICE,
103
+ .instance_size = sizeof(SysbusAHCIState),
104
+ .instance_init = sysbus_ahci_init,
105
+ .class_init = sysbus_ahci_class_init,
106
+ },
107
+};
108
+
109
+DEFINE_TYPES(sysbus_ahci_types)
110
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
111
index XXXXXXX..XXXXXXX 100644
112
--- a/hw/ide/ahci.c
113
+++ b/hw/ide/ahci.c
114
@@ -XXX,XX +XXX,XX @@
115
116
#include "qemu/osdep.h"
117
#include "hw/irq.h"
118
-#include "hw/qdev-properties.h"
119
#include "migration/vmstate.h"
120
121
#include "qemu/error-report.h"
122
#include "qemu/log.h"
123
#include "qemu/main-loop.h"
124
-#include "qemu/module.h"
125
#include "sysemu/block-backend.h"
126
#include "sysemu/dma.h"
127
-#include "hw/ide/ahci-sysbus.h"
128
#include "ahci-internal.h"
129
#include "ide-internal.h"
130
131
@@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_ahci = {
132
},
133
};
134
135
-static const VMStateDescription vmstate_sysbus_ahci = {
136
- .name = "sysbus-ahci",
137
- .fields = (const VMStateField[]) {
138
- VMSTATE_AHCI(ahci, SysbusAHCIState),
139
- VMSTATE_END_OF_LIST()
140
- },
141
-};
142
-
143
-static void sysbus_ahci_reset(DeviceState *dev)
144
-{
145
- SysbusAHCIState *s = SYSBUS_AHCI(dev);
146
-
147
- ahci_reset(&s->ahci);
148
-}
149
-
150
-static void sysbus_ahci_init(Object *obj)
151
-{
152
- SysbusAHCIState *s = SYSBUS_AHCI(obj);
153
- SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
154
-
155
- ahci_init(&s->ahci, DEVICE(obj));
156
-
157
- sysbus_init_mmio(sbd, &s->ahci.mem);
158
- sysbus_init_irq(sbd, &s->ahci.irq);
159
-}
160
-
161
-static void sysbus_ahci_realize(DeviceState *dev, Error **errp)
162
-{
163
- SysbusAHCIState *s = SYSBUS_AHCI(dev);
164
-
165
- ahci_realize(&s->ahci, dev, &address_space_memory);
166
-}
167
-
168
-static Property sysbus_ahci_properties[] = {
169
- DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, ahci.ports, 1),
170
- DEFINE_PROP_END_OF_LIST(),
171
-};
172
-
173
-static void sysbus_ahci_class_init(ObjectClass *klass, void *data)
174
-{
175
- DeviceClass *dc = DEVICE_CLASS(klass);
176
-
177
- dc->realize = sysbus_ahci_realize;
178
- dc->vmsd = &vmstate_sysbus_ahci;
179
- device_class_set_props(dc, sysbus_ahci_properties);
180
- device_class_set_legacy_reset(dc, sysbus_ahci_reset);
181
- set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
182
-}
183
-
184
-static const TypeInfo sysbus_ahci_info = {
185
- .name = TYPE_SYSBUS_AHCI,
186
- .parent = TYPE_SYS_BUS_DEVICE,
187
- .instance_size = sizeof(SysbusAHCIState),
188
- .instance_init = sysbus_ahci_init,
189
- .class_init = sysbus_ahci_class_init,
190
-};
191
-
192
-static void sysbus_ahci_register_types(void)
193
-{
194
- type_register_static(&sysbus_ahci_info);
195
-}
196
-
197
-type_init(sysbus_ahci_register_types)
198
-
199
void ahci_ide_create_devs(AHCIState *ahci, DriveInfo **hd)
200
{
201
int i;
202
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
203
index XXXXXXX..XXXXXXX 100644
204
--- a/hw/arm/Kconfig
205
+++ b/hw/arm/Kconfig
206
@@ -XXX,XX +XXX,XX @@ config HIGHBANK
207
depends on TCG && ARM
208
select A9MPCORE
209
select A15MPCORE
210
- select AHCI
211
+ select AHCI_SYSBUS
212
select ARM_TIMER # sp804
213
select ARM_V7M
214
select PL011 if !HAVE_RUST # UART
215
@@ -XXX,XX +XXX,XX @@ config SBSA_REF
216
depends on TCG && AARCH64
217
imply PCI_DEVICES
218
select DEVICE_TREE
219
- select AHCI
220
+ select AHCI_SYSBUS
221
select ARM_SMMUV3
222
select GPIO_KEY
223
select PCI_EXPRESS
224
@@ -XXX,XX +XXX,XX @@ config ARM_V7M
225
226
config ALLWINNER_A10
227
bool
228
- select AHCI
229
+ select AHCI_SYSBUS
230
select ALLWINNER_A10_PIT
231
select ALLWINNER_A10_PIC
232
select ALLWINNER_A10_CCM
233
@@ -XXX,XX +XXX,XX @@ config ALLWINNER_H3
234
config ALLWINNER_R40
235
bool
236
default y if TCG && ARM
237
- select AHCI
238
+ select AHCI_SYSBUS
239
select ALLWINNER_SRAMC
240
select ALLWINNER_A10_PIT
241
select ALLWINNER_WDT
242
@@ -XXX,XX +XXX,XX @@ config XLNX_ZYNQMP_ARM
243
bool
244
default y if PIXMAN
245
depends on TCG && AARCH64
246
- select AHCI
247
+ select AHCI_SYSBUS
248
select ARM_GIC
249
select CADENCE
250
select CPU_CLUSTER
251
diff --git a/hw/ide/Kconfig b/hw/ide/Kconfig
252
index XXXXXXX..XXXXXXX 100644
253
--- a/hw/ide/Kconfig
254
+++ b/hw/ide/Kconfig
255
@@ -XXX,XX +XXX,XX @@ config AHCI_ICH9
256
depends on PCI
257
select AHCI
258
259
+config AHCI_SYSBUS
260
+ bool
261
+ select AHCI
262
+
263
config IDE_SII3112
264
bool
265
select IDE_PCI
266
diff --git a/hw/ide/meson.build b/hw/ide/meson.build
267
index XXXXXXX..XXXXXXX 100644
268
--- a/hw/ide/meson.build
269
+++ b/hw/ide/meson.build
270
@@ -XXX,XX +XXX,XX @@
271
system_ss.add(when: 'CONFIG_AHCI', if_true: files('ahci.c'))
272
system_ss.add(when: 'CONFIG_AHCI_ICH9', if_true: files('ich.c'))
273
+system_ss.add(when: 'CONFIG_AHCI_SYSBUS', if_true: files('ahci-sysbus.c'))
274
system_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('ahci-allwinner.c'))
275
system_ss.add(when: 'CONFIG_IDE_BUS', if_true: files('ide-bus.c'))
276
system_ss.add(when: 'CONFIG_IDE_CF', if_true: files('cf.c'))
277
--
278
2.47.1
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