Based on the spec, svukte depends on SV39, so it should not be enabled
in RV32.

Signed-off-by: Fea.Wang <fea.wang@sifive.com>
---
 target/riscv/tcg/tcg-cpu.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index c62c221696..4273f1f472 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -652,6 +652,11 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
         return;
     }
 
+    if (mcc->misa_mxl_max == MXL_RV32 && cpu->cfg.ext_svukte) {
+        error_setg(errp, "svukte is not supported by to RV32");
+        return;
+    }
+
     /*
      * Disable isa extensions based on priv spec after we
      * validated and set everything we need.
-- 
2.34.1

On Wed, Nov 20, 2024 at 5:47 PM Fea.Wang <fea.wang@sifive.com> wrote:
>
> Based on the spec, svukte depends on SV39, so it should not be enabled
> in RV32.

The spec explicitly says it doesn't support RV32.

>
> Signed-off-by: Fea.Wang <fea.wang@sifive.com>
> ---
>  target/riscv/tcg/tcg-cpu.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index c62c221696..4273f1f472 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -652,6 +652,11 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
>          return;
>      }
>
> +    if (mcc->misa_mxl_max == MXL_RV32 && cpu->cfg.ext_svukte) {
> +        error_setg(errp, "svukte is not supported by to RV32");

"svukte is not supported for RV32"

Alistair

> +        return;
> +    }
> +
>      /*
>       * Disable isa extensions based on priv spec after we
>       * validated and set everything we need.
> --
> 2.34.1
>
>