On 11/13/24 17:13, Philippe Mathieu-Daudé wrote:
> Move CPU TLB related methods to "exec/cputlb.h".
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/exec/cputlb.h | 23 +++++++++++++++++++++++
> include/exec/exec-all.h | 22 ----------------------
> target/sparc/mmu_helper.c | 2 +-
> 3 files changed, 24 insertions(+), 23 deletions(-)
>
> diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h
> index 5386e53806..f6205d5306 100644
> --- a/include/exec/cputlb.h
> +++ b/include/exec/cputlb.h
> @@ -21,6 +21,7 @@
> #define CPUTLB_H
>
> #include "exec/cpu-common.h"
> +#include "exec/vaddr.h"
>
> #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
>
> @@ -57,4 +58,26 @@ void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length);
>
> #endif
>
> +/**
> + * tlb_set_page_full:
> + * @cpu: CPU context
> + * @mmu_idx: mmu index of the tlb to modify
> + * @addr: virtual address of the entry to add
> + * @full: the details of the tlb entry
> + *
> + * Add an entry to @cpu tlb index @mmu_idx. All of the fields of
> + * @full must be filled, except for xlat_section, and constitute
> + * the complete description of the translated page.
> + *
> + * This is generally called by the target tlb_fill function after
> + * having performed a successful page table walk to find the physical
> + * address and attributes for the translation.
> + *
> + * At most one entry for a given virtual address is permitted. Only a
> + * single TARGET_PAGE_SIZE region is mapped; @full->lg_page_size is only
> + * used by tlb_flush_page.
> + */
> +void tlb_set_page_full(CPUState *cpu, int mmu_idx, vaddr addr,
> + CPUTLBEntryFull *full);
> +
> #endif
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index d792203773..79649537b0 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -174,28 +174,6 @@ void tlb_flush_range_by_mmuidx_all_cpus_synced(CPUState *cpu,
> uint16_t idxmap,
> unsigned bits);
>
> -/**
> - * tlb_set_page_full:
> - * @cpu: CPU context
> - * @mmu_idx: mmu index of the tlb to modify
> - * @addr: virtual address of the entry to add
> - * @full: the details of the tlb entry
> - *
> - * Add an entry to @cpu tlb index @mmu_idx. All of the fields of
> - * @full must be filled, except for xlat_section, and constitute
> - * the complete description of the translated page.
> - *
> - * This is generally called by the target tlb_fill function after
> - * having performed a successful page table walk to find the physical
> - * address and attributes for the translation.
> - *
> - * At most one entry for a given virtual address is permitted. Only a
> - * single TARGET_PAGE_SIZE region is mapped; @full->lg_page_size is only
> - * used by tlb_flush_page.
> - */
> -void tlb_set_page_full(CPUState *cpu, int mmu_idx, vaddr addr,
> - CPUTLBEntryFull *full);
> -
> /**
> * tlb_set_page_with_attrs:
> * @cpu: CPU to add this TLB entry for
> diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
> index 9ff06026b8..7548d01777 100644
> --- a/target/sparc/mmu_helper.c
> +++ b/target/sparc/mmu_helper.c
> @@ -20,7 +20,7 @@
> #include "qemu/osdep.h"
> #include "qemu/log.h"
> #include "cpu.h"
> -#include "exec/exec-all.h"
> +#include "exec/cputlb.h"
> #include "exec/page-protection.h"
> #include "qemu/qemu-print.h"
> #include "trace.h"
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>