1
<meta>
2
This patch series has been through months of review and
3
refinement. It now has end-to-end Reviewed-by: tags and
4
all code patches but one have Tested-by: tags. No significant
5
issues have been found via review for some weeks.
6
7
The patch set creates two new subsystems:
8
hw/display/apple-gfx
9
hw/vmapple
10
so it doesn't fall within the responsibility of existing
11
maintainers. How do we proceed to get this merged now that
12
10.0 development is open?
13
</meta>
14
15
1
This patch set introduces a new ARM and macOS HVF specific machine type
16
This patch set introduces a new ARM and macOS HVF specific machine type
2
called "vmapple", as well as a family of display devices based on the
17
called "vmapple", as well as a family of display devices based on the
3
ParavirtualizedGraphics.framework in macOS. One of the display adapter
18
ParavirtualizedGraphics.framework in macOS. One of the display adapter
4
variants, apple-gfx-mmio, is required for the new machine type, while
19
variants, apple-gfx-mmio, is required for the new machine type, while
5
apple-gfx-pci can be used to enable 3D graphics acceleration with x86-64
20
apple-gfx-pci can be used to enable 3D graphics acceleration with x86-64
...
...
31
hosts only because ParavirtualizedGraphics.framework is a black box
46
hosts only because ParavirtualizedGraphics.framework is a black box
32
implementing most of the logic behind the apple-gfx device.)
47
implementing most of the logic behind the apple-gfx device.)
33
* PCI devices use legacy IRQs, not MSI/MSI-X. As far as I can tell,
48
* PCI devices use legacy IRQs, not MSI/MSI-X. As far as I can tell,
34
we'd need to include the GICv3 ITS, but it's unclear to me what
49
we'd need to include the GICv3 ITS, but it's unclear to me what
35
exactly needs wiring up.
50
exactly needs wiring up.
36
* Due to lack of MSI(-X), event delivery from USB devices to the guest
51
* Due to a quirk (bug?) in the macOS XHCI driver when MSI-X is not
37
macOS isn't working correctly. My current conclusion is that the
52
available, correct functioning of the USB controller (and thus
38
OS's XHCI driver simply was never designed to work with legacy IRQs.
53
keyboard/tablet) requires a small workaround in the XHCI controller
39
The upshot is that keyboard and mouse/tablet input is very laggy.
54
device. This is part of another patch series:
40
The solution would be to implement MSI(-X) support or figure out how
55
https://patchew.org/QEMU/20241208191646.64857-1-phil@philjordan.eu/
41
to make hcd-xhci-sysbus work with the macOS guest, if at all possible.
42
(EHCI and UHCI/OHCI controllers are not an option as the VMAPPLE
43
guest kernel does not include drivers for these.)
44
* The guest OS must first be provisioned using Virtualization.framework;
56
* The guest OS must first be provisioned using Virtualization.framework;
45
the disk images can subsequently be used in Qemu. (See docs.)
57
the disk images can subsequently be used in Qemu. (See docs.)
46
58
47
The apple-gfx device can be used independently from the vmapple machine
59
The apple-gfx device can be used independently from the vmapple machine
48
type, at least in the PCI variant. It mainly targets x86-64 macOS guests
60
type, at least in the PCI variant. It mainly targets x86-64 macOS guests
...
...
208
     property instead of 2 different subtypes for aux and root volumes.
220
     property instead of 2 different subtypes for aux and root volumes.
209
* 15/15 (vmapple machine type): Documentation fixup for changed virtio-blk
221
* 15/15 (vmapple machine type): Documentation fixup for changed virtio-blk
210
device type; small improvements to shell commands in documentation;
222
device type; small improvements to shell commands in documentation;
211
improved propagation of errors during cfg device instantiation.
223
improved propagation of errors during cfg device instantiation.
212
224
225
v10 -> v11:
226
227
* 01/15 (ui & main loop): Simplified main.c, better comments & commit message
228
* 02/15 (apple-gfx): Give each PV display instance a unique serial number.
229
* 02 & 03/15 (apple-gfx, -pci): Formatting/style tweaks
230
* 15/15 (vmapple machine type): Improvements to shell code in docs
231
232
v11 -> v12:
233
234
* 01/15 (ui & main loop): More precise wording of code comments.
235
* 02/15 (apple-gfx): Fixed memory management regressions introduced in v10;
236
improved error handling; various more conmetic code adjustments
237
* 09/15 (GPEX): Fixed uses of deleted GPEX_NUM_IRQS constant that have been
238
added to QEMU since this patch was originally written.
239
240
v12 -> v13:
241
242
* 15/15 (vmapple machine type): Bumped the machine type version from 9.2
243
to 10.0.
244
* All patches in the series now have been positively reviewed and received
245
corresponding reviewed-by tags.
246
247
v13 -> v14:
248
249
* 6/15 (hw/vmapple directory): Changed myself from reviewer
250
to maintainer, as that seemed appropriate at this point.
251
* 15/15 (vmapple machine type): Gate creation of XHCI and
252
USB HID devices behind if (defaults_enabled()).
213
253
214
Alexander Graf (9):
254
Alexander Graf (9):
215
hw: Add vmapple subdir
255
hw: Add vmapple subdir
216
hw/misc/pvpanic: Add MMIO interface
256
hw/misc/pvpanic: Add MMIO interface
217
hvf: arm: Ignore writes to CNTP_CTL_EL0
257
hvf: arm: Ignore writes to CNTP_CTL_EL0
...
...
239
hw/arm/sbsa-ref.c | 2 +-
279
hw/arm/sbsa-ref.c | 2 +-
240
hw/arm/virt.c | 2 +-
280
hw/arm/virt.c | 2 +-
241
hw/block/virtio-blk.c | 58 +-
281
hw/block/virtio-blk.c | 58 +-
242
hw/core/qdev-properties-system.c | 8 +
282
hw/core/qdev-properties-system.c | 8 +
243
hw/display/Kconfig | 13 +
283
hw/display/Kconfig | 13 +
244
hw/display/apple-gfx-mmio.m | 289 ++++++++++
284
hw/display/apple-gfx-mmio.m | 289 +++++++++
245
hw/display/apple-gfx-pci.m | 157 +++++
285
hw/display/apple-gfx-pci.m | 157 +++++
246
hw/display/apple-gfx.h | 78 +++
286
hw/display/apple-gfx.h | 77 +++
247
hw/display/apple-gfx.m | 862 ++++++++++++++++++++++++++++
287
hw/display/apple-gfx.m | 880 ++++++++++++++++++++++++++++
248
hw/display/meson.build | 7 +
288
hw/display/meson.build | 7 +
249
hw/display/trace-events | 30 +
289
hw/display/trace-events | 30 +
250
hw/i386/microvm.c | 2 +-
290
hw/i386/microvm.c | 2 +-
251
hw/loongarch/virt.c | 2 +-
291
hw/loongarch/virt.c | 12 +-
252
hw/meson.build | 1 +
292
hw/meson.build | 1 +
253
hw/mips/loongson3_virt.c | 2 +-
293
hw/mips/loongson3_virt.c | 2 +-
254
hw/misc/Kconfig | 4 +
294
hw/misc/Kconfig | 4 +
255
hw/misc/meson.build | 1 +
295
hw/misc/meson.build | 1 +
256
hw/misc/pvpanic-mmio.c | 61 ++
296
hw/misc/pvpanic-mmio.c | 61 ++
257
hw/openrisc/virt.c | 12 +-
297
hw/openrisc/virt.c | 12 +-
258
hw/pci-host/gpex.c | 43 +-
298
hw/pci-host/gpex.c | 43 +-
259
hw/riscv/virt.c | 12 +-
299
hw/riscv/virt.c | 12 +-
260
hw/vmapple/Kconfig | 32 ++
300
hw/vmapple/Kconfig | 32 +
261
hw/vmapple/aes.c | 581 +++++++++++++++++++
301
hw/vmapple/aes.c | 581 ++++++++++++++++++
262
hw/vmapple/bdif.c | 275 +++++++++
302
hw/vmapple/bdif.c | 275 +++++++++
263
hw/vmapple/cfg.c | 196 +++++++
303
hw/vmapple/cfg.c | 196 +++++++
264
hw/vmapple/meson.build | 5 +
304
hw/vmapple/meson.build | 5 +
265
hw/vmapple/trace-events | 21 +
305
hw/vmapple/trace-events | 21 +
266
hw/vmapple/trace.h | 1 +
306
hw/vmapple/trace.h | 1 +
267
hw/vmapple/virtio-blk.c | 205 +++++++
307
hw/vmapple/virtio-blk.c | 205 +++++++
268
hw/vmapple/vmapple.c | 646 +++++++++++++++++++++
308
hw/vmapple/vmapple.c | 648 ++++++++++++++++++++
309
hw/xen/xen-pvh-common.c | 2 +-
269
hw/xtensa/virt.c | 2 +-
310
hw/xtensa/virt.c | 2 +-
270
include/hw/misc/pvpanic.h | 1 +
311
include/hw/misc/pvpanic.h | 1 +
271
include/hw/pci-host/gpex.h | 7 +-
312
include/hw/pci-host/gpex.h | 7 +-
272
include/hw/pci/pci_ids.h | 1 +
313
include/hw/pci/pci_ids.h | 1 +
273
include/hw/qdev-properties-system.h | 5 +
314
include/hw/qdev-properties-system.h | 5 +
274
include/hw/virtio/virtio-blk.h | 11 +-
315
include/hw/virtio/virtio-blk.h | 11 +-
275
include/hw/vmapple/vmapple.h | 23 +
316
include/hw/vmapple/vmapple.h | 23 +
276
include/qemu-main.h | 21 +-
317
include/qemu-main.h | 14 +-
277
include/qemu/cutils.h | 15 +
318
include/qemu/cutils.h | 15 +
278
include/qemu/typedefs.h | 1 +
279
meson.build | 5 +
319
meson.build | 5 +
280
qapi/virtio.json | 14 +
320
qapi/virtio.json | 14 +
281
system/main.c | 50 +-
321
system/main.c | 37 +-
282
target/arm/hvf/hvf.c | 9 +
322
target/arm/hvf/hvf.c | 9 +
283
ui/cocoa.m | 54 +-
323
ui/cocoa.m | 54 +-
284
ui/gtk.c | 8 +
324
ui/gtk.c | 4 +
285
ui/sdl2.c | 4 +
325
ui/sdl2.c | 4 +
286
util/hexdump.c | 18 +
326
util/hexdump.c | 18 +
287
53 files changed, 3840 insertions(+), 106 deletions(-)
327
53 files changed, 3842 insertions(+), 110 deletions(-)
288
create mode 100755 contrib/vmapple/uuid.sh
328
create mode 100755 contrib/vmapple/uuid.sh
289
create mode 100644 docs/system/arm/vmapple.rst
329
create mode 100644 docs/system/arm/vmapple.rst
290
create mode 100644 hw/display/apple-gfx-mmio.m
330
create mode 100644 hw/display/apple-gfx-mmio.m
291
create mode 100644 hw/display/apple-gfx-pci.m
331
create mode 100644 hw/display/apple-gfx-pci.m
292
create mode 100644 hw/display/apple-gfx.h
332
create mode 100644 hw/display/apple-gfx.h
...
...
302
create mode 100644 hw/vmapple/virtio-blk.c
342
create mode 100644 hw/vmapple/virtio-blk.c
303
create mode 100644 hw/vmapple/vmapple.c
343
create mode 100644 hw/vmapple/vmapple.c
304
create mode 100644 include/hw/vmapple/vmapple.h
344
create mode 100644 include/hw/vmapple/vmapple.h
305
345
306
--
346
--
307
2.39.3 (Apple Git-145)
347
2.39.5 (Apple Git-154)
308
348
309
349
diff view generated by jsdifflib
Deleted patch
1
macOS's Cocoa event handling must be done on the initial (main) thread
2
of the process. Furthermore, if library or application code uses
3
libdispatch, the main dispatch queue must be handling events on the main
4
thread as well.
5
1
6
So far, this has affected Qemu in both the Cocoa and SDL UIs, although
7
in different ways: the Cocoa UI replaces the default qemu_main function
8
with one that spins Qemu's internal main event loop off onto a
9
background thread. SDL (which uses Cocoa internally) on the other hand
10
uses a polling approach within Qemu's main event loop. Events are
11
polled during the SDL UI's dpy_refresh callback, which happens to run
12
on the main thread by default.
13
14
As UIs are mutually exclusive, this works OK as long as nothing else
15
needs platform-native event handling. In the next patch, a new device is
16
introduced based on the ParavirtualizedGraphics.framework in macOS.
17
This uses libdispatch internally, and only works when events are being
18
handled on the main runloop. With the current system, it works when
19
using either the Cocoa or the SDL UI. However, it does not when running
20
headless. Moreover, any attempt to install a similar scheme to the
21
Cocoa UI's main thread replacement fails when combined with the SDL
22
UI.
23
24
This change tidies up main thread management to be more flexible.
25
26
* The qemu_main global function pointer is a custom function for the
27
main thread, and it may now be NULL. When it is, the main thread
28
runs the main Qemu loop. This represents the traditional setup.
29
* When non-null, spawning the main Qemu event loop on a separate
30
thread is now done centrally rather than inside the Cocoa UI code.
31
* For most platforms, qemu_main is indeed NULL by default, but on
32
Darwin, it defaults to a function that runs the CFRunLoop.
33
* The Cocoa UI sets qemu_main to a function which runs the
34
NSApplication event handling runloop, as is usual for a Cocoa app.
35
* The SDL UI overrides the qemu_main function to NULL, thus
36
specifying that Qemu's main loop must run on the main
37
thread.
38
* The GTK UI also overrides the qemu_main function to NULL.
39
* For other UIs, or in the absence of UIs, the platform's default
40
behaviour is followed.
41
42
This means that on macOS, the platform's runloop events are always
43
handled, regardless of chosen UI. The new PV graphics device will
44
thus work in all configurations. There is no functional change on other
45
operating systems.
46
47
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
48
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
49
---
50
51
v5:
52
53
* Simplified the way of setting/clearing the main loop by going back
54
to setting qemu_main directly, but narrowing the scope of what it
55
needs to do, and it can now be NULL.
56
57
v6:
58
59
* Folded function qemu_run_default_main_on_new_thread's code into
60
main()
61
* Removed whitespace changes left over on lines near code removed
62
between v4 and v5
63
64
v9:
65
66
* Set qemu_main to NULL for GTK UI as well.
67
68
v10:
69
70
* Added comments clarifying the functionality and purpose of qemu_main.
71
72
include/qemu-main.h | 21 ++++++++++++++--
73
include/qemu/typedefs.h | 1 +
74
system/main.c | 50 ++++++++++++++++++++++++++++++++++----
75
ui/cocoa.m | 54 ++++++++++-------------------------------
76
ui/gtk.c | 8 ++++++
77
ui/sdl2.c | 4 +++
78
6 files changed, 90 insertions(+), 48 deletions(-)
79
80
diff --git a/include/qemu-main.h b/include/qemu-main.h
81
index XXXXXXX..XXXXXXX 100644
82
--- a/include/qemu-main.h
83
+++ b/include/qemu-main.h
84
@@ -XXX,XX +XXX,XX @@
85
#ifndef QEMU_MAIN_H
86
#define QEMU_MAIN_H
87
88
-int qemu_default_main(void);
89
-extern int (*qemu_main)(void);
90
+/*
91
+ * The function to run on the main (initial) thread of the process.
92
+ * NULL means QEMU's main event loop.
93
+ * When non-NULL, QEMU's main event loop will run on a purposely created
94
+ * thread, after which the provided function pointer will be invoked on
95
+ * the initial thread.
96
+ * This is useful on platforms which treat the main thread as special
97
+ * (macOS/Darwin) and/or require all UI API calls to occur from a
98
+ * specific thread.
99
+ * Implementing this via a global function pointer variable is a bit
100
+ * ugly, but it's probably worth investigating the existing UI thread rule
101
+ * violations in the SDL (e.g. #2537) and GTK+ back-ends. Fixing those
102
+ * issues might precipitate requirements similar but not identical to those
103
+ * of the Cocoa UI; hopefully we'll see some kind of pattern emerge, which
104
+ * can then be used as a basis for an overhaul. (In fact, it may turn
105
+ * out to be simplest to split the UI/native platform event thread from the
106
+ * QEMU main event loop on all platforms, with any UI or even none at all.)
107
+ */
108
+extern qemu_main_fn qemu_main;
109
110
#endif /* QEMU_MAIN_H */
111
diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h
112
index XXXXXXX..XXXXXXX 100644
113
--- a/include/qemu/typedefs.h
114
+++ b/include/qemu/typedefs.h
115
@@ -XXX,XX +XXX,XX @@ typedef struct IRQState *qemu_irq;
116
* Function types
117
*/
118
typedef void (*qemu_irq_handler)(void *opaque, int n, int level);
119
+typedef int (*qemu_main_fn)(void);
120
121
#endif /* QEMU_TYPEDEFS_H */
122
diff --git a/system/main.c b/system/main.c
123
index XXXXXXX..XXXXXXX 100644
124
--- a/system/main.c
125
+++ b/system/main.c
126
@@ -XXX,XX +XXX,XX @@
127
128
#include "qemu/osdep.h"
129
#include "qemu-main.h"
130
+#include "qemu/main-loop.h"
131
#include "sysemu/sysemu.h"
132
133
-#ifdef CONFIG_SDL
134
-#include <SDL.h>
135
+#ifdef CONFIG_DARWIN
136
+#include <CoreFoundation/CoreFoundation.h>
137
#endif
138
139
-int qemu_default_main(void)
140
+static int qemu_default_main(void)
141
{
142
int status;
143
144
@@ -XXX,XX +XXX,XX @@ int qemu_default_main(void)
145
return status;
146
}
147
148
-int (*qemu_main)(void) = qemu_default_main;
149
+/*
150
+ * Various macOS system libraries, including the Cocoa UI and anything using
151
+ * libdispatch, such as ParavirtualizedGraphics.framework, requires that the
152
+ * main runloop, on the main (initial) thread be running or at least regularly
153
+ * polled for events. A special mode is therefore supported, where the QEMU
154
+ * main loop runs on a separate thread and the main thread handles the
155
+ * CF/Cocoa runloop.
156
+ */
157
+
158
+static void *call_qemu_default_main(void *opaque)
159
+{
160
+ int status;
161
+
162
+ bql_lock();
163
+ status = qemu_default_main();
164
+ bql_unlock();
165
+
166
+ exit(status);
167
+}
168
+
169
+#ifdef CONFIG_DARWIN
170
+static int os_darwin_cfrunloop_main(void)
171
+{
172
+ CFRunLoopRun();
173
+ abort();
174
+}
175
+
176
+qemu_main_fn qemu_main = os_darwin_cfrunloop_main;
177
+#else
178
+qemu_main_fn qemu_main;
179
+#endif
180
181
int main(int argc, char **argv)
182
{
183
+ QemuThread main_loop_thread;
184
+
185
qemu_init(argc, argv);
186
- return qemu_main();
187
+ if (qemu_main) {
188
+ qemu_thread_create(&main_loop_thread, "qemu_main",
189
+ call_qemu_default_main, NULL, QEMU_THREAD_DETACHED);
190
+ bql_unlock();
191
+ return qemu_main();
192
+ } else {
193
+ qemu_default_main();
194
+ }
195
}
196
diff --git a/ui/cocoa.m b/ui/cocoa.m
197
index XXXXXXX..XXXXXXX 100644
198
--- a/ui/cocoa.m
199
+++ b/ui/cocoa.m
200
@@ -XXX,XX +XXX,XX @@
201
int height;
202
} QEMUScreen;
203
204
+@class QemuCocoaPasteboardTypeOwner;
205
+
206
static void cocoa_update(DisplayChangeListener *dcl,
207
int x, int y, int w, int h);
208
209
@@ -XXX,XX +XXX,XX @@ static void cocoa_switch(DisplayChangeListener *dcl,
210
static NSInteger cbchangecount = -1;
211
static QemuClipboardInfo *cbinfo;
212
static QemuEvent cbevent;
213
+static QemuCocoaPasteboardTypeOwner *cbowner;
214
215
// Utility functions to run specified code block with the BQL held
216
typedef void (^CodeBlock)(void);
217
@@ -XXX,XX +XXX,XX @@ - (void) dealloc
218
{
219
COCOA_DEBUG("QemuCocoaAppController: dealloc\n");
220
221
- if (cocoaView)
222
- [cocoaView release];
223
+ [cocoaView release];
224
+ [cbowner release];
225
+ cbowner = nil;
226
+
227
[super dealloc];
228
}
229
230
@@ -XXX,XX +XXX,XX @@ - (void)pasteboard:(NSPasteboard *)sender provideDataForType:(NSPasteboardType)t
231
232
@end
233
234
-static QemuCocoaPasteboardTypeOwner *cbowner;
235
-
236
static void cocoa_clipboard_notify(Notifier *notifier, void *data);
237
static void cocoa_clipboard_request(QemuClipboardInfo *info,
238
QemuClipboardType type);
239
@@ -XXX,XX +XXX,XX @@ static void cocoa_clipboard_request(QemuClipboardInfo *info,
240
}
241
}
242
243
-/*
244
- * The startup process for the OSX/Cocoa UI is complicated, because
245
- * OSX insists that the UI runs on the initial main thread, and so we
246
- * need to start a second thread which runs the qemu_default_main():
247
- * in main():
248
- * in cocoa_display_init():
249
- * assign cocoa_main to qemu_main
250
- * create application, menus, etc
251
- * in cocoa_main():
252
- * create qemu-main thread
253
- * enter OSX run loop
254
- */
255
-
256
-static void *call_qemu_main(void *opaque)
257
-{
258
- int status;
259
-
260
- COCOA_DEBUG("Second thread: calling qemu_default_main()\n");
261
- bql_lock();
262
- status = qemu_default_main();
263
- bql_unlock();
264
- COCOA_DEBUG("Second thread: qemu_default_main() returned, exiting\n");
265
- [cbowner release];
266
- exit(status);
267
-}
268
-
269
static int cocoa_main(void)
270
{
271
- QemuThread thread;
272
-
273
- COCOA_DEBUG("Entered %s()\n", __func__);
274
-
275
- bql_unlock();
276
- qemu_thread_create(&thread, "qemu_main", call_qemu_main,
277
- NULL, QEMU_THREAD_DETACHED);
278
-
279
- // Start the main event loop
280
COCOA_DEBUG("Main thread: entering OSX run loop\n");
281
[NSApp run];
282
COCOA_DEBUG("Main thread: left OSX run loop, which should never happen\n");
283
@@ -XXX,XX +XXX,XX @@ static void cocoa_display_init(DisplayState *ds, DisplayOptions *opts)
284
285
COCOA_DEBUG("qemu_cocoa: cocoa_display_init\n");
286
287
- qemu_main = cocoa_main;
288
-
289
// Pull this console process up to being a fully-fledged graphical
290
// app with a menubar and Dock icon
291
ProcessSerialNumber psn = { 0, kCurrentProcess };
292
@@ -XXX,XX +XXX,XX @@ static void cocoa_display_init(DisplayState *ds, DisplayOptions *opts)
293
qemu_clipboard_peer_register(&cbpeer);
294
295
[pool release];
296
+
297
+ /*
298
+ * The Cocoa UI will run the NSApplication runloop on the main thread
299
+ * rather than the default Core Foundation one.
300
+ */
301
+ qemu_main = cocoa_main;
302
}
303
304
static QemuDisplay qemu_display_cocoa = {
305
diff --git a/ui/gtk.c b/ui/gtk.c
306
index XXXXXXX..XXXXXXX 100644
307
--- a/ui/gtk.c
308
+++ b/ui/gtk.c
309
@@ -XXX,XX +XXX,XX @@
310
#include "qemu/cutils.h"
311
#include "qemu/error-report.h"
312
#include "qemu/main-loop.h"
313
+#include "qemu-main.h"
314
315
#include "ui/console.h"
316
#include "ui/gtk.h"
317
@@ -XXX,XX +XXX,XX @@ static void gtk_display_init(DisplayState *ds, DisplayOptions *opts)
318
#ifdef CONFIG_GTK_CLIPBOARD
319
gd_clipboard_init(s);
320
#endif /* CONFIG_GTK_CLIPBOARD */
321
+
322
+ /*
323
+ * GTK+ calls must happen on the main thread at least on some platforms,
324
+ * and on macOS the main runloop is polled via GTK+'s event handling.
325
+ * Don't allow QEMU's event loop to be moved off the main thread.
326
+ */
327
+ qemu_main = NULL;
328
}
329
330
static void early_gtk_display_init(DisplayOptions *opts)
331
diff --git a/ui/sdl2.c b/ui/sdl2.c
332
index XXXXXXX..XXXXXXX 100644
333
--- a/ui/sdl2.c
334
+++ b/ui/sdl2.c
335
@@ -XXX,XX +XXX,XX @@
336
#include "sysemu/sysemu.h"
337
#include "ui/win32-kbd-hook.h"
338
#include "qemu/log.h"
339
+#include "qemu-main.h"
340
341
static int sdl2_num_outputs;
342
static struct sdl2_console *sdl2_console;
343
@@ -XXX,XX +XXX,XX @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o)
344
}
345
346
atexit(sdl_cleanup);
347
+
348
+ /* SDL's event polling (in dpy_refresh) must happen on the main thread. */
349
+ qemu_main = NULL;
350
}
351
352
static QemuDisplay qemu_display_sdl2 = {
353
--
354
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
MacOS provides a framework (library) that allows any vmm to implement a
2
paravirtualized 3d graphics passthrough to the host metal stack called
3
ParavirtualizedGraphics.Framework (PVG). The library abstracts away
4
almost every aspect of the paravirtualized device model and only provides
5
and receives callbacks on MMIO access as well as to share memory address
6
space between the VM and PVG.
7
1
8
This patch implements a QEMU device that drives PVG for the VMApple
9
variant of it.
10
11
Signed-off-by: Alexander Graf <graf@amazon.com>
12
Co-authored-by: Alexander Graf <graf@amazon.com>
13
14
Subsequent changes:
15
16
* Cherry-pick/rebase conflict fixes, API use updates.
17
* Moved from hw/vmapple/ (useful outside that machine type)
18
* Overhaul of threading model, many thread safety improvements.
19
* Asynchronous rendering.
20
* Memory and object lifetime fixes.
21
* Refactoring to split generic and (vmapple) MMIO variant specific
22
code.
23
24
Implementation wise, most of the complexity lies in the differing threading
25
models of ParavirtualizedGraphics.framework, which uses libdispatch and
26
internal locks, versus QEMU, which heavily uses the BQL, especially during
27
memory-mapped device I/O. Great care has therefore been taken to prevent
28
deadlocks by never calling into PVG methods while holding the BQL, and
29
similarly never acquiring the BQL in a callback from PVG. Different strategies
30
have been used (libdispatch, blocking and non-blocking BHs, RCU, etc.)
31
depending on the specific requirements at each framework entry and exit point.
32
33
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
34
---
35
36
v2:
37
38
* Cherry-pick/rebase conflict fixes
39
* BQL function renaming
40
* Moved from hw/vmapple/ (useful outside that machine type)
41
* Code review comments: Switched to DEFINE_TYPES macro & little endian
42
MMIO.
43
* Removed some dead/superfluous code
44
* Mad set_mode thread & memory safe
45
* Added migration blocker due to lack of (de-)serialisation.
46
* Fixes to ObjC refcounting and autorelease pool usage.
47
* Fixed ObjC new/init misuse
48
* Switched to ObjC category extension for private property.
49
* Simplified task memory mapping and made it thread safe.
50
* Refactoring to split generic and vmapple MMIO variant specific
51
code.
52
* Switched to asynchronous MMIO writes on x86-64
53
* Rendering and graphics update are now done asynchronously
54
* Fixed cursor handling
55
* Coding convention fixes
56
* Removed software cursor compositing
57
58
v3:
59
60
* Rebased on latest upstream, fixed breakages including switching to Resettable methods.
61
* Squashed patches dealing with dGPUs, MMIO area size, and GPU picking.
62
* Allow re-entrant MMIO; this simplifies the code and solves the divergence
63
between x86-64 and arm64 variants.
64
65
v4:
66
67
* Renamed '-vmapple' device variant to '-mmio'
68
* MMIO device type now requires aarch64 host and guest
69
* Complete overhaul of the glue code for making Qemu's and
70
ParavirtualizedGraphics.framework's threading and synchronisation models
71
work together. Calls into PVG are from dispatch queues while the
72
BQL-holding initiating thread processes AIO context events; callbacks from
73
PVG are scheduled as BHs on the BQL/main AIO context, awaiting completion
74
where necessary.
75
* Guest frame rendering state is covered by the BQL, with only the PVG calls
76
outside the lock, and serialised on the named render_queue.
77
* Simplified logic for dropping frames in-flight during mode changes, fixed
78
bug in pending frames logic.
79
* Addressed smaller code review notes such as: function naming, object type
80
declarations, type names/declarations/casts, code formatting, #include
81
order, over-cautious ObjC retain/release, what goes in init vs realize,
82
etc.
83
84
v5:
85
86
* Smaller non-functional fixes in response to review comments, such as using
87
NULL for the AIO_WAIT_WHILE context argument, type name formatting,
88
deleting leftover debug code, logging improvements, state struct field
89
order and documentation improvements, etc.
90
* Instead of a single condition variable for all synchronous BH job types,
91
there is now one for each callback block. This reduces the number
92
of threads being awoken unnecessarily to near zero.
93
* MMIO device variant: Unified the BH job for raising interrupts.
94
* Use DMA APIs for PVG framework's guest memory read requests.
95
* Thread safety improvements: ensure mutable AppleGFXState fields are not
96
accessed outside the appropriate lock. Added dedicated mutex for the task
97
list.
98
* Retain references to MemoryRegions for which there exist mappings in each
99
PGTask, and for IOSurface mappings.
100
101
v6:
102
103
* Switched PGTask_s's' mapped_regions from GPtrArray to GArray
104
* Allow DisplaySurface to manage its own vram now that texture -> vram copy
105
occurs under BQL.
106
* Memory mapping operations now use RCU_READ_LOCK_GUARD() where possible
107
instead of a heavy-weight BH job to acquire the BQL.
108
* Changed PVG cursor and mode setting callbacks to kick off BHs instead of
109
libdispatch tasks which then locked the BQL explicitly.
110
* The single remaining callback which must wait for a BH to complete now
111
creates an ephemeral QemuSemaphore to await completion.
112
* Re-removed tracking of mapped surface manager memory regions. Just look up
113
and ref/unref the memory regions in the map/unmap callbacks.
114
* Re-ordered functions in apple-gfx.m to group them by area of functionality.
115
* Improved comments and tweaked some names.
116
117
v7:
118
119
* Use g_ptr_array_find() helper function
120
* Error handling coding style tweak
121
122
v8:
123
124
* Renamed apple_gfx_host_address_for_gpa_range() to
125
apple_gfx_host_ptr_for_gpa_range(), and made it return a void* instead of
126
uintptr_t. Fixed up callers and related code.
127
* Some adjustments to types used.
128
* Variable naming tweaks for better clarity.
129
* Fixed leak in unlikely realize error case.
130
* Fixed typo in unmap call.
131
* Don't bother with dummy argument for g_ptr_array_find(), NULL works too.
132
133
v9:
134
135
* Pass device pointer to graphic_console_init().
136
* Slightly re-ordered initialisation code.
137
* Simplified error handling during realize().
138
* Simplified code without functional changes, adjusted code & comment
139
formatting.
140
141
v10:
142
143
* Reworked the way frame rendering code is threaded to use BHs for sections
144
requiring BQL.
145
* Fix for ./configure error on non-macOS platforms.
146
* Code formatting tweaks.
147
148
hw/display/Kconfig | 9 +
149
hw/display/apple-gfx-mmio.m | 281 +++++++++++++
150
hw/display/apple-gfx.h | 67 ++++
151
hw/display/apple-gfx.m | 765 ++++++++++++++++++++++++++++++++++++
152
hw/display/meson.build | 6 +
153
hw/display/trace-events | 28 ++
154
meson.build | 4 +
155
7 files changed, 1160 insertions(+)
156
create mode 100644 hw/display/apple-gfx-mmio.m
157
create mode 100644 hw/display/apple-gfx.h
158
create mode 100644 hw/display/apple-gfx.m
159
160
diff --git a/hw/display/Kconfig b/hw/display/Kconfig
161
index XXXXXXX..XXXXXXX 100644
162
--- a/hw/display/Kconfig
163
+++ b/hw/display/Kconfig
164
@@ -XXX,XX +XXX,XX @@ config XLNX_DISPLAYPORT
165
166
config DM163
167
bool
168
+
169
+config MAC_PVG
170
+ bool
171
+ default y
172
+
173
+config MAC_PVG_MMIO
174
+ bool
175
+ depends on MAC_PVG && AARCH64
176
+
177
diff --git a/hw/display/apple-gfx-mmio.m b/hw/display/apple-gfx-mmio.m
178
new file mode 100644
179
index XXXXXXX..XXXXXXX
180
--- /dev/null
181
+++ b/hw/display/apple-gfx-mmio.m
182
@@ -XXX,XX +XXX,XX @@
183
+/*
184
+ * QEMU Apple ParavirtualizedGraphics.framework device, MMIO (arm64) variant
185
+ *
186
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
187
+ *
188
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
189
+ * See the COPYING file in the top-level directory.
190
+ *
191
+ * SPDX-License-Identifier: GPL-2.0-or-later
192
+ *
193
+ * ParavirtualizedGraphics.framework is a set of libraries that macOS provides
194
+ * which implements 3d graphics passthrough to the host as well as a
195
+ * proprietary guest communication channel to drive it. This device model
196
+ * implements support to drive that library from within QEMU as an MMIO-based
197
+ * system device for macOS on arm64 VMs.
198
+ */
199
+
200
+#include "qemu/osdep.h"
201
+#import <ParavirtualizedGraphics/ParavirtualizedGraphics.h>
202
+#include "apple-gfx.h"
203
+#include "monitor/monitor.h"
204
+#include "hw/sysbus.h"
205
+#include "hw/irq.h"
206
+#include "trace.h"
207
+#include "qemu/log.h"
208
+
209
+OBJECT_DECLARE_SIMPLE_TYPE(AppleGFXMMIOState, APPLE_GFX_MMIO)
210
+
211
+/*
212
+ * ParavirtualizedGraphics.Framework only ships header files for the PCI
213
+ * variant which does not include IOSFC descriptors and host devices. We add
214
+ * their definitions here so that we can also work with the ARM version.
215
+ */
216
+typedef bool(^IOSFCRaiseInterrupt)(uint32_t vector);
217
+typedef bool(^IOSFCUnmapMemory)(
218
+ void *, void *, void *, void *, void *, void *);
219
+typedef bool(^IOSFCMapMemory)(
220
+ uint64_t phys, uint64_t len, bool ro, void **va, void *, void *);
221
+
222
+@interface PGDeviceDescriptor (IOSurfaceMapper)
223
+@property (readwrite, nonatomic) bool usingIOSurfaceMapper;
224
+@end
225
+
226
+@interface PGIOSurfaceHostDeviceDescriptor : NSObject
227
+-(PGIOSurfaceHostDeviceDescriptor *)init;
228
+@property (readwrite, nonatomic, copy, nullable) IOSFCMapMemory mapMemory;
229
+@property (readwrite, nonatomic, copy, nullable) IOSFCUnmapMemory unmapMemory;
230
+@property (readwrite, nonatomic, copy, nullable) IOSFCRaiseInterrupt raiseInterrupt;
231
+@end
232
+
233
+@interface PGIOSurfaceHostDevice : NSObject
234
+-(instancetype)initWithDescriptor:(PGIOSurfaceHostDeviceDescriptor *)desc;
235
+-(uint32_t)mmioReadAtOffset:(size_t)offset;
236
+-(void)mmioWriteAtOffset:(size_t)offset value:(uint32_t)value;
237
+@end
238
+
239
+struct AppleGFXMapSurfaceMemoryJob;
240
+struct AppleGFXMMIOState {
241
+ SysBusDevice parent_obj;
242
+
243
+ AppleGFXState common;
244
+
245
+ qemu_irq irq_gfx;
246
+ qemu_irq irq_iosfc;
247
+ MemoryRegion iomem_iosfc;
248
+ PGIOSurfaceHostDevice *pgiosfc;
249
+};
250
+
251
+typedef struct AppleGFXMMIOJob {
252
+ AppleGFXMMIOState *state;
253
+ uint64_t offset;
254
+ uint64_t value;
255
+ bool completed;
256
+} AppleGFXMMIOJob;
257
+
258
+static void iosfc_do_read(void *opaque)
259
+{
260
+ AppleGFXMMIOJob *job = opaque;
261
+ job->value = [job->state->pgiosfc mmioReadAtOffset:job->offset];
262
+ qatomic_set(&job->completed, true);
263
+ aio_wait_kick();
264
+}
265
+
266
+static uint64_t iosfc_read(void *opaque, hwaddr offset, unsigned size)
267
+{
268
+ AppleGFXMMIOJob job = {
269
+ .state = opaque,
270
+ .offset = offset,
271
+ .completed = false,
272
+ };
273
+ dispatch_queue_t queue =
274
+ dispatch_get_global_queue(DISPATCH_QUEUE_PRIORITY_DEFAULT, 0);
275
+
276
+ dispatch_async_f(queue, &job, iosfc_do_read);
277
+ AIO_WAIT_WHILE(NULL, !qatomic_read(&job.completed));
278
+
279
+ trace_apple_gfx_mmio_iosfc_read(offset, job.value);
280
+ return job.value;
281
+}
282
+
283
+static void iosfc_do_write(void *opaque)
284
+{
285
+ AppleGFXMMIOJob *job = opaque;
286
+ [job->state->pgiosfc mmioWriteAtOffset:job->offset value:job->value];
287
+ qatomic_set(&job->completed, true);
288
+ aio_wait_kick();
289
+}
290
+
291
+static void iosfc_write(void *opaque, hwaddr offset, uint64_t val,
292
+ unsigned size)
293
+{
294
+ AppleGFXMMIOJob job = {
295
+ .state = opaque,
296
+ .offset = offset,
297
+ .value = val,
298
+ .completed = false,
299
+ };
300
+ dispatch_queue_t queue =
301
+ dispatch_get_global_queue(DISPATCH_QUEUE_PRIORITY_DEFAULT, 0);
302
+
303
+ dispatch_async_f(queue, &job, iosfc_do_write);
304
+ AIO_WAIT_WHILE(NULL, !qatomic_read(&job.completed));
305
+
306
+ trace_apple_gfx_mmio_iosfc_write(offset, val);
307
+}
308
+
309
+static const MemoryRegionOps apple_iosfc_ops = {
310
+ .read = iosfc_read,
311
+ .write = iosfc_write,
312
+ .endianness = DEVICE_LITTLE_ENDIAN,
313
+ .valid = {
314
+ .min_access_size = 4,
315
+ .max_access_size = 8,
316
+ },
317
+ .impl = {
318
+ .min_access_size = 4,
319
+ .max_access_size = 8,
320
+ },
321
+};
322
+
323
+static void raise_irq_bh(void *opaque)
324
+{
325
+ qemu_irq *irq = opaque;
326
+
327
+ qemu_irq_pulse(*irq);
328
+}
329
+
330
+static void *apple_gfx_mmio_map_surface_memory(uint64_t guest_physical_address,
331
+ uint64_t length, bool read_only)
332
+{
333
+ void *mem;
334
+ MemoryRegion *region = NULL;
335
+
336
+ RCU_READ_LOCK_GUARD();
337
+ mem = apple_gfx_host_ptr_for_gpa_range(guest_physical_address,
338
+ length, read_only, &region);
339
+ if (mem) {
340
+ memory_region_ref(region);
341
+ }
342
+ return mem;
343
+}
344
+
345
+static bool apple_gfx_mmio_unmap_surface_memory(void *ptr)
346
+{
347
+ MemoryRegion *region;
348
+ ram_addr_t offset = 0;
349
+
350
+ RCU_READ_LOCK_GUARD();
351
+ region = memory_region_from_host(ptr, &offset);
352
+ if (!region) {
353
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: memory at %p to be unmapped not "
354
+ "found.\n",
355
+ __func__, ptr);
356
+ return false;
357
+ }
358
+
359
+ trace_apple_gfx_iosfc_unmap_memory_region(ptr, region);
360
+ memory_region_unref(region);
361
+ return true;
362
+}
363
+
364
+static PGIOSurfaceHostDevice *apple_gfx_prepare_iosurface_host_device(
365
+ AppleGFXMMIOState *s)
366
+{
367
+ PGIOSurfaceHostDeviceDescriptor *iosfc_desc =
368
+ [PGIOSurfaceHostDeviceDescriptor new];
369
+ PGIOSurfaceHostDevice *iosfc_host_dev = nil;
370
+
371
+ iosfc_desc.mapMemory =
372
+ ^bool(uint64_t phys, uint64_t len, bool ro, void **va, void *e, void *f) {
373
+ *va = apple_gfx_mmio_map_surface_memory(phys, len, ro);
374
+
375
+ trace_apple_gfx_iosfc_map_memory(phys, len, ro, va, e, f, *va);
376
+
377
+ return *va != NULL;
378
+ };
379
+
380
+ iosfc_desc.unmapMemory =
381
+ ^bool(void *va, void *b, void *c, void *d, void *e, void *f) {
382
+ return apple_gfx_mmio_unmap_surface_memory(va);
383
+ };
384
+
385
+ iosfc_desc.raiseInterrupt = ^bool(uint32_t vector) {
386
+ trace_apple_gfx_iosfc_raise_irq(vector);
387
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
388
+ raise_irq_bh, &s->irq_iosfc);
389
+ return true;
390
+ };
391
+
392
+ iosfc_host_dev =
393
+ [[PGIOSurfaceHostDevice alloc] initWithDescriptor:iosfc_desc];
394
+ [iosfc_desc release];
395
+ return iosfc_host_dev;
396
+}
397
+
398
+static void apple_gfx_mmio_realize(DeviceState *dev, Error **errp)
399
+{
400
+ @autoreleasepool {
401
+ AppleGFXMMIOState *s = APPLE_GFX_MMIO(dev);
402
+ PGDeviceDescriptor *desc = [PGDeviceDescriptor new];
403
+
404
+ desc.raiseInterrupt = ^(uint32_t vector) {
405
+ trace_apple_gfx_raise_irq(vector);
406
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
407
+ raise_irq_bh, &s->irq_gfx);
408
+ };
409
+
410
+ desc.usingIOSurfaceMapper = true;
411
+ s->pgiosfc = apple_gfx_prepare_iosurface_host_device(s);
412
+
413
+ if (!apple_gfx_common_realize(&s->common, dev, desc, errp)) {
414
+ [s->pgiosfc release];
415
+ s->pgiosfc = nil;
416
+ }
417
+
418
+ [desc release];
419
+ desc = nil;
420
+ }
421
+}
422
+
423
+static void apple_gfx_mmio_init(Object *obj)
424
+{
425
+ AppleGFXMMIOState *s = APPLE_GFX_MMIO(obj);
426
+
427
+ apple_gfx_common_init(obj, &s->common, TYPE_APPLE_GFX_MMIO);
428
+
429
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->common.iomem_gfx);
430
+ memory_region_init_io(&s->iomem_iosfc, obj, &apple_iosfc_ops, s,
431
+ TYPE_APPLE_GFX_MMIO, 0x10000);
432
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem_iosfc);
433
+ sysbus_init_irq(SYS_BUS_DEVICE(s), &s->irq_gfx);
434
+ sysbus_init_irq(SYS_BUS_DEVICE(s), &s->irq_iosfc);
435
+}
436
+
437
+static void apple_gfx_mmio_reset(Object *obj, ResetType type)
438
+{
439
+ AppleGFXMMIOState *s = APPLE_GFX_MMIO(obj);
440
+ [s->common.pgdev reset];
441
+}
442
+
443
+
444
+static void apple_gfx_mmio_class_init(ObjectClass *klass, void *data)
445
+{
446
+ DeviceClass *dc = DEVICE_CLASS(klass);
447
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
448
+
449
+ rc->phases.hold = apple_gfx_mmio_reset;
450
+ dc->hotpluggable = false;
451
+ dc->realize = apple_gfx_mmio_realize;
452
+}
453
+
454
+static TypeInfo apple_gfx_mmio_types[] = {
455
+ {
456
+ .name = TYPE_APPLE_GFX_MMIO,
457
+ .parent = TYPE_SYS_BUS_DEVICE,
458
+ .instance_size = sizeof(AppleGFXMMIOState),
459
+ .class_init = apple_gfx_mmio_class_init,
460
+ .instance_init = apple_gfx_mmio_init,
461
+ }
462
+};
463
+DEFINE_TYPES(apple_gfx_mmio_types)
464
diff --git a/hw/display/apple-gfx.h b/hw/display/apple-gfx.h
465
new file mode 100644
466
index XXXXXXX..XXXXXXX
467
--- /dev/null
468
+++ b/hw/display/apple-gfx.h
469
@@ -XXX,XX +XXX,XX @@
470
+/*
471
+ * Data structures and functions shared between variants of the macOS
472
+ * ParavirtualizedGraphics.framework based apple-gfx display adapter.
473
+ *
474
+ * SPDX-License-Identifier: GPL-2.0-or-later
475
+ */
476
+
477
+#ifndef QEMU_APPLE_GFX_H
478
+#define QEMU_APPLE_GFX_H
479
+
480
+#define TYPE_APPLE_GFX_MMIO "apple-gfx-mmio"
481
+#define TYPE_APPLE_GFX_PCI "apple-gfx-pci"
482
+
483
+#include "qemu/osdep.h"
484
+#include <dispatch/dispatch.h>
485
+#import <ParavirtualizedGraphics/ParavirtualizedGraphics.h>
486
+#include "qemu/typedefs.h"
487
+#include "exec/memory.h"
488
+#include "ui/surface.h"
489
+
490
+@class PGDeviceDescriptor;
491
+@protocol PGDevice;
492
+@protocol PGDisplay;
493
+@protocol MTLDevice;
494
+@protocol MTLTexture;
495
+@protocol MTLCommandQueue;
496
+
497
+typedef QTAILQ_HEAD(, PGTask_s) PGTaskList;
498
+
499
+typedef struct AppleGFXState {
500
+ /* Initialised on init/realize() */
501
+ MemoryRegion iomem_gfx;
502
+ id<PGDevice> pgdev;
503
+ id<PGDisplay> pgdisp;
504
+ QemuConsole *con;
505
+ id<MTLDevice> mtl;
506
+ id<MTLCommandQueue> mtl_queue;
507
+ dispatch_queue_t render_queue;
508
+
509
+ /* List `tasks` is protected by task_mutex */
510
+ QemuMutex task_mutex;
511
+ PGTaskList tasks;
512
+
513
+ /* Mutable state (BQL protected) */
514
+ QEMUCursor *cursor;
515
+ DisplaySurface *surface;
516
+ id<MTLTexture> texture;
517
+ int8_t pending_frames; /* # guest frames in the rendering pipeline */
518
+ bool gfx_update_requested; /* QEMU display system wants a new frame */
519
+ bool new_frame_ready; /* Guest has rendered a frame, ready to be used */
520
+ bool using_managed_texture_storage;
521
+ uint32_t rendering_frame_width;
522
+ uint32_t rendering_frame_height;
523
+
524
+ /* Mutable state (atomic) */
525
+ bool cursor_show;
526
+} AppleGFXState;
527
+
528
+void apple_gfx_common_init(Object *obj, AppleGFXState *s, const char* obj_name);
529
+bool apple_gfx_common_realize(AppleGFXState *s, DeviceState *dev,
530
+ PGDeviceDescriptor *desc, Error **errp);
531
+void *apple_gfx_host_ptr_for_gpa_range(uint64_t guest_physical,
532
+ uint64_t length, bool read_only,
533
+ MemoryRegion **mapping_in_region);
534
+
535
+#endif
536
+
537
diff --git a/hw/display/apple-gfx.m b/hw/display/apple-gfx.m
538
new file mode 100644
539
index XXXXXXX..XXXXXXX
540
--- /dev/null
541
+++ b/hw/display/apple-gfx.m
542
@@ -XXX,XX +XXX,XX @@
543
+/*
544
+ * QEMU Apple ParavirtualizedGraphics.framework device
545
+ *
546
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
547
+ *
548
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
549
+ * See the COPYING file in the top-level directory.
550
+ *
551
+ * SPDX-License-Identifier: GPL-2.0-or-later
552
+ *
553
+ * ParavirtualizedGraphics.framework is a set of libraries that macOS provides
554
+ * which implements 3d graphics passthrough to the host as well as a
555
+ * proprietary guest communication channel to drive it. This device model
556
+ * implements support to drive that library from within QEMU.
557
+ */
558
+
559
+#include "qemu/osdep.h"
560
+#import <ParavirtualizedGraphics/ParavirtualizedGraphics.h>
561
+#include <mach/mach_vm.h>
562
+#include "apple-gfx.h"
563
+#include "trace.h"
564
+#include "qemu-main.h"
565
+#include "exec/address-spaces.h"
566
+#include "migration/blocker.h"
567
+#include "monitor/monitor.h"
568
+#include "qemu/main-loop.h"
569
+#include "qemu/cutils.h"
570
+#include "qemu/log.h"
571
+#include "qapi/visitor.h"
572
+#include "qapi/error.h"
573
+#include "sysemu/dma.h"
574
+#include "ui/console.h"
575
+
576
+static const PGDisplayCoord_t apple_gfx_modes[] = {
577
+ { .x = 1440, .y = 1080 },
578
+ { .x = 1280, .y = 1024 },
579
+};
580
+
581
+/* ------ PGTask and task operations: new/destroy/map/unmap ------ */
582
+
583
+/*
584
+ * This implements the type declared in <ParavirtualizedGraphics/PGDevice.h>
585
+ * which is opaque from the framework's point of view. It is used in callbacks
586
+ * in the form of its typedef PGTask_t, which also already exists in the
587
+ * framework headers.
588
+ *
589
+ * A "task" in PVG terminology represents a host-virtual contiguous address
590
+ * range which is reserved in a large chunk on task creation. The mapMemory
591
+ * callback then requests ranges of guest system memory (identified by their
592
+ * GPA) to be mapped into subranges of this reserved address space.
593
+ * This type of operation isn't well-supported by QEMU's memory subsystem,
594
+ * but it is fortunately trivial to achieve with Darwin's mach_vm_remap() call,
595
+ * which allows us to refer to the same backing memory via multiple virtual
596
+ * address ranges. The Mach VM APIs are therefore used throughout for managing
597
+ * task memory.
598
+ */
599
+struct PGTask_s {
600
+ QTAILQ_ENTRY(PGTask_s) node;
601
+ AppleGFXState *s;
602
+ mach_vm_address_t address;
603
+ uint64_t len;
604
+ /*
605
+ * All unique MemoryRegions for which a mapping has been created in in this
606
+ * task, and on which we have thus called memory_region_ref(). There are
607
+ * usually very few regions of system RAM in total, so we expect this array
608
+ * to be very short. Therefore, no need for sorting or fancy search
609
+ * algorithms, linear search will do.
610
+ * Protected by AppleGFXState's task_mutex.
611
+ */
612
+ GPtrArray *mapped_regions;
613
+};
614
+
615
+static Error *apple_gfx_mig_blocker;
616
+
617
+static PGTask_t *apple_gfx_new_task(AppleGFXState *s, uint64_t len)
618
+{
619
+ mach_vm_address_t task_mem;
620
+ PGTask_t *task;
621
+ kern_return_t r;
622
+
623
+ r = mach_vm_allocate(mach_task_self(), &task_mem, len, VM_FLAGS_ANYWHERE);
624
+ if (r != KERN_SUCCESS) {
625
+ return NULL;
626
+ }
627
+
628
+ task = g_new0(PGTask_t, 1);
629
+ task->s = s;
630
+ task->address = task_mem;
631
+ task->len = len;
632
+ task->mapped_regions = g_ptr_array_sized_new(2 /* Usually enough */);
633
+
634
+ QEMU_LOCK_GUARD(&s->task_mutex);
635
+ QTAILQ_INSERT_TAIL(&s->tasks, task, node);
636
+
637
+ return task;
638
+}
639
+
640
+static void apple_gfx_destroy_task(AppleGFXState *s, PGTask_t *task)
641
+{
642
+ GPtrArray *regions = task->mapped_regions;
643
+ MemoryRegion *region;
644
+ size_t i;
645
+
646
+ for (i = 0; i < regions->len; ++i) {
647
+ region = g_ptr_array_index(regions, i);
648
+ memory_region_unref(region);
649
+ }
650
+ g_ptr_array_unref(regions);
651
+
652
+ mach_vm_deallocate(mach_task_self(), task->address, task->len);
653
+
654
+ QEMU_LOCK_GUARD(&s->task_mutex);
655
+ QTAILQ_REMOVE(&s->tasks, task, node);
656
+ g_free(task);
657
+}
658
+
659
+void *apple_gfx_host_ptr_for_gpa_range(uint64_t guest_physical,
660
+ uint64_t length, bool read_only,
661
+ MemoryRegion **mapping_in_region)
662
+{
663
+ MemoryRegion *ram_region;
664
+ char *host_ptr;
665
+ hwaddr ram_region_offset = 0;
666
+ hwaddr ram_region_length = length;
667
+
668
+ ram_region = address_space_translate(&address_space_memory,
669
+ guest_physical,
670
+ &ram_region_offset,
671
+ &ram_region_length, !read_only,
672
+ MEMTXATTRS_UNSPECIFIED);
673
+
674
+ if (!ram_region || ram_region_length < length ||
675
+ !memory_access_is_direct(ram_region, !read_only)) {
676
+ return NULL;
677
+ }
678
+
679
+ host_ptr = memory_region_get_ram_ptr(ram_region);
680
+ if (!host_ptr) {
681
+ return NULL;
682
+ }
683
+ host_ptr += ram_region_offset;
684
+ *mapping_in_region = ram_region;
685
+ return host_ptr;
686
+}
687
+
688
+static bool apple_gfx_task_map_memory(AppleGFXState *s, PGTask_t *task,
689
+ uint64_t virtual_offset,
690
+ PGPhysicalMemoryRange_t *ranges,
691
+ uint32_t range_count, bool read_only)
692
+{
693
+ kern_return_t r;
694
+ void *source_ptr;
695
+ mach_vm_address_t target;
696
+ vm_prot_t cur_protection, max_protection;
697
+ bool success = true;
698
+ MemoryRegion *region;
699
+
700
+ RCU_READ_LOCK_GUARD();
701
+ QEMU_LOCK_GUARD(&s->task_mutex);
702
+
703
+ trace_apple_gfx_map_memory(task, range_count, virtual_offset, read_only);
704
+ for (int i = 0; i < range_count; i++) {
705
+ PGPhysicalMemoryRange_t *range = &ranges[i];
706
+
707
+ target = task->address + virtual_offset;
708
+ virtual_offset += range->physicalLength;
709
+
710
+ trace_apple_gfx_map_memory_range(i, range->physicalAddress,
711
+ range->physicalLength);
712
+
713
+ region = NULL;
714
+ source_ptr = apple_gfx_host_ptr_for_gpa_range(range->physicalAddress,
715
+ range->physicalLength,
716
+ read_only, &region);
717
+ if (!source_ptr) {
718
+ success = false;
719
+ continue;
720
+ }
721
+
722
+ if (!g_ptr_array_find(task->mapped_regions, region, NULL)) {
723
+ g_ptr_array_add(task->mapped_regions, region);
724
+ memory_region_ref(region);
725
+ }
726
+
727
+ cur_protection = 0;
728
+ max_protection = 0;
729
+ /* Map guest RAM at range->physicalAddress into PG task memory range */
730
+ r = mach_vm_remap(mach_task_self(),
731
+ &target, range->physicalLength, vm_page_size - 1,
732
+ VM_FLAGS_FIXED | VM_FLAGS_OVERWRITE,
733
+ mach_task_self(), (mach_vm_address_t)source_ptr,
734
+ false /* shared mapping, no copy */,
735
+ &cur_protection, &max_protection,
736
+ VM_INHERIT_COPY);
737
+ trace_apple_gfx_remap(r, source_ptr, target);
738
+ g_assert(r == KERN_SUCCESS);
739
+ }
740
+
741
+ return success;
742
+}
743
+
744
+static void apple_gfx_task_unmap_memory(AppleGFXState *s, PGTask_t *task,
745
+ uint64_t virtual_offset, uint64_t length)
746
+{
747
+ kern_return_t r;
748
+ mach_vm_address_t range_address;
749
+
750
+ trace_apple_gfx_unmap_memory(task, virtual_offset, length);
751
+
752
+ /*
753
+ * Replace task memory range with fresh 0 pages, undoing the mapping
754
+ * from guest RAM.
755
+ */
756
+ range_address = task->address + virtual_offset;
757
+ r = mach_vm_allocate(mach_task_self(), &range_address, length,
758
+ VM_FLAGS_FIXED | VM_FLAGS_OVERWRITE);
759
+ g_assert(r == KERN_SUCCESS);
760
+}
761
+
762
+/* ------ Rendering and frame management ------ */
763
+
764
+static void apple_gfx_render_frame_completed_bh(void *opaque);
765
+
766
+static void apple_gfx_render_new_frame(AppleGFXState *s)
767
+{
768
+ bool managed_texture = s->using_managed_texture_storage;
769
+ uint32_t width = surface_width(s->surface);
770
+ uint32_t height = surface_height(s->surface);
771
+ MTLRegion region = MTLRegionMake2D(0, 0, width, height);
772
+ id<MTLCommandBuffer> command_buffer = [s->mtl_queue commandBuffer];
773
+ id<MTLTexture> texture = s->texture;
774
+
775
+ assert(bql_locked());
776
+ [texture retain];
777
+
778
+ s->rendering_frame_width = width;
779
+ s->rendering_frame_height = height;
780
+
781
+ dispatch_async(s->render_queue, ^{
782
+ /*
783
+ * This is not safe to call from the BQL due to PVG-internal locks
784
+ * causing deadlocks.
785
+ */
786
+ bool r = [s->pgdisp encodeCurrentFrameToCommandBuffer:command_buffer
787
+ texture:texture
788
+ region:region];
789
+ if (!r) {
790
+ [texture release];
791
+ bql_lock();
792
+ --s->pending_frames;
793
+ bql_unlock();
794
+ qemu_log_mask(LOG_GUEST_ERROR,
795
+ "%s: encodeCurrentFrameToCommandBuffer:texture:region: "
796
+ "failed\n", __func__);
797
+ return;
798
+ }
799
+
800
+ if (managed_texture) {
801
+ /* "Managed" textures exist in both VRAM and RAM and must be synced. */
802
+ id<MTLBlitCommandEncoder> blit = [command_buffer blitCommandEncoder];
803
+ [blit synchronizeResource:texture];
804
+ [blit endEncoding];
805
+ }
806
+ [texture release];
807
+ [command_buffer addCompletedHandler:
808
+ ^(id<MTLCommandBuffer> cb)
809
+ {
810
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
811
+ apple_gfx_render_frame_completed_bh, s);
812
+
813
+ }];
814
+ [command_buffer commit];
815
+ });
816
+}
817
+
818
+static void copy_mtl_texture_to_surface_mem(id<MTLTexture> texture, void *vram)
819
+{
820
+ /*
821
+ * TODO: Skip this entirely on a pure Metal or headless/guest-only
822
+ * rendering path, else use a blit command encoder? Needs careful
823
+ * (double?) buffering design.
824
+ */
825
+ size_t width = texture.width, height = texture.height;
826
+ MTLRegion region = MTLRegionMake2D(0, 0, width, height);
827
+ [texture getBytes:vram
828
+ bytesPerRow:(width * 4)
829
+ bytesPerImage:(width * height * 4)
830
+ fromRegion:region
831
+ mipmapLevel:0
832
+ slice:0];
833
+}
834
+
835
+static void apple_gfx_render_frame_completed_bh(void *opaque)
836
+{
837
+ AppleGFXState *s = opaque;
838
+
839
+ --s->pending_frames;
840
+ assert(s->pending_frames >= 0);
841
+
842
+ /* Only update display if mode hasn't changed since we started rendering. */
843
+ if (s->rendering_frame_width == surface_width(s->surface) &&
844
+ s->rendering_frame_height == surface_height(s->surface)) {
845
+ copy_mtl_texture_to_surface_mem(s->texture, surface_data(s->surface));
846
+ if (s->gfx_update_requested) {
847
+ s->gfx_update_requested = false;
848
+ dpy_gfx_update_full(s->con);
849
+ graphic_hw_update_done(s->con);
850
+ s->new_frame_ready = false;
851
+ } else {
852
+ s->new_frame_ready = true;
853
+ }
854
+ }
855
+ if (s->pending_frames > 0) {
856
+ apple_gfx_render_new_frame(s);
857
+ }
858
+}
859
+
860
+static void apple_gfx_fb_update_display(void *opaque)
861
+{
862
+ AppleGFXState *s = opaque;
863
+
864
+ assert(bql_locked());
865
+ if (s->new_frame_ready) {
866
+ dpy_gfx_update_full(s->con);
867
+ s->new_frame_ready = false;
868
+ graphic_hw_update_done(s->con);
869
+ } else if (s->pending_frames > 0) {
870
+ s->gfx_update_requested = true;
871
+ } else {
872
+ graphic_hw_update_done(s->con);
873
+ }
874
+}
875
+
876
+static const GraphicHwOps apple_gfx_fb_ops = {
877
+ .gfx_update = apple_gfx_fb_update_display,
878
+ .gfx_update_async = true,
879
+};
880
+
881
+/* ------ Mouse cursor and display mode setting ------ */
882
+
883
+static void set_mode(AppleGFXState *s, uint32_t width, uint32_t height)
884
+{
885
+ MTLTextureDescriptor *textureDescriptor;
886
+
887
+ if (s->surface &&
888
+ width == surface_width(s->surface) &&
889
+ height == surface_height(s->surface)) {
890
+ return;
891
+ }
892
+
893
+ [s->texture release];
894
+
895
+ s->surface = qemu_create_displaysurface(width, height);
896
+
897
+ @autoreleasepool {
898
+ textureDescriptor =
899
+ [MTLTextureDescriptor
900
+ texture2DDescriptorWithPixelFormat:MTLPixelFormatBGRA8Unorm
901
+ width:width
902
+ height:height
903
+ mipmapped:NO];
904
+ textureDescriptor.usage = s->pgdisp.minimumTextureUsage;
905
+ s->texture = [s->mtl newTextureWithDescriptor:textureDescriptor];
906
+ }
907
+
908
+ s->using_managed_texture_storage =
909
+ (s->texture.storageMode == MTLStorageModeManaged);
910
+ dpy_gfx_replace_surface(s->con, s->surface);
911
+}
912
+
913
+static void update_cursor(AppleGFXState *s)
914
+{
915
+ assert(bql_locked());
916
+ dpy_mouse_set(s->con, s->pgdisp.cursorPosition.x,
917
+ s->pgdisp.cursorPosition.y, qatomic_read(&s->cursor_show));
918
+}
919
+
920
+static void update_cursor_bh(void *opaque)
921
+{
922
+ AppleGFXState *s = opaque;
923
+ update_cursor(s);
924
+}
925
+
926
+typedef struct AppleGFXSetCursorGlyphJob {
927
+ AppleGFXState *s;
928
+ NSBitmapImageRep *glyph;
929
+ PGDisplayCoord_t hotspot;
930
+} AppleGFXSetCursorGlyphJob;
931
+
932
+static void set_cursor_glyph(void *opaque)
933
+{
934
+ AppleGFXSetCursorGlyphJob *job = opaque;
935
+ AppleGFXState *s = job->s;
936
+ NSBitmapImageRep *glyph = job->glyph;
937
+ uint32_t bpp = glyph.bitsPerPixel;
938
+ size_t width = glyph.pixelsWide;
939
+ size_t height = glyph.pixelsHigh;
940
+ size_t padding_bytes_per_row = glyph.bytesPerRow - width * 4;
941
+ const uint8_t* px_data = glyph.bitmapData;
942
+
943
+ trace_apple_gfx_cursor_set(bpp, width, height);
944
+
945
+ if (s->cursor) {
946
+ cursor_unref(s->cursor);
947
+ s->cursor = NULL;
948
+ }
949
+
950
+ if (bpp == 32) { /* Shouldn't be anything else, but just to be safe...*/
951
+ s->cursor = cursor_alloc(width, height);
952
+ s->cursor->hot_x = job->hotspot.x;
953
+ s->cursor->hot_y = job->hotspot.y;
954
+
955
+ uint32_t *dest_px = s->cursor->data;
956
+
957
+ for (size_t y = 0; y < height; ++y) {
958
+ for (size_t x = 0; x < width; ++x) {
959
+ /*
960
+ * NSBitmapImageRep's red & blue channels are swapped
961
+ * compared to QEMUCursor's.
962
+ */
963
+ *dest_px =
964
+ (px_data[0] << 16u) |
965
+ (px_data[1] << 8u) |
966
+ (px_data[2] << 0u) |
967
+ (px_data[3] << 24u);
968
+ ++dest_px;
969
+ px_data += 4;
970
+ }
971
+ px_data += padding_bytes_per_row;
972
+ }
973
+ dpy_cursor_define(s->con, s->cursor);
974
+ update_cursor(s);
975
+ }
976
+ [glyph release];
977
+
978
+ g_free(job);
979
+}
980
+
981
+/* ------ DMA (device reading system memory) ------ */
982
+
983
+typedef struct AppleGFXReadMemoryJob {
984
+ QemuSemaphore sem;
985
+ hwaddr physical_address;
986
+ uint64_t length;
987
+ void *dst;
988
+ bool success;
989
+} AppleGFXReadMemoryJob;
990
+
991
+static void apple_gfx_do_read_memory(void *opaque)
992
+{
993
+ AppleGFXReadMemoryJob *job = opaque;
994
+ MemTxResult r;
995
+
996
+ r = dma_memory_read(&address_space_memory, job->physical_address,
997
+ job->dst, job->length, MEMTXATTRS_UNSPECIFIED);
998
+ job->success = r == MEMTX_OK;
999
+
1000
+ qemu_sem_post(&job->sem);
1001
+}
1002
+
1003
+static bool apple_gfx_read_memory(AppleGFXState *s, hwaddr physical_address,
1004
+ uint64_t length, void *dst)
1005
+{
1006
+ AppleGFXReadMemoryJob job = {
1007
+ .physical_address = physical_address, .length = length, .dst = dst
1008
+ };
1009
+
1010
+ trace_apple_gfx_read_memory(physical_address, length, dst);
1011
+
1012
+ /* Performing DMA requires BQL, so do it in a BH. */
1013
+ qemu_sem_init(&job.sem, 0);
1014
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
1015
+ apple_gfx_do_read_memory, &job);
1016
+ qemu_sem_wait(&job.sem);
1017
+ qemu_sem_destroy(&job.sem);
1018
+ return job.success;
1019
+}
1020
+
1021
+/* ------ Memory-mapped device I/O operations ------ */
1022
+
1023
+static dispatch_queue_t get_background_queue(void)
1024
+{
1025
+ return dispatch_get_global_queue(DISPATCH_QUEUE_PRIORITY_DEFAULT, 0);
1026
+}
1027
+
1028
+typedef struct AppleGFXIOJob {
1029
+ AppleGFXState *state;
1030
+ uint64_t offset;
1031
+ uint64_t value;
1032
+ bool completed;
1033
+} AppleGFXIOJob;
1034
+
1035
+static void apple_gfx_do_read(void *opaque)
1036
+{
1037
+ AppleGFXIOJob *job = opaque;
1038
+ job->value = [job->state->pgdev mmioReadAtOffset:job->offset];
1039
+ qatomic_set(&job->completed, true);
1040
+ aio_wait_kick();
1041
+}
1042
+
1043
+static uint64_t apple_gfx_read(void *opaque, hwaddr offset, unsigned size)
1044
+{
1045
+ AppleGFXIOJob job = {
1046
+ .state = opaque,
1047
+ .offset = offset,
1048
+ .completed = false,
1049
+ };
1050
+ dispatch_queue_t queue = get_background_queue();
1051
+
1052
+ dispatch_async_f(queue, &job, apple_gfx_do_read);
1053
+ AIO_WAIT_WHILE(NULL, !qatomic_read(&job.completed));
1054
+
1055
+ trace_apple_gfx_read(offset, job.value);
1056
+ return job.value;
1057
+}
1058
+
1059
+static void apple_gfx_do_write(void *opaque)
1060
+{
1061
+ AppleGFXIOJob *job = opaque;
1062
+ [job->state->pgdev mmioWriteAtOffset:job->offset value:job->value];
1063
+ qatomic_set(&job->completed, true);
1064
+ aio_wait_kick();
1065
+}
1066
+
1067
+static void apple_gfx_write(void *opaque, hwaddr offset, uint64_t val,
1068
+ unsigned size)
1069
+{
1070
+ /*
1071
+ * The methods mmioReadAtOffset: and especially mmioWriteAtOffset: can
1072
+ * trigger synchronous operations on other dispatch queues, which in turn
1073
+ * may call back out on one or more of the callback blocks. For this reason,
1074
+ * and as we are holding the BQL, we invoke the I/O methods on a pool
1075
+ * thread and handle AIO tasks while we wait. Any work in the callbacks
1076
+ * requiring the BQL will in turn schedule BHs which this thread will
1077
+ * process while waiting.
1078
+ */
1079
+ AppleGFXIOJob job = {
1080
+ .state = opaque,
1081
+ .offset = offset,
1082
+ .value = val,
1083
+ .completed = false,
1084
+ };
1085
+ dispatch_queue_t queue = get_background_queue();
1086
+
1087
+ dispatch_async_f(queue, &job, apple_gfx_do_write);
1088
+ AIO_WAIT_WHILE(NULL, !qatomic_read(&job.completed));
1089
+
1090
+ trace_apple_gfx_write(offset, val);
1091
+}
1092
+
1093
+static const MemoryRegionOps apple_gfx_ops = {
1094
+ .read = apple_gfx_read,
1095
+ .write = apple_gfx_write,
1096
+ .endianness = DEVICE_LITTLE_ENDIAN,
1097
+ .valid = {
1098
+ .min_access_size = 4,
1099
+ .max_access_size = 8,
1100
+ },
1101
+ .impl = {
1102
+ .min_access_size = 4,
1103
+ .max_access_size = 4,
1104
+ },
1105
+};
1106
+
1107
+static size_t apple_gfx_get_default_mmio_range_size(void)
1108
+{
1109
+ size_t mmio_range_size;
1110
+ @autoreleasepool {
1111
+ PGDeviceDescriptor *desc = [PGDeviceDescriptor new];
1112
+ mmio_range_size = desc.mmioLength;
1113
+ [desc release];
1114
+ }
1115
+ return mmio_range_size;
1116
+}
1117
+
1118
+/* ------ Initialisation and startup ------ */
1119
+
1120
+void apple_gfx_common_init(Object *obj, AppleGFXState *s, const char* obj_name)
1121
+{
1122
+ size_t mmio_range_size = apple_gfx_get_default_mmio_range_size();
1123
+
1124
+ trace_apple_gfx_common_init(obj_name, mmio_range_size);
1125
+ memory_region_init_io(&s->iomem_gfx, obj, &apple_gfx_ops, s, obj_name,
1126
+ mmio_range_size);
1127
+
1128
+ /* TODO: PVG framework supports serialising device state: integrate it! */
1129
+}
1130
+
1131
+static void apple_gfx_register_task_mapping_handlers(AppleGFXState *s,
1132
+ PGDeviceDescriptor *desc)
1133
+{
1134
+ desc.createTask = ^(uint64_t vmSize, void * _Nullable * _Nonnull baseAddress) {
1135
+ PGTask_t *task = apple_gfx_new_task(s, vmSize);
1136
+ *baseAddress = (void *)task->address;
1137
+ trace_apple_gfx_create_task(vmSize, *baseAddress);
1138
+ return task;
1139
+ };
1140
+
1141
+ desc.destroyTask = ^(PGTask_t * _Nonnull task) {
1142
+ trace_apple_gfx_destroy_task(task, task->mapped_regions->len);
1143
+
1144
+ apple_gfx_destroy_task(s, task);
1145
+ };
1146
+
1147
+ desc.mapMemory = ^bool(PGTask_t * _Nonnull task, uint32_t range_count,
1148
+ uint64_t virtual_offset, bool read_only,
1149
+ PGPhysicalMemoryRange_t * _Nonnull ranges) {
1150
+ return apple_gfx_task_map_memory(s, task, virtual_offset,
1151
+ ranges, range_count, read_only);
1152
+ };
1153
+
1154
+ desc.unmapMemory = ^bool(PGTask_t * _Nonnull task, uint64_t virtual_offset,
1155
+ uint64_t length) {
1156
+ apple_gfx_task_unmap_memory(s, task, virtual_offset, length);
1157
+ return true;
1158
+ };
1159
+
1160
+ desc.readMemory = ^bool(uint64_t physical_address, uint64_t length,
1161
+ void * _Nonnull dst) {
1162
+ return apple_gfx_read_memory(s, physical_address, length, dst);
1163
+ };
1164
+}
1165
+
1166
+static void new_frame_handler_bh(void *opaque)
1167
+{
1168
+ AppleGFXState *s = opaque;
1169
+
1170
+ /* Drop frames if we get too far ahead. */
1171
+ if (s->pending_frames >= 2) {
1172
+ return;
1173
+ }
1174
+ ++s->pending_frames;
1175
+ if (s->pending_frames > 1) {
1176
+ return;
1177
+ }
1178
+ apple_gfx_render_new_frame(s);
1179
+}
1180
+
1181
+static PGDisplayDescriptor *apple_gfx_prepare_display_descriptor(AppleGFXState *s)
1182
+{
1183
+ PGDisplayDescriptor *disp_desc = [PGDisplayDescriptor new];
1184
+
1185
+ disp_desc.name = @"QEMU display";
1186
+ disp_desc.sizeInMillimeters = NSMakeSize(400., 300.); /* A 20" display */
1187
+ disp_desc.queue = dispatch_get_main_queue();
1188
+ disp_desc.newFrameEventHandler = ^(void) {
1189
+ trace_apple_gfx_new_frame();
1190
+ aio_bh_schedule_oneshot(qemu_get_aio_context(), new_frame_handler_bh, s);
1191
+ };
1192
+ disp_desc.modeChangeHandler = ^(PGDisplayCoord_t sizeInPixels,
1193
+ OSType pixelFormat) {
1194
+ trace_apple_gfx_mode_change(sizeInPixels.x, sizeInPixels.y);
1195
+
1196
+ BQL_LOCK_GUARD();
1197
+ set_mode(s, sizeInPixels.x, sizeInPixels.y);
1198
+ };
1199
+ disp_desc.cursorGlyphHandler = ^(NSBitmapImageRep *glyph,
1200
+ PGDisplayCoord_t hotspot) {
1201
+ AppleGFXSetCursorGlyphJob *job = g_malloc0(sizeof(*job));
1202
+ job->s = s;
1203
+ job->glyph = glyph;
1204
+ job->hotspot = hotspot;
1205
+ [glyph retain];
1206
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
1207
+ set_cursor_glyph, job);
1208
+ };
1209
+ disp_desc.cursorShowHandler = ^(BOOL show) {
1210
+ trace_apple_gfx_cursor_show(show);
1211
+ qatomic_set(&s->cursor_show, show);
1212
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
1213
+ update_cursor_bh, s);
1214
+ };
1215
+ disp_desc.cursorMoveHandler = ^(void) {
1216
+ trace_apple_gfx_cursor_move();
1217
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
1218
+ update_cursor_bh, s);
1219
+ };
1220
+
1221
+ return disp_desc;
1222
+}
1223
+
1224
+static NSArray<PGDisplayMode*>* apple_gfx_prepare_display_mode_array(void)
1225
+{
1226
+ PGDisplayMode *modes[ARRAY_SIZE(apple_gfx_modes)];
1227
+ NSArray<PGDisplayMode*>* mode_array = nil;
1228
+ int i;
1229
+
1230
+ for (i = 0; i < ARRAY_SIZE(apple_gfx_modes); i++) {
1231
+ modes[i] =
1232
+ [[PGDisplayMode alloc] initWithSizeInPixels:apple_gfx_modes[i] refreshRateInHz:60.];
1233
+ }
1234
+
1235
+ mode_array = [NSArray arrayWithObjects:modes count:ARRAY_SIZE(apple_gfx_modes)];
1236
+
1237
+ for (i = 0; i < ARRAY_SIZE(apple_gfx_modes); i++) {
1238
+ [modes[i] release];
1239
+ modes[i] = nil;
1240
+ }
1241
+
1242
+ return mode_array;
1243
+}
1244
+
1245
+static id<MTLDevice> copy_suitable_metal_device(void)
1246
+{
1247
+ id<MTLDevice> dev = nil;
1248
+ NSArray<id<MTLDevice>> *devs = MTLCopyAllDevices();
1249
+
1250
+ /* Prefer a unified memory GPU. Failing that, pick a non-removable GPU. */
1251
+ for (size_t i = 0; i < devs.count; ++i) {
1252
+ if (devs[i].hasUnifiedMemory) {
1253
+ dev = devs[i];
1254
+ break;
1255
+ }
1256
+ if (!devs[i].removable) {
1257
+ dev = devs[i];
1258
+ }
1259
+ }
1260
+
1261
+ if (dev != nil) {
1262
+ [dev retain];
1263
+ } else {
1264
+ dev = MTLCreateSystemDefaultDevice();
1265
+ }
1266
+ [devs release];
1267
+
1268
+ return dev;
1269
+}
1270
+
1271
+bool apple_gfx_common_realize(AppleGFXState *s, DeviceState *dev,
1272
+ PGDeviceDescriptor *desc, Error **errp)
1273
+{
1274
+ PGDisplayDescriptor *disp_desc = nil;
1275
+
1276
+ if (apple_gfx_mig_blocker == NULL) {
1277
+ error_setg(&apple_gfx_mig_blocker,
1278
+ "Migration state blocked by apple-gfx display device");
1279
+ if (migrate_add_blocker(&apple_gfx_mig_blocker, errp) < 0) {
1280
+ return false;
1281
+ }
1282
+ }
1283
+
1284
+ qemu_mutex_init(&s->task_mutex);
1285
+ QTAILQ_INIT(&s->tasks);
1286
+ s->render_queue = dispatch_queue_create("apple-gfx.render",
1287
+ DISPATCH_QUEUE_SERIAL);
1288
+ s->mtl = copy_suitable_metal_device();
1289
+ s->mtl_queue = [s->mtl newCommandQueue];
1290
+
1291
+ desc.device = s->mtl;
1292
+
1293
+ apple_gfx_register_task_mapping_handlers(s, desc);
1294
+
1295
+ s->cursor_show = true;
1296
+
1297
+ s->pgdev = PGNewDeviceWithDescriptor(desc);
1298
+
1299
+ disp_desc = apple_gfx_prepare_display_descriptor(s);
1300
+ s->pgdisp = [s->pgdev newDisplayWithDescriptor:disp_desc
1301
+ port:0 serialNum:1234];
1302
+ [disp_desc release];
1303
+ s->pgdisp.modeList = apple_gfx_prepare_display_mode_array();
1304
+
1305
+ s->con = graphic_console_init(dev, 0, &apple_gfx_fb_ops, s);
1306
+ return true;
1307
+}
1308
diff --git a/hw/display/meson.build b/hw/display/meson.build
1309
index XXXXXXX..XXXXXXX 100644
1310
--- a/hw/display/meson.build
1311
+++ b/hw/display/meson.build
1312
@@ -XXX,XX +XXX,XX @@ system_ss.add(when: 'CONFIG_ARTIST', if_true: files('artist.c'))
1313
1314
system_ss.add(when: 'CONFIG_ATI_VGA', if_true: [files('ati.c', 'ati_2d.c', 'ati_dbg.c'), pixman])
1315
1316
+if host_os == 'darwin'
1317
+ system_ss.add(when: 'CONFIG_MAC_PVG', if_true: [files('apple-gfx.m'), pvg, metal])
1318
+ if cpu == 'aarch64'
1319
+ system_ss.add(when: 'CONFIG_MAC_PVG_MMIO', if_true: [files('apple-gfx-mmio.m'), pvg, metal])
1320
+ endif
1321
+endif
1322
1323
if config_all_devices.has_key('CONFIG_VIRTIO_GPU')
1324
virtio_gpu_ss = ss.source_set()
1325
diff --git a/hw/display/trace-events b/hw/display/trace-events
1326
index XXXXXXX..XXXXXXX 100644
1327
--- a/hw/display/trace-events
1328
+++ b/hw/display/trace-events
1329
@@ -XXX,XX +XXX,XX @@ dm163_bits_ppi(unsigned dest_width) "dest_width : %u"
1330
dm163_leds(int led, uint32_t value) "led %d: 0x%x"
1331
dm163_channels(int channel, uint8_t value) "channel %d: 0x%x"
1332
dm163_refresh_rate(uint32_t rr) "refresh rate %d"
1333
+
1334
+# apple-gfx.m
1335
+apple_gfx_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
1336
+apple_gfx_write(uint64_t offset, uint64_t val) "offset=0x%"PRIx64" val=0x%"PRIx64
1337
+apple_gfx_create_task(uint32_t vm_size, void *va) "vm_size=0x%x base_addr=%p"
1338
+apple_gfx_destroy_task(void *task, unsigned int num_mapped_regions) "task=%p, task->mapped_regions->len=%u"
1339
+apple_gfx_map_memory(void *task, uint32_t range_count, uint64_t virtual_offset, uint32_t read_only) "task=%p range_count=0x%x virtual_offset=0x%"PRIx64" read_only=%d"
1340
+apple_gfx_map_memory_range(uint32_t i, uint64_t phys_addr, uint64_t phys_len) "[%d] phys_addr=0x%"PRIx64" phys_len=0x%"PRIx64
1341
+apple_gfx_remap(uint64_t retval, void *source_ptr, uint64_t target) "retval=%"PRId64" source=%p target=0x%"PRIx64
1342
+apple_gfx_unmap_memory(void *task, uint64_t virtual_offset, uint64_t length) "task=%p virtual_offset=0x%"PRIx64" length=0x%"PRIx64
1343
+apple_gfx_read_memory(uint64_t phys_address, uint64_t length, void *dst) "phys_addr=0x%"PRIx64" length=0x%"PRIx64" dest=%p"
1344
+apple_gfx_raise_irq(uint32_t vector) "vector=0x%x"
1345
+apple_gfx_new_frame(void) ""
1346
+apple_gfx_mode_change(uint64_t x, uint64_t y) "x=%"PRId64" y=%"PRId64
1347
+apple_gfx_cursor_set(uint32_t bpp, uint64_t width, uint64_t height) "bpp=%d width=%"PRId64" height=0x%"PRId64
1348
+apple_gfx_cursor_show(uint32_t show) "show=%d"
1349
+apple_gfx_cursor_move(void) ""
1350
+apple_gfx_common_init(const char *device_name, size_t mmio_size) "device: %s; MMIO size: %zu bytes"
1351
+
1352
+# apple-gfx-mmio.m
1353
+apple_gfx_mmio_iosfc_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
1354
+apple_gfx_mmio_iosfc_write(uint64_t offset, uint64_t val) "offset=0x%"PRIx64" val=0x%"PRIx64
1355
+apple_gfx_iosfc_map_memory(uint64_t phys, uint64_t len, uint32_t ro, void *va, void *e, void *f, void* va_result) "phys=0x%"PRIx64" len=0x%"PRIx64" ro=%d va=%p e=%p f=%p -> *va=%p"
1356
+apple_gfx_iosfc_map_memory_new_region(size_t i, void *region, uint64_t start, uint64_t end) "index=%zu, region=%p, 0x%"PRIx64"-0x%"PRIx64
1357
+apple_gfx_iosfc_unmap_memory(void *a, void *b, void *c, void *d, void *e, void *f) "a=%p b=%p c=%p d=%p e=%p f=%p"
1358
+apple_gfx_iosfc_unmap_memory_region(void* mem, void *region) "unmapping @ %p from memory region %p"
1359
+apple_gfx_iosfc_raise_irq(uint32_t vector) "vector=0x%x"
1360
+
1361
diff --git a/meson.build b/meson.build
1362
index XXXXXXX..XXXXXXX 100644
1363
--- a/meson.build
1364
+++ b/meson.build
1365
@@ -XXX,XX +XXX,XX @@ socket = []
1366
version_res = []
1367
coref = []
1368
iokit = []
1369
+pvg = not_found
1370
+metal = []
1371
emulator_link_args = []
1372
midl = not_found
1373
widl = not_found
1374
@@ -XXX,XX +XXX,XX @@ elif host_os == 'darwin'
1375
coref = dependency('appleframeworks', modules: 'CoreFoundation')
1376
iokit = dependency('appleframeworks', modules: 'IOKit', required: false)
1377
host_dsosuf = '.dylib'
1378
+ pvg = dependency('appleframeworks', modules: 'ParavirtualizedGraphics')
1379
+ metal = dependency('appleframeworks', modules: 'Metal')
1380
elif host_os == 'sunos'
1381
socket = [cc.find_library('socket'),
1382
cc.find_library('nsl'),
1383
--
1384
2.39.3 (Apple Git-145)
1385
1386
diff view generated by jsdifflib
Deleted patch
1
This change wires up the PCI variant of the paravirtualised
2
graphics device, mainly useful for x86-64 macOS guests, implemented
3
by macOS's ParavirtualizedGraphics.framework. It builds on code
4
shared with the vmapple/mmio variant of the PVG device.
5
1
6
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
7
---
8
9
v4:
10
11
* Threading improvements analogous to those in common apple-gfx code
12
and mmio device variant.
13
* Smaller code review issues addressed.
14
15
v5:
16
17
* Minor error handling improvement.
18
19
v6:
20
21
* Removed an unused function parameter.
22
23
v9:
24
25
* Fixup of changed common call.
26
* Whitespace and comment formatting tweaks.
27
28
hw/display/Kconfig | 4 +
29
hw/display/apple-gfx-pci.m | 150 +++++++++++++++++++++++++++++++++++++
30
hw/display/meson.build | 1 +
31
3 files changed, 155 insertions(+)
32
create mode 100644 hw/display/apple-gfx-pci.m
33
34
diff --git a/hw/display/Kconfig b/hw/display/Kconfig
35
index XXXXXXX..XXXXXXX 100644
36
--- a/hw/display/Kconfig
37
+++ b/hw/display/Kconfig
38
@@ -XXX,XX +XXX,XX @@ config MAC_PVG_MMIO
39
bool
40
depends on MAC_PVG && AARCH64
41
42
+config MAC_PVG_PCI
43
+ bool
44
+ depends on MAC_PVG && PCI
45
+ default y if PCI_DEVICES
46
diff --git a/hw/display/apple-gfx-pci.m b/hw/display/apple-gfx-pci.m
47
new file mode 100644
48
index XXXXXXX..XXXXXXX
49
--- /dev/null
50
+++ b/hw/display/apple-gfx-pci.m
51
@@ -XXX,XX +XXX,XX @@
52
+/*
53
+ * QEMU Apple ParavirtualizedGraphics.framework device, PCI variant
54
+ *
55
+ * Copyright © 2023-2024 Phil Dennis-Jordan
56
+ *
57
+ * SPDX-License-Identifier: GPL-2.0-or-later
58
+ *
59
+ * ParavirtualizedGraphics.framework is a set of libraries that macOS provides
60
+ * which implements 3d graphics passthrough to the host as well as a
61
+ * proprietary guest communication channel to drive it. This device model
62
+ * implements support to drive that library from within QEMU as a PCI device
63
+ * aimed primarily at x86-64 macOS VMs.
64
+ */
65
+
66
+#include "apple-gfx.h"
67
+#include "hw/pci/pci_device.h"
68
+#include "hw/pci/msi.h"
69
+#include "qapi/error.h"
70
+#include "trace.h"
71
+#import <ParavirtualizedGraphics/ParavirtualizedGraphics.h>
72
+
73
+OBJECT_DECLARE_SIMPLE_TYPE(AppleGFXPCIState, APPLE_GFX_PCI)
74
+
75
+struct AppleGFXPCIState {
76
+ PCIDevice parent_obj;
77
+
78
+ AppleGFXState common;
79
+};
80
+
81
+static const char* apple_gfx_pci_option_rom_path = NULL;
82
+
83
+static void apple_gfx_init_option_rom_path(void)
84
+{
85
+ NSURL *option_rom_url = PGCopyOptionROMURL();
86
+ const char *option_rom_path = option_rom_url.fileSystemRepresentation;
87
+ apple_gfx_pci_option_rom_path = g_strdup(option_rom_path);
88
+ [option_rom_url release];
89
+}
90
+
91
+static void apple_gfx_pci_init(Object *obj)
92
+{
93
+ AppleGFXPCIState *s = APPLE_GFX_PCI(obj);
94
+
95
+ if (!apple_gfx_pci_option_rom_path) {
96
+ /*
97
+ * The following is done on device not class init to avoid running
98
+ * ObjC code before fork() in -daemonize mode.
99
+ */
100
+ PCIDeviceClass *pci = PCI_DEVICE_CLASS(object_get_class(obj));
101
+ apple_gfx_init_option_rom_path();
102
+ pci->romfile = apple_gfx_pci_option_rom_path;
103
+ }
104
+
105
+ apple_gfx_common_init(obj, &s->common, TYPE_APPLE_GFX_PCI);
106
+}
107
+
108
+typedef struct AppleGFXPCIInterruptJob {
109
+ PCIDevice *device;
110
+ uint32_t vector;
111
+} AppleGFXPCIInterruptJob;
112
+
113
+static void apple_gfx_pci_raise_interrupt(void *opaque)
114
+{
115
+ AppleGFXPCIInterruptJob *job = opaque;
116
+
117
+ if (msi_enabled(job->device)) {
118
+ msi_notify(job->device, job->vector);
119
+ }
120
+ g_free(job);
121
+}
122
+
123
+static void apple_gfx_pci_interrupt(PCIDevice *dev, uint32_t vector)
124
+{
125
+ AppleGFXPCIInterruptJob *job;
126
+
127
+ trace_apple_gfx_raise_irq(vector);
128
+ job = g_malloc0(sizeof(*job));
129
+ job->device = dev;
130
+ job->vector = vector;
131
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
132
+ apple_gfx_pci_raise_interrupt, job);
133
+}
134
+
135
+static void apple_gfx_pci_realize(PCIDevice *dev, Error **errp)
136
+{
137
+ AppleGFXPCIState *s = APPLE_GFX_PCI(dev);
138
+ int ret;
139
+
140
+ pci_register_bar(dev, PG_PCI_BAR_MMIO,
141
+ PCI_BASE_ADDRESS_SPACE_MEMORY, &s->common.iomem_gfx);
142
+
143
+ ret = msi_init(dev, 0x0 /* config offset; 0 = find space */,
144
+ PG_PCI_MAX_MSI_VECTORS, true /* msi64bit */,
145
+ false /* msi_per_vector_mask */, errp);
146
+ if (ret != 0) {
147
+ return;
148
+ }
149
+
150
+ @autoreleasepool {
151
+ PGDeviceDescriptor *desc = [PGDeviceDescriptor new];
152
+ desc.raiseInterrupt = ^(uint32_t vector) {
153
+ apple_gfx_pci_interrupt(dev, vector);
154
+ };
155
+
156
+ apple_gfx_common_realize(&s->common, DEVICE(dev), desc, errp);
157
+ [desc release];
158
+ desc = nil;
159
+ }
160
+}
161
+
162
+static void apple_gfx_pci_reset(Object *obj, ResetType type)
163
+{
164
+ AppleGFXPCIState *s = APPLE_GFX_PCI(obj);
165
+ [s->common.pgdev reset];
166
+}
167
+
168
+static void apple_gfx_pci_class_init(ObjectClass *klass, void *data)
169
+{
170
+ DeviceClass *dc = DEVICE_CLASS(klass);
171
+ PCIDeviceClass *pci = PCI_DEVICE_CLASS(klass);
172
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
173
+
174
+ rc->phases.hold = apple_gfx_pci_reset;
175
+ dc->desc = "macOS Paravirtualized Graphics PCI Display Controller";
176
+ dc->hotpluggable = false;
177
+ set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
178
+
179
+ pci->vendor_id = PG_PCI_VENDOR_ID;
180
+ pci->device_id = PG_PCI_DEVICE_ID;
181
+ pci->class_id = PCI_CLASS_DISPLAY_OTHER;
182
+ pci->realize = apple_gfx_pci_realize;
183
+
184
+ // TODO: Property for setting mode list
185
+}
186
+
187
+static TypeInfo apple_gfx_pci_types[] = {
188
+ {
189
+ .name = TYPE_APPLE_GFX_PCI,
190
+ .parent = TYPE_PCI_DEVICE,
191
+ .instance_size = sizeof(AppleGFXPCIState),
192
+ .class_init = apple_gfx_pci_class_init,
193
+ .instance_init = apple_gfx_pci_init,
194
+ .interfaces = (InterfaceInfo[]) {
195
+ { INTERFACE_PCIE_DEVICE },
196
+ { },
197
+ },
198
+ }
199
+};
200
+DEFINE_TYPES(apple_gfx_pci_types)
201
+
202
diff --git a/hw/display/meson.build b/hw/display/meson.build
203
index XXXXXXX..XXXXXXX 100644
204
--- a/hw/display/meson.build
205
+++ b/hw/display/meson.build
206
@@ -XXX,XX +XXX,XX @@ system_ss.add(when: 'CONFIG_ATI_VGA', if_true: [files('ati.c', 'ati_2d.c', 'ati_
207
208
if host_os == 'darwin'
209
system_ss.add(when: 'CONFIG_MAC_PVG', if_true: [files('apple-gfx.m'), pvg, metal])
210
+ system_ss.add(when: 'CONFIG_MAC_PVG_PCI', if_true: [files('apple-gfx-pci.m'), pvg, metal])
211
if cpu == 'aarch64'
212
system_ss.add(when: 'CONFIG_MAC_PVG_MMIO', if_true: [files('apple-gfx-mmio.m'), pvg, metal])
213
endif
214
--
215
2.39.3 (Apple Git-145)
216
217
diff view generated by jsdifflib
Deleted patch
1
This change adds a property 'display_modes' on the graphics device
2
which permits specifying a list of display modes. (screen resolution
3
and refresh rate)
4
1
5
The property is an array of a custom type to make the syntax slightly
6
less awkward to use, for example:
7
8
-device '{"driver":"apple-gfx-pci", "display-modes":["1920x1080@60", "3840x2160@60"]}'
9
10
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
11
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
12
---
13
14
v4:
15
16
* Switched to the native array property type, which recently gained
17
     command line support.
18
* The property has also been added to the -mmio variant.
19
* Tidied up the code a little.
20
21
v5:
22
23
* Better error handling and buffer management in property parsing and
24
output.
25
26
v6:
27
28
* Switched to using NSMutableArray for the mode list to avoid need for
29
allocating a temporary array - previously done with alloca.
30
31
v7:
32
33
* Simplified error handling in property parsing
34
35
v8:
36
37
* More consistent integer variable types.
38
39
v9:
40
41
* Re-ordered type definitions so we can drop a 'struct' keyword.
42
43
hw/display/apple-gfx-mmio.m | 8 +++
44
hw/display/apple-gfx-pci.m | 9 ++-
45
hw/display/apple-gfx.h | 11 +++
46
hw/display/apple-gfx.m | 135 +++++++++++++++++++++++++++++++-----
47
hw/display/trace-events | 2 +
48
5 files changed, 145 insertions(+), 20 deletions(-)
49
50
diff --git a/hw/display/apple-gfx-mmio.m b/hw/display/apple-gfx-mmio.m
51
index XXXXXXX..XXXXXXX 100644
52
--- a/hw/display/apple-gfx-mmio.m
53
+++ b/hw/display/apple-gfx-mmio.m
54
@@ -XXX,XX +XXX,XX @@ static void apple_gfx_mmio_reset(Object *obj, ResetType type)
55
[s->common.pgdev reset];
56
}
57
58
+static Property apple_gfx_mmio_properties[] = {
59
+ DEFINE_PROP_ARRAY("display-modes", AppleGFXMMIOState,
60
+ common.num_display_modes, common.display_modes,
61
+ qdev_prop_display_mode, AppleGFXDisplayMode),
62
+ DEFINE_PROP_END_OF_LIST(),
63
+};
64
65
static void apple_gfx_mmio_class_init(ObjectClass *klass, void *data)
66
{
67
@@ -XXX,XX +XXX,XX @@ static void apple_gfx_mmio_class_init(ObjectClass *klass, void *data)
68
rc->phases.hold = apple_gfx_mmio_reset;
69
dc->hotpluggable = false;
70
dc->realize = apple_gfx_mmio_realize;
71
+
72
+ device_class_set_props(dc, apple_gfx_mmio_properties);
73
}
74
75
static TypeInfo apple_gfx_mmio_types[] = {
76
diff --git a/hw/display/apple-gfx-pci.m b/hw/display/apple-gfx-pci.m
77
index XXXXXXX..XXXXXXX 100644
78
--- a/hw/display/apple-gfx-pci.m
79
+++ b/hw/display/apple-gfx-pci.m
80
@@ -XXX,XX +XXX,XX @@ static void apple_gfx_pci_reset(Object *obj, ResetType type)
81
[s->common.pgdev reset];
82
}
83
84
+static Property apple_gfx_pci_properties[] = {
85
+ DEFINE_PROP_ARRAY("display-modes", AppleGFXPCIState,
86
+ common.num_display_modes, common.display_modes,
87
+ qdev_prop_display_mode, AppleGFXDisplayMode),
88
+ DEFINE_PROP_END_OF_LIST(),
89
+};
90
+
91
static void apple_gfx_pci_class_init(ObjectClass *klass, void *data)
92
{
93
DeviceClass *dc = DEVICE_CLASS(klass);
94
@@ -XXX,XX +XXX,XX @@ static void apple_gfx_pci_class_init(ObjectClass *klass, void *data)
95
pci->class_id = PCI_CLASS_DISPLAY_OTHER;
96
pci->realize = apple_gfx_pci_realize;
97
98
- // TODO: Property for setting mode list
99
+ device_class_set_props(dc, apple_gfx_pci_properties);
100
}
101
102
static TypeInfo apple_gfx_pci_types[] = {
103
diff --git a/hw/display/apple-gfx.h b/hw/display/apple-gfx.h
104
index XXXXXXX..XXXXXXX 100644
105
--- a/hw/display/apple-gfx.h
106
+++ b/hw/display/apple-gfx.h
107
@@ -XXX,XX +XXX,XX @@
108
#import <ParavirtualizedGraphics/ParavirtualizedGraphics.h>
109
#include "qemu/typedefs.h"
110
#include "exec/memory.h"
111
+#include "hw/qdev-properties.h"
112
#include "ui/surface.h"
113
114
@class PGDeviceDescriptor;
115
@@ -XXX,XX +XXX,XX @@
116
117
typedef QTAILQ_HEAD(, PGTask_s) PGTaskList;
118
119
+typedef struct AppleGFXDisplayMode {
120
+ uint16_t width_px;
121
+ uint16_t height_px;
122
+ uint16_t refresh_rate_hz;
123
+} AppleGFXDisplayMode;
124
+
125
typedef struct AppleGFXState {
126
/* Initialised on init/realize() */
127
MemoryRegion iomem_gfx;
128
@@ -XXX,XX +XXX,XX @@ typedef struct AppleGFXState {
129
id<MTLDevice> mtl;
130
id<MTLCommandQueue> mtl_queue;
131
dispatch_queue_t render_queue;
132
+ AppleGFXDisplayMode *display_modes;
133
+ uint32_t num_display_modes;
134
135
/* List `tasks` is protected by task_mutex */
136
QemuMutex task_mutex;
137
@@ -XXX,XX +XXX,XX @@ void *apple_gfx_host_ptr_for_gpa_range(uint64_t guest_physical,
138
uint64_t length, bool read_only,
139
MemoryRegion **mapping_in_region);
140
141
+extern const PropertyInfo qdev_prop_display_mode;
142
+
143
#endif
144
145
diff --git a/hw/display/apple-gfx.m b/hw/display/apple-gfx.m
146
index XXXXXXX..XXXXXXX 100644
147
--- a/hw/display/apple-gfx.m
148
+++ b/hw/display/apple-gfx.m
149
@@ -XXX,XX +XXX,XX @@
150
#include "sysemu/dma.h"
151
#include "ui/console.h"
152
153
-static const PGDisplayCoord_t apple_gfx_modes[] = {
154
- { .x = 1440, .y = 1080 },
155
- { .x = 1280, .y = 1024 },
156
+static const AppleGFXDisplayMode apple_gfx_default_modes[] = {
157
+ { 1920, 1080, 60 },
158
+ { 1440, 1080, 60 },
159
+ { 1280, 1024, 60 },
160
};
161
162
/* ------ PGTask and task operations: new/destroy/map/unmap ------ */
163
@@ -XXX,XX +XXX,XX @@ static void new_frame_handler_bh(void *opaque)
164
return disp_desc;
165
}
166
167
-static NSArray<PGDisplayMode*>* apple_gfx_prepare_display_mode_array(void)
168
+static NSArray<PGDisplayMode *> *apple_gfx_create_display_mode_array(
169
+ const AppleGFXDisplayMode display_modes[], uint32_t display_mode_count)
170
{
171
- PGDisplayMode *modes[ARRAY_SIZE(apple_gfx_modes)];
172
- NSArray<PGDisplayMode*>* mode_array = nil;
173
- int i;
174
-
175
- for (i = 0; i < ARRAY_SIZE(apple_gfx_modes); i++) {
176
- modes[i] =
177
- [[PGDisplayMode alloc] initWithSizeInPixels:apple_gfx_modes[i] refreshRateInHz:60.];
178
- }
179
-
180
- mode_array = [NSArray arrayWithObjects:modes count:ARRAY_SIZE(apple_gfx_modes)];
181
-
182
- for (i = 0; i < ARRAY_SIZE(apple_gfx_modes); i++) {
183
- [modes[i] release];
184
- modes[i] = nil;
185
+ uint32_t i;
186
+ PGDisplayMode *mode_obj;
187
+ NSMutableArray<PGDisplayMode *> *mode_array =
188
+ [[NSMutableArray alloc] initWithCapacity:display_mode_count];
189
+
190
+ for (i = 0; i < display_mode_count; i++) {
191
+ const AppleGFXDisplayMode *mode = &display_modes[i];
192
+ trace_apple_gfx_display_mode(i, mode->width_px, mode->height_px);
193
+ PGDisplayCoord_t mode_size = { mode->width_px, mode->height_px };
194
+
195
+ mode_obj =
196
+ [[PGDisplayMode alloc] initWithSizeInPixels:mode_size
197
+ refreshRateInHz:mode->refresh_rate_hz];
198
+ [mode_array addObject:mode_obj];
199
+ [mode_obj release];
200
}
201
202
return mode_array;
203
@@ -XXX,XX +XXX,XX @@ bool apple_gfx_common_realize(AppleGFXState *s, DeviceState *dev,
204
PGDeviceDescriptor *desc, Error **errp)
205
{
206
PGDisplayDescriptor *disp_desc = nil;
207
+ const AppleGFXDisplayMode *display_modes = apple_gfx_default_modes;
208
+ uint32_t num_display_modes = ARRAY_SIZE(apple_gfx_default_modes);
209
+ NSArray<PGDisplayMode *> *mode_array;
210
211
if (apple_gfx_mig_blocker == NULL) {
212
error_setg(&apple_gfx_mig_blocker,
213
@@ -XXX,XX +XXX,XX @@ bool apple_gfx_common_realize(AppleGFXState *s, DeviceState *dev,
214
s->pgdisp = [s->pgdev newDisplayWithDescriptor:disp_desc
215
port:0 serialNum:1234];
216
[disp_desc release];
217
- s->pgdisp.modeList = apple_gfx_prepare_display_mode_array();
218
+
219
+ if (s->display_modes != NULL && s->num_display_modes > 0) {
220
+ trace_apple_gfx_common_realize_modes_property(s->num_display_modes);
221
+ display_modes = s->display_modes;
222
+ num_display_modes = s->num_display_modes;
223
+ }
224
+ s->pgdisp.modeList = mode_array =
225
+ apple_gfx_create_display_mode_array(display_modes, num_display_modes);
226
+ [mode_array release];
227
228
s->con = graphic_console_init(dev, 0, &apple_gfx_fb_ops, s);
229
return true;
230
}
231
+
232
+/* ------ Display mode list device property ------ */
233
+
234
+static void apple_gfx_get_display_mode(Object *obj, Visitor *v,
235
+ const char *name, void *opaque,
236
+ Error **errp)
237
+{
238
+ Property *prop = opaque;
239
+ AppleGFXDisplayMode *mode = object_field_prop_ptr(obj, prop);
240
+ /* 3 uint16s (max 5 digits) + 2 separator characters + nul. */
241
+ char buffer[5 * 3 + 2 + 1];
242
+ char *pos = buffer;
243
+
244
+ int rc = snprintf(buffer, sizeof(buffer),
245
+ "%"PRIu16"x%"PRIu16"@%"PRIu16,
246
+ mode->width_px, mode->height_px,
247
+ mode->refresh_rate_hz);
248
+ assert(rc < sizeof(buffer));
249
+
250
+ visit_type_str(v, name, &pos, errp);
251
+}
252
+
253
+static void apple_gfx_set_display_mode(Object *obj, Visitor *v,
254
+ const char *name, void *opaque,
255
+ Error **errp)
256
+{
257
+ Property *prop = opaque;
258
+ AppleGFXDisplayMode *mode = object_field_prop_ptr(obj, prop);
259
+ const char *endptr;
260
+ g_autofree char *str = NULL;
261
+ int ret;
262
+ int val;
263
+
264
+ if (!visit_type_str(v, name, &str, errp)) {
265
+ return;
266
+ }
267
+
268
+ endptr = str;
269
+
270
+ ret = qemu_strtoi(endptr, &endptr, 10, &val);
271
+ if (ret || val > UINT16_MAX || val <= 0) {
272
+ error_setg(errp, "width in '%s' must be a decimal integer number "
273
+ "of pixels in the range 1..65535", name);
274
+ return;
275
+ }
276
+ mode->width_px = val;
277
+ if (*endptr != 'x') {
278
+ goto separator_error;
279
+ }
280
+
281
+ ret = qemu_strtoi(endptr + 1, &endptr, 10, &val);
282
+ if (ret || val > UINT16_MAX || val <= 0) {
283
+ error_setg(errp, "height in '%s' must be a decimal integer number "
284
+ "of pixels in the range 1..65535", name);
285
+ return;
286
+ }
287
+ mode->height_px = val;
288
+ if (*endptr != '@') {
289
+ goto separator_error;
290
+ }
291
+
292
+ ret = qemu_strtoi(endptr + 1, &endptr, 10, &val);
293
+ if (ret || val > UINT16_MAX || val <= 0) {
294
+ error_setg(errp, "refresh rate in '%s'"
295
+ " must be a positive decimal integer (Hertz)", name);
296
+ return;
297
+ }
298
+ mode->refresh_rate_hz = val;
299
+ return;
300
+
301
+separator_error:
302
+ error_setg(errp, "Each display mode takes the format "
303
+ "'<width>x<height>@<rate>'");
304
+}
305
+
306
+const PropertyInfo qdev_prop_display_mode = {
307
+ .name = "display_mode",
308
+ .description =
309
+ "Display mode in pixels and Hertz, as <width>x<height>@<refresh-rate> "
310
+ "Example: 3840x2160@60",
311
+ .get = apple_gfx_get_display_mode,
312
+ .set = apple_gfx_set_display_mode,
313
+};
314
diff --git a/hw/display/trace-events b/hw/display/trace-events
315
index XXXXXXX..XXXXXXX 100644
316
--- a/hw/display/trace-events
317
+++ b/hw/display/trace-events
318
@@ -XXX,XX +XXX,XX @@ apple_gfx_cursor_set(uint32_t bpp, uint64_t width, uint64_t height) "bpp=%d widt
319
apple_gfx_cursor_show(uint32_t show) "show=%d"
320
apple_gfx_cursor_move(void) ""
321
apple_gfx_common_init(const char *device_name, size_t mmio_size) "device: %s; MMIO size: %zu bytes"
322
+apple_gfx_common_realize_modes_property(uint32_t num_modes) "using %u modes supplied by 'display-modes' device property"
323
+apple_gfx_display_mode(uint32_t mode_idx, uint16_t width_px, uint16_t height_px) "mode %2"PRIu32": %4"PRIu16"x%4"PRIu16
324
325
# apple-gfx-mmio.m
326
apple_gfx_mmio_iosfc_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
327
--
328
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
I'm happy to take responsibility for the macOS PV graphics code. As
2
HVF patches don't seem to get much attention at the moment, I'm also
3
adding myself as designated reviewer for HVF and x86 HVF to try and
4
improve that.
5
1
6
I anticipate that the resulting workload should be covered by the
7
funding I'm receiving for improving Qemu in combination with macOS. As
8
of right now this runs out at the end of 2024; I expect the workload on
9
apple-gfx should be relatively minor and manageable in my spare time
10
beyond that. I may have to remove myself from more general HVF duties
11
once the contract runs out if it's more than I can manage.
12
13
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
14
Reviewed-by: Roman Bolshakov <rbolshakov@ddn.com>
15
---
16
MAINTAINERS | 7 +++++++
17
1 file changed, 7 insertions(+)
18
19
diff --git a/MAINTAINERS b/MAINTAINERS
20
index XXXXXXX..XXXXXXX 100644
21
--- a/MAINTAINERS
22
+++ b/MAINTAINERS
23
@@ -XXX,XX +XXX,XX @@ F: target/arm/hvf/
24
X86 HVF CPUs
25
M: Cameron Esfahani <dirty@apple.com>
26
M: Roman Bolshakov <rbolshakov@ddn.com>
27
+R: Phil Dennis-Jordan <phil@philjordan.eu>
28
W: https://wiki.qemu.org/Features/HVF
29
S: Maintained
30
F: target/i386/hvf/
31
@@ -XXX,XX +XXX,XX @@ F: target/i386/hvf/
32
HVF
33
M: Cameron Esfahani <dirty@apple.com>
34
M: Roman Bolshakov <rbolshakov@ddn.com>
35
+R: Phil Dennis-Jordan <phil@philjordan.eu>
36
W: https://wiki.qemu.org/Features/HVF
37
S: Maintained
38
F: accel/hvf/
39
@@ -XXX,XX +XXX,XX @@ F: hw/display/edid*
40
F: include/hw/display/edid.h
41
F: qemu-edid.c
42
43
+macOS PV Graphics (apple-gfx)
44
+M: Phil Dennis-Jordan <phil@philjordan.eu>
45
+S: Maintained
46
+F: hw/display/apple-gfx*
47
+
48
PIIX4 South Bridge (i82371AB)
49
M: Hervé Poussineau <hpoussin@reactos.org>
50
M: Philippe Mathieu-Daudé <philmd@linaro.org>
51
--
52
2.39.3 (Apple Git-145)
53
54
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
We will introduce a number of devices that are specific to the vmapple
4
target machine. To keep them all tidily together, let's put them into
5
a single target directory.
6
7
Signed-off-by: Alexander Graf <graf@amazon.com>
8
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
9
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
10
---
11
MAINTAINERS | 7 +++++++
12
hw/Kconfig | 1 +
13
hw/meson.build | 1 +
14
hw/vmapple/Kconfig | 1 +
15
hw/vmapple/meson.build | 0
16
hw/vmapple/trace-events | 2 ++
17
hw/vmapple/trace.h | 1 +
18
meson.build | 1 +
19
8 files changed, 14 insertions(+)
20
create mode 100644 hw/vmapple/Kconfig
21
create mode 100644 hw/vmapple/meson.build
22
create mode 100644 hw/vmapple/trace-events
23
create mode 100644 hw/vmapple/trace.h
24
25
diff --git a/MAINTAINERS b/MAINTAINERS
26
index XXXXXXX..XXXXXXX 100644
27
--- a/MAINTAINERS
28
+++ b/MAINTAINERS
29
@@ -XXX,XX +XXX,XX @@ F: hw/hyperv/hv-balloon*.h
30
F: include/hw/hyperv/dynmem-proto.h
31
F: include/hw/hyperv/hv-balloon.h
32
33
+VMapple
34
+M: Alexander Graf <agraf@csgraf.de>
35
+R: Phil Dennis-Jordan <phil@philjordan.eu>
36
+S: Maintained
37
+F: hw/vmapple/*
38
+F: include/hw/vmapple/*
39
+
40
Subsystems
41
----------
42
Overall Audio backends
43
diff --git a/hw/Kconfig b/hw/Kconfig
44
index XXXXXXX..XXXXXXX 100644
45
--- a/hw/Kconfig
46
+++ b/hw/Kconfig
47
@@ -XXX,XX +XXX,XX @@ source ufs/Kconfig
48
source usb/Kconfig
49
source virtio/Kconfig
50
source vfio/Kconfig
51
+source vmapple/Kconfig
52
source xen/Kconfig
53
source watchdog/Kconfig
54
55
diff --git a/hw/meson.build b/hw/meson.build
56
index XXXXXXX..XXXXXXX 100644
57
--- a/hw/meson.build
58
+++ b/hw/meson.build
59
@@ -XXX,XX +XXX,XX @@ subdir('ufs')
60
subdir('usb')
61
subdir('vfio')
62
subdir('virtio')
63
+subdir('vmapple')
64
subdir('watchdog')
65
subdir('xen')
66
subdir('xenpv')
67
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
68
new file mode 100644
69
index XXXXXXX..XXXXXXX
70
--- /dev/null
71
+++ b/hw/vmapple/Kconfig
72
@@ -0,0 +1 @@
73
+
74
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
75
new file mode 100644
76
index XXXXXXX..XXXXXXX
77
diff --git a/hw/vmapple/trace-events b/hw/vmapple/trace-events
78
new file mode 100644
79
index XXXXXXX..XXXXXXX
80
--- /dev/null
81
+++ b/hw/vmapple/trace-events
82
@@ -XXX,XX +XXX,XX @@
83
+# See docs/devel/tracing.rst for syntax documentation.
84
+
85
diff --git a/hw/vmapple/trace.h b/hw/vmapple/trace.h
86
new file mode 100644
87
index XXXXXXX..XXXXXXX
88
--- /dev/null
89
+++ b/hw/vmapple/trace.h
90
@@ -0,0 +1 @@
91
+#include "trace/trace-hw_vmapple.h"
92
diff --git a/meson.build b/meson.build
93
index XXXXXXX..XXXXXXX 100644
94
--- a/meson.build
95
+++ b/meson.build
96
@@ -XXX,XX +XXX,XX @@ if have_system
97
'hw/usb',
98
'hw/vfio',
99
'hw/virtio',
100
+ 'hw/vmapple',
101
'hw/watchdog',
102
'hw/xen',
103
'hw/gpio',
104
--
105
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
In addition to the ISA and PCI variants of pvpanic, let's add an MMIO
4
platform device that we can use in embedded arm environments.
5
6
Signed-off-by: Alexander Graf <graf@amazon.com>
7
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
10
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
11
---
12
13
v3:
14
* Rebased on upstream, updated a header path
15
16
hw/misc/Kconfig | 4 +++
17
hw/misc/meson.build | 1 +
18
hw/misc/pvpanic-mmio.c | 61 +++++++++++++++++++++++++++++++++++++++
19
include/hw/misc/pvpanic.h | 1 +
20
4 files changed, 67 insertions(+)
21
create mode 100644 hw/misc/pvpanic-mmio.c
22
23
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
24
index XXXXXXX..XXXXXXX 100644
25
--- a/hw/misc/Kconfig
26
+++ b/hw/misc/Kconfig
27
@@ -XXX,XX +XXX,XX @@ config PVPANIC_ISA
28
depends on ISA_BUS
29
select PVPANIC_COMMON
30
31
+config PVPANIC_MMIO
32
+ bool
33
+ select PVPANIC_COMMON
34
+
35
config AUX
36
bool
37
select I2C
38
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
39
index XXXXXXX..XXXXXXX 100644
40
--- a/hw/misc/meson.build
41
+++ b/hw/misc/meson.build
42
@@ -XXX,XX +XXX,XX @@ system_ss.add(when: 'CONFIG_ARMSSE_MHU', if_true: files('armsse-mhu.c'))
43
44
system_ss.add(when: 'CONFIG_PVPANIC_ISA', if_true: files('pvpanic-isa.c'))
45
system_ss.add(when: 'CONFIG_PVPANIC_PCI', if_true: files('pvpanic-pci.c'))
46
+system_ss.add(when: 'CONFIG_PVPANIC_MMIO', if_true: files('pvpanic-mmio.c'))
47
system_ss.add(when: 'CONFIG_AUX', if_true: files('auxbus.c'))
48
system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
49
'aspeed_hace.c',
50
diff --git a/hw/misc/pvpanic-mmio.c b/hw/misc/pvpanic-mmio.c
51
new file mode 100644
52
index XXXXXXX..XXXXXXX
53
--- /dev/null
54
+++ b/hw/misc/pvpanic-mmio.c
55
@@ -XXX,XX +XXX,XX @@
56
+/*
57
+ * QEMU simulated pvpanic device (MMIO frontend)
58
+ *
59
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
60
+ *
61
+ * SPDX-License-Identifier: GPL-2.0-or-later
62
+ */
63
+
64
+#include "qemu/osdep.h"
65
+
66
+#include "hw/qdev-properties.h"
67
+#include "hw/misc/pvpanic.h"
68
+#include "hw/sysbus.h"
69
+#include "standard-headers/misc/pvpanic.h"
70
+
71
+OBJECT_DECLARE_SIMPLE_TYPE(PVPanicMMIOState, PVPANIC_MMIO_DEVICE)
72
+
73
+#define PVPANIC_MMIO_SIZE 0x2
74
+
75
+struct PVPanicMMIOState {
76
+ SysBusDevice parent_obj;
77
+
78
+ PVPanicState pvpanic;
79
+};
80
+
81
+static void pvpanic_mmio_initfn(Object *obj)
82
+{
83
+ PVPanicMMIOState *s = PVPANIC_MMIO_DEVICE(obj);
84
+
85
+ pvpanic_setup_io(&s->pvpanic, DEVICE(s), PVPANIC_MMIO_SIZE);
86
+ sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->pvpanic.mr);
87
+}
88
+
89
+static Property pvpanic_mmio_properties[] = {
90
+ DEFINE_PROP_UINT8("events", PVPanicMMIOState, pvpanic.events,
91
+ PVPANIC_PANICKED | PVPANIC_CRASH_LOADED),
92
+ DEFINE_PROP_END_OF_LIST(),
93
+};
94
+
95
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
96
+{
97
+ DeviceClass *dc = DEVICE_CLASS(klass);
98
+
99
+ device_class_set_props(dc, pvpanic_mmio_properties);
100
+ set_bit(DEVICE_CATEGORY_MISC, dc->categories);
101
+}
102
+
103
+static const TypeInfo pvpanic_mmio_info = {
104
+ .name = TYPE_PVPANIC_MMIO_DEVICE,
105
+ .parent = TYPE_SYS_BUS_DEVICE,
106
+ .instance_size = sizeof(PVPanicMMIOState),
107
+ .instance_init = pvpanic_mmio_initfn,
108
+ .class_init = pvpanic_mmio_class_init,
109
+};
110
+
111
+static void pvpanic_register_types(void)
112
+{
113
+ type_register_static(&pvpanic_mmio_info);
114
+}
115
+
116
+type_init(pvpanic_register_types)
117
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
118
index XXXXXXX..XXXXXXX 100644
119
--- a/include/hw/misc/pvpanic.h
120
+++ b/include/hw/misc/pvpanic.h
121
@@ -XXX,XX +XXX,XX @@
122
123
#define TYPE_PVPANIC_ISA_DEVICE "pvpanic"
124
#define TYPE_PVPANIC_PCI_DEVICE "pvpanic-pci"
125
+#define TYPE_PVPANIC_MMIO_DEVICE "pvpanic-mmio"
126
127
#define PVPANIC_IOPORT_PROP "ioport"
128
129
--
130
2.39.3 (Apple Git-145)
131
132
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
MacOS unconditionally disables interrupts of the physical timer on boot
4
and then continues to use the virtual one. We don't really want to support
5
a full physical timer emulation, so let's just ignore those writes.
6
7
Signed-off-by: Alexander Graf <graf@amazon.com>
8
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
9
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
10
---
11
target/arm/hvf/hvf.c | 9 +++++++++
12
1 file changed, 9 insertions(+)
13
14
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
15
index XXXXXXX..XXXXXXX 100644
16
--- a/target/arm/hvf/hvf.c
17
+++ b/target/arm/hvf/hvf.c
18
@@ -XXX,XX +XXX,XX @@
19
20
#include "qemu/osdep.h"
21
#include "qemu/error-report.h"
22
+#include "qemu/log.h"
23
24
#include "sysemu/runstate.h"
25
#include "sysemu/hvf.h"
26
@@ -XXX,XX +XXX,XX @@ void hvf_arm_init_debug(void)
27
#define SYSREG_OSLSR_EL1 SYSREG(2, 0, 1, 1, 4)
28
#define SYSREG_OSDLR_EL1 SYSREG(2, 0, 1, 3, 4)
29
#define SYSREG_CNTPCT_EL0 SYSREG(3, 3, 14, 0, 1)
30
+#define SYSREG_CNTP_CTL_EL0 SYSREG(3, 3, 14, 2, 1)
31
#define SYSREG_PMCR_EL0 SYSREG(3, 3, 9, 12, 0)
32
#define SYSREG_PMUSERENR_EL0 SYSREG(3, 3, 9, 14, 0)
33
#define SYSREG_PMCNTENSET_EL0 SYSREG(3, 3, 9, 12, 1)
34
@@ -XXX,XX +XXX,XX @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
35
case SYSREG_OSLAR_EL1:
36
env->cp15.oslsr_el1 = val & 1;
37
return 0;
38
+ case SYSREG_CNTP_CTL_EL0:
39
+ /*
40
+ * Guests should not rely on the physical counter, but macOS emits
41
+ * disable writes to it. Let it do so, but ignore the requests.
42
+ */
43
+ qemu_log_mask(LOG_UNIMP, "Unsupported write to CNTP_CTL_EL0\n");
44
+ return 0;
45
case SYSREG_OSDLR_EL1:
46
/* Dummy register */
47
return 0;
48
--
49
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
Some boards such as vmapple don't do real legacy PCI IRQ swizzling.
4
Instead, they just keep allocating more board IRQ lines for each new
5
legacy IRQ. Let's support that mode by giving instantiators a new
6
"nr_irqs" property they can use to support more than 4 legacy IRQ lines.
7
In this mode, GPEX will export more IRQ lines, one for each device.
8
9
Signed-off-by: Alexander Graf <graf@amazon.com>
10
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
11
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
12
---
13
14
v4:
15
16
* Turned pair of IRQ arrays into array of structs.
17
* Simplified swizzling logic selection.
18
19
hw/arm/sbsa-ref.c | 2 +-
20
hw/arm/virt.c | 2 +-
21
hw/i386/microvm.c | 2 +-
22
hw/loongarch/virt.c | 2 +-
23
hw/mips/loongson3_virt.c | 2 +-
24
hw/openrisc/virt.c | 12 +++++------
25
hw/pci-host/gpex.c | 43 ++++++++++++++++++++++++++++++--------
26
hw/riscv/virt.c | 12 +++++------
27
hw/xtensa/virt.c | 2 +-
28
include/hw/pci-host/gpex.h | 7 +++----
29
10 files changed, 55 insertions(+), 31 deletions(-)
30
31
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
32
index XXXXXXX..XXXXXXX 100644
33
--- a/hw/arm/sbsa-ref.c
34
+++ b/hw/arm/sbsa-ref.c
35
@@ -XXX,XX +XXX,XX @@ static void create_pcie(SBSAMachineState *sms)
36
/* Map IO port space */
37
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, base_pio);
38
39
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
40
+ for (i = 0; i < PCI_NUM_PINS; i++) {
41
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
42
qdev_get_gpio_in(sms->gic, irq + i));
43
gpex_set_irq_num(GPEX_HOST(dev), i, irq + i);
44
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
45
index XXXXXXX..XXXXXXX 100644
46
--- a/hw/arm/virt.c
47
+++ b/hw/arm/virt.c
48
@@ -XXX,XX +XXX,XX @@ static void create_pcie(VirtMachineState *vms)
49
/* Map IO port space */
50
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, base_pio);
51
52
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
53
+ for (i = 0; i < PCI_NUM_PINS; i++) {
54
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
55
qdev_get_gpio_in(vms->gic, irq + i));
56
gpex_set_irq_num(GPEX_HOST(dev), i, irq + i);
57
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
58
index XXXXXXX..XXXXXXX 100644
59
--- a/hw/i386/microvm.c
60
+++ b/hw/i386/microvm.c
61
@@ -XXX,XX +XXX,XX @@ static void create_gpex(MicrovmMachineState *mms)
62
mms->gpex.mmio64.base, mmio64_alias);
63
}
64
65
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
66
+ for (i = 0; i < PCI_NUM_PINS; i++) {
67
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
68
x86ms->gsi[mms->gpex.irq + i]);
69
}
70
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
71
index XXXXXXX..XXXXXXX 100644
72
--- a/hw/loongarch/virt.c
73
+++ b/hw/loongarch/virt.c
74
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
75
memory_region_add_subregion(get_system_memory(), VIRT_PCI_IO_BASE,
76
pio_alias);
77
78
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
79
+ for (i = 0; i < PCI_NUM_PINS; i++) {
80
sysbus_connect_irq(d, i,
81
qdev_get_gpio_in(pch_pic, 16 + i));
82
gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
83
diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c
84
index XXXXXXX..XXXXXXX 100644
85
--- a/hw/mips/loongson3_virt.c
86
+++ b/hw/mips/loongson3_virt.c
87
@@ -XXX,XX +XXX,XX @@ static inline void loongson3_virt_devices_init(MachineState *machine,
88
virt_memmap[VIRT_PCIE_PIO].base, s->pio_alias);
89
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, virt_memmap[VIRT_PCIE_PIO].base);
90
91
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
92
+ for (i = 0; i < PCI_NUM_PINS; i++) {
93
irq = qdev_get_gpio_in(pic, PCIE_IRQ_BASE + i);
94
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq);
95
gpex_set_irq_num(GPEX_HOST(dev), i, PCIE_IRQ_BASE + i);
96
diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c
97
index XXXXXXX..XXXXXXX 100644
98
--- a/hw/openrisc/virt.c
99
+++ b/hw/openrisc/virt.c
100
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(void *fdt, char *nodename, int irq_base,
101
{
102
int pin, dev;
103
uint32_t irq_map_stride = 0;
104
- uint32_t full_irq_map[GPEX_NUM_IRQS * GPEX_NUM_IRQS * 6] = {};
105
+ uint32_t full_irq_map[PCI_NUM_PINS * PCI_NUM_PINS * 6] = {};
106
uint32_t *irq_map = full_irq_map;
107
108
/*
109
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(void *fdt, char *nodename, int irq_base,
110
* possible slot) seeing the interrupt-map-mask will allow the table
111
* to wrap to any number of devices.
112
*/
113
- for (dev = 0; dev < GPEX_NUM_IRQS; dev++) {
114
+ for (dev = 0; dev < PCI_NUM_PINS; dev++) {
115
int devfn = dev << 3;
116
117
- for (pin = 0; pin < GPEX_NUM_IRQS; pin++) {
118
- int irq_nr = irq_base + ((pin + PCI_SLOT(devfn)) % GPEX_NUM_IRQS);
119
+ for (pin = 0; pin < PCI_NUM_PINS; pin++) {
120
+ int irq_nr = irq_base + ((pin + PCI_SLOT(devfn)) % PCI_NUM_PINS);
121
int i = 0;
122
123
/* Fill PCI address cells */
124
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(void *fdt, char *nodename, int irq_base,
125
}
126
127
qemu_fdt_setprop(fdt, nodename, "interrupt-map", full_irq_map,
128
- GPEX_NUM_IRQS * GPEX_NUM_IRQS *
129
+ PCI_NUM_PINS * PCI_NUM_PINS *
130
irq_map_stride * sizeof(uint32_t));
131
132
qemu_fdt_setprop_cells(fdt, nodename, "interrupt-map-mask",
133
@@ -XXX,XX +XXX,XX @@ static void openrisc_virt_pcie_init(OR1KVirtState *state,
134
memory_region_add_subregion(get_system_memory(), pio_base, alias);
135
136
/* Connect IRQ lines. */
137
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
138
+ for (i = 0; i < PCI_NUM_PINS; i++) {
139
pcie_irq = get_per_cpu_irq(cpus, num_cpus, irq_base + i);
140
141
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, pcie_irq);
142
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
143
index XXXXXXX..XXXXXXX 100644
144
--- a/hw/pci-host/gpex.c
145
+++ b/hw/pci-host/gpex.c
146
@@ -XXX,XX +XXX,XX @@
147
#include "qemu/osdep.h"
148
#include "qapi/error.h"
149
#include "hw/irq.h"
150
+#include "hw/pci/pci_bus.h"
151
#include "hw/pci-host/gpex.h"
152
#include "hw/qdev-properties.h"
153
#include "migration/vmstate.h"
154
@@ -XXX,XX +XXX,XX @@
155
* GPEX host
156
*/
157
158
+struct GPEXIrq {
159
+ qemu_irq irq;
160
+ int irq_num;
161
+};
162
+
163
static void gpex_set_irq(void *opaque, int irq_num, int level)
164
{
165
GPEXHost *s = opaque;
166
167
- qemu_set_irq(s->irq[irq_num], level);
168
+ qemu_set_irq(s->irq[irq_num].irq, level);
169
}
170
171
int gpex_set_irq_num(GPEXHost *s, int index, int gsi)
172
{
173
- if (index >= GPEX_NUM_IRQS) {
174
+ if (index >= s->num_irqs) {
175
return -EINVAL;
176
}
177
178
- s->irq_num[index] = gsi;
179
+ s->irq[index].irq_num = gsi;
180
return 0;
181
}
182
183
@@ -XXX,XX +XXX,XX @@ static PCIINTxRoute gpex_route_intx_pin_to_irq(void *opaque, int pin)
184
{
185
PCIINTxRoute route;
186
GPEXHost *s = opaque;
187
- int gsi = s->irq_num[pin];
188
+ int gsi = s->irq[pin].irq_num;
189
190
route.irq = gsi;
191
if (gsi < 0) {
192
@@ -XXX,XX +XXX,XX @@ static PCIINTxRoute gpex_route_intx_pin_to_irq(void *opaque, int pin)
193
return route;
194
}
195
196
+static int gpex_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin)
197
+{
198
+ PCIBus *bus = pci_device_root_bus(pci_dev);
199
+
200
+ return (PCI_SLOT(pci_dev->devfn) + pin) % bus->nirq;
201
+}
202
+
203
static void gpex_host_realize(DeviceState *dev, Error **errp)
204
{
205
PCIHostState *pci = PCI_HOST_BRIDGE(dev);
206
@@ -XXX,XX +XXX,XX @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
207
PCIExpressHost *pex = PCIE_HOST_BRIDGE(dev);
208
int i;
209
210
+ s->irq = g_malloc0_n(s->num_irqs, sizeof(*s->irq));
211
+
212
pcie_host_mmcfg_init(pex, PCIE_MMCFG_SIZE_MAX);
213
sysbus_init_mmio(sbd, &pex->mmio);
214
215
@@ -XXX,XX +XXX,XX @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
216
sysbus_init_mmio(sbd, &s->io_ioport);
217
}
218
219
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
220
- sysbus_init_irq(sbd, &s->irq[i]);
221
- s->irq_num[i] = -1;
222
+ for (i = 0; i < s->num_irqs; i++) {
223
+ sysbus_init_irq(sbd, &s->irq[i].irq);
224
+ s->irq[i].irq_num = -1;
225
}
226
227
pci->bus = pci_register_root_bus(dev, "pcie.0", gpex_set_irq,
228
- pci_swizzle_map_irq_fn, s, &s->io_mmio,
229
- &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
230
+ gpex_swizzle_map_irq_fn,
231
+ s, &s->io_mmio, &s->io_ioport, 0,
232
+ s->num_irqs, TYPE_PCIE_BUS);
233
234
pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
235
qdev_realize(DEVICE(&s->gpex_root), BUS(pci->bus), &error_fatal);
236
}
237
238
+static void gpex_host_unrealize(DeviceState *dev)
239
+{
240
+ GPEXHost *s = GPEX_HOST(dev);
241
+
242
+ g_free(s->irq);
243
+}
244
+
245
static const char *gpex_host_root_bus_path(PCIHostState *host_bridge,
246
PCIBus *rootbus)
247
{
248
@@ -XXX,XX +XXX,XX @@ static Property gpex_host_properties[] = {
249
gpex_cfg.mmio64.base, 0),
250
DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MMIO_SIZE, GPEXHost,
251
gpex_cfg.mmio64.size, 0),
252
+ DEFINE_PROP_UINT8("num-irqs", GPEXHost, num_irqs, PCI_NUM_PINS),
253
DEFINE_PROP_END_OF_LIST(),
254
};
255
256
@@ -XXX,XX +XXX,XX @@ static void gpex_host_class_init(ObjectClass *klass, void *data)
257
258
hc->root_bus_path = gpex_host_root_bus_path;
259
dc->realize = gpex_host_realize;
260
+ dc->unrealize = gpex_host_unrealize;
261
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
262
dc->fw_name = "pci";
263
device_class_set_props(dc, gpex_host_properties);
264
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
265
index XXXXXXX..XXXXXXX 100644
266
--- a/hw/riscv/virt.c
267
+++ b/hw/riscv/virt.c
268
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(RISCVVirtState *s, void *fdt, char *nodename,
269
{
270
int pin, dev;
271
uint32_t irq_map_stride = 0;
272
- uint32_t full_irq_map[GPEX_NUM_IRQS * GPEX_NUM_IRQS *
273
+ uint32_t full_irq_map[PCI_NUM_PINS * PCI_NUM_PINS *
274
FDT_MAX_INT_MAP_WIDTH] = {};
275
uint32_t *irq_map = full_irq_map;
276
277
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(RISCVVirtState *s, void *fdt, char *nodename,
278
* possible slot) seeing the interrupt-map-mask will allow the table
279
* to wrap to any number of devices.
280
*/
281
- for (dev = 0; dev < GPEX_NUM_IRQS; dev++) {
282
+ for (dev = 0; dev < PCI_NUM_PINS; dev++) {
283
int devfn = dev * 0x8;
284
285
- for (pin = 0; pin < GPEX_NUM_IRQS; pin++) {
286
- int irq_nr = PCIE_IRQ + ((pin + PCI_SLOT(devfn)) % GPEX_NUM_IRQS);
287
+ for (pin = 0; pin < PCI_NUM_PINS; pin++) {
288
+ int irq_nr = PCIE_IRQ + ((pin + PCI_SLOT(devfn)) % PCI_NUM_PINS);
289
int i = 0;
290
291
/* Fill PCI address cells */
292
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(RISCVVirtState *s, void *fdt, char *nodename,
293
}
294
295
qemu_fdt_setprop(fdt, nodename, "interrupt-map", full_irq_map,
296
- GPEX_NUM_IRQS * GPEX_NUM_IRQS *
297
+ PCI_NUM_PINS * PCI_NUM_PINS *
298
irq_map_stride * sizeof(uint32_t));
299
300
qemu_fdt_setprop_cells(fdt, nodename, "interrupt-map-mask",
301
@@ -XXX,XX +XXX,XX @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem,
302
303
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, pio_base);
304
305
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
306
+ for (i = 0; i < PCI_NUM_PINS; i++) {
307
irq = qdev_get_gpio_in(irqchip, PCIE_IRQ + i);
308
309
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq);
310
diff --git a/hw/xtensa/virt.c b/hw/xtensa/virt.c
311
index XXXXXXX..XXXXXXX 100644
312
--- a/hw/xtensa/virt.c
313
+++ b/hw/xtensa/virt.c
314
@@ -XXX,XX +XXX,XX @@ static void create_pcie(MachineState *ms, CPUXtensaState *env, int irq_base,
315
/* Connect IRQ lines. */
316
extints = xtensa_get_extints(env);
317
318
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
319
+ for (i = 0; i < PCI_NUM_PINS; i++) {
320
void *q = extints[irq_base + i];
321
322
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, q);
323
diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
324
index XXXXXXX..XXXXXXX 100644
325
--- a/include/hw/pci-host/gpex.h
326
+++ b/include/hw/pci-host/gpex.h
327
@@ -XXX,XX +XXX,XX @@ OBJECT_DECLARE_SIMPLE_TYPE(GPEXHost, GPEX_HOST)
328
#define TYPE_GPEX_ROOT_DEVICE "gpex-root"
329
OBJECT_DECLARE_SIMPLE_TYPE(GPEXRootState, GPEX_ROOT_DEVICE)
330
331
-#define GPEX_NUM_IRQS 4
332
-
333
struct GPEXRootState {
334
/*< private >*/
335
PCIDevice parent_obj;
336
@@ -XXX,XX +XXX,XX @@ struct GPEXConfig {
337
PCIBus *bus;
338
};
339
340
+typedef struct GPEXIrq GPEXIrq;
341
struct GPEXHost {
342
/*< private >*/
343
PCIExpressHost parent_obj;
344
@@ -XXX,XX +XXX,XX @@ struct GPEXHost {
345
MemoryRegion io_mmio;
346
MemoryRegion io_ioport_window;
347
MemoryRegion io_mmio_window;
348
- qemu_irq irq[GPEX_NUM_IRQS];
349
- int irq_num[GPEX_NUM_IRQS];
350
+ GPEXIrq *irq;
351
+ uint8_t num_irqs;
352
353
bool allow_unmapped_accesses;
354
355
--
356
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
VMApple contains an "aes" engine device that it uses to encrypt and
4
decrypt its nvram. It has trivial hard coded keys it uses for that
5
purpose.
6
7
Add device emulation for this device model.
8
9
Signed-off-by: Alexander Graf <graf@amazon.com>
10
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
11
---
12
13
v3:
14
15
* Rebased on latest upstream and fixed minor breakages.
16
* Replaced legacy device reset method with Resettable method
17
18
v4:
19
20
* Improved logging of unimplemented functions and guest errors.
21
* Better adherence to naming and coding conventions.
22
* Cleaner error handling and recovery, including using g_autoptr
23
24
v5:
25
26
* More logging improvements
27
* Use xxx64_overflow() functions for hexdump buffer size calculations.
28
29
v7:
30
31
* Coding style tweaks.
32
33
v8:
34
35
* Further improved logging of guest errors.
36
37
v9:
38
39
* Replaced a use of cpu_physical_memory_write with dma_memory_write.
40
* Dropped unnecessary use of ternary operator for bool -> 0/1.
41
42
v10:
43
44
* Code style and comment improvements.
45
46
hw/vmapple/Kconfig | 2 +
47
hw/vmapple/aes.c | 581 +++++++++++++++++++++++++++++++++++
48
hw/vmapple/meson.build | 1 +
49
hw/vmapple/trace-events | 14 +
50
include/hw/vmapple/vmapple.h | 17 +
51
include/qemu/cutils.h | 15 +
52
util/hexdump.c | 18 ++
53
7 files changed, 648 insertions(+)
54
create mode 100644 hw/vmapple/aes.c
55
create mode 100644 include/hw/vmapple/vmapple.h
56
57
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
58
index XXXXXXX..XXXXXXX 100644
59
--- a/hw/vmapple/Kconfig
60
+++ b/hw/vmapple/Kconfig
61
@@ -1 +1,3 @@
62
+config VMAPPLE_AES
63
+ bool
64
65
diff --git a/hw/vmapple/aes.c b/hw/vmapple/aes.c
66
new file mode 100644
67
index XXXXXXX..XXXXXXX
68
--- /dev/null
69
+++ b/hw/vmapple/aes.c
70
@@ -XXX,XX +XXX,XX @@
71
+/*
72
+ * QEMU Apple AES device emulation
73
+ *
74
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
75
+ *
76
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
77
+ * See the COPYING file in the top-level directory.
78
+ *
79
+ * SPDX-License-Identifier: GPL-2.0-or-later
80
+ */
81
+
82
+#include "qemu/osdep.h"
83
+#include "trace.h"
84
+#include "crypto/hash.h"
85
+#include "crypto/aes.h"
86
+#include "crypto/cipher.h"
87
+#include "hw/irq.h"
88
+#include "hw/sysbus.h"
89
+#include "hw/vmapple/vmapple.h"
90
+#include "migration/vmstate.h"
91
+#include "qemu/cutils.h"
92
+#include "qemu/log.h"
93
+#include "qemu/module.h"
94
+#include "sysemu/dma.h"
95
+
96
+OBJECT_DECLARE_SIMPLE_TYPE(AESState, APPLE_AES)
97
+
98
+#define MAX_FIFO_SIZE 9
99
+
100
+#define CMD_KEY 0x1
101
+#define CMD_KEY_CONTEXT_SHIFT 27
102
+#define CMD_KEY_CONTEXT_MASK (0x1 << CMD_KEY_CONTEXT_SHIFT)
103
+#define CMD_KEY_SELECT_MAX_IDX 0x7
104
+#define CMD_KEY_SELECT_SHIFT 24
105
+#define CMD_KEY_SELECT_MASK (CMD_KEY_SELECT_MAX_IDX << CMD_KEY_SELECT_SHIFT)
106
+#define CMD_KEY_KEY_LEN_NUM 4u
107
+#define CMD_KEY_KEY_LEN_SHIFT 22
108
+#define CMD_KEY_KEY_LEN_MASK ((CMD_KEY_KEY_LEN_NUM - 1u) << CMD_KEY_KEY_LEN_SHIFT)
109
+#define CMD_KEY_ENCRYPT_SHIFT 20
110
+#define CMD_KEY_ENCRYPT_MASK (0x1 << CMD_KEY_ENCRYPT_SHIFT)
111
+#define CMD_KEY_BLOCK_MODE_SHIFT 16
112
+#define CMD_KEY_BLOCK_MODE_MASK (0x3 << CMD_KEY_BLOCK_MODE_SHIFT)
113
+#define CMD_IV 0x2
114
+#define CMD_IV_CONTEXT_SHIFT 26
115
+#define CMD_IV_CONTEXT_MASK (0x3 << CMD_KEY_CONTEXT_SHIFT)
116
+#define CMD_DSB 0x3
117
+#define CMD_SKG 0x4
118
+#define CMD_DATA 0x5
119
+#define CMD_DATA_KEY_CTX_SHIFT 27
120
+#define CMD_DATA_KEY_CTX_MASK (0x1 << CMD_DATA_KEY_CTX_SHIFT)
121
+#define CMD_DATA_IV_CTX_SHIFT 25
122
+#define CMD_DATA_IV_CTX_MASK (0x3 << CMD_DATA_IV_CTX_SHIFT)
123
+#define CMD_DATA_LEN_MASK 0xffffff
124
+#define CMD_STORE_IV 0x6
125
+#define CMD_STORE_IV_ADDR_MASK 0xffffff
126
+#define CMD_WRITE_REG 0x7
127
+#define CMD_FLAG 0x8
128
+#define CMD_FLAG_STOP_MASK BIT(26)
129
+#define CMD_FLAG_RAISE_IRQ_MASK BIT(27)
130
+#define CMD_FLAG_INFO_MASK 0xff
131
+#define CMD_MAX 0x10
132
+
133
+#define CMD_SHIFT 28
134
+
135
+#define REG_STATUS 0xc
136
+#define REG_STATUS_DMA_READ_RUNNING BIT(0)
137
+#define REG_STATUS_DMA_READ_PENDING BIT(1)
138
+#define REG_STATUS_DMA_WRITE_RUNNING BIT(2)
139
+#define REG_STATUS_DMA_WRITE_PENDING BIT(3)
140
+#define REG_STATUS_BUSY BIT(4)
141
+#define REG_STATUS_EXECUTING BIT(5)
142
+#define REG_STATUS_READY BIT(6)
143
+#define REG_STATUS_TEXT_DPA_SEEDED BIT(7)
144
+#define REG_STATUS_UNWRAP_DPA_SEEDED BIT(8)
145
+
146
+#define REG_IRQ_STATUS 0x18
147
+#define REG_IRQ_STATUS_INVALID_CMD BIT(2)
148
+#define REG_IRQ_STATUS_FLAG BIT(5)
149
+#define REG_IRQ_ENABLE 0x1c
150
+#define REG_WATERMARK 0x20
151
+#define REG_Q_STATUS 0x24
152
+#define REG_FLAG_INFO 0x30
153
+#define REG_FIFO 0x200
154
+
155
+static const uint32_t key_lens[CMD_KEY_KEY_LEN_NUM] = {
156
+ [0] = 16,
157
+ [1] = 24,
158
+ [2] = 32,
159
+ [3] = 64,
160
+};
161
+
162
+typedef struct Key {
163
+ uint32_t key_len;
164
+ uint8_t key[32];
165
+} Key;
166
+
167
+typedef struct IV {
168
+ uint32_t iv[4];
169
+} IV;
170
+
171
+static Key builtin_keys[CMD_KEY_SELECT_MAX_IDX + 1] = {
172
+ [1] = {
173
+ .key_len = 32,
174
+ .key = { 0x1 },
175
+ },
176
+ [2] = {
177
+ .key_len = 32,
178
+ .key = { 0x2 },
179
+ },
180
+ [3] = {
181
+ .key_len = 32,
182
+ .key = { 0x3 },
183
+ }
184
+};
185
+
186
+struct AESState {
187
+ SysBusDevice parent_obj;
188
+
189
+ qemu_irq irq;
190
+ MemoryRegion iomem1;
191
+ MemoryRegion iomem2;
192
+ AddressSpace *as;
193
+
194
+ uint32_t status;
195
+ uint32_t q_status;
196
+ uint32_t irq_status;
197
+ uint32_t irq_enable;
198
+ uint32_t watermark;
199
+ uint32_t flag_info;
200
+ uint32_t fifo[MAX_FIFO_SIZE];
201
+ uint32_t fifo_idx;
202
+ Key key[2];
203
+ IV iv[4];
204
+ bool is_encrypt;
205
+ QCryptoCipherMode block_mode;
206
+};
207
+
208
+static void aes_update_irq(AESState *s)
209
+{
210
+ qemu_set_irq(s->irq, !!(s->irq_status & s->irq_enable));
211
+}
212
+
213
+static uint64_t aes1_read(void *opaque, hwaddr offset, unsigned size)
214
+{
215
+ AESState *s = opaque;
216
+ uint64_t res = 0;
217
+
218
+ switch (offset) {
219
+ case REG_STATUS:
220
+ res = s->status;
221
+ break;
222
+ case REG_IRQ_STATUS:
223
+ res = s->irq_status;
224
+ break;
225
+ case REG_IRQ_ENABLE:
226
+ res = s->irq_enable;
227
+ break;
228
+ case REG_WATERMARK:
229
+ res = s->watermark;
230
+ break;
231
+ case REG_Q_STATUS:
232
+ res = s->q_status;
233
+ break;
234
+ case REG_FLAG_INFO:
235
+ res = s->flag_info;
236
+ break;
237
+
238
+ default:
239
+ qemu_log_mask(LOG_UNIMP, "%s: Unknown AES MMIO offset %" PRIx64 "\n",
240
+ __func__, offset);
241
+ break;
242
+ }
243
+
244
+ trace_aes_read(offset, res);
245
+
246
+ return res;
247
+}
248
+
249
+static void fifo_append(AESState *s, uint64_t val)
250
+{
251
+ if (s->fifo_idx == MAX_FIFO_SIZE) {
252
+ /* Exceeded the FIFO. Bail out */
253
+ return;
254
+ }
255
+
256
+ s->fifo[s->fifo_idx++] = val;
257
+}
258
+
259
+static bool has_payload(AESState *s, uint32_t elems)
260
+{
261
+ return s->fifo_idx >= elems + 1;
262
+}
263
+
264
+static bool cmd_key(AESState *s)
265
+{
266
+ uint32_t cmd = s->fifo[0];
267
+ uint32_t key_select = (cmd & CMD_KEY_SELECT_MASK) >> CMD_KEY_SELECT_SHIFT;
268
+ uint32_t ctxt = (cmd & CMD_KEY_CONTEXT_MASK) >> CMD_KEY_CONTEXT_SHIFT;
269
+ uint32_t key_len;
270
+
271
+ switch ((cmd & CMD_KEY_BLOCK_MODE_MASK) >> CMD_KEY_BLOCK_MODE_SHIFT) {
272
+ case 0:
273
+ s->block_mode = QCRYPTO_CIPHER_MODE_ECB;
274
+ break;
275
+ case 1:
276
+ s->block_mode = QCRYPTO_CIPHER_MODE_CBC;
277
+ break;
278
+ default:
279
+ return false;
280
+ }
281
+
282
+ s->is_encrypt = cmd & CMD_KEY_ENCRYPT_MASK;
283
+ key_len = key_lens[(cmd & CMD_KEY_KEY_LEN_MASK) >> CMD_KEY_KEY_LEN_SHIFT];
284
+
285
+ if (key_select) {
286
+ trace_aes_cmd_key_select_builtin(ctxt, key_select,
287
+ s->is_encrypt ? "en" : "de",
288
+ QCryptoCipherMode_str(s->block_mode));
289
+ s->key[ctxt] = builtin_keys[key_select];
290
+ } else {
291
+ trace_aes_cmd_key_select_new(ctxt, key_len,
292
+ s->is_encrypt ? "en" : "de",
293
+ QCryptoCipherMode_str(s->block_mode));
294
+ if (key_len > sizeof(s->key[ctxt].key)) {
295
+ return false;
296
+ }
297
+ if (!has_payload(s, key_len / sizeof(uint32_t))) {
298
+ /* wait for payload */
299
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: No payload\n", __func__);
300
+ return false;
301
+ }
302
+ memcpy(&s->key[ctxt].key, &s->fifo[1], key_len);
303
+ s->key[ctxt].key_len = key_len;
304
+ }
305
+
306
+ return true;
307
+}
308
+
309
+static bool cmd_iv(AESState *s)
310
+{
311
+ uint32_t cmd = s->fifo[0];
312
+ uint32_t ctxt = (cmd & CMD_IV_CONTEXT_MASK) >> CMD_IV_CONTEXT_SHIFT;
313
+
314
+ if (!has_payload(s, 4)) {
315
+ /* wait for payload */
316
+ return false;
317
+ }
318
+ memcpy(&s->iv[ctxt].iv, &s->fifo[1], sizeof(s->iv[ctxt].iv));
319
+ trace_aes_cmd_iv(ctxt, s->fifo[1], s->fifo[2], s->fifo[3], s->fifo[4]);
320
+
321
+ return true;
322
+}
323
+
324
+static void dump_data(const char *desc, const void *p, size_t len)
325
+{
326
+ static const size_t MAX_LEN = 0x1000;
327
+ char hex[MAX_LEN * 2 + 1] = "";
328
+
329
+ if (len > MAX_LEN) {
330
+ return;
331
+ }
332
+
333
+ qemu_hexdump_to_buffer(hex, sizeof(hex), p, len);
334
+ trace_aes_dump_data(desc, hex);
335
+}
336
+
337
+static bool cmd_data(AESState *s)
338
+{
339
+ uint32_t cmd = s->fifo[0];
340
+ uint32_t ctxt_iv = 0;
341
+ uint32_t ctxt_key = (cmd & CMD_DATA_KEY_CTX_MASK) >> CMD_DATA_KEY_CTX_SHIFT;
342
+ uint32_t len = cmd & CMD_DATA_LEN_MASK;
343
+ uint64_t src_addr = s->fifo[2];
344
+ uint64_t dst_addr = s->fifo[3];
345
+ QCryptoCipherAlgo alg;
346
+ g_autoptr(QCryptoCipher) cipher = NULL;
347
+ g_autoptr(GByteArray) src = NULL;
348
+ g_autoptr(GByteArray) dst = NULL;
349
+ MemTxResult r;
350
+
351
+ src_addr |= ((uint64_t)s->fifo[1] << 16) & 0xffff00000000ULL;
352
+ dst_addr |= ((uint64_t)s->fifo[1] << 32) & 0xffff00000000ULL;
353
+
354
+ trace_aes_cmd_data(ctxt_key, ctxt_iv, src_addr, dst_addr, len);
355
+
356
+ if (!has_payload(s, 3)) {
357
+ /* wait for payload */
358
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: No payload\n", __func__);
359
+ return false;
360
+ }
361
+
362
+ if (ctxt_key >= ARRAY_SIZE(s->key) ||
363
+ ctxt_iv >= ARRAY_SIZE(s->iv)) {
364
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Invalid key or iv\n", __func__);
365
+ return false;
366
+ }
367
+
368
+ src = g_byte_array_sized_new(len);
369
+ g_byte_array_set_size(src, len);
370
+ dst = g_byte_array_sized_new(len);
371
+ g_byte_array_set_size(dst, len);
372
+
373
+ r = dma_memory_read(s->as, src_addr, src->data, len, MEMTXATTRS_UNSPECIFIED);
374
+ if (r != MEMTX_OK) {
375
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: DMA read of %"PRIu32" bytes "
376
+ "from 0x%"PRIx64" failed. (r=%d)\n",
377
+ __func__, len, src_addr, r);
378
+ return false;
379
+ }
380
+
381
+ dump_data("cmd_data(): src_data=", src->data, len);
382
+
383
+ switch (s->key[ctxt_key].key_len) {
384
+ case 128 / 8:
385
+ alg = QCRYPTO_CIPHER_ALGO_AES_128;
386
+ break;
387
+ case 192 / 8:
388
+ alg = QCRYPTO_CIPHER_ALGO_AES_192;
389
+ break;
390
+ case 256 / 8:
391
+ alg = QCRYPTO_CIPHER_ALGO_AES_256;
392
+ break;
393
+ default:
394
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Invalid key length\n", __func__);
395
+ return false;
396
+ }
397
+ cipher = qcrypto_cipher_new(alg, s->block_mode,
398
+ s->key[ctxt_key].key,
399
+ s->key[ctxt_key].key_len, NULL);
400
+ if (!cipher) {
401
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Failed to create cipher object\n",
402
+ __func__);
403
+ return false;
404
+ }
405
+ if (s->block_mode != QCRYPTO_CIPHER_MODE_ECB) {
406
+ if (qcrypto_cipher_setiv(cipher, (void *)s->iv[ctxt_iv].iv,
407
+ sizeof(s->iv[ctxt_iv].iv), NULL) != 0) {
408
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Failed to set IV\n", __func__);
409
+ return false;
410
+ }
411
+ }
412
+ if (s->is_encrypt) {
413
+ if (qcrypto_cipher_encrypt(cipher, src->data, dst->data, len, NULL) != 0) {
414
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Encryption failed\n", __func__);
415
+ return false;
416
+ }
417
+ } else {
418
+ if (qcrypto_cipher_decrypt(cipher, src->data, dst->data, len, NULL) != 0) {
419
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Decryption failed\n", __func__);
420
+ return false;
421
+ }
422
+ }
423
+
424
+ dump_data("cmd_data(): dst_data=", dst->data, len);
425
+ r = dma_memory_write(s->as, dst_addr, dst->data, len, MEMTXATTRS_UNSPECIFIED);
426
+ if (r != MEMTX_OK) {
427
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: DMA write of %"PRIu32" bytes "
428
+ "to 0x%"PRIx64" failed. (r=%d)\n",
429
+ __func__, len, src_addr, r);
430
+ return false;
431
+ }
432
+
433
+ return true;
434
+}
435
+
436
+static bool cmd_store_iv(AESState *s)
437
+{
438
+ uint32_t cmd = s->fifo[0];
439
+ uint32_t ctxt = (cmd & CMD_IV_CONTEXT_MASK) >> CMD_IV_CONTEXT_SHIFT;
440
+ uint64_t addr = s->fifo[1];
441
+ MemTxResult dma_result;
442
+
443
+ if (!has_payload(s, 1)) {
444
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: No payload\n", __func__);
445
+ return false;
446
+ }
447
+
448
+ if (ctxt >= ARRAY_SIZE(s->iv)) {
449
+ qemu_log_mask(LOG_GUEST_ERROR,
450
+ "%s: Invalid context. ctxt = %u, allowed: 0..%zu\n",
451
+ __func__, ctxt, ARRAY_SIZE(s->iv) - 1);
452
+ return false;
453
+ }
454
+
455
+ addr |= ((uint64_t)cmd << 32) & 0xff00000000ULL;
456
+ dma_result = dma_memory_write(&address_space_memory, addr,
457
+ &s->iv[ctxt].iv, sizeof(s->iv[ctxt].iv),
458
+ MEMTXATTRS_UNSPECIFIED);
459
+
460
+ trace_aes_cmd_store_iv(ctxt, addr, s->iv[ctxt].iv[0], s->iv[ctxt].iv[1],
461
+ s->iv[ctxt].iv[2], s->iv[ctxt].iv[3]);
462
+
463
+ return dma_result == MEMTX_OK;
464
+}
465
+
466
+static bool cmd_flag(AESState *s)
467
+{
468
+ uint32_t cmd = s->fifo[0];
469
+ uint32_t raise_irq = cmd & CMD_FLAG_RAISE_IRQ_MASK;
470
+
471
+ /* We always process data when it's coming in, so fire an IRQ immediately */
472
+ if (raise_irq) {
473
+ s->irq_status |= REG_IRQ_STATUS_FLAG;
474
+ }
475
+
476
+ s->flag_info = cmd & CMD_FLAG_INFO_MASK;
477
+
478
+ trace_aes_cmd_flag(!!raise_irq, s->flag_info);
479
+
480
+ return true;
481
+}
482
+
483
+static void fifo_process(AESState *s)
484
+{
485
+ uint32_t cmd = s->fifo[0] >> CMD_SHIFT;
486
+ bool success = false;
487
+
488
+ if (!s->fifo_idx) {
489
+ return;
490
+ }
491
+
492
+ switch (cmd) {
493
+ case CMD_KEY:
494
+ success = cmd_key(s);
495
+ break;
496
+ case CMD_IV:
497
+ success = cmd_iv(s);
498
+ break;
499
+ case CMD_DATA:
500
+ success = cmd_data(s);
501
+ break;
502
+ case CMD_STORE_IV:
503
+ success = cmd_store_iv(s);
504
+ break;
505
+ case CMD_FLAG:
506
+ success = cmd_flag(s);
507
+ break;
508
+ default:
509
+ s->irq_status |= REG_IRQ_STATUS_INVALID_CMD;
510
+ break;
511
+ }
512
+
513
+ if (success) {
514
+ s->fifo_idx = 0;
515
+ }
516
+
517
+ trace_aes_fifo_process(cmd, success);
518
+}
519
+
520
+static void aes1_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
521
+{
522
+ AESState *s = opaque;
523
+
524
+ trace_aes_write(offset, val);
525
+
526
+ switch (offset) {
527
+ case REG_IRQ_STATUS:
528
+ s->irq_status &= ~val;
529
+ break;
530
+ case REG_IRQ_ENABLE:
531
+ s->irq_enable = val;
532
+ break;
533
+ case REG_FIFO:
534
+ fifo_append(s, val);
535
+ fifo_process(s);
536
+ break;
537
+ default:
538
+ qemu_log_mask(LOG_UNIMP,
539
+ "%s: Unknown AES MMIO offset %"PRIx64", data %"PRIx64"\n",
540
+ __func__, offset, val);
541
+ return;
542
+ }
543
+
544
+ aes_update_irq(s);
545
+}
546
+
547
+static const MemoryRegionOps aes1_ops = {
548
+ .read = aes1_read,
549
+ .write = aes1_write,
550
+ .endianness = DEVICE_NATIVE_ENDIAN,
551
+ .valid = {
552
+ .min_access_size = 4,
553
+ .max_access_size = 8,
554
+ },
555
+ .impl = {
556
+ .min_access_size = 4,
557
+ .max_access_size = 4,
558
+ },
559
+};
560
+
561
+static uint64_t aes2_read(void *opaque, hwaddr offset, unsigned size)
562
+{
563
+ uint64_t res = 0;
564
+
565
+ switch (offset) {
566
+ case 0:
567
+ res = 0;
568
+ break;
569
+ default:
570
+ qemu_log_mask(LOG_UNIMP,
571
+ "%s: Unknown AES MMIO 2 offset %"PRIx64"\n",
572
+ __func__, offset);
573
+ break;
574
+ }
575
+
576
+ trace_aes_2_read(offset, res);
577
+
578
+ return res;
579
+}
580
+
581
+static void aes2_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
582
+{
583
+ trace_aes_2_write(offset, val);
584
+
585
+ switch (offset) {
586
+ default:
587
+ qemu_log_mask(LOG_UNIMP,
588
+ "%s: Unknown AES MMIO 2 offset %"PRIx64", data %"PRIx64"\n",
589
+ __func__, offset, val);
590
+ return;
591
+ }
592
+}
593
+
594
+static const MemoryRegionOps aes2_ops = {
595
+ .read = aes2_read,
596
+ .write = aes2_write,
597
+ .endianness = DEVICE_NATIVE_ENDIAN,
598
+ .valid = {
599
+ .min_access_size = 4,
600
+ .max_access_size = 8,
601
+ },
602
+ .impl = {
603
+ .min_access_size = 4,
604
+ .max_access_size = 4,
605
+ },
606
+};
607
+
608
+static void aes_reset(Object *obj, ResetType type)
609
+{
610
+ AESState *s = APPLE_AES(obj);
611
+
612
+ s->status = 0x3f80;
613
+ s->q_status = 2;
614
+ s->irq_status = 0;
615
+ s->irq_enable = 0;
616
+ s->watermark = 0;
617
+}
618
+
619
+static void aes_init(Object *obj)
620
+{
621
+ AESState *s = APPLE_AES(obj);
622
+
623
+ memory_region_init_io(&s->iomem1, obj, &aes1_ops, s, TYPE_APPLE_AES, 0x4000);
624
+ memory_region_init_io(&s->iomem2, obj, &aes2_ops, s, TYPE_APPLE_AES, 0x4000);
625
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem1);
626
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem2);
627
+ sysbus_init_irq(SYS_BUS_DEVICE(s), &s->irq);
628
+ s->as = &address_space_memory;
629
+}
630
+
631
+static void aes_class_init(ObjectClass *klass, void *data)
632
+{
633
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
634
+
635
+ rc->phases.hold = aes_reset;
636
+}
637
+
638
+static const TypeInfo aes_info = {
639
+ .name = TYPE_APPLE_AES,
640
+ .parent = TYPE_SYS_BUS_DEVICE,
641
+ .instance_size = sizeof(AESState),
642
+ .class_init = aes_class_init,
643
+ .instance_init = aes_init,
644
+};
645
+
646
+static void aes_register_types(void)
647
+{
648
+ type_register_static(&aes_info);
649
+}
650
+
651
+type_init(aes_register_types)
652
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
653
index XXXXXXX..XXXXXXX 100644
654
--- a/hw/vmapple/meson.build
655
+++ b/hw/vmapple/meson.build
656
@@ -0,0 +1 @@
657
+system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c'))
658
diff --git a/hw/vmapple/trace-events b/hw/vmapple/trace-events
659
index XXXXXXX..XXXXXXX 100644
660
--- a/hw/vmapple/trace-events
661
+++ b/hw/vmapple/trace-events
662
@@ -XXX,XX +XXX,XX @@
663
# See docs/devel/tracing.rst for syntax documentation.
664
665
+# aes.c
666
+aes_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
667
+aes_cmd_key_select_builtin(uint32_t ctx, uint32_t key_id, const char *direction, const char *cipher) "[%d] Selecting builtin key %d to %scrypt with %s"
668
+aes_cmd_key_select_new(uint32_t ctx, uint32_t key_len, const char *direction, const char *cipher) "[%d] Selecting new key size=%d to %scrypt with %s"
669
+aes_cmd_iv(uint32_t ctx, uint32_t iv0, uint32_t iv1, uint32_t iv2, uint32_t iv3) "[%d] 0x%08x 0x%08x 0x%08x 0x%08x"
670
+aes_cmd_data(uint32_t key, uint32_t iv, uint64_t src, uint64_t dst, uint32_t len) "[key=%d iv=%d] src=0x%"PRIx64" dst=0x%"PRIx64" len=0x%x"
671
+aes_cmd_store_iv(uint32_t ctx, uint64_t addr, uint32_t iv0, uint32_t iv1, uint32_t iv2, uint32_t iv3) "[%d] addr=0x%"PRIx64"x -> 0x%08x 0x%08x 0x%08x 0x%08x"
672
+aes_cmd_flag(uint32_t raise, uint32_t flag_info) "raise=%d flag_info=0x%x"
673
+aes_fifo_process(uint32_t cmd, bool success) "cmd=%d success=%d"
674
+aes_write(uint64_t offset, uint64_t val) "offset=0x%"PRIx64" val=0x%"PRIx64
675
+aes_2_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
676
+aes_2_write(uint64_t offset, uint64_t val) "offset=0x%"PRIx64" val=0x%"PRIx64
677
+aes_dump_data(const char *desc, const char *hex) "%s%s"
678
+
679
diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h
680
new file mode 100644
681
index XXXXXXX..XXXXXXX
682
--- /dev/null
683
+++ b/include/hw/vmapple/vmapple.h
684
@@ -XXX,XX +XXX,XX @@
685
+/*
686
+ * Devices specific to the VMApple machine type
687
+ *
688
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
689
+ *
690
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
691
+ * See the COPYING file in the top-level directory.
692
+ *
693
+ * SPDX-License-Identifier: GPL-2.0-or-later
694
+ */
695
+
696
+#ifndef HW_VMAPPLE_VMAPPLE_H
697
+#define HW_VMAPPLE_VMAPPLE_H
698
+
699
+#define TYPE_APPLE_AES "apple-aes"
700
+
701
+#endif /* HW_VMAPPLE_VMAPPLE_H */
702
diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h
703
index XXXXXXX..XXXXXXX 100644
704
--- a/include/qemu/cutils.h
705
+++ b/include/qemu/cutils.h
706
@@ -XXX,XX +XXX,XX @@ GString *qemu_hexdump_line(GString *str, const void *buf, size_t len,
707
void qemu_hexdump(FILE *fp, const char *prefix,
708
const void *bufptr, size_t size);
709
710
+/**
711
+ * qemu_hexdump_to_buffer:
712
+ * @buffer: output string buffer
713
+ * @buffer_size: amount of available space in buffer. Must be at least
714
+ * data_size*2+1.
715
+ * @data: input bytes
716
+ * @data_size: number of bytes in data
717
+ *
718
+ * Converts the @data_size bytes in @data into hex digit pairs, writing them to
719
+ * @buffer. Finally, a nul terminating character is written; @buffer therefore
720
+ * needs space for (data_size*2+1) chars.
721
+ */
722
+void qemu_hexdump_to_buffer(char *restrict buffer, size_t buffer_size,
723
+ const uint8_t *restrict data, size_t data_size);
724
+
725
#endif
726
diff --git a/util/hexdump.c b/util/hexdump.c
727
index XXXXXXX..XXXXXXX 100644
728
--- a/util/hexdump.c
729
+++ b/util/hexdump.c
730
@@ -XXX,XX +XXX,XX @@
731
732
#include "qemu/osdep.h"
733
#include "qemu/cutils.h"
734
+#include "qemu/host-utils.h"
735
736
static inline char hexdump_nibble(unsigned x)
737
{
738
@@ -XXX,XX +XXX,XX @@ void qemu_hexdump(FILE *fp, const char *prefix,
739
}
740
741
}
742
+
743
+void qemu_hexdump_to_buffer(char *restrict buffer, size_t buffer_size,
744
+ const uint8_t *restrict data, size_t data_size)
745
+{
746
+ size_t i;
747
+ uint64_t required_buffer_size;
748
+ bool overflow = umul64_overflow(data_size, 2, &required_buffer_size);
749
+ overflow |= uadd64_overflow(required_buffer_size, 1, &required_buffer_size);
750
+ assert(!overflow && buffer_size >= required_buffer_size);
751
+
752
+ for (i = 0; i < data_size; i++) {
753
+ uint8_t val = data[i];
754
+ *(buffer++) = hexdump_nibble(val >> 4);
755
+ *(buffer++) = hexdump_nibble(val & 0xf);
756
+ }
757
+ *buffer = '\0';
758
+}
759
--
760
2.39.3 (Apple Git-145)
761
762
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
The VMApple machine exposes AUX and ROOT block devices (as well as USB OTG
4
emulation) via virtio-pci as well as a special, simple backdoor platform
5
device.
6
7
This patch implements this backdoor platform device to the best of my
8
understanding. I left out any USB OTG parts; they're only needed for
9
guest recovery and I don't understand the protocol yet.
10
11
Signed-off-by: Alexander Graf <graf@amazon.com>
12
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
13
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
14
---
15
16
v4:
17
18
* Moved most header code to .c, rest to vmapple.h
19
* Better compliance with coding, naming, and formatting conventions.
20
21
v8:
22
23
* Replaced uses of cpu_physical_memory_read with dma_memory_read.
24
* Replaced an instance of g_free with g_autofree.
25
26
v9:
27
28
* Replaced uses of cpu_physical_memory_write with dma_memory_write.
29
30
hw/vmapple/Kconfig | 3 +
31
hw/vmapple/bdif.c | 275 +++++++++++++++++++++++++++++++++++
32
hw/vmapple/meson.build | 1 +
33
hw/vmapple/trace-events | 5 +
34
include/hw/vmapple/vmapple.h | 2 +
35
5 files changed, 286 insertions(+)
36
create mode 100644 hw/vmapple/bdif.c
37
38
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
39
index XXXXXXX..XXXXXXX 100644
40
--- a/hw/vmapple/Kconfig
41
+++ b/hw/vmapple/Kconfig
42
@@ -XXX,XX +XXX,XX @@
43
config VMAPPLE_AES
44
bool
45
46
+config VMAPPLE_BDIF
47
+ bool
48
+
49
diff --git a/hw/vmapple/bdif.c b/hw/vmapple/bdif.c
50
new file mode 100644
51
index XXXXXXX..XXXXXXX
52
--- /dev/null
53
+++ b/hw/vmapple/bdif.c
54
@@ -XXX,XX +XXX,XX @@
55
+/*
56
+ * VMApple Backdoor Interface
57
+ *
58
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
59
+ *
60
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
61
+ * See the COPYING file in the top-level directory.
62
+ *
63
+ * SPDX-License-Identifier: GPL-2.0-or-later
64
+ */
65
+
66
+#include "qemu/osdep.h"
67
+#include "qemu/units.h"
68
+#include "qemu/log.h"
69
+#include "qemu/module.h"
70
+#include "trace.h"
71
+#include "hw/vmapple/vmapple.h"
72
+#include "hw/sysbus.h"
73
+#include "hw/block/block.h"
74
+#include "qapi/error.h"
75
+#include "sysemu/block-backend.h"
76
+#include "sysemu/dma.h"
77
+
78
+OBJECT_DECLARE_SIMPLE_TYPE(VMAppleBdifState, VMAPPLE_BDIF)
79
+
80
+struct VMAppleBdifState {
81
+ SysBusDevice parent_obj;
82
+
83
+ BlockBackend *aux;
84
+ BlockBackend *root;
85
+ MemoryRegion mmio;
86
+};
87
+
88
+#define VMAPPLE_BDIF_SIZE 0x00200000
89
+
90
+#define REG_DEVID_MASK 0xffff0000
91
+#define DEVID_ROOT 0x00000000
92
+#define DEVID_AUX 0x00010000
93
+#define DEVID_USB 0x00100000
94
+
95
+#define REG_STATUS 0x0
96
+#define REG_STATUS_ACTIVE BIT(0)
97
+#define REG_CFG 0x4
98
+#define REG_CFG_ACTIVE BIT(1)
99
+#define REG_UNK1 0x8
100
+#define REG_BUSY 0x10
101
+#define REG_BUSY_READY BIT(0)
102
+#define REG_UNK2 0x400
103
+#define REG_CMD 0x408
104
+#define REG_NEXT_DEVICE 0x420
105
+#define REG_UNK3 0x434
106
+
107
+typedef struct VblkSector {
108
+ uint32_t pad;
109
+ uint32_t pad2;
110
+ uint32_t sector;
111
+ uint32_t pad3;
112
+} VblkSector;
113
+
114
+typedef struct VblkReqCmd {
115
+ uint64_t addr;
116
+ uint32_t len;
117
+ uint32_t flags;
118
+} VblkReqCmd;
119
+
120
+typedef struct VblkReq {
121
+ VblkReqCmd sector;
122
+ VblkReqCmd data;
123
+ VblkReqCmd retval;
124
+} VblkReq;
125
+
126
+#define VBLK_DATA_FLAGS_READ 0x00030001
127
+#define VBLK_DATA_FLAGS_WRITE 0x00010001
128
+
129
+#define VBLK_RET_SUCCESS 0
130
+#define VBLK_RET_FAILED 1
131
+
132
+static uint64_t bdif_read(void *opaque, hwaddr offset, unsigned size)
133
+{
134
+ uint64_t ret = -1;
135
+ uint64_t devid = offset & REG_DEVID_MASK;
136
+
137
+ switch (offset & ~REG_DEVID_MASK) {
138
+ case REG_STATUS:
139
+ ret = REG_STATUS_ACTIVE;
140
+ break;
141
+ case REG_CFG:
142
+ ret = REG_CFG_ACTIVE;
143
+ break;
144
+ case REG_UNK1:
145
+ ret = 0x420;
146
+ break;
147
+ case REG_BUSY:
148
+ ret = REG_BUSY_READY;
149
+ break;
150
+ case REG_UNK2:
151
+ ret = 0x1;
152
+ break;
153
+ case REG_UNK3:
154
+ ret = 0x0;
155
+ break;
156
+ case REG_NEXT_DEVICE:
157
+ switch (devid) {
158
+ case DEVID_ROOT:
159
+ ret = 0x8000000;
160
+ break;
161
+ case DEVID_AUX:
162
+ ret = 0x10000;
163
+ break;
164
+ }
165
+ break;
166
+ }
167
+
168
+ trace_bdif_read(offset, size, ret);
169
+ return ret;
170
+}
171
+
172
+static void le2cpu_sector(VblkSector *sector)
173
+{
174
+ sector->sector = le32_to_cpu(sector->sector);
175
+}
176
+
177
+static void le2cpu_reqcmd(VblkReqCmd *cmd)
178
+{
179
+ cmd->addr = le64_to_cpu(cmd->addr);
180
+ cmd->len = le32_to_cpu(cmd->len);
181
+ cmd->flags = le32_to_cpu(cmd->flags);
182
+}
183
+
184
+static void le2cpu_req(VblkReq *req)
185
+{
186
+ le2cpu_reqcmd(&req->sector);
187
+ le2cpu_reqcmd(&req->data);
188
+ le2cpu_reqcmd(&req->retval);
189
+}
190
+
191
+static void vblk_cmd(uint64_t devid, BlockBackend *blk, uint64_t gp_addr,
192
+ uint64_t static_off)
193
+{
194
+ VblkReq req;
195
+ VblkSector sector;
196
+ uint64_t off = 0;
197
+ g_autofree char *buf = NULL;
198
+ uint8_t ret = VBLK_RET_FAILED;
199
+ int r;
200
+ MemTxResult dma_result;
201
+
202
+ dma_result = dma_memory_read(&address_space_memory, gp_addr,
203
+ &req, sizeof(req), MEMTXATTRS_UNSPECIFIED);
204
+ if (dma_result != MEMTX_OK) {
205
+ goto out;
206
+ }
207
+
208
+ le2cpu_req(&req);
209
+
210
+ if (req.sector.len != sizeof(sector)) {
211
+ goto out;
212
+ }
213
+
214
+ /* Read the vblk command */
215
+ dma_result = dma_memory_read(&address_space_memory, req.sector.addr,
216
+ &sector, sizeof(sector),
217
+ MEMTXATTRS_UNSPECIFIED);
218
+ if (dma_result != MEMTX_OK) {
219
+ goto out;
220
+ }
221
+ le2cpu_sector(&sector);
222
+
223
+ off = sector.sector * 512ULL + static_off;
224
+
225
+ /* Sanity check that we're not allocating bogus sizes */
226
+ if (req.data.len > 128 * MiB) {
227
+ goto out;
228
+ }
229
+
230
+ buf = g_malloc0(req.data.len);
231
+ switch (req.data.flags) {
232
+ case VBLK_DATA_FLAGS_READ:
233
+ r = blk_pread(blk, off, req.data.len, buf, 0);
234
+ trace_bdif_vblk_read(devid == DEVID_AUX ? "aux" : "root",
235
+ req.data.addr, off, req.data.len, r);
236
+ if (r < 0) {
237
+ goto out;
238
+ }
239
+ dma_result = dma_memory_write(&address_space_memory, req.data.addr, buf,
240
+ req.data.len, MEMTXATTRS_UNSPECIFIED);
241
+ if (dma_result == MEMTX_OK) {
242
+ ret = VBLK_RET_SUCCESS;
243
+ }
244
+ break;
245
+ case VBLK_DATA_FLAGS_WRITE:
246
+ /* Not needed, iBoot only reads */
247
+ break;
248
+ default:
249
+ break;
250
+ }
251
+
252
+out:
253
+ dma_memory_write(&address_space_memory, req.retval.addr, &ret, 1,
254
+ MEMTXATTRS_UNSPECIFIED);
255
+}
256
+
257
+static void bdif_write(void *opaque, hwaddr offset,
258
+ uint64_t value, unsigned size)
259
+{
260
+ VMAppleBdifState *s = opaque;
261
+ uint64_t devid = (offset & REG_DEVID_MASK);
262
+
263
+ trace_bdif_write(offset, size, value);
264
+
265
+ switch (offset & ~REG_DEVID_MASK) {
266
+ case REG_CMD:
267
+ switch (devid) {
268
+ case DEVID_ROOT:
269
+ vblk_cmd(devid, s->root, value, 0x0);
270
+ break;
271
+ case DEVID_AUX:
272
+ vblk_cmd(devid, s->aux, value, 0x0);
273
+ break;
274
+ }
275
+ break;
276
+ }
277
+}
278
+
279
+static const MemoryRegionOps bdif_ops = {
280
+ .read = bdif_read,
281
+ .write = bdif_write,
282
+ .endianness = DEVICE_NATIVE_ENDIAN,
283
+ .valid = {
284
+ .min_access_size = 1,
285
+ .max_access_size = 8,
286
+ },
287
+ .impl = {
288
+ .min_access_size = 1,
289
+ .max_access_size = 8,
290
+ },
291
+};
292
+
293
+static void bdif_init(Object *obj)
294
+{
295
+ VMAppleBdifState *s = VMAPPLE_BDIF(obj);
296
+
297
+ memory_region_init_io(&s->mmio, obj, &bdif_ops, obj,
298
+ "VMApple Backdoor Interface", VMAPPLE_BDIF_SIZE);
299
+ sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
300
+}
301
+
302
+static Property bdif_properties[] = {
303
+ DEFINE_PROP_DRIVE("aux", VMAppleBdifState, aux),
304
+ DEFINE_PROP_DRIVE("root", VMAppleBdifState, root),
305
+ DEFINE_PROP_END_OF_LIST(),
306
+};
307
+
308
+static void bdif_class_init(ObjectClass *klass, void *data)
309
+{
310
+ DeviceClass *dc = DEVICE_CLASS(klass);
311
+
312
+ dc->desc = "VMApple Backdoor Interface";
313
+ device_class_set_props(dc, bdif_properties);
314
+}
315
+
316
+static const TypeInfo bdif_info = {
317
+ .name = TYPE_VMAPPLE_BDIF,
318
+ .parent = TYPE_SYS_BUS_DEVICE,
319
+ .instance_size = sizeof(VMAppleBdifState),
320
+ .instance_init = bdif_init,
321
+ .class_init = bdif_class_init,
322
+};
323
+
324
+static void bdif_register_types(void)
325
+{
326
+ type_register_static(&bdif_info);
327
+}
328
+
329
+type_init(bdif_register_types)
330
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
331
index XXXXXXX..XXXXXXX 100644
332
--- a/hw/vmapple/meson.build
333
+++ b/hw/vmapple/meson.build
334
@@ -1 +1,2 @@
335
system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c'))
336
+system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c'))
337
diff --git a/hw/vmapple/trace-events b/hw/vmapple/trace-events
338
index XXXXXXX..XXXXXXX 100644
339
--- a/hw/vmapple/trace-events
340
+++ b/hw/vmapple/trace-events
341
@@ -XXX,XX +XXX,XX @@ aes_2_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
342
aes_2_write(uint64_t offset, uint64_t val) "offset=0x%"PRIx64" val=0x%"PRIx64
343
aes_dump_data(const char *desc, const char *hex) "%s%s"
344
345
+# bdif.c
346
+bdif_read(uint64_t offset, uint32_t size, uint64_t value) "offset=0x%"PRIx64" size=0x%x value=0x%"PRIx64
347
+bdif_write(uint64_t offset, uint32_t size, uint64_t value) "offset=0x%"PRIx64" size=0x%x value=0x%"PRIx64
348
+bdif_vblk_read(const char *dev, uint64_t addr, uint64_t offset, uint32_t len, int r) "dev=%s addr=0x%"PRIx64" off=0x%"PRIx64" size=0x%x r=%d"
349
+
350
diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h
351
index XXXXXXX..XXXXXXX 100644
352
--- a/include/hw/vmapple/vmapple.h
353
+++ b/include/hw/vmapple/vmapple.h
354
@@ -XXX,XX +XXX,XX @@
355
356
#define TYPE_APPLE_AES "apple-aes"
357
358
+#define TYPE_VMAPPLE_BDIF "vmapple-bdif"
359
+
360
#endif /* HW_VMAPPLE_VMAPPLE_H */
361
--
362
2.39.3 (Apple Git-145)
363
364
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
Instead of device tree or other more standardized means, VMApple passes
4
platform configuration to the first stage boot loader in a binary encoded
5
format that resides at a dedicated RAM region in physical address space.
6
7
This patch models this configuration space as a qdev device which we can
8
then map at the fixed location in the address space. That way, we can
9
influence and annotate all configuration fields easily.
10
11
Signed-off-by: Alexander Graf <graf@amazon.com>
12
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
13
---
14
15
v3:
16
17
* Replaced legacy device reset method with Resettable method
18
19
v4:
20
21
* Fixed initialisation of default values for properties
22
* Dropped superfluous endianness conversions
23
* Moved most header code to .c, device name #define goes in vmapple.h
24
25
v5:
26
27
* Improved error reporting in case of string property buffer overflow.
28
29
v7:
30
31
* Changed error messages for overrun of properties with
32
fixed-length strings to be more useful to users than developers.
33
34
v8:
35
36
* Consistent parenthesising of macro arguments for better safety.
37
38
v10:
39
40
* Slightly tidier error reporting for overlong property values.
41
42
hw/vmapple/Kconfig | 3 +
43
hw/vmapple/cfg.c | 196 +++++++++++++++++++++++++++++++++++
44
hw/vmapple/meson.build | 1 +
45
include/hw/vmapple/vmapple.h | 2 +
46
4 files changed, 202 insertions(+)
47
create mode 100644 hw/vmapple/cfg.c
48
49
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
50
index XXXXXXX..XXXXXXX 100644
51
--- a/hw/vmapple/Kconfig
52
+++ b/hw/vmapple/Kconfig
53
@@ -XXX,XX +XXX,XX @@ config VMAPPLE_AES
54
config VMAPPLE_BDIF
55
bool
56
57
+config VMAPPLE_CFG
58
+ bool
59
+
60
diff --git a/hw/vmapple/cfg.c b/hw/vmapple/cfg.c
61
new file mode 100644
62
index XXXXXXX..XXXXXXX
63
--- /dev/null
64
+++ b/hw/vmapple/cfg.c
65
@@ -XXX,XX +XXX,XX @@
66
+/*
67
+ * VMApple Configuration Region
68
+ *
69
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
70
+ *
71
+ * SPDX-License-Identifier: GPL-2.0-or-later
72
+ *
73
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
74
+ * See the COPYING file in the top-level directory.
75
+ */
76
+
77
+#include "qemu/osdep.h"
78
+#include "hw/vmapple/vmapple.h"
79
+#include "hw/sysbus.h"
80
+#include "qemu/log.h"
81
+#include "qemu/module.h"
82
+#include "qapi/error.h"
83
+#include "net/net.h"
84
+
85
+OBJECT_DECLARE_SIMPLE_TYPE(VMAppleCfgState, VMAPPLE_CFG)
86
+
87
+#define VMAPPLE_CFG_SIZE 0x00010000
88
+
89
+typedef struct VMAppleCfg {
90
+ uint32_t version; /* 0x000 */
91
+ uint32_t nr_cpus; /* 0x004 */
92
+ uint32_t unk1; /* 0x008 */
93
+ uint32_t unk2; /* 0x00c */
94
+ uint32_t unk3; /* 0x010 */
95
+ uint32_t unk4; /* 0x014 */
96
+ uint64_t ecid; /* 0x018 */
97
+ uint64_t ram_size; /* 0x020 */
98
+ uint32_t run_installer1; /* 0x028 */
99
+ uint32_t unk5; /* 0x02c */
100
+ uint32_t unk6; /* 0x030 */
101
+ uint32_t run_installer2; /* 0x034 */
102
+ uint32_t rnd; /* 0x038 */
103
+ uint32_t unk7; /* 0x03c */
104
+ MACAddr mac_en0; /* 0x040 */
105
+ uint8_t pad1[2];
106
+ MACAddr mac_en1; /* 0x048 */
107
+ uint8_t pad2[2];
108
+ MACAddr mac_wifi0; /* 0x050 */
109
+ uint8_t pad3[2];
110
+ MACAddr mac_bt0; /* 0x058 */
111
+ uint8_t pad4[2];
112
+ uint8_t reserved[0xa0]; /* 0x060 */
113
+ uint32_t cpu_ids[0x80]; /* 0x100 */
114
+ uint8_t scratch[0x200]; /* 0x180 */
115
+ char serial[32]; /* 0x380 */
116
+ char unk8[32]; /* 0x3a0 */
117
+ char model[32]; /* 0x3c0 */
118
+ uint8_t unk9[32]; /* 0x3e0 */
119
+ uint32_t unk10; /* 0x400 */
120
+ char soc_name[32]; /* 0x404 */
121
+} VMAppleCfg;
122
+
123
+struct VMAppleCfgState {
124
+ SysBusDevice parent_obj;
125
+ VMAppleCfg cfg;
126
+
127
+ MemoryRegion mem;
128
+ char *serial;
129
+ char *model;
130
+ char *soc_name;
131
+};
132
+
133
+static void vmapple_cfg_reset(Object *obj, ResetType type)
134
+{
135
+ VMAppleCfgState *s = VMAPPLE_CFG(obj);
136
+ VMAppleCfg *cfg;
137
+
138
+ cfg = memory_region_get_ram_ptr(&s->mem);
139
+ memset(cfg, 0, VMAPPLE_CFG_SIZE);
140
+ *cfg = s->cfg;
141
+}
142
+
143
+static bool set_fixlen_property_or_error(char *restrict dst,
144
+ const char *restrict src,
145
+ size_t dst_size, Error **errp,
146
+ const char *property_name)
147
+{
148
+ ERRP_GUARD();
149
+ size_t len;
150
+
151
+ len = g_strlcpy(dst, src, dst_size);
152
+ if (len < dst_size) { /* len does not count nul terminator */
153
+ return true;
154
+ }
155
+
156
+ error_setg(errp, "Provided value too long for property '%s'", property_name);
157
+ error_append_hint(errp, "length (%zu) exceeds maximum of %zu\n",
158
+ len, dst_size - 1);
159
+ return false;
160
+}
161
+
162
+#define set_fixlen_property_or_return(dst_array, src, errp, property_name) \
163
+ do { \
164
+ if (!set_fixlen_property_or_error((dst_array), (src), \
165
+ ARRAY_SIZE(dst_array), \
166
+ (errp), (property_name))) { \
167
+ return; \
168
+ } \
169
+ } while (0)
170
+
171
+static void vmapple_cfg_realize(DeviceState *dev, Error **errp)
172
+{
173
+ VMAppleCfgState *s = VMAPPLE_CFG(dev);
174
+ uint32_t i;
175
+
176
+ if (!s->serial) {
177
+ s->serial = g_strdup("1234");
178
+ }
179
+ if (!s->model) {
180
+ s->model = g_strdup("VM0001");
181
+ }
182
+ if (!s->soc_name) {
183
+ s->soc_name = g_strdup("Apple M1 (Virtual)");
184
+ }
185
+
186
+ set_fixlen_property_or_return(s->cfg.serial, s->serial, errp, "serial");
187
+ set_fixlen_property_or_return(s->cfg.model, s->model, errp, "model");
188
+ set_fixlen_property_or_return(s->cfg.soc_name, s->soc_name, errp, "soc_name");
189
+ set_fixlen_property_or_return(s->cfg.unk8, "D/A", errp, "unk8");
190
+ s->cfg.version = 2;
191
+ s->cfg.unk1 = 1;
192
+ s->cfg.unk2 = 1;
193
+ s->cfg.unk3 = 0x20;
194
+ s->cfg.unk4 = 0;
195
+ s->cfg.unk5 = 1;
196
+ s->cfg.unk6 = 1;
197
+ s->cfg.unk7 = 0;
198
+ s->cfg.unk10 = 1;
199
+
200
+ if (s->cfg.nr_cpus > ARRAY_SIZE(s->cfg.cpu_ids)) {
201
+ error_setg(errp,
202
+ "Failed to create %u CPUs, vmapple machine supports %zu max",
203
+ s->cfg.nr_cpus, ARRAY_SIZE(s->cfg.cpu_ids));
204
+ return;
205
+ }
206
+ for (i = 0; i < s->cfg.nr_cpus; i++) {
207
+ s->cfg.cpu_ids[i] = i;
208
+ }
209
+}
210
+
211
+static void vmapple_cfg_init(Object *obj)
212
+{
213
+ VMAppleCfgState *s = VMAPPLE_CFG(obj);
214
+
215
+ memory_region_init_ram(&s->mem, obj, "VMApple Config", VMAPPLE_CFG_SIZE,
216
+ &error_fatal);
217
+ sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mem);
218
+}
219
+
220
+static Property vmapple_cfg_properties[] = {
221
+ DEFINE_PROP_UINT32("nr-cpus", VMAppleCfgState, cfg.nr_cpus, 1),
222
+ DEFINE_PROP_UINT64("ecid", VMAppleCfgState, cfg.ecid, 0),
223
+ DEFINE_PROP_UINT64("ram-size", VMAppleCfgState, cfg.ram_size, 0),
224
+ DEFINE_PROP_UINT32("run_installer1", VMAppleCfgState, cfg.run_installer1, 0),
225
+ DEFINE_PROP_UINT32("run_installer2", VMAppleCfgState, cfg.run_installer2, 0),
226
+ DEFINE_PROP_UINT32("rnd", VMAppleCfgState, cfg.rnd, 0),
227
+ DEFINE_PROP_MACADDR("mac-en0", VMAppleCfgState, cfg.mac_en0),
228
+ DEFINE_PROP_MACADDR("mac-en1", VMAppleCfgState, cfg.mac_en1),
229
+ DEFINE_PROP_MACADDR("mac-wifi0", VMAppleCfgState, cfg.mac_wifi0),
230
+ DEFINE_PROP_MACADDR("mac-bt0", VMAppleCfgState, cfg.mac_bt0),
231
+ DEFINE_PROP_STRING("serial", VMAppleCfgState, serial),
232
+ DEFINE_PROP_STRING("model", VMAppleCfgState, model),
233
+ DEFINE_PROP_STRING("soc_name", VMAppleCfgState, soc_name),
234
+ DEFINE_PROP_END_OF_LIST(),
235
+};
236
+
237
+static void vmapple_cfg_class_init(ObjectClass *klass, void *data)
238
+{
239
+ DeviceClass *dc = DEVICE_CLASS(klass);
240
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
241
+
242
+ dc->realize = vmapple_cfg_realize;
243
+ dc->desc = "VMApple Configuration Region";
244
+ device_class_set_props(dc, vmapple_cfg_properties);
245
+ rc->phases.hold = vmapple_cfg_reset;
246
+}
247
+
248
+static const TypeInfo vmapple_cfg_info = {
249
+ .name = TYPE_VMAPPLE_CFG,
250
+ .parent = TYPE_SYS_BUS_DEVICE,
251
+ .instance_size = sizeof(VMAppleCfgState),
252
+ .instance_init = vmapple_cfg_init,
253
+ .class_init = vmapple_cfg_class_init,
254
+};
255
+
256
+static void vmapple_cfg_register_types(void)
257
+{
258
+ type_register_static(&vmapple_cfg_info);
259
+}
260
+
261
+type_init(vmapple_cfg_register_types)
262
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
263
index XXXXXXX..XXXXXXX 100644
264
--- a/hw/vmapple/meson.build
265
+++ b/hw/vmapple/meson.build
266
@@ -XXX,XX +XXX,XX @@
267
system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c'))
268
system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c'))
269
+system_ss.add(when: 'CONFIG_VMAPPLE_CFG', if_true: files('cfg.c'))
270
diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h
271
index XXXXXXX..XXXXXXX 100644
272
--- a/include/hw/vmapple/vmapple.h
273
+++ b/include/hw/vmapple/vmapple.h
274
@@ -XXX,XX +XXX,XX @@
275
276
#define TYPE_VMAPPLE_BDIF "vmapple-bdif"
277
278
+#define TYPE_VMAPPLE_CFG "vmapple-cfg"
279
+
280
#endif /* HW_VMAPPLE_VMAPPLE_H */
281
--
282
2.39.3 (Apple Git-145)
283
284
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
Apple has its own virtio-blk PCI device ID where it deviates from the
4
official virtio-pci spec slightly: It puts a new "apple type"
5
field at a static offset in config space and introduces a new barrier
6
command.
7
8
This patch first creates a mechanism for virtio-blk downstream classes to
9
handle unknown commands. It then creates such a downstream class and a new
10
vmapple-virtio-blk-pci class which support the additional apple type config
11
identifier as well as the barrier command.
12
13
The 'aux' or 'root' device type are selected using the 'variant' property.
14
15
Signed-off-by: Alexander Graf <graf@amazon.com>
16
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
17
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
18
---
19
20
v4:
21
22
* Use recommended object type declaration pattern.
23
* Correctly log unimplemented code paths.
24
* Most header code moved to .c, type name #defines moved to vmapple.h
25
26
v5:
27
28
* Corrected handling of potentially unaligned writes to virtio config area.
29
* Simplified passing through device variant type to subobject.
30
31
v9:
32
33
* Correctly specify class_size for VMAppleVirtIOBlkClass
34
35
v10:
36
37
* Folded v9 patch 16/16 into this one, changing the device type design to
38
provide a single device type with a variant property instead of 2 different
39
subtypes for aux and root volumes.
40
* Tidied up error reporting for the variant property.
41
42
hw/block/virtio-blk.c | 19 ++-
43
hw/core/qdev-properties-system.c | 8 ++
44
hw/vmapple/Kconfig | 3 +
45
hw/vmapple/meson.build | 1 +
46
hw/vmapple/virtio-blk.c | 205 ++++++++++++++++++++++++++++
47
include/hw/pci/pci_ids.h | 1 +
48
include/hw/qdev-properties-system.h | 5 +
49
include/hw/virtio/virtio-blk.h | 12 +-
50
include/hw/vmapple/vmapple.h | 2 +
51
qapi/virtio.json | 14 ++
52
10 files changed, 265 insertions(+), 5 deletions(-)
53
create mode 100644 hw/vmapple/virtio-blk.c
54
55
diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c
56
index XXXXXXX..XXXXXXX 100644
57
--- a/hw/block/virtio-blk.c
58
+++ b/hw/block/virtio-blk.c
59
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_init_request(VirtIOBlock *s, VirtQueue *vq,
60
req->mr_next = NULL;
61
}
62
63
-static void virtio_blk_free_request(VirtIOBlockReq *req)
64
+void virtio_blk_free_request(VirtIOBlockReq *req)
65
{
66
g_free(req);
67
}
68
69
-static void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status)
70
+void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status)
71
{
72
VirtIOBlock *s = req->dev;
73
VirtIODevice *vdev = VIRTIO_DEVICE(s);
74
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
75
break;
76
}
77
default:
78
- virtio_blk_req_complete(req, VIRTIO_BLK_S_UNSUPP);
79
- virtio_blk_free_request(req);
80
+ {
81
+ /*
82
+ * Give subclasses a chance to handle unknown requests. This way the
83
+ * class lookup is not in the hot path.
84
+ */
85
+ VirtIOBlkClass *vbk = VIRTIO_BLK_GET_CLASS(s);
86
+ if (!vbk->handle_unknown_request ||
87
+ !vbk->handle_unknown_request(req, mrb, type)) {
88
+ virtio_blk_req_complete(req, VIRTIO_BLK_S_UNSUPP);
89
+ virtio_blk_free_request(req);
90
+ }
91
+ }
92
}
93
return 0;
94
}
95
@@ -XXX,XX +XXX,XX @@ static const TypeInfo virtio_blk_info = {
96
.instance_size = sizeof(VirtIOBlock),
97
.instance_init = virtio_blk_instance_init,
98
.class_init = virtio_blk_class_init,
99
+ .class_size = sizeof(VirtIOBlkClass),
100
};
101
102
static void virtio_register_types(void)
103
diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-system.c
104
index XXXXXXX..XXXXXXX 100644
105
--- a/hw/core/qdev-properties-system.c
106
+++ b/hw/core/qdev-properties-system.c
107
@@ -XXX,XX +XXX,XX @@ const PropertyInfo qdev_prop_iothread_vq_mapping_list = {
108
.set = set_iothread_vq_mapping_list,
109
.release = release_iothread_vq_mapping_list,
110
};
111
+
112
+const PropertyInfo qdev_prop_vmapple_virtio_blk_variant = {
113
+ .name = "VMAppleVirtioBlkVariant",
114
+ .enum_table = &VMAppleVirtioBlkVariant_lookup,
115
+ .get = qdev_propinfo_get_enum,
116
+ .set = qdev_propinfo_set_enum,
117
+ .set_default_value = qdev_propinfo_set_default_value_enum,
118
+};
119
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
120
index XXXXXXX..XXXXXXX 100644
121
--- a/hw/vmapple/Kconfig
122
+++ b/hw/vmapple/Kconfig
123
@@ -XXX,XX +XXX,XX @@ config VMAPPLE_BDIF
124
config VMAPPLE_CFG
125
bool
126
127
+config VMAPPLE_VIRTIO_BLK
128
+ bool
129
+
130
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
131
index XXXXXXX..XXXXXXX 100644
132
--- a/hw/vmapple/meson.build
133
+++ b/hw/vmapple/meson.build
134
@@ -XXX,XX +XXX,XX @@
135
system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c'))
136
system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c'))
137
system_ss.add(when: 'CONFIG_VMAPPLE_CFG', if_true: files('cfg.c'))
138
+system_ss.add(when: 'CONFIG_VMAPPLE_VIRTIO_BLK', if_true: files('virtio-blk.c'))
139
diff --git a/hw/vmapple/virtio-blk.c b/hw/vmapple/virtio-blk.c
140
new file mode 100644
141
index XXXXXXX..XXXXXXX
142
--- /dev/null
143
+++ b/hw/vmapple/virtio-blk.c
144
@@ -XXX,XX +XXX,XX @@
145
+/*
146
+ * VMApple specific VirtIO Block implementation
147
+ *
148
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
149
+ *
150
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
151
+ * See the COPYING file in the top-level directory.
152
+ *
153
+ * SPDX-License-Identifier: GPL-2.0-or-later
154
+ *
155
+ * VMApple uses almost standard VirtIO Block, but with a few key differences:
156
+ *
157
+ * - Different PCI device/vendor ID
158
+ * - An additional "type" identifier to differentiate AUX and Root volumes
159
+ * - An additional BARRIER command
160
+ */
161
+
162
+#include "qemu/osdep.h"
163
+#include "hw/vmapple/vmapple.h"
164
+#include "hw/virtio/virtio-blk.h"
165
+#include "hw/virtio/virtio-pci.h"
166
+#include "qemu/bswap.h"
167
+#include "qemu/log.h"
168
+#include "qemu/module.h"
169
+#include "qapi/error.h"
170
+
171
+#define TYPE_VMAPPLE_VIRTIO_BLK "vmapple-virtio-blk"
172
+OBJECT_DECLARE_TYPE(VMAppleVirtIOBlk, VMAppleVirtIOBlkClass, VMAPPLE_VIRTIO_BLK)
173
+
174
+typedef struct VMAppleVirtIOBlkClass {
175
+ VirtIOBlkClass parent;
176
+
177
+ void (*get_config)(VirtIODevice *vdev, uint8_t *config);
178
+} VMAppleVirtIOBlkClass;
179
+
180
+typedef struct VMAppleVirtIOBlk {
181
+ VirtIOBlock parent_obj;
182
+
183
+ uint32_t apple_type;
184
+} VMAppleVirtIOBlk;
185
+
186
+/*
187
+ * vmapple-virtio-blk-pci: This extends VirtioPCIProxy.
188
+ */
189
+OBJECT_DECLARE_SIMPLE_TYPE(VMAppleVirtIOBlkPCI, VMAPPLE_VIRTIO_BLK_PCI)
190
+
191
+#define VIRTIO_BLK_T_APPLE_BARRIER 0x10000
192
+
193
+static bool vmapple_virtio_blk_handle_unknown_request(VirtIOBlockReq *req,
194
+ MultiReqBuffer *mrb,
195
+ uint32_t type)
196
+{
197
+ switch (type) {
198
+ case VIRTIO_BLK_T_APPLE_BARRIER:
199
+ qemu_log_mask(LOG_UNIMP, "%s: Barrier requests are currently no-ops\n",
200
+ __func__);
201
+ virtio_blk_req_complete(req, VIRTIO_BLK_S_OK);
202
+ virtio_blk_free_request(req);
203
+ return true;
204
+ default:
205
+ return false;
206
+ }
207
+}
208
+
209
+/*
210
+ * VMApple virtio-blk uses the same config format as normal virtio, with one
211
+ * exception: It adds an "apple type" specififer at the same location that
212
+ * the spec reserves for max_secure_erase_sectors. Let's hook into the
213
+ * get_config code path here, run it as usual and then patch in the apple type.
214
+ */
215
+static void vmapple_virtio_blk_get_config(VirtIODevice *vdev, uint8_t *config)
216
+{
217
+ VMAppleVirtIOBlk *dev = VMAPPLE_VIRTIO_BLK(vdev);
218
+ VMAppleVirtIOBlkClass *vvbk = VMAPPLE_VIRTIO_BLK_GET_CLASS(dev);
219
+ struct virtio_blk_config *blkcfg = (struct virtio_blk_config *)config;
220
+
221
+ vvbk->get_config(vdev, config);
222
+
223
+ g_assert(dev->parent_obj.config_size >= endof(struct virtio_blk_config, zoned));
224
+
225
+ /* Apple abuses the field for max_secure_erase_sectors as type id */
226
+ stl_he_p(&blkcfg->max_secure_erase_sectors, dev->apple_type);
227
+}
228
+
229
+static void vmapple_virtio_blk_class_init(ObjectClass *klass, void *data)
230
+{
231
+ VirtIOBlkClass *vbk = VIRTIO_BLK_CLASS(klass);
232
+ VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
233
+ VMAppleVirtIOBlkClass *vvbk = VMAPPLE_VIRTIO_BLK_CLASS(klass);
234
+
235
+ vbk->handle_unknown_request = vmapple_virtio_blk_handle_unknown_request;
236
+ vvbk->get_config = vdc->get_config;
237
+ vdc->get_config = vmapple_virtio_blk_get_config;
238
+}
239
+
240
+static const TypeInfo vmapple_virtio_blk_info = {
241
+ .name = TYPE_VMAPPLE_VIRTIO_BLK,
242
+ .parent = TYPE_VIRTIO_BLK,
243
+ .instance_size = sizeof(VMAppleVirtIOBlk),
244
+ .class_size = sizeof(VMAppleVirtIOBlkClass),
245
+ .class_init = vmapple_virtio_blk_class_init,
246
+};
247
+
248
+/* PCI Devices */
249
+
250
+struct VMAppleVirtIOBlkPCI {
251
+ VirtIOPCIProxy parent_obj;
252
+ VMAppleVirtIOBlk vdev;
253
+ VMAppleVirtioBlkVariant variant;
254
+};
255
+
256
+
257
+static Property vmapple_virtio_blk_pci_properties[] = {
258
+ DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
259
+ DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
260
+ VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
261
+ DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
262
+ DEV_NVECTORS_UNSPECIFIED),
263
+ DEFINE_PROP_VMAPPLE_VIRTIO_BLK_VARIANT("variant", VMAppleVirtIOBlkPCI, variant,
264
+ VM_APPLE_VIRTIO_BLK_VARIANT_UNSPECIFIED),
265
+ DEFINE_PROP_END_OF_LIST(),
266
+};
267
+
268
+static void vmapple_virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
269
+{
270
+ ERRP_GUARD();
271
+ VMAppleVirtIOBlkPCI *dev = VMAPPLE_VIRTIO_BLK_PCI(vpci_dev);
272
+ DeviceState *vdev = DEVICE(&dev->vdev);
273
+ VirtIOBlkConf *conf = &dev->vdev.parent_obj.conf;
274
+
275
+ if (dev->variant == VM_APPLE_VIRTIO_BLK_VARIANT_UNSPECIFIED) {
276
+ error_setg(errp, "vmapple virtio block device variant unspecified");
277
+ error_append_hint(errp,
278
+ "Variant property must be set to 'aux' or 'root'.\n"
279
+ "Use a regular virtio-blk-pci device instead when "
280
+ "neither is applicaple.\n");
281
+ return;
282
+ }
283
+
284
+ if (conf->num_queues == VIRTIO_BLK_AUTO_NUM_QUEUES) {
285
+ conf->num_queues = virtio_pci_optimal_num_queues(0);
286
+ }
287
+
288
+ if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
289
+ vpci_dev->nvectors = conf->num_queues + 1;
290
+ }
291
+
292
+ /*
293
+ * We don't support zones, but we need the additional config space size.
294
+ * Let's just expose the feature so the rest of the virtio-blk logic
295
+ * allocates enough space for us. The guest will ignore zones anyway.
296
+ */
297
+ virtio_add_feature(&dev->vdev.parent_obj.host_features, VIRTIO_BLK_F_ZONED);
298
+ /* Propagate the apple type down to the virtio-blk device */
299
+ dev->vdev.apple_type = dev->variant;
300
+ /* and spawn the virtio-blk device */
301
+ qdev_realize(vdev, BUS(&vpci_dev->bus), errp);
302
+
303
+ /*
304
+ * The virtio-pci machinery adjusts its vendor/device ID based on whether
305
+ * we support modern or legacy virtio. Let's patch it back to the Apple
306
+ * identifiers here.
307
+ */
308
+ pci_config_set_vendor_id(vpci_dev->pci_dev.config, PCI_VENDOR_ID_APPLE);
309
+ pci_config_set_device_id(vpci_dev->pci_dev.config,
310
+ PCI_DEVICE_ID_APPLE_VIRTIO_BLK);
311
+}
312
+
313
+static void vmapple_virtio_blk_pci_class_init(ObjectClass *klass, void *data)
314
+{
315
+ DeviceClass *dc = DEVICE_CLASS(klass);
316
+ VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
317
+ PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
318
+
319
+ set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
320
+ device_class_set_props(dc, vmapple_virtio_blk_pci_properties);
321
+ k->realize = vmapple_virtio_blk_pci_realize;
322
+ pcidev_k->vendor_id = PCI_VENDOR_ID_APPLE;
323
+ pcidev_k->device_id = PCI_DEVICE_ID_APPLE_VIRTIO_BLK;
324
+ pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
325
+ pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
326
+}
327
+
328
+static void vmapple_virtio_blk_pci_instance_init(Object *obj)
329
+{
330
+ VMAppleVirtIOBlkPCI *dev = VMAPPLE_VIRTIO_BLK_PCI(obj);
331
+
332
+ virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
333
+ TYPE_VMAPPLE_VIRTIO_BLK);
334
+}
335
+
336
+static const VirtioPCIDeviceTypeInfo vmapple_virtio_blk_pci_info = {
337
+ .generic_name = TYPE_VMAPPLE_VIRTIO_BLK_PCI,
338
+ .instance_size = sizeof(VMAppleVirtIOBlkPCI),
339
+ .instance_init = vmapple_virtio_blk_pci_instance_init,
340
+ .class_init = vmapple_virtio_blk_pci_class_init,
341
+};
342
+
343
+static void vmapple_virtio_blk_register_types(void)
344
+{
345
+ type_register_static(&vmapple_virtio_blk_info);
346
+ virtio_pci_types_register(&vmapple_virtio_blk_pci_info);
347
+}
348
+
349
+type_init(vmapple_virtio_blk_register_types)
350
diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h
351
index XXXXXXX..XXXXXXX 100644
352
--- a/include/hw/pci/pci_ids.h
353
+++ b/include/hw/pci/pci_ids.h
354
@@ -XXX,XX +XXX,XX @@
355
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020
356
#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b
357
#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021
358
+#define PCI_DEVICE_ID_APPLE_VIRTIO_BLK 0x1a00
359
360
#define PCI_VENDOR_ID_SUN 0x108e
361
#define PCI_DEVICE_ID_SUN_EBUS 0x1000
362
diff --git a/include/hw/qdev-properties-system.h b/include/hw/qdev-properties-system.h
363
index XXXXXXX..XXXXXXX 100644
364
--- a/include/hw/qdev-properties-system.h
365
+++ b/include/hw/qdev-properties-system.h
366
@@ -XXX,XX +XXX,XX @@ extern const PropertyInfo qdev_prop_pcie_link_speed;
367
extern const PropertyInfo qdev_prop_pcie_link_width;
368
extern const PropertyInfo qdev_prop_cpus390entitlement;
369
extern const PropertyInfo qdev_prop_iothread_vq_mapping_list;
370
+extern const PropertyInfo qdev_prop_vmapple_virtio_blk_variant;
371
372
#define DEFINE_PROP_PCI_DEVFN(_n, _s, _f, _d) \
373
DEFINE_PROP_SIGNED(_n, _s, _f, _d, qdev_prop_pci_devfn, int32_t)
374
@@ -XXX,XX +XXX,XX @@ extern const PropertyInfo qdev_prop_iothread_vq_mapping_list;
375
DEFINE_PROP(_name, _state, _field, qdev_prop_iothread_vq_mapping_list, \
376
IOThreadVirtQueueMappingList *)
377
378
+#define DEFINE_PROP_VMAPPLE_VIRTIO_BLK_VARIANT(_n, _s, _f, _d) \
379
+ DEFINE_PROP_SIGNED(_n, _s, _f, _d, qdev_prop_vmapple_virtio_blk_variant, \
380
+ VMAppleVirtioBlkVariant)
381
+
382
#endif
383
diff --git a/include/hw/virtio/virtio-blk.h b/include/hw/virtio/virtio-blk.h
384
index XXXXXXX..XXXXXXX 100644
385
--- a/include/hw/virtio/virtio-blk.h
386
+++ b/include/hw/virtio/virtio-blk.h
387
@@ -XXX,XX +XXX,XX @@
388
#include "qapi/qapi-types-virtio.h"
389
390
#define TYPE_VIRTIO_BLK "virtio-blk-device"
391
-OBJECT_DECLARE_SIMPLE_TYPE(VirtIOBlock, VIRTIO_BLK)
392
+OBJECT_DECLARE_TYPE(VirtIOBlock, VirtIOBlkClass, VIRTIO_BLK)
393
394
/* This is the last element of the write scatter-gather list */
395
struct virtio_blk_inhdr
396
@@ -XXX,XX +XXX,XX @@ typedef struct MultiReqBuffer {
397
bool is_write;
398
} MultiReqBuffer;
399
400
+typedef struct VirtIOBlkClass {
401
+ /*< private >*/
402
+ VirtioDeviceClass parent;
403
+ /*< public >*/
404
+ bool (*handle_unknown_request)(VirtIOBlockReq *req, MultiReqBuffer *mrb,
405
+ uint32_t type);
406
+} VirtIOBlkClass;
407
+
408
void virtio_blk_handle_vq(VirtIOBlock *s, VirtQueue *vq);
409
+void virtio_blk_free_request(VirtIOBlockReq *req);
410
+void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status);
411
412
#endif
413
diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h
414
index XXXXXXX..XXXXXXX 100644
415
--- a/include/hw/vmapple/vmapple.h
416
+++ b/include/hw/vmapple/vmapple.h
417
@@ -XXX,XX +XXX,XX @@
418
419
#define TYPE_VMAPPLE_CFG "vmapple-cfg"
420
421
+#define TYPE_VMAPPLE_VIRTIO_BLK_PCI "vmapple-virtio-blk-pci"
422
+
423
#endif /* HW_VMAPPLE_VMAPPLE_H */
424
diff --git a/qapi/virtio.json b/qapi/virtio.json
425
index XXXXXXX..XXXXXXX 100644
426
--- a/qapi/virtio.json
427
+++ b/qapi/virtio.json
428
@@ -XXX,XX +XXX,XX @@
429
##
430
{ 'enum': 'GranuleMode',
431
'data': [ '4k', '8k', '16k', '64k', 'host' ] }
432
+
433
+##
434
+# @VMAppleVirtioBlkVariant:
435
+#
436
+# @unspecified: The default, not a valid setting.
437
+#
438
+# @root: Block device holding the root volume
439
+#
440
+# @aux: Block device holding auxiliary data required for boot
441
+#
442
+# Since: 9.2
443
+##
444
+{ 'enum': 'VMAppleVirtioBlkVariant',
445
+ 'data': [ 'unspecified', 'root', 'aux' ] }
446
--
447
2.39.3 (Apple Git-145)
448
449
diff view generated by jsdifflib
Deleted patch
1
The virtio_blk_free_request() function has been a 1-liner forwarding
2
to g_free() for a while now. We may as well call g_free on the request
3
pointer directly.
4
1
5
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
6
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
7
---
8
hw/block/virtio-blk.c | 43 +++++++++++++++-------------------
9
hw/vmapple/virtio-blk.c | 2 +-
10
include/hw/virtio/virtio-blk.h | 1 -
11
3 files changed, 20 insertions(+), 26 deletions(-)
12
13
diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c
14
index XXXXXXX..XXXXXXX 100644
15
--- a/hw/block/virtio-blk.c
16
+++ b/hw/block/virtio-blk.c
17
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_init_request(VirtIOBlock *s, VirtQueue *vq,
18
req->mr_next = NULL;
19
}
20
21
-void virtio_blk_free_request(VirtIOBlockReq *req)
22
-{
23
- g_free(req);
24
-}
25
-
26
void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status)
27
{
28
VirtIOBlock *s = req->dev;
29
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_rw_error(VirtIOBlockReq *req, int error,
30
if (acct_failed) {
31
block_acct_failed(blk_get_stats(s->blk), &req->acct);
32
}
33
- virtio_blk_free_request(req);
34
+ g_free(req);
35
}
36
37
blk_error_action(s->blk, action, is_read, error);
38
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_rw_complete(void *opaque, int ret)
39
40
virtio_blk_req_complete(req, VIRTIO_BLK_S_OK);
41
block_acct_done(blk_get_stats(s->blk), &req->acct);
42
- virtio_blk_free_request(req);
43
+ g_free(req);
44
}
45
}
46
47
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_flush_complete(void *opaque, int ret)
48
49
virtio_blk_req_complete(req, VIRTIO_BLK_S_OK);
50
block_acct_done(blk_get_stats(s->blk), &req->acct);
51
- virtio_blk_free_request(req);
52
+ g_free(req);
53
}
54
55
static void virtio_blk_discard_write_zeroes_complete(void *opaque, int ret)
56
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_discard_write_zeroes_complete(void *opaque, int ret)
57
if (is_write_zeroes) {
58
block_acct_done(blk_get_stats(s->blk), &req->acct);
59
}
60
- virtio_blk_free_request(req);
61
+ g_free(req);
62
}
63
64
static VirtIOBlockReq *virtio_blk_get_request(VirtIOBlock *s, VirtQueue *vq)
65
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_handle_scsi(VirtIOBlockReq *req)
66
67
fail:
68
virtio_blk_req_complete(req, status);
69
- virtio_blk_free_request(req);
70
+ g_free(req);
71
}
72
73
static inline void submit_requests(VirtIOBlock *s, MultiReqBuffer *mrb,
74
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_zone_report_complete(void *opaque, int ret)
75
76
out:
77
virtio_blk_req_complete(req, err_status);
78
- virtio_blk_free_request(req);
79
+ g_free(req);
80
g_free(data->zone_report_data.zones);
81
g_free(data);
82
}
83
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_handle_zone_report(VirtIOBlockReq *req,
84
return;
85
out:
86
virtio_blk_req_complete(req, err_status);
87
- virtio_blk_free_request(req);
88
+ g_free(req);
89
}
90
91
static void virtio_blk_zone_mgmt_complete(void *opaque, int ret)
92
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_zone_mgmt_complete(void *opaque, int ret)
93
}
94
95
virtio_blk_req_complete(req, err_status);
96
- virtio_blk_free_request(req);
97
+ g_free(req);
98
}
99
100
static int virtio_blk_handle_zone_mgmt(VirtIOBlockReq *req, BlockZoneOp op)
101
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_zone_mgmt(VirtIOBlockReq *req, BlockZoneOp op)
102
return 0;
103
out:
104
virtio_blk_req_complete(req, err_status);
105
- virtio_blk_free_request(req);
106
+ g_free(req);
107
return err_status;
108
}
109
110
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_zone_append_complete(void *opaque, int ret)
111
112
out:
113
virtio_blk_req_complete(req, err_status);
114
- virtio_blk_free_request(req);
115
+ g_free(req);
116
g_free(data);
117
}
118
119
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_zone_append(VirtIOBlockReq *req,
120
121
out:
122
virtio_blk_req_complete(req, err_status);
123
- virtio_blk_free_request(req);
124
+ g_free(req);
125
return err_status;
126
}
127
128
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
129
virtio_blk_req_complete(req, VIRTIO_BLK_S_IOERR);
130
block_acct_invalid(blk_get_stats(s->blk),
131
is_write ? BLOCK_ACCT_WRITE : BLOCK_ACCT_READ);
132
- virtio_blk_free_request(req);
133
+ g_free(req);
134
return 0;
135
}
136
137
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
138
VIRTIO_BLK_ID_BYTES));
139
iov_from_buf(in_iov, in_num, 0, serial, size);
140
virtio_blk_req_complete(req, VIRTIO_BLK_S_OK);
141
- virtio_blk_free_request(req);
142
+ g_free(req);
143
break;
144
}
145
case VIRTIO_BLK_T_ZONE_APPEND & ~VIRTIO_BLK_T_OUT:
146
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
147
if (unlikely(!(type & VIRTIO_BLK_T_OUT) ||
148
out_len > sizeof(dwz_hdr))) {
149
virtio_blk_req_complete(req, VIRTIO_BLK_S_UNSUPP);
150
- virtio_blk_free_request(req);
151
+ g_free(req);
152
return 0;
153
}
154
155
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
156
is_write_zeroes);
157
if (err_status != VIRTIO_BLK_S_OK) {
158
virtio_blk_req_complete(req, err_status);
159
- virtio_blk_free_request(req);
160
+ g_free(req);
161
}
162
163
break;
164
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
165
if (!vbk->handle_unknown_request ||
166
!vbk->handle_unknown_request(req, mrb, type)) {
167
virtio_blk_req_complete(req, VIRTIO_BLK_S_UNSUPP);
168
- virtio_blk_free_request(req);
169
+ g_free(req);
170
}
171
}
172
}
173
@@ -XXX,XX +XXX,XX @@ void virtio_blk_handle_vq(VirtIOBlock *s, VirtQueue *vq)
174
while ((req = virtio_blk_get_request(s, vq))) {
175
if (virtio_blk_handle_request(req, &mrb)) {
176
virtqueue_detach_element(req->vq, &req->elem, 0);
177
- virtio_blk_free_request(req);
178
+ g_free(req);
179
break;
180
}
181
}
182
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_dma_restart_bh(void *opaque)
183
while (req) {
184
next = req->next;
185
virtqueue_detach_element(req->vq, &req->elem, 0);
186
- virtio_blk_free_request(req);
187
+ g_free(req);
188
req = next;
189
}
190
break;
191
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_reset(VirtIODevice *vdev)
192
/* No other threads can access req->vq here */
193
virtqueue_detach_element(req->vq, &req->elem, 0);
194
195
- virtio_blk_free_request(req);
196
+ g_free(req);
197
}
198
}
199
200
diff --git a/hw/vmapple/virtio-blk.c b/hw/vmapple/virtio-blk.c
201
index XXXXXXX..XXXXXXX 100644
202
--- a/hw/vmapple/virtio-blk.c
203
+++ b/hw/vmapple/virtio-blk.c
204
@@ -XXX,XX +XXX,XX @@ static bool vmapple_virtio_blk_handle_unknown_request(VirtIOBlockReq *req,
205
qemu_log_mask(LOG_UNIMP, "%s: Barrier requests are currently no-ops\n",
206
__func__);
207
virtio_blk_req_complete(req, VIRTIO_BLK_S_OK);
208
- virtio_blk_free_request(req);
209
+ g_free(req);
210
return true;
211
default:
212
return false;
213
diff --git a/include/hw/virtio/virtio-blk.h b/include/hw/virtio/virtio-blk.h
214
index XXXXXXX..XXXXXXX 100644
215
--- a/include/hw/virtio/virtio-blk.h
216
+++ b/include/hw/virtio/virtio-blk.h
217
@@ -XXX,XX +XXX,XX @@ typedef struct VirtIOBlkClass {
218
} VirtIOBlkClass;
219
220
void virtio_blk_handle_vq(VirtIOBlock *s, VirtQueue *vq);
221
-void virtio_blk_free_request(VirtIOBlockReq *req);
222
void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status);
223
224
#endif
225
--
226
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
Apple defines a new "vmapple" machine type as part of its proprietary
4
macOS Virtualization.Framework vmm. This machine type is similar to the
5
virt one, but with subtle differences in base devices, a few special
6
vmapple device additions and a vastly different boot chain.
7
8
This patch reimplements this machine type in QEMU. To use it, you
9
have to have a readily installed version of macOS for VMApple,
10
run on macOS with -accel hvf, pass the Virtualization.Framework
11
boot rom (AVPBooter) in via -bios, pass the aux and root volume as pflash
12
and pass aux and root volume as virtio drives. In addition, you also
13
need to find the machine UUID and pass that as -M vmapple,uuid= parameter:
14
15
$ qemu-system-aarch64 -accel hvf -M vmapple,uuid=0x1234 -m 4G \
16
-bios /System/Library/Frameworks/Virtualization.framework/Versions/A/Resources/AVPBooter.vmapple2.bin
17
-drive file=aux,if=pflash,format=raw \
18
-drive file=root,if=pflash,format=raw \
19
-drive file=aux,if=none,id=aux,format=raw \
20
-device vmapple-virtio-aux,drive=aux \
21
-drive file=root,if=none,id=root,format=raw \
22
-device vmapple-virtio-root,drive=root
23
24
With all these in place, you should be able to see macOS booting
25
successfully.
26
27
Known issues:
28
- Keyboard and mouse/tablet input is laggy. The reason for this is
29
either that macOS's XHCI driver is broken when the device/platform
30
does not support MSI/MSI-X, or there's some unfortunate interplay
31
with Qemu's XHCI implementation in this scenario.
32
- Currently only macOS 12 guests are supported. The boot process for
33
13+ will need further investigation and adjustment.
34
35
Signed-off-by: Alexander Graf <graf@amazon.com>
36
Co-authored-by: Phil Dennis-Jordan <phil@philjordan.eu>
37
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
38
---
39
40
v3:
41
* Rebased on latest upstream, updated affinity and NIC creation
42
API usage
43
* Included Apple-variant virtio-blk in build dependency
44
* Updated API usage for setting 'redist-region-count' array-typed property on GIC.
45
* Switched from virtio HID devices (for which macOS 12 does not contain
46
drivers) to an XHCI USB controller and USB HID devices.
47
48
v4:
49
* Fixups for v4 changes to the other patches in the set.
50
* Corrected the assert macro to use
51
* Removed superfluous endian conversions corresponding to cfg's.
52
* Init error handling improvement.
53
* No need to select CPU type on TCG, as only HVF is supported.
54
* Machine type version bumped to 9.2
55
* #include order improved
56
57
v5:
58
* Fixed memory reservation for ecam alias region.
59
* Better error handling setting properties on devices.
60
* Simplified the machine ECID/UUID extraction script and actually created a
61
file for it rather than quoting its code in documentation.
62
63
v7:
64
* Tiny error handling fix, un-inlined function.
65
66
v8:
67
* Use object_property_add_uint64_ptr rather than defining custom UUID
68
property get/set functions.
69
70
v9:
71
* Documentation improvements
72
* Fixed variable name and struct field used during pvpanic device creation.
73
74
v10:
75
* Documentation fixup for changed virtio-blk device type.
76
* Small improvements to shell commands in documentation.
77
* Improved propagation of errors during cfg device instantiation.
78
79
MAINTAINERS | 1 +
80
contrib/vmapple/uuid.sh | 9 +
81
docs/system/arm/vmapple.rst | 63 ++++
82
docs/system/target-arm.rst | 1 +
83
hw/vmapple/Kconfig | 20 ++
84
hw/vmapple/meson.build | 1 +
85
hw/vmapple/vmapple.c | 646 ++++++++++++++++++++++++++++++++++++
86
7 files changed, 741 insertions(+)
87
create mode 100755 contrib/vmapple/uuid.sh
88
create mode 100644 docs/system/arm/vmapple.rst
89
create mode 100644 hw/vmapple/vmapple.c
90
91
diff --git a/MAINTAINERS b/MAINTAINERS
92
index XXXXXXX..XXXXXXX 100644
93
--- a/MAINTAINERS
94
+++ b/MAINTAINERS
95
@@ -XXX,XX +XXX,XX @@ R: Phil Dennis-Jordan <phil@philjordan.eu>
96
S: Maintained
97
F: hw/vmapple/*
98
F: include/hw/vmapple/*
99
+F: docs/system/arm/vmapple.rst
100
101
Subsystems
102
----------
103
diff --git a/contrib/vmapple/uuid.sh b/contrib/vmapple/uuid.sh
104
new file mode 100755
105
index XXXXXXX..XXXXXXX
106
--- /dev/null
107
+++ b/contrib/vmapple/uuid.sh
108
@@ -XXX,XX +XXX,XX @@
109
+#!/bin/sh
110
+# Used for converting a guest provisioned using Virtualization.framework
111
+# for use with the QEMU 'vmapple' aarch64 machine type.
112
+#
113
+# Extracts the Machine UUID from Virtualization.framework VM JSON file.
114
+# (as produced by 'macosvm', passed as command line argument)
115
+
116
+plutil -extract machineId raw "$1" | base64 -d | plutil -extract ECID raw -
117
+
118
diff --git a/docs/system/arm/vmapple.rst b/docs/system/arm/vmapple.rst
119
new file mode 100644
120
index XXXXXXX..XXXXXXX
121
--- /dev/null
122
+++ b/docs/system/arm/vmapple.rst
123
@@ -XXX,XX +XXX,XX @@
124
+VMApple machine emulation
125
+========================================================================================
126
+
127
+VMApple is the device model that the macOS built-in hypervisor called "Virtualization.framework"
128
+exposes to Apple Silicon macOS guests. The "vmapple" machine model in QEMU implements the same
129
+device model, but does not use any code from Virtualization.Framework.
130
+
131
+Prerequisites
132
+-------------
133
+
134
+To run the vmapple machine model, you need to
135
+
136
+ * Run on Apple Silicon
137
+ * Run on macOS 12.0 or above
138
+ * Have an already installed copy of a Virtualization.Framework macOS 12 virtual
139
+ machine. Note that newer versions than 12.x are currently NOT supported on
140
+ the guest side. I will assume that you installed it using the
141
+ `macosvm <https://github.com/s-u/macosvm>` CLI.
142
+
143
+First, we need to extract the UUID from the virtual machine that you installed. You can do this
144
+by running the shell script in contrib/vmapple/uuid.sh on the macosvm.json file.
145
+
146
+.. code-block:: bash
147
+ :caption: uuid.sh script to extract the UUID from a macosvm.json file
148
+
149
+ $ contrib/vmapple/uuid.sh "path/to/macosvm.json"
150
+
151
+Now we also need to trim the aux partition. It contains metadata that we can just discard:
152
+
153
+.. code-block:: bash
154
+ :caption: Command to trim the aux file
155
+
156
+ $ dd if="aux.img" of="aux.img.trimmed" bs=$(( 0x4000 )) skip=1
157
+
158
+How to run
159
+----------
160
+
161
+Then, we can launch QEMU with the Virtualization.Framework pre-boot environment and the readily
162
+installed target disk images. I recommend to port forward the VM's ssh and vnc ports to the host
163
+to get better interactive access into the target system:
164
+
165
+.. code-block:: bash
166
+ :caption: Example execution command line
167
+
168
+ $ UUID=$(contrib/vmapple/uuid.sh macosvm.json)
169
+ $ AVPBOOTER=/System/Library/Frameworks/Virtualization.framework/Resources/AVPBooter.vmapple2.bin
170
+ $ AUX="aux.img.trimmed"
171
+ $ DISK=disk.img
172
+ $ qemu-system-aarch64 \
173
+ -serial mon:stdio \
174
+ -m 4G \
175
+ -accel hvf \
176
+ -M vmapple,uuid="$UUID" \
177
+ -bios "$AVPBOOTER" \
178
+ -drive file="$AUX",if=pflash,format=raw \
179
+ -drive file="$DISK",if=pflash,format=raw \
180
+ -drive file="$AUX",if=none,id=aux,format=raw \
181
+ -drive file="$DISK",if=none,id=root,format=raw \
182
+ -device vmapple-virtio-blk-pci,variant=aux,drive=aux \
183
+ -device vmapple-virtio-blk-pci,variant=root,drive=root \
184
+ -netdev user,id=net0,ipv6=off,hostfwd=tcp::2222-:22,hostfwd=tcp::5901-:5900 \
185
+ -device virtio-net-pci,netdev=net0
186
+
187
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
188
index XXXXXXX..XXXXXXX 100644
189
--- a/docs/system/target-arm.rst
190
+++ b/docs/system/target-arm.rst
191
@@ -XXX,XX +XXX,XX @@ Board-specific documentation
192
arm/stellaris
193
arm/stm32
194
arm/virt
195
+ arm/vmapple
196
arm/xenpvh
197
arm/xlnx-versal-virt
198
arm/xlnx-zynq
199
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
200
index XXXXXXX..XXXXXXX 100644
201
--- a/hw/vmapple/Kconfig
202
+++ b/hw/vmapple/Kconfig
203
@@ -XXX,XX +XXX,XX @@ config VMAPPLE_CFG
204
config VMAPPLE_VIRTIO_BLK
205
bool
206
207
+config VMAPPLE
208
+ bool
209
+ depends on ARM
210
+ depends on HVF
211
+ default y if ARM
212
+ imply PCI_DEVICES
213
+ select ARM_GIC
214
+ select PLATFORM_BUS
215
+ select PCI_EXPRESS
216
+ select PCI_EXPRESS_GENERIC_BRIDGE
217
+ select PL011 # UART
218
+ select PL031 # RTC
219
+ select PL061 # GPIO
220
+ select GPIO_PWR
221
+ select PVPANIC_MMIO
222
+ select VMAPPLE_AES
223
+ select VMAPPLE_BDIF
224
+ select VMAPPLE_CFG
225
+ select MAC_PVG_MMIO
226
+ select VMAPPLE_VIRTIO_BLK
227
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
228
index XXXXXXX..XXXXXXX 100644
229
--- a/hw/vmapple/meson.build
230
+++ b/hw/vmapple/meson.build
231
@@ -XXX,XX +XXX,XX @@ system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c'))
232
system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c'))
233
system_ss.add(when: 'CONFIG_VMAPPLE_CFG', if_true: files('cfg.c'))
234
system_ss.add(when: 'CONFIG_VMAPPLE_VIRTIO_BLK', if_true: files('virtio-blk.c'))
235
+specific_ss.add(when: 'CONFIG_VMAPPLE', if_true: files('vmapple.c'))
236
diff --git a/hw/vmapple/vmapple.c b/hw/vmapple/vmapple.c
237
new file mode 100644
238
index XXXXXXX..XXXXXXX
239
--- /dev/null
240
+++ b/hw/vmapple/vmapple.c
241
@@ -XXX,XX +XXX,XX @@
242
+/*
243
+ * VMApple machine emulation
244
+ *
245
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
246
+ *
247
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
248
+ * See the COPYING file in the top-level directory.
249
+ *
250
+ * SPDX-License-Identifier: GPL-2.0-or-later
251
+ *
252
+ * VMApple is the device model that the macOS built-in hypervisor called
253
+ * "Virtualization.framework" exposes to Apple Silicon macOS guests. The
254
+ * machine model in this file implements the same device model in QEMU, but
255
+ * does not use any code from Virtualization.Framework.
256
+ */
257
+
258
+#include "qemu/osdep.h"
259
+#include "qemu/bitops.h"
260
+#include "qemu/datadir.h"
261
+#include "qemu/error-report.h"
262
+#include "qemu/guest-random.h"
263
+#include "qemu/help-texts.h"
264
+#include "qemu/log.h"
265
+#include "qemu/module.h"
266
+#include "qemu/option.h"
267
+#include "qemu/units.h"
268
+#include "monitor/qdev.h"
269
+#include "hw/boards.h"
270
+#include "hw/irq.h"
271
+#include "hw/loader.h"
272
+#include "hw/qdev-properties.h"
273
+#include "hw/sysbus.h"
274
+#include "hw/usb.h"
275
+#include "hw/arm/boot.h"
276
+#include "hw/arm/primecell.h"
277
+#include "hw/char/pl011.h"
278
+#include "hw/intc/arm_gic.h"
279
+#include "hw/intc/arm_gicv3_common.h"
280
+#include "hw/misc/pvpanic.h"
281
+#include "hw/pci-host/gpex.h"
282
+#include "hw/usb/xhci.h"
283
+#include "hw/virtio/virtio-pci.h"
284
+#include "hw/vmapple/vmapple.h"
285
+#include "net/net.h"
286
+#include "qapi/error.h"
287
+#include "qapi/qmp/qlist.h"
288
+#include "qapi/visitor.h"
289
+#include "qapi/qapi-visit-common.h"
290
+#include "standard-headers/linux/input.h"
291
+#include "sysemu/hvf.h"
292
+#include "sysemu/kvm.h"
293
+#include "sysemu/reset.h"
294
+#include "sysemu/runstate.h"
295
+#include "sysemu/sysemu.h"
296
+#include "target/arm/internals.h"
297
+#include "target/arm/kvm_arm.h"
298
+
299
+struct VMAppleMachineClass {
300
+ MachineClass parent;
301
+};
302
+
303
+struct VMAppleMachineState {
304
+ MachineState parent;
305
+
306
+ Notifier machine_done;
307
+ struct arm_boot_info bootinfo;
308
+ MemMapEntry *memmap;
309
+ const int *irqmap;
310
+ DeviceState *gic;
311
+ DeviceState *cfg;
312
+ DeviceState *pvpanic;
313
+ Notifier powerdown_notifier;
314
+ PCIBus *bus;
315
+ MemoryRegion fw_mr;
316
+ MemoryRegion ecam_alias;
317
+ uint64_t uuid;
318
+};
319
+
320
+#define DEFINE_VMAPPLE_MACHINE_LATEST(major, minor, latest) \
321
+ static void vmapple##major##_##minor##_class_init(ObjectClass *oc, \
322
+ void *data) \
323
+ { \
324
+ MachineClass *mc = MACHINE_CLASS(oc); \
325
+ vmapple_machine_##major##_##minor##_options(mc); \
326
+ mc->desc = "QEMU " # major "." # minor " Apple Virtual Machine"; \
327
+ if (latest) { \
328
+ mc->alias = "vmapple"; \
329
+ } \
330
+ } \
331
+ static const TypeInfo machvmapple##major##_##minor##_info = { \
332
+ .name = MACHINE_TYPE_NAME("vmapple-" # major "." # minor), \
333
+ .parent = TYPE_VMAPPLE_MACHINE, \
334
+ .class_init = vmapple##major##_##minor##_class_init, \
335
+ }; \
336
+ static void machvmapple_machine_##major##_##minor##_init(void) \
337
+ { \
338
+ type_register_static(&machvmapple##major##_##minor##_info); \
339
+ } \
340
+ type_init(machvmapple_machine_##major##_##minor##_init);
341
+
342
+#define DEFINE_VMAPPLE_MACHINE_AS_LATEST(major, minor) \
343
+ DEFINE_VMAPPLE_MACHINE_LATEST(major, minor, true)
344
+#define DEFINE_VMAPPLE_MACHINE(major, minor) \
345
+ DEFINE_VMAPPLE_MACHINE_LATEST(major, minor, false)
346
+
347
+#define TYPE_VMAPPLE_MACHINE MACHINE_TYPE_NAME("vmapple")
348
+OBJECT_DECLARE_TYPE(VMAppleMachineState, VMAppleMachineClass, VMAPPLE_MACHINE)
349
+
350
+/* Number of external interrupt lines to configure the GIC with */
351
+#define NUM_IRQS 256
352
+
353
+enum {
354
+ VMAPPLE_FIRMWARE,
355
+ VMAPPLE_CONFIG,
356
+ VMAPPLE_MEM,
357
+ VMAPPLE_GIC_DIST,
358
+ VMAPPLE_GIC_REDIST,
359
+ VMAPPLE_UART,
360
+ VMAPPLE_RTC,
361
+ VMAPPLE_PCIE,
362
+ VMAPPLE_PCIE_MMIO,
363
+ VMAPPLE_PCIE_ECAM,
364
+ VMAPPLE_GPIO,
365
+ VMAPPLE_PVPANIC,
366
+ VMAPPLE_APV_GFX,
367
+ VMAPPLE_APV_IOSFC,
368
+ VMAPPLE_AES_1,
369
+ VMAPPLE_AES_2,
370
+ VMAPPLE_BDOOR,
371
+ VMAPPLE_MEMMAP_LAST,
372
+};
373
+
374
+static MemMapEntry memmap[] = {
375
+ [VMAPPLE_FIRMWARE] = { 0x00100000, 0x00100000 },
376
+ [VMAPPLE_CONFIG] = { 0x00400000, 0x00010000 },
377
+
378
+ [VMAPPLE_GIC_DIST] = { 0x10000000, 0x00010000 },
379
+ [VMAPPLE_GIC_REDIST] = { 0x10010000, 0x00400000 },
380
+
381
+ [VMAPPLE_UART] = { 0x20010000, 0x00010000 },
382
+ [VMAPPLE_RTC] = { 0x20050000, 0x00001000 },
383
+ [VMAPPLE_GPIO] = { 0x20060000, 0x00001000 },
384
+ [VMAPPLE_PVPANIC] = { 0x20070000, 0x00000002 },
385
+ [VMAPPLE_BDOOR] = { 0x30000000, 0x00200000 },
386
+ [VMAPPLE_APV_GFX] = { 0x30200000, 0x00010000 },
387
+ [VMAPPLE_APV_IOSFC] = { 0x30210000, 0x00010000 },
388
+ [VMAPPLE_AES_1] = { 0x30220000, 0x00004000 },
389
+ [VMAPPLE_AES_2] = { 0x30230000, 0x00004000 },
390
+ [VMAPPLE_PCIE_ECAM] = { 0x40000000, 0x10000000 },
391
+ [VMAPPLE_PCIE_MMIO] = { 0x50000000, 0x1fff0000 },
392
+
393
+ /* Actual RAM size depends on configuration */
394
+ [VMAPPLE_MEM] = { 0x70000000ULL, GiB},
395
+};
396
+
397
+static const int irqmap[] = {
398
+ [VMAPPLE_UART] = 1,
399
+ [VMAPPLE_RTC] = 2,
400
+ [VMAPPLE_GPIO] = 0x5,
401
+ [VMAPPLE_APV_IOSFC] = 0x10,
402
+ [VMAPPLE_APV_GFX] = 0x11,
403
+ [VMAPPLE_AES_1] = 0x12,
404
+ [VMAPPLE_PCIE] = 0x20,
405
+};
406
+
407
+#define GPEX_NUM_IRQS 16
408
+
409
+static void create_bdif(VMAppleMachineState *vms, MemoryRegion *mem)
410
+{
411
+ DeviceState *bdif;
412
+ SysBusDevice *bdif_sb;
413
+ DriveInfo *di_aux = drive_get(IF_PFLASH, 0, 0);
414
+ DriveInfo *di_root = drive_get(IF_PFLASH, 0, 1);
415
+
416
+ if (!di_aux) {
417
+ error_report("No AUX device. Please specify one as pflash drive.");
418
+ exit(1);
419
+ }
420
+
421
+ if (!di_root) {
422
+ /* Fall back to the first IF_VIRTIO device as root device */
423
+ di_root = drive_get(IF_VIRTIO, 0, 0);
424
+ }
425
+
426
+ if (!di_root) {
427
+ error_report("No root device. Please specify one as virtio drive.");
428
+ exit(1);
429
+ }
430
+
431
+ /* PV backdoor device */
432
+ bdif = qdev_new(TYPE_VMAPPLE_BDIF);
433
+ bdif_sb = SYS_BUS_DEVICE(bdif);
434
+ sysbus_mmio_map(bdif_sb, 0, vms->memmap[VMAPPLE_BDOOR].base);
435
+
436
+ qdev_prop_set_drive(DEVICE(bdif), "aux", blk_by_legacy_dinfo(di_aux));
437
+ qdev_prop_set_drive(DEVICE(bdif), "root", blk_by_legacy_dinfo(di_root));
438
+
439
+ sysbus_realize_and_unref(bdif_sb, &error_fatal);
440
+}
441
+
442
+static void create_pvpanic(VMAppleMachineState *vms, MemoryRegion *mem)
443
+{
444
+ SysBusDevice *pvpanic;
445
+
446
+ vms->pvpanic = qdev_new(TYPE_PVPANIC_MMIO_DEVICE);
447
+ pvpanic = SYS_BUS_DEVICE(vms->pvpanic);
448
+ sysbus_mmio_map(pvpanic, 0, vms->memmap[VMAPPLE_PVPANIC].base);
449
+
450
+ sysbus_realize_and_unref(pvpanic, &error_fatal);
451
+}
452
+
453
+static bool create_cfg(VMAppleMachineState *vms, MemoryRegion *mem,
454
+ Error **errp)
455
+{
456
+ ERRP_GUARD();
457
+ SysBusDevice *cfg;
458
+ MachineState *machine = MACHINE(vms);
459
+ uint32_t rnd = 1;
460
+
461
+ vms->cfg = qdev_new(TYPE_VMAPPLE_CFG);
462
+ cfg = SYS_BUS_DEVICE(vms->cfg);
463
+ sysbus_mmio_map(cfg, 0, vms->memmap[VMAPPLE_CONFIG].base);
464
+
465
+ qemu_guest_getrandom_nofail(&rnd, sizeof(rnd));
466
+
467
+ qdev_prop_set_uint32(vms->cfg, "nr-cpus", machine->smp.cpus);
468
+ qdev_prop_set_uint64(vms->cfg, "ecid", vms->uuid);
469
+ qdev_prop_set_uint64(vms->cfg, "ram-size", machine->ram_size);
470
+ qdev_prop_set_uint32(vms->cfg, "rnd", rnd);
471
+
472
+ if (!sysbus_realize_and_unref(cfg, errp)) {
473
+ error_prepend(errp, "Error creating vmapple cfg device: ");
474
+ return false;
475
+ }
476
+
477
+ return true;
478
+}
479
+
480
+static void create_gfx(VMAppleMachineState *vms, MemoryRegion *mem)
481
+{
482
+ int irq_gfx = vms->irqmap[VMAPPLE_APV_GFX];
483
+ int irq_iosfc = vms->irqmap[VMAPPLE_APV_IOSFC];
484
+ SysBusDevice *gfx;
485
+
486
+ gfx = SYS_BUS_DEVICE(qdev_new("apple-gfx-mmio"));
487
+ sysbus_mmio_map(gfx, 0, vms->memmap[VMAPPLE_APV_GFX].base);
488
+ sysbus_mmio_map(gfx, 1, vms->memmap[VMAPPLE_APV_IOSFC].base);
489
+ sysbus_connect_irq(gfx, 0, qdev_get_gpio_in(vms->gic, irq_gfx));
490
+ sysbus_connect_irq(gfx, 1, qdev_get_gpio_in(vms->gic, irq_iosfc));
491
+ sysbus_realize_and_unref(gfx, &error_fatal);
492
+}
493
+
494
+static void create_aes(VMAppleMachineState *vms, MemoryRegion *mem)
495
+{
496
+ int irq = vms->irqmap[VMAPPLE_AES_1];
497
+ SysBusDevice *aes;
498
+
499
+ aes = SYS_BUS_DEVICE(qdev_new(TYPE_APPLE_AES));
500
+ sysbus_mmio_map(aes, 0, vms->memmap[VMAPPLE_AES_1].base);
501
+ sysbus_mmio_map(aes, 1, vms->memmap[VMAPPLE_AES_2].base);
502
+ sysbus_connect_irq(aes, 0, qdev_get_gpio_in(vms->gic, irq));
503
+ sysbus_realize_and_unref(aes, &error_fatal);
504
+}
505
+
506
+static int arm_gic_ppi_index(int cpu_nr, int ppi_index)
507
+{
508
+ return NUM_IRQS + cpu_nr * GIC_INTERNAL + ppi_index;
509
+}
510
+
511
+static void create_gic(VMAppleMachineState *vms, MemoryRegion *mem)
512
+{
513
+ MachineState *ms = MACHINE(vms);
514
+ /* We create a standalone GIC */
515
+ SysBusDevice *gicbusdev;
516
+ QList *redist_region_count;
517
+ int i;
518
+ unsigned int smp_cpus = ms->smp.cpus;
519
+
520
+ vms->gic = qdev_new(gicv3_class_name());
521
+ qdev_prop_set_uint32(vms->gic, "revision", 3);
522
+ qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus);
523
+ /*
524
+ * Note that the num-irq property counts both internal and external
525
+ * interrupts; there are always 32 of the former (mandated by GIC spec).
526
+ */
527
+ qdev_prop_set_uint32(vms->gic, "num-irq", NUM_IRQS + 32);
528
+
529
+ uint32_t redist0_capacity =
530
+ vms->memmap[VMAPPLE_GIC_REDIST].size / GICV3_REDIST_SIZE;
531
+ uint32_t redist0_count = MIN(smp_cpus, redist0_capacity);
532
+
533
+ redist_region_count = qlist_new();
534
+ qlist_append_int(redist_region_count, redist0_count);
535
+ qdev_prop_set_array(vms->gic, "redist-region-count", redist_region_count);
536
+
537
+ gicbusdev = SYS_BUS_DEVICE(vms->gic);
538
+ sysbus_realize_and_unref(gicbusdev, &error_fatal);
539
+ sysbus_mmio_map(gicbusdev, 0, vms->memmap[VMAPPLE_GIC_DIST].base);
540
+ sysbus_mmio_map(gicbusdev, 1, vms->memmap[VMAPPLE_GIC_REDIST].base);
541
+
542
+ /*
543
+ * Wire the outputs from each CPU's generic timer and the GICv3
544
+ * maintenance interrupt signal to the appropriate GIC PPI inputs,
545
+ * and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs.
546
+ */
547
+ for (i = 0; i < smp_cpus; i++) {
548
+ DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
549
+
550
+ /* Map the virt timer to PPI 27 */
551
+ qdev_connect_gpio_out(cpudev, GTIMER_VIRT,
552
+ qdev_get_gpio_in(vms->gic,
553
+ arm_gic_ppi_index(i, 27)));
554
+
555
+ /* Map the GIC IRQ and FIQ lines to CPU */
556
+ sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
557
+ sysbus_connect_irq(gicbusdev, i + smp_cpus,
558
+ qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
559
+ }
560
+}
561
+
562
+static void create_uart(const VMAppleMachineState *vms, int uart,
563
+ MemoryRegion *mem, Chardev *chr)
564
+{
565
+ hwaddr base = vms->memmap[uart].base;
566
+ int irq = vms->irqmap[uart];
567
+ DeviceState *dev = qdev_new(TYPE_PL011);
568
+ SysBusDevice *s = SYS_BUS_DEVICE(dev);
569
+
570
+ qdev_prop_set_chr(dev, "chardev", chr);
571
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
572
+ memory_region_add_subregion(mem, base,
573
+ sysbus_mmio_get_region(s, 0));
574
+ sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq));
575
+}
576
+
577
+static void create_rtc(const VMAppleMachineState *vms)
578
+{
579
+ hwaddr base = vms->memmap[VMAPPLE_RTC].base;
580
+ int irq = vms->irqmap[VMAPPLE_RTC];
581
+
582
+ sysbus_create_simple("pl031", base, qdev_get_gpio_in(vms->gic, irq));
583
+}
584
+
585
+static DeviceState *gpio_key_dev;
586
+static void vmapple_powerdown_req(Notifier *n, void *opaque)
587
+{
588
+ /* use gpio Pin 3 for power button event */
589
+ qemu_set_irq(qdev_get_gpio_in(gpio_key_dev, 0), 1);
590
+}
591
+
592
+static void create_gpio_devices(const VMAppleMachineState *vms, int gpio,
593
+ MemoryRegion *mem)
594
+{
595
+ DeviceState *pl061_dev;
596
+ hwaddr base = vms->memmap[gpio].base;
597
+ int irq = vms->irqmap[gpio];
598
+ SysBusDevice *s;
599
+
600
+ pl061_dev = qdev_new("pl061");
601
+ /* Pull lines down to 0 if not driven by the PL061 */
602
+ qdev_prop_set_uint32(pl061_dev, "pullups", 0);
603
+ qdev_prop_set_uint32(pl061_dev, "pulldowns", 0xff);
604
+ s = SYS_BUS_DEVICE(pl061_dev);
605
+ sysbus_realize_and_unref(s, &error_fatal);
606
+ memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0));
607
+ sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq));
608
+ gpio_key_dev = sysbus_create_simple("gpio-key", -1,
609
+ qdev_get_gpio_in(pl061_dev, 3));
610
+}
611
+
612
+static void vmapple_firmware_init(VMAppleMachineState *vms,
613
+ MemoryRegion *sysmem)
614
+{
615
+ hwaddr size = vms->memmap[VMAPPLE_FIRMWARE].size;
616
+ hwaddr base = vms->memmap[VMAPPLE_FIRMWARE].base;
617
+ const char *bios_name;
618
+ int image_size;
619
+ char *fname;
620
+
621
+ bios_name = MACHINE(vms)->firmware;
622
+ if (!bios_name) {
623
+ error_report("No firmware specified");
624
+ exit(1);
625
+ }
626
+
627
+ fname = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
628
+ if (!fname) {
629
+ error_report("Could not find ROM image '%s'", bios_name);
630
+ exit(1);
631
+ }
632
+
633
+ memory_region_init_ram(&vms->fw_mr, NULL, "firmware", size, &error_fatal);
634
+ image_size = load_image_mr(fname, &vms->fw_mr);
635
+
636
+ g_free(fname);
637
+ if (image_size < 0) {
638
+ error_report("Could not load ROM image '%s'", bios_name);
639
+ exit(1);
640
+ }
641
+
642
+ memory_region_add_subregion(get_system_memory(), base, &vms->fw_mr);
643
+}
644
+
645
+static void create_pcie(VMAppleMachineState *vms)
646
+{
647
+ hwaddr base_mmio = vms->memmap[VMAPPLE_PCIE_MMIO].base;
648
+ hwaddr size_mmio = vms->memmap[VMAPPLE_PCIE_MMIO].size;
649
+ hwaddr base_ecam = vms->memmap[VMAPPLE_PCIE_ECAM].base;
650
+ hwaddr size_ecam = vms->memmap[VMAPPLE_PCIE_ECAM].size;
651
+ int irq = vms->irqmap[VMAPPLE_PCIE];
652
+ MemoryRegion *mmio_alias;
653
+ MemoryRegion *mmio_reg;
654
+ MemoryRegion *ecam_reg;
655
+ DeviceState *dev;
656
+ int i;
657
+ PCIHostState *pci;
658
+ DeviceState *usb_controller;
659
+ USBBus *usb_bus;
660
+
661
+ dev = qdev_new(TYPE_GPEX_HOST);
662
+ qdev_prop_set_uint32(dev, "num-irqs", GPEX_NUM_IRQS);
663
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
664
+
665
+ /* Map only the first size_ecam bytes of ECAM space */
666
+ ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
667
+ memory_region_init_alias(&vms->ecam_alias, OBJECT(dev), "pcie-ecam",
668
+ ecam_reg, 0, size_ecam);
669
+ memory_region_add_subregion(get_system_memory(), base_ecam,
670
+ &vms->ecam_alias);
671
+
672
+ /*
673
+ * Map the MMIO window from [0x50000000-0x7fff0000] in PCI space into
674
+ * system address space at [0x50000000-0x7fff0000].
675
+ */
676
+ mmio_alias = g_new0(MemoryRegion, 1);
677
+ mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
678
+ memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio",
679
+ mmio_reg, base_mmio, size_mmio);
680
+ memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias);
681
+
682
+ for (i = 0; i < GPEX_NUM_IRQS; i++) {
683
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
684
+ qdev_get_gpio_in(vms->gic, irq + i));
685
+ gpex_set_irq_num(GPEX_HOST(dev), i, irq + i);
686
+ }
687
+
688
+ pci = PCI_HOST_BRIDGE(dev);
689
+ vms->bus = pci->bus;
690
+ g_assert(vms->bus);
691
+
692
+ while ((dev = qemu_create_nic_device("virtio-net-pci", true, NULL))) {
693
+ qdev_realize_and_unref(dev, BUS(vms->bus), &error_fatal);
694
+ }
695
+
696
+ usb_controller = qdev_new(TYPE_QEMU_XHCI);
697
+ qdev_realize_and_unref(usb_controller, BUS(pci->bus), &error_fatal);
698
+
699
+ usb_bus = USB_BUS(object_resolve_type_unambiguous(TYPE_USB_BUS,
700
+ &error_fatal));
701
+ usb_create_simple(usb_bus, "usb-kbd");
702
+ usb_create_simple(usb_bus, "usb-tablet");
703
+}
704
+
705
+static void vmapple_reset(void *opaque)
706
+{
707
+ VMAppleMachineState *vms = opaque;
708
+ hwaddr base = vms->memmap[VMAPPLE_FIRMWARE].base;
709
+
710
+ cpu_set_pc(first_cpu, base);
711
+}
712
+
713
+static void mach_vmapple_init(MachineState *machine)
714
+{
715
+ VMAppleMachineState *vms = VMAPPLE_MACHINE(machine);
716
+ MachineClass *mc = MACHINE_GET_CLASS(machine);
717
+ const CPUArchIdList *possible_cpus;
718
+ MemoryRegion *sysmem = get_system_memory();
719
+ int n;
720
+ unsigned int smp_cpus = machine->smp.cpus;
721
+ unsigned int max_cpus = machine->smp.max_cpus;
722
+
723
+ vms->memmap = memmap;
724
+ machine->usb = true;
725
+
726
+ possible_cpus = mc->possible_cpu_arch_ids(machine);
727
+ assert(possible_cpus->len == max_cpus);
728
+ for (n = 0; n < possible_cpus->len; n++) {
729
+ Object *cpu;
730
+ CPUState *cs;
731
+
732
+ if (n >= smp_cpus) {
733
+ break;
734
+ }
735
+
736
+ cpu = object_new(possible_cpus->cpus[n].type);
737
+ object_property_set_int(cpu, "mp-affinity",
738
+ possible_cpus->cpus[n].arch_id, &error_fatal);
739
+
740
+ cs = CPU(cpu);
741
+ cs->cpu_index = n;
742
+
743
+ numa_cpu_pre_plug(&possible_cpus->cpus[cs->cpu_index], DEVICE(cpu),
744
+ &error_fatal);
745
+
746
+ if (object_property_find(cpu, "has_el3")) {
747
+ object_property_set_bool(cpu, "has_el3", false, &error_fatal);
748
+ }
749
+ if (object_property_find(cpu, "has_el2")) {
750
+ object_property_set_bool(cpu, "has_el2", false, &error_fatal);
751
+ }
752
+ object_property_set_int(cpu, "psci-conduit", QEMU_PSCI_CONDUIT_HVC,
753
+ &error_fatal);
754
+
755
+ /* Secondary CPUs start in PSCI powered-down state */
756
+ if (n > 0) {
757
+ object_property_set_bool(cpu, "start-powered-off", true,
758
+ &error_fatal);
759
+ }
760
+
761
+ object_property_set_link(cpu, "memory", OBJECT(sysmem), &error_abort);
762
+ qdev_realize(DEVICE(cpu), NULL, &error_fatal);
763
+ object_unref(cpu);
764
+ }
765
+
766
+ memory_region_add_subregion(sysmem, vms->memmap[VMAPPLE_MEM].base,
767
+ machine->ram);
768
+
769
+ create_gic(vms, sysmem);
770
+ create_bdif(vms, sysmem);
771
+ create_pvpanic(vms, sysmem);
772
+ create_aes(vms, sysmem);
773
+ create_gfx(vms, sysmem);
774
+ create_uart(vms, VMAPPLE_UART, sysmem, serial_hd(0));
775
+ create_rtc(vms);
776
+ create_pcie(vms);
777
+
778
+ create_gpio_devices(vms, VMAPPLE_GPIO, sysmem);
779
+
780
+ vmapple_firmware_init(vms, sysmem);
781
+ create_cfg(vms, sysmem, &error_fatal);
782
+
783
+ /* connect powerdown request */
784
+ vms->powerdown_notifier.notify = vmapple_powerdown_req;
785
+ qemu_register_powerdown_notifier(&vms->powerdown_notifier);
786
+
787
+ vms->bootinfo.ram_size = machine->ram_size;
788
+ vms->bootinfo.board_id = -1;
789
+ vms->bootinfo.loader_start = vms->memmap[VMAPPLE_MEM].base;
790
+ vms->bootinfo.skip_dtb_autoload = true;
791
+ vms->bootinfo.firmware_loaded = true;
792
+ arm_load_kernel(ARM_CPU(first_cpu), machine, &vms->bootinfo);
793
+
794
+ qemu_register_reset(vmapple_reset, vms);
795
+}
796
+
797
+static CpuInstanceProperties
798
+vmapple_cpu_index_to_props(MachineState *ms, unsigned cpu_index)
799
+{
800
+ MachineClass *mc = MACHINE_GET_CLASS(ms);
801
+ const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms);
802
+
803
+ assert(cpu_index < possible_cpus->len);
804
+ return possible_cpus->cpus[cpu_index].props;
805
+}
806
+
807
+
808
+static int64_t vmapple_get_default_cpu_node_id(const MachineState *ms, int idx)
809
+{
810
+ return idx % ms->numa_state->num_nodes;
811
+}
812
+
813
+static const CPUArchIdList *vmapple_possible_cpu_arch_ids(MachineState *ms)
814
+{
815
+ int n;
816
+ unsigned int max_cpus = ms->smp.max_cpus;
817
+
818
+ if (ms->possible_cpus) {
819
+ assert(ms->possible_cpus->len == max_cpus);
820
+ return ms->possible_cpus;
821
+ }
822
+
823
+ ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
824
+ sizeof(CPUArchId) * max_cpus);
825
+ ms->possible_cpus->len = max_cpus;
826
+ for (n = 0; n < ms->possible_cpus->len; n++) {
827
+ ms->possible_cpus->cpus[n].type = ms->cpu_type;
828
+ ms->possible_cpus->cpus[n].arch_id =
829
+ arm_build_mp_affinity(n, GICV3_TARGETLIST_BITS);
830
+ ms->possible_cpus->cpus[n].props.has_thread_id = true;
831
+ ms->possible_cpus->cpus[n].props.thread_id = n;
832
+ }
833
+ return ms->possible_cpus;
834
+}
835
+
836
+static void vmapple_machine_class_init(ObjectClass *oc, void *data)
837
+{
838
+ MachineClass *mc = MACHINE_CLASS(oc);
839
+
840
+ mc->init = mach_vmapple_init;
841
+ mc->max_cpus = 32;
842
+ mc->block_default_type = IF_VIRTIO;
843
+ mc->no_cdrom = 1;
844
+ mc->pci_allow_0_address = true;
845
+ mc->minimum_page_bits = 12;
846
+ mc->possible_cpu_arch_ids = vmapple_possible_cpu_arch_ids;
847
+ mc->cpu_index_to_instance_props = vmapple_cpu_index_to_props;
848
+ mc->default_cpu_type = ARM_CPU_TYPE_NAME("host");
849
+ mc->get_default_cpu_node_id = vmapple_get_default_cpu_node_id;
850
+ mc->default_ram_id = "mach-vmapple.ram";
851
+
852
+ object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy",
853
+ "on", true);
854
+}
855
+
856
+static void vmapple_instance_init(Object *obj)
857
+{
858
+ VMAppleMachineState *vms = VMAPPLE_MACHINE(obj);
859
+
860
+ vms->irqmap = irqmap;
861
+
862
+ object_property_add_uint64_ptr(obj, "uuid", &vms->uuid,
863
+ OBJ_PROP_FLAG_READWRITE);
864
+ object_property_set_description(obj, "uuid", "Machine UUID (SDOM)");
865
+}
866
+
867
+static const TypeInfo vmapple_machine_info = {
868
+ .name = TYPE_VMAPPLE_MACHINE,
869
+ .parent = TYPE_MACHINE,
870
+ .abstract = true,
871
+ .instance_size = sizeof(VMAppleMachineState),
872
+ .class_size = sizeof(VMAppleMachineClass),
873
+ .class_init = vmapple_machine_class_init,
874
+ .instance_init = vmapple_instance_init,
875
+};
876
+
877
+static void machvmapple_machine_init(void)
878
+{
879
+ type_register_static(&vmapple_machine_info);
880
+}
881
+type_init(machvmapple_machine_init);
882
+
883
+static void vmapple_machine_9_2_options(MachineClass *mc)
884
+{
885
+}
886
+DEFINE_VMAPPLE_MACHINE_AS_LATEST(9, 2)
887
+
888
--
889
2.39.3 (Apple Git-145)
890
891
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