On Tue, Nov 12, 2024 at 07:10:38PM +0100, Philippe Mathieu-Daudé wrote:
> Rather than accessing the registers within the mixed RAM/MMIO
> region as indexed register, declare a per-port TX_CTRL. This
> will help to map the RAM as RAM (keeping MMIO as MMIO) in few
> commits.
>
> Previous s->regs[R_TX_CTRL0] and s->regs[R_TX_CTRL1] are now
> unused. Not a concern, this array will soon disappear.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/net/xilinx_ethlite.c | 15 +++++++--------
> 1 file changed, 7 insertions(+), 8 deletions(-)
>
> diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
> index 1a3b295b4b..4d86851f38 100644
> --- a/hw/net/xilinx_ethlite.c
> +++ b/hw/net/xilinx_ethlite.c
> @@ -64,6 +64,7 @@ typedef struct XlnxXpsEthLitePort
> struct {
> uint32_t tx_len;
> uint32_t tx_gie;
> + uint32_t tx_ctrl;
>
> uint32_t rx_ctrl;
> } reg;
> @@ -139,7 +140,7 @@ eth_read(void *opaque, hwaddr addr, unsigned int size)
>
> case R_TX_CTRL1:
> case R_TX_CTRL0:
> - r = s->regs[addr];
> + r = s->port[port_index].reg.tx_ctrl;
> break;
>
> case R_RX_CTRL1:
> @@ -159,7 +160,6 @@ eth_write(void *opaque, hwaddr addr,
> {
> XlnxXpsEthLite *s = opaque;
> unsigned int port_index = addr_to_port_index(addr);
> - unsigned int base = 0;
> uint32_t value = val64;
>
> addr >>= 2;
> @@ -167,24 +167,23 @@ eth_write(void *opaque, hwaddr addr,
> {
> case R_TX_CTRL0:
> case R_TX_CTRL1:
> - if (addr == R_TX_CTRL1)
> - base = 0x800 / 4;
> -
> if ((value & (CTRL_P | CTRL_S)) == CTRL_S) {
> qemu_send_packet(qemu_get_queue(s->nic),
> txbuf_ptr(s, port_index),
> s->port[port_index].reg.tx_len);
> - if (s->regs[base + R_TX_CTRL0] & CTRL_I)
> + if (s->port[port_index].reg.tx_ctrl & CTRL_I) {
> eth_pulse_irq(s);
> + }
> } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) {
> memcpy(&s->conf.macaddr.a[0], txbuf_ptr(s, port_index), 6);
> - if (s->regs[base + R_TX_CTRL0] & CTRL_I)
> + if (s->port[port_index].reg.tx_ctrl & CTRL_I) {
> eth_pulse_irq(s);
> + }
> }
>
> /* We are fast and get ready pretty much immediately so
> we actually never flip the S nor P bits to one. */
> - s->regs[addr] = value & ~(CTRL_P | CTRL_S);
> + s->port[port_index].reg.tx_ctrl = value & ~(CTRL_P | CTRL_S);
> break;
>
> /* Keep these native. */
> --
> 2.45.2
>