On Tue, Nov 12, 2024 at 07:10:37PM +0100, Philippe Mathieu-Daudé wrote:
> Rather than accessing the registers within the mixed RAM/MMIO
> region as indexed register, declare a per-port TX_LEN. This
> will help to map the RAM as RAM (keeping MMIO as MMIO) in few
> commits.
>
> Previous s->regs[R_TX_LEN0] and s->regs[R_TX_LEN1] are now
> unused. Not a concern, this array will soon disappear.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/net/xilinx_ethlite.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
> index 4cb4781e70..1a3b295b4b 100644
> --- a/hw/net/xilinx_ethlite.c
> +++ b/hw/net/xilinx_ethlite.c
> @@ -62,6 +62,7 @@
> typedef struct XlnxXpsEthLitePort
> {
> struct {
> + uint32_t tx_len;
> uint32_t tx_gie;
>
> uint32_t rx_ctrl;
> @@ -133,6 +134,9 @@ eth_read(void *opaque, hwaddr addr, unsigned int size)
>
> case R_TX_LEN0:
> case R_TX_LEN1:
> + r = s->port[port_index].reg.tx_len;
> + break;
> +
> case R_TX_CTRL1:
> case R_TX_CTRL0:
> r = s->regs[addr];
> @@ -169,7 +173,7 @@ eth_write(void *opaque, hwaddr addr,
> if ((value & (CTRL_P | CTRL_S)) == CTRL_S) {
> qemu_send_packet(qemu_get_queue(s->nic),
> txbuf_ptr(s, port_index),
> - s->regs[base + R_TX_LEN0]);
> + s->port[port_index].reg.tx_len);
> if (s->regs[base + R_TX_CTRL0] & CTRL_I)
> eth_pulse_irq(s);
> } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) {
> @@ -194,7 +198,7 @@ eth_write(void *opaque, hwaddr addr,
>
> case R_TX_LEN0:
> case R_TX_LEN1:
> - s->regs[addr] = value;
> + s->port[port_index].reg.tx_len = value;
> break;
>
> case R_TX_GIE0:
> --
> 2.45.2
>