On Tue, Nov 12, 2024 at 07:10:33PM +0100, Philippe Mathieu-Daudé wrote:
> txbuf_ptr() points to the beginning of a (RAM) TX buffer
> within the device state.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
> ---
> hw/net/xilinx_ethlite.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
> index fe91891310..d4882f43f7 100644
> --- a/hw/net/xilinx_ethlite.c
> +++ b/hw/net/xilinx_ethlite.c
> @@ -87,12 +87,18 @@ static inline void eth_pulse_irq(XlnxXpsEthLite *s)
> }
> }
>
> -__attribute__((unused))
> static unsigned addr_to_port_index(hwaddr addr)
> {
> return extract64(addr, 11, 1);
> }
>
> +static void *txbuf_ptr(XlnxXpsEthLite *s, unsigned port_index)
> +{
> + unsigned int rxbase = port_index * (0x800 / 4);
> +
> + return &s->regs[rxbase + R_TX_BUF0];
> +}
> +
> static uint64_t
> eth_read(void *opaque, hwaddr addr, unsigned int size)
> {
> @@ -125,6 +131,7 @@ eth_write(void *opaque, hwaddr addr,
> uint64_t val64, unsigned int size)
> {
> XlnxXpsEthLite *s = opaque;
> + unsigned int port_index = addr_to_port_index(addr);
> unsigned int base = 0;
> uint32_t value = val64;
>
> @@ -138,12 +145,12 @@ eth_write(void *opaque, hwaddr addr,
>
> if ((value & (CTRL_P | CTRL_S)) == CTRL_S) {
> qemu_send_packet(qemu_get_queue(s->nic),
> - (void *) &s->regs[base],
> + txbuf_ptr(s, port_index),
> s->regs[base + R_TX_LEN0]);
> if (s->regs[base + R_TX_CTRL0] & CTRL_I)
> eth_pulse_irq(s);
> } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) {
> - memcpy(&s->conf.macaddr.a[0], &s->regs[base], 6);
> + memcpy(&s->conf.macaddr.a[0], txbuf_ptr(s, port_index), 6);
> if (s->regs[base + R_TX_CTRL0] & CTRL_I)
> eth_pulse_irq(s);
> }
> --
> 2.45.2
>