hw/arm/virt: Add support for user-creatable nested SMMUv3

[RFC PATCH 3/5] hw/arm/smmuv3: Associate a pci bus with a SMMUv3 Nested device

Posted by Shameer Kolothum via 2 weeks, 1 day ago

Subsequent patches will add IORT modifications to get this working.

Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
---
 hw/arm/smmuv3.c         | 27 +++++++++++++++++++++++++++
 include/hw/arm/smmuv3.h |  2 ++
 2 files changed, 29 insertions(+)

diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 0033eb8125..9b0a776769 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -24,6 +24,7 @@
 #include "hw/qdev-properties.h"
 #include "hw/qdev-core.h"
 #include "hw/pci/pci.h"
+#include "hw/pci/pci_bridge.h"
 #include "cpu.h"
 #include "trace.h"
 #include "qemu/log.h"
@@ -2201,12 +2202,32 @@ static void smmu_realize(DeviceState *d, Error **errp)
     smmu_init_irq(s, dev);
 }
 
+static int smmuv3_nested_pci_host_bridge(Object *obj, void *opaque)
+{
+    DeviceState *d = opaque;
+    SMMUv3NestedState *s_nested = ARM_SMMUV3_NESTED(d);
+
+    if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
+        PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
+        if (s_nested->pci_bus && !strcmp(bus->qbus.name, s_nested->pci_bus)) {
+            object_property_set_link(OBJECT(d), "primary-bus", OBJECT(bus),
+                                     &error_abort);
+        }
+    }
+    return 0;
+}
+
 static void smmu_nested_realize(DeviceState *d, Error **errp)
 {
     SMMUv3NestedState *s_nested = ARM_SMMUV3_NESTED(d);
     SMMUv3NestedClass *c = ARM_SMMUV3_NESTED_GET_CLASS(s_nested);
+    SysBusDevice *dev = SYS_BUS_DEVICE(d);
     Error *local_err = NULL;
 
+    object_child_foreach_recursive(object_get_root(),
+                                   smmuv3_nested_pci_host_bridge, d);
+    object_property_set_bool(OBJECT(dev), "nested", true, &error_abort);
+
     c->parent_realize(d, &local_err);
     if (local_err) {
         error_propagate(errp, local_err);
@@ -2293,6 +2314,11 @@ static Property smmuv3_properties[] = {
     DEFINE_PROP_END_OF_LIST()
 };
 
+static Property smmuv3_nested_properties[] = {
+    DEFINE_PROP_STRING("pci-bus", SMMUv3NestedState, pci_bus),
+    DEFINE_PROP_END_OF_LIST()
+};
+
 static void smmuv3_instance_init(Object *obj)
 {
     /* Nothing much to do here as of now */
@@ -2320,6 +2346,7 @@ static void smmuv3_nested_class_init(ObjectClass *klass, void *data)
     dc->vmsd = &vmstate_smmuv3;
     device_class_set_parent_realize(dc, smmu_nested_realize,
                                     &c->parent_realize);
+    device_class_set_props(dc, smmuv3_nested_properties);
     dc->user_creatable = true;
     dc->hotpluggable = false;
 }
diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
index 87e628be7a..96513fce56 100644
--- a/include/hw/arm/smmuv3.h
+++ b/include/hw/arm/smmuv3.h
@@ -89,6 +89,8 @@ OBJECT_DECLARE_TYPE(SMMUv3NestedState, SMMUv3NestedClass, ARM_SMMUV3_NESTED)
 
 struct SMMUv3NestedState {
     SMMUv3State smmuv3_state;
+
+    char *pci_bus;
 };
 
 struct SMMUv3NestedClass {
-- 
2.34.1

Re: [RFC PATCH 3/5] hw/arm/smmuv3: Associate a pci bus with a SMMUv3 Nested device

Posted by Eric Auger 1 week, 3 days ago

Hi Shameer,

On 11/8/24 13:52, Shameer Kolothum wrote:
> Subsequent patches will add IORT modifications to get this working.
add a proper commit msg once non RFC ;-)
>
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> ---
>  hw/arm/smmuv3.c         | 27 +++++++++++++++++++++++++++
>  include/hw/arm/smmuv3.h |  2 ++
>  2 files changed, 29 insertions(+)
>
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index 0033eb8125..9b0a776769 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -24,6 +24,7 @@
>  #include "hw/qdev-properties.h"
>  #include "hw/qdev-core.h"
>  #include "hw/pci/pci.h"
> +#include "hw/pci/pci_bridge.h"
>  #include "cpu.h"
>  #include "trace.h"
>  #include "qemu/log.h"
> @@ -2201,12 +2202,32 @@ static void smmu_realize(DeviceState *d, Error **errp)
>      smmu_init_irq(s, dev);
>  }
>  
> +static int smmuv3_nested_pci_host_bridge(Object *obj, void *opaque)
> +{
> +    DeviceState *d = opaque;
> +    SMMUv3NestedState *s_nested = ARM_SMMUV3_NESTED(d);
> +
> +    if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
> +        PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
> +        if (s_nested->pci_bus && !strcmp(bus->qbus.name, s_nested->pci_bus)) {
> +            object_property_set_link(OBJECT(d), "primary-bus", OBJECT(bus),
> +                                     &error_abort);
> +        }
> +    }
> +    return 0;
> +}
> +
>  static void smmu_nested_realize(DeviceState *d, Error **errp)
>  {
>      SMMUv3NestedState *s_nested = ARM_SMMUV3_NESTED(d);
>      SMMUv3NestedClass *c = ARM_SMMUV3_NESTED_GET_CLASS(s_nested);
> +    SysBusDevice *dev = SYS_BUS_DEVICE(d);
>      Error *local_err = NULL;
>  
> +    object_child_foreach_recursive(object_get_root(),
> +                                   smmuv3_nested_pci_host_bridge, d);
Using a different opaque struct pointer you may properly use the errp
and nicely fail if the bus is not found (avoid using error_abort).
> +    object_property_set_bool(OBJECT(dev), "nested", true, &error_abort);
why do you need that nested property as the SMMU is already type'd
differently.
> +
>      c->parent_realize(d, &local_err);
>      if (local_err) {
>          error_propagate(errp, local_err);
> @@ -2293,6 +2314,11 @@ static Property smmuv3_properties[] = {
>      DEFINE_PROP_END_OF_LIST()
>  };
>  
> +static Property smmuv3_nested_properties[] = {
> +    DEFINE_PROP_STRING("pci-bus", SMMUv3NestedState, pci_bus),
nit: maybe we can use the "bus" name instead of pci-bus
> +    DEFINE_PROP_END_OF_LIST()
> +};
> +
>  static void smmuv3_instance_init(Object *obj)
>  {
>      /* Nothing much to do here as of now */
> @@ -2320,6 +2346,7 @@ static void smmuv3_nested_class_init(ObjectClass *klass, void *data)
>      dc->vmsd = &vmstate_smmuv3;
>      device_class_set_parent_realize(dc, smmu_nested_realize,
>                                      &c->parent_realize);
> +    device_class_set_props(dc, smmuv3_nested_properties);
>      dc->user_creatable = true;
>      dc->hotpluggable = false;
>  }
> diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
> index 87e628be7a..96513fce56 100644
> --- a/include/hw/arm/smmuv3.h
> +++ b/include/hw/arm/smmuv3.h
> @@ -89,6 +89,8 @@ OBJECT_DECLARE_TYPE(SMMUv3NestedState, SMMUv3NestedClass, ARM_SMMUV3_NESTED)
>  
>  struct SMMUv3NestedState {
>      SMMUv3State smmuv3_state;
> +
> +    char *pci_bus;
>  };
>  
>  struct SMMUv3NestedClass {
Thanks

Eric

RE: [RFC PATCH 3/5] hw/arm/smmuv3: Associate a pci bus with a SMMUv3 Nested device

Posted by Shameerali Kolothum Thodi via 1 week, 2 days ago


> -----Original Message-----
> From: Eric Auger <eric.auger@redhat.com>
> Sent: Wednesday, November 13, 2024 5:59 PM
> To: Shameerali Kolothum Thodi
> <shameerali.kolothum.thodi@huawei.com>; qemu-arm@nongnu.org;
> qemu-devel@nongnu.org
> Cc: peter.maydell@linaro.org; jgg@nvidia.com; nicolinc@nvidia.com;
> ddutile@redhat.com; Linuxarm <linuxarm@huawei.com>; Wangzhou (B)
> <wangzhou1@hisilicon.com>; jiangkunkun <jiangkunkun@huawei.com>;
> Jonathan Cameron <jonathan.cameron@huawei.com>;
> zhangfei.gao@linaro.org
> Subject: Re: [RFC PATCH 3/5] hw/arm/smmuv3: Associate a pci bus with a
> SMMUv3 Nested device
> 
> Hi Shameer,
> 
> On 11/8/24 13:52, Shameer Kolothum wrote:
> > Subsequent patches will add IORT modifications to get this working.
> add a proper commit msg once non RFC ;-)
> >
> > Signed-off-by: Shameer Kolothum
> <shameerali.kolothum.thodi@huawei.com>
> > ---
> >  hw/arm/smmuv3.c         | 27 +++++++++++++++++++++++++++
> >  include/hw/arm/smmuv3.h |  2 ++
> >  2 files changed, 29 insertions(+)
> >
> > diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> > index 0033eb8125..9b0a776769 100644
> > --- a/hw/arm/smmuv3.c
> > +++ b/hw/arm/smmuv3.c
> > @@ -24,6 +24,7 @@
> >  #include "hw/qdev-properties.h"
> >  #include "hw/qdev-core.h"
> >  #include "hw/pci/pci.h"
> > +#include "hw/pci/pci_bridge.h"
> >  #include "cpu.h"
> >  #include "trace.h"
> >  #include "qemu/log.h"
> > @@ -2201,12 +2202,32 @@ static void smmu_realize(DeviceState *d,
> Error **errp)
> >      smmu_init_irq(s, dev);
> >  }
> >
> > +static int smmuv3_nested_pci_host_bridge(Object *obj, void *opaque)
> > +{
> > +    DeviceState *d = opaque;
> > +    SMMUv3NestedState *s_nested = ARM_SMMUV3_NESTED(d);
> > +
> > +    if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
> > +        PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
> > +        if (s_nested->pci_bus && !strcmp(bus->qbus.name, s_nested-
> >pci_bus)) {
> > +            object_property_set_link(OBJECT(d), "primary-bus", OBJECT(bus),
> > +                                     &error_abort);
> > +        }
> > +    }
> > +    return 0;
> > +}
> > +
> >  static void smmu_nested_realize(DeviceState *d, Error **errp)
> >  {
> >      SMMUv3NestedState *s_nested = ARM_SMMUV3_NESTED(d);
> >      SMMUv3NestedClass *c =
> ARM_SMMUV3_NESTED_GET_CLASS(s_nested);
> > +    SysBusDevice *dev = SYS_BUS_DEVICE(d);
> >      Error *local_err = NULL;
> >
> > +    object_child_foreach_recursive(object_get_root(),
> > +                                   smmuv3_nested_pci_host_bridge, d);
> Using a different opaque struct pointer you may properly use the errp
> and nicely fail if the bus is not found (avoid using error_abort).

Ok.

> > +    object_property_set_bool(OBJECT(dev), "nested", true, &error_abort);
> why do you need that nested property as the SMMU is already type'd
> differently.

I think it is because there are previous patches in Nicolin's branch that used this
"nested" property to differentiate the address pace. I will check and update.

> > +
> >      c->parent_realize(d, &local_err);
> >      if (local_err) {
> >          error_propagate(errp, local_err);
> > @@ -2293,6 +2314,11 @@ static Property smmuv3_properties[] = {
> >      DEFINE_PROP_END_OF_LIST()
> >  };
> >
> > +static Property smmuv3_nested_properties[] = {
> > +    DEFINE_PROP_STRING("pci-bus", SMMUv3NestedState, pci_bus),
> nit: maybe we can use the "bus" name instead of pci-bus

Ok.

Thanks,
Shameer

[RFC PATCH 1/5] hw/arm/virt: Add an SMMU_IO_LEN macro
[RFC PATCH 2/5] hw/arm/smmuv3: Add initial support for SMMUv3 Nested device
[RFC PATCH 3/5] hw/arm/smmuv3: Associate a pci bus with a SMMUv3 Nested device
[RFC PATCH 4/5] hw/arm/virt-acpi-build: Build IORT with multiple SMMU nodes
[RFC PATCH 5/5] hw/arm/virt-acpi-build: Add IORT RMR regions to handle MSI nested binding