[v2] Introduce svukte ISA extension

[PATCH v2 0/5] Introduce svukte ISA extension

Fea.Wang posted 5 patches 2 weeks, 1 day ago

Diff against v1 v3 v4
Download series mbox

There is a newer version of this series

target/riscv/cpu.c        |  2 ++
target/riscv/cpu_bits.h   |  2 ++
target/riscv/cpu_cfg.h    |  1 +
target/riscv/cpu_helper.c | 57 +++++++++++++++++++++++++++++++++++++++
target/riscv/csr.c        |  7 +++++
5 files changed, 69 insertions(+)

Expand all Fold all

[PATCH v2 0/5] Introduce svukte ISA extension

Posted by Fea.Wang 2 weeks, 1 day ago

The Svukte ISA extension has been approved for fast-track development.
https://lf-riscv.atlassian.net/browse/RVS-2977 
And there are Linux patches for the Svukte that are under review.
https://lore.kernel.org/kvm/20240920-dev-maxh-svukte-rebase-v1-0-7864a88a62bd@sifive.com/T/#mf70fcb22cd2987ad268c0efee9b8583197d3cb4f

Svukte provides a means to make user-mode accesses to supervisor memory
raise page faults in constant time, mitigating attacks that attempt to
discover the supervisor software's address-space layout.

Refer to the draft of svukte extension from:
https://github.com/riscv/riscv-isa-manual/pull/1564

* Refactor the code

base-commit: 27652f9ca9d831c67dd447346c6ee953669255f0

[v1]
* Add svukte extension

Fea.Wang (5):
  target/riscv: Add svukte extension capability variable
  target/riscv: Support senvcfg[UKTE] bit when svukte extension is
    enabled
  target/riscv: Support hstatus[HUKTE] bit when svukte extension is
    enabled
  target/riscv: Check memory access to meet svuket rule
  target/riscv: Expose svukte ISA extension

 target/riscv/cpu.c        |  2 ++
 target/riscv/cpu_bits.h   |  2 ++
 target/riscv/cpu_cfg.h    |  1 +
 target/riscv/cpu_helper.c | 57 +++++++++++++++++++++++++++++++++++++++
 target/riscv/csr.c        |  7 +++++
 5 files changed, 69 insertions(+)

-- 
2.34.1