1
<meta>
2
This patch series has been through months of review and
3
refinement. It now has end-to-end Reviewed-by: tags and
4
all code patches but one have Tested-by: tags. No significant
5
issues have been found via review for some weeks.
6
7
The patch set creates two new subsystems:
8
hw/display/apple-gfx
9
hw/vmapple
10
so it doesn't fall within the responsibility of existing
11
maintainers. How do we proceed to get this merged now that
12
10.0 development is open?
13
</meta>
14
15
1
This patch set introduces a new ARM and macOS HVF specific machine type
16
This patch set introduces a new ARM and macOS HVF specific machine type
2
called "vmapple", as well as a family of display devices based on the
17
called "vmapple", as well as a family of display devices based on the
3
ParavirtualizedGraphics.framework in macOS. One of the display adapter
18
ParavirtualizedGraphics.framework in macOS. One of the display adapter
4
variants, apple-gfx-mmio, is required for the new machine type, while
19
variants, apple-gfx-mmio, is required for the new machine type, while
5
apple-gfx-pci can be used to enable 3D graphics acceleration with x86-64
20
apple-gfx-pci can be used to enable 3D graphics acceleration with x86-64
...
...
31
hosts only because ParavirtualizedGraphics.framework is a black box
46
hosts only because ParavirtualizedGraphics.framework is a black box
32
implementing most of the logic behind the apple-gfx device.)
47
implementing most of the logic behind the apple-gfx device.)
33
* PCI devices use legacy IRQs, not MSI/MSI-X. As far as I can tell,
48
* PCI devices use legacy IRQs, not MSI/MSI-X. As far as I can tell,
34
we'd need to include the GICv3 ITS, but it's unclear to me what
49
we'd need to include the GICv3 ITS, but it's unclear to me what
35
exactly needs wiring up.
50
exactly needs wiring up.
36
* Due to lack of MSI(-X), event delivery from USB devices to the guest
51
* Due to a quirk (bug?) in the macOS XHCI driver when MSI-X is not
37
macOS isn't working correctly. My current conclusion is that the
52
available, correct functioning of the USB controller (and thus
38
OS's XHCI driver simply was never designed to work with legacy IRQs.
53
keyboard/tablet) requires a small workaround in the XHCI controller
39
The upshot is that keyboard and mouse/tablet input is very laggy.
54
device. This is part of another patch series:
40
The solution would be to implement MSI(-X) support or figure out how
55
https://patchew.org/QEMU/20241208191646.64857-1-phil@philjordan.eu/
41
to make hcd-xhci-sysbus work with the macOS guest, if at all possible.
42
(EHCI and UHCI/OHCI controllers are not an option as the VMAPPLE
43
guest kernel does not include drivers for these.)
44
* The guest OS must first be provisioned using Virtualization.framework;
56
* The guest OS must first be provisioned using Virtualization.framework;
45
the disk images can subsequently be used in Qemu. (See docs.)
57
the disk images can subsequently be used in Qemu. (See docs.)
46
58
47
The apple-gfx device can be used independently from the vmapple machine
59
The apple-gfx device can be used independently from the vmapple machine
48
type, at least in the PCI variant. It mainly targets x86-64 macOS guests
60
type, at least in the PCI variant. It mainly targets x86-64 macOS guests
...
...
69
CPU-based drawing. For maximum efficiency, the Metal texture
81
CPU-based drawing. For maximum efficiency, the Metal texture
70
containing the guest framebuffer could be drawn directly to
82
containing the guest framebuffer could be drawn directly to
71
a Metal view in the host window, staying on the GPU. (Similar
83
a Metal view in the host window, staying on the GPU. (Similar
72
to the OpenGL/virgl render path on other platforms.)
84
to the OpenGL/virgl render path on other platforms.)
73
85
74
My part of this work has been sponsored by Sauce Labs Inc.
86
Some of my part of this work has been sponsored by Sauce Labs Inc.
75
87
76
---
88
---
77
89
78
v2 -> v3:
90
v2 -> v3:
79
91
...
...
157
* 10/15 (vmapple/aes): Coding style tweaks.
169
* 10/15 (vmapple/aes): Coding style tweaks.
158
* 12/15 (vmapple/cfg): Changed error messages for overrun of properties with
170
* 12/15 (vmapple/cfg): Changed error messages for overrun of properties with
159
fixed-length strings to be more useful to users than developers.
171
fixed-length strings to be more useful to users than developers.
160
* 15/15 (vmapple machine type): Tiny error handling fix, un-inlined function
172
* 15/15 (vmapple machine type): Tiny error handling fix, un-inlined function
161
173
174
v7 -> v8:
175
176
* 02/15 (apple-gfx): Naming and type use improvements, fixes for a bug and a
177
leak.
178
* 04/15 (apple-gfx display mode property): Type use improvement
179
* 10/15 (vmapple/aes): Guest error logging tweaks.
180
* 11/15 (vmapple/bdif): Replaced uses of cpu_physical_memory_read with
181
dma_memory_read, and a g_free call with g_autofree.
182
* 12/15 (vmapple/cfg): Macro hygiene fix: consistently enclosing arguments in
183
parens.
184
* 15/15 (vmapple machine type): Use less verbose pattern for defining uuid
185
property.
186
187
v8 -> v9:
188
189
* 01/16 (ui & main loop): Set qemu_main to NULL for GTK UI as well.
190
* 02/16 (apple-gfx): Pass device pointer to graphic_console_init(), various
191
     non-functional changes.
192
* 03/16 (apple-gfx-pci): Fixup of changed common call, whitespace and comment
193
formatting tweaks.
194
* 04/16 (apple-gfx display modes): Re-ordered type definitions so we can drop
195
a 'struct' keyword.
196
* 10/16 (vmapple/aes): Replaced a use of cpu_physical_memory_write with
197
dma_memory_write, minor style tweak.
198
* 11/16 (vmapple/bdif): Replaced uses of cpu_physical_memory_write with
199
dma_memory_write.
200
* 13/16 (vmapple/virtio-blk): Correctly specify class_size for
201
VMAppleVirtIOBlkClass.
202
* 15/16 (vmapple machine type): Documentation improvements, fixed variable
203
name and struct field used during pvpanic device creation.
204
* 16/16 (NEW/RFC vmapple/virtio-blk): Proposed change to replace type hierarchy
205
with a variant property. This seems cleaner and less confusing than the
206
original approach to me, but I'm not sure if it warrants creation of a new
207
QAPI enum and property type definition.
208
209
v9 -> v10:
210
211
* 01/15 (ui & main loop): Added comments to qemu_main declaration and GTK.
212
* 02/15 (apple-gfx): Reworked the way frame rendering code is threaded to use
213
BHs for sections requiring BQL.
214
* 02/15 (apple-gfx): Fixed ./configure error on non-macOS platforms.
215
* 10/15 (vmapple/aes): Code style and comment improvements.
216
* 12/15 (vmapple/cfg): Slightly tidier error reporting for overlong property
217
values.
218
* 13/15 (vmapple/virtio-blk): Folded v9 patch 16/16 into this one, changing
219
the device type design to provide a single device type with a variant
220
     property instead of 2 different subtypes for aux and root volumes.
221
* 15/15 (vmapple machine type): Documentation fixup for changed virtio-blk
222
device type; small improvements to shell commands in documentation;
223
improved propagation of errors during cfg device instantiation.
224
225
v10 -> v11:
226
227
* 01/15 (ui & main loop): Simplified main.c, better comments & commit message
228
* 02/15 (apple-gfx): Give each PV display instance a unique serial number.
229
* 02 & 03/15 (apple-gfx, -pci): Formatting/style tweaks
230
* 15/15 (vmapple machine type): Improvements to shell code in docs
231
232
v11 -> v12:
233
234
* 01/15 (ui & main loop): More precise wording of code comments.
235
* 02/15 (apple-gfx): Fixed memory management regressions introduced in v10;
236
improved error handling; various more conmetic code adjustments
237
* 09/15 (GPEX): Fixed uses of deleted GPEX_NUM_IRQS constant that have been
238
added to QEMU since this patch was originally written.
239
240
v12 -> v13:
241
242
* 15/15 (vmapple machine type): Bumped the machine type version from 9.2
243
to 10.0.
244
* All patches in the series now have been positively reviewed and received
245
corresponding reviewed-by tags.
246
247
v13 -> v14:
248
249
* 6/15 (hw/vmapple directory): Changed myself from reviewer
250
to maintainer, as that seemed appropriate at this point.
251
* 15/15 (vmapple machine type): Gate creation of XHCI and
252
USB HID devices behind if (defaults_enabled()).
162
253
163
Alexander Graf (9):
254
Alexander Graf (9):
164
hw: Add vmapple subdir
255
hw: Add vmapple subdir
165
hw/misc/pvpanic: Add MMIO interface
256
hw/misc/pvpanic: Add MMIO interface
166
hvf: arm: Ignore writes to CNTP_CTL_EL0
257
hvf: arm: Ignore writes to CNTP_CTL_EL0
...
...
178
hw/display/apple-gfx: Adds PCI implementation
269
hw/display/apple-gfx: Adds PCI implementation
179
hw/display/apple-gfx: Adds configurable mode list
270
hw/display/apple-gfx: Adds configurable mode list
180
MAINTAINERS: Add myself as maintainer for apple-gfx, reviewer for HVF
271
MAINTAINERS: Add myself as maintainer for apple-gfx, reviewer for HVF
181
hw/block/virtio-blk: Replaces request free function with g_free
272
hw/block/virtio-blk: Replaces request free function with g_free
182
273
183
MAINTAINERS | 15 +
274
MAINTAINERS | 15 +
184
contrib/vmapple/uuid.sh | 9 +
275
contrib/vmapple/uuid.sh | 9 +
185
docs/system/arm/vmapple.rst | 60 +++
276
docs/system/arm/vmapple.rst | 63 ++
186
docs/system/target-arm.rst | 1 +
277
docs/system/target-arm.rst | 1 +
187
hw/Kconfig | 1 +
278
hw/Kconfig | 1 +
188
hw/arm/sbsa-ref.c | 2 +-
279
hw/arm/sbsa-ref.c | 2 +-
189
hw/arm/virt.c | 2 +-
280
hw/arm/virt.c | 2 +-
190
hw/block/virtio-blk.c | 58 ++-
281
hw/block/virtio-blk.c | 58 +-
191
hw/display/Kconfig | 13 +
282
hw/core/qdev-properties-system.c | 8 +
192
hw/display/apple-gfx-mmio.m | 289 +++++++++++
283
hw/display/Kconfig | 13 +
193
hw/display/apple-gfx-pci.m | 155 ++++++
284
hw/display/apple-gfx-mmio.m | 289 +++++++++
194
hw/display/apple-gfx.h | 77 +++
285
hw/display/apple-gfx-pci.m | 157 +++++
195
hw/display/apple-gfx.m | 868 +++++++++++++++++++++++++++++++++
286
hw/display/apple-gfx.h | 77 +++
196
hw/display/meson.build | 5 +
287
hw/display/apple-gfx.m | 880 ++++++++++++++++++++++++++++
197
hw/display/trace-events | 30 ++
288
hw/display/meson.build | 7 +
198
hw/i386/microvm.c | 2 +-
289
hw/display/trace-events | 30 +
199
hw/loongarch/virt.c | 2 +-
290
hw/i386/microvm.c | 2 +-
200
hw/meson.build | 1 +
291
hw/loongarch/virt.c | 12 +-
201
hw/mips/loongson3_virt.c | 2 +-
292
hw/meson.build | 1 +
202
hw/misc/Kconfig | 4 +
293
hw/mips/loongson3_virt.c | 2 +-
203
hw/misc/meson.build | 1 +
294
hw/misc/Kconfig | 4 +
204
hw/misc/pvpanic-mmio.c | 61 +++
295
hw/misc/meson.build | 1 +
205
hw/openrisc/virt.c | 12 +-
296
hw/misc/pvpanic-mmio.c | 61 ++
206
hw/pci-host/gpex.c | 43 +-
297
hw/openrisc/virt.c | 12 +-
207
hw/riscv/virt.c | 12 +-
298
hw/pci-host/gpex.c | 43 +-
208
hw/vmapple/Kconfig | 32 ++
299
hw/riscv/virt.c | 12 +-
209
hw/vmapple/aes.c | 578 ++++++++++++++++++++++
300
hw/vmapple/Kconfig | 32 +
210
hw/vmapple/bdif.c | 261 ++++++++++
301
hw/vmapple/aes.c | 581 ++++++++++++++++++
211
hw/vmapple/cfg.c | 196 ++++++++
302
hw/vmapple/bdif.c | 275 +++++++++
212
hw/vmapple/meson.build | 5 +
303
hw/vmapple/cfg.c | 196 +++++++
213
hw/vmapple/trace-events | 21 +
304
hw/vmapple/meson.build | 5 +
214
hw/vmapple/trace.h | 1 +
305
hw/vmapple/trace-events | 21 +
215
hw/vmapple/virtio-blk.c | 226 +++++++++
306
hw/vmapple/trace.h | 1 +
216
hw/vmapple/vmapple.c | 659 +++++++++++++++++++++++++
307
hw/vmapple/virtio-blk.c | 205 +++++++
217
hw/xtensa/virt.c | 2 +-
308
hw/vmapple/vmapple.c | 648 ++++++++++++++++++++
218
include/hw/misc/pvpanic.h | 1 +
309
hw/xen/xen-pvh-common.c | 2 +-
219
include/hw/pci-host/gpex.h | 7 +-
310
hw/xtensa/virt.c | 2 +-
220
include/hw/pci/pci_ids.h | 1 +
311
include/hw/misc/pvpanic.h | 1 +
221
include/hw/virtio/virtio-blk.h | 11 +-
312
include/hw/pci-host/gpex.h | 7 +-
222
include/hw/vmapple/vmapple.h | 25 +
313
include/hw/pci/pci_ids.h | 1 +
223
include/qemu-main.h | 3 +-
314
include/hw/qdev-properties-system.h | 5 +
224
include/qemu/cutils.h | 15 +
315
include/hw/virtio/virtio-blk.h | 11 +-
225
include/qemu/typedefs.h | 1 +
316
include/hw/vmapple/vmapple.h | 23 +
226
meson.build | 5 +
317
include/qemu-main.h | 14 +-
227
system/main.c | 50 +-
318
include/qemu/cutils.h | 15 +
228
target/arm/hvf/hvf.c | 9 +
319
meson.build | 5 +
229
ui/cocoa.m | 54 +-
320
qapi/virtio.json | 14 +
230
ui/sdl2.c | 4 +
321
system/main.c | 37 +-
231
util/hexdump.c | 18 +
322
target/arm/hvf/hvf.c | 9 +
232
49 files changed, 3804 insertions(+), 106 deletions(-)
323
ui/cocoa.m | 54 +-
324
ui/gtk.c | 4 +
325
ui/sdl2.c | 4 +
326
util/hexdump.c | 18 +
327
53 files changed, 3842 insertions(+), 110 deletions(-)
233
create mode 100755 contrib/vmapple/uuid.sh
328
create mode 100755 contrib/vmapple/uuid.sh
234
create mode 100644 docs/system/arm/vmapple.rst
329
create mode 100644 docs/system/arm/vmapple.rst
235
create mode 100644 hw/display/apple-gfx-mmio.m
330
create mode 100644 hw/display/apple-gfx-mmio.m
236
create mode 100644 hw/display/apple-gfx-pci.m
331
create mode 100644 hw/display/apple-gfx-pci.m
237
create mode 100644 hw/display/apple-gfx.h
332
create mode 100644 hw/display/apple-gfx.h
...
...
247
create mode 100644 hw/vmapple/virtio-blk.c
342
create mode 100644 hw/vmapple/virtio-blk.c
248
create mode 100644 hw/vmapple/vmapple.c
343
create mode 100644 hw/vmapple/vmapple.c
249
create mode 100644 include/hw/vmapple/vmapple.h
344
create mode 100644 include/hw/vmapple/vmapple.h
250
345
251
--
346
--
252
2.39.3 (Apple Git-145)
347
2.39.5 (Apple Git-154)
253
348
254
349
diff view generated by jsdifflib
Deleted patch
1
macOS's Cocoa event handling must be done on the initial (main) thread
2
of the process. Furthermore, if library or application code uses
3
libdispatch, the main dispatch queue must be handling events on the main
4
thread as well.
5
1
6
So far, this has affected Qemu in both the Cocoa and SDL UIs, although
7
in different ways: the Cocoa UI replaces the default qemu_main function
8
with one that spins Qemu's internal main event loop off onto a
9
background thread. SDL (which uses Cocoa internally) on the other hand
10
uses a polling approach within Qemu's main event loop. Events are
11
polled during the SDL UI's dpy_refresh callback, which happens to run
12
on the main thread by default.
13
14
As UIs are mutually exclusive, this works OK as long as nothing else
15
needs platform-native event handling. In the next patch, a new device is
16
introduced based on the ParavirtualizedGraphics.framework in macOS.
17
This uses libdispatch internally, and only works when events are being
18
handled on the main runloop. With the current system, it works when
19
using either the Cocoa or the SDL UI. However, it does not when running
20
headless. Moreover, any attempt to install a similar scheme to the
21
Cocoa UI's main thread replacement fails when combined with the SDL
22
UI.
23
24
This change tidies up main thread management to be more flexible.
25
26
* The qemu_main global function pointer is a custom function for the
27
main thread, and it may now be NULL. When it is, the main thread
28
runs the main Qemu loop. This represents the traditional setup.
29
* When non-null, spawning the main Qemu event loop on a separate
30
thread is now done centrally rather than inside the Cocoa UI code.
31
* For most platforms, qemu_main is indeed NULL by default, but on
32
Darwin, it defaults to a function that runs the CFRunLoop.
33
* The Cocoa UI sets qemu_main to a function which runs the
34
NSApplication event handling runloop, as is usual for a Cocoa app.
35
* The SDL UI overrides the qemu_main function to NULL, thus
36
specifying that Qemu's main loop must run on the main
37
thread.
38
* For other UIs, or in the absence of UIs, the platform's default
39
behaviour is followed.
40
41
This means that on macOS, the platform's runloop events are always
42
handled, regardless of chosen UI. The new PV graphics device will
43
thus work in all configurations. There is no functional change on other
44
operating systems.
45
46
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
47
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
48
---
49
50
v5:
51
52
* Simplified the way of setting/clearing the main loop by going back
53
to setting qemu_main directly, but narrowing the scope of what it
54
needs to do, and it can now be NULL.
55
56
v6:
57
58
* Folded function qemu_run_default_main_on_new_thread's code into
59
main()
60
* Removed whitespace changes left over on lines near code removed
61
between v4 and v5
62
63
include/qemu-main.h | 3 +--
64
include/qemu/typedefs.h | 1 +
65
system/main.c | 50 ++++++++++++++++++++++++++++++++++----
66
ui/cocoa.m | 54 ++++++++++-------------------------------
67
ui/sdl2.c | 4 +++
68
5 files changed, 64 insertions(+), 48 deletions(-)
69
70
diff --git a/include/qemu-main.h b/include/qemu-main.h
71
index XXXXXXX..XXXXXXX 100644
72
--- a/include/qemu-main.h
73
+++ b/include/qemu-main.h
74
@@ -XXX,XX +XXX,XX @@
75
#ifndef QEMU_MAIN_H
76
#define QEMU_MAIN_H
77
78
-int qemu_default_main(void);
79
-extern int (*qemu_main)(void);
80
+extern qemu_main_fn qemu_main;
81
82
#endif /* QEMU_MAIN_H */
83
diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h
84
index XXXXXXX..XXXXXXX 100644
85
--- a/include/qemu/typedefs.h
86
+++ b/include/qemu/typedefs.h
87
@@ -XXX,XX +XXX,XX @@ typedef struct IRQState *qemu_irq;
88
* Function types
89
*/
90
typedef void (*qemu_irq_handler)(void *opaque, int n, int level);
91
+typedef int (*qemu_main_fn)(void);
92
93
#endif /* QEMU_TYPEDEFS_H */
94
diff --git a/system/main.c b/system/main.c
95
index XXXXXXX..XXXXXXX 100644
96
--- a/system/main.c
97
+++ b/system/main.c
98
@@ -XXX,XX +XXX,XX @@
99
100
#include "qemu/osdep.h"
101
#include "qemu-main.h"
102
+#include "qemu/main-loop.h"
103
#include "sysemu/sysemu.h"
104
105
-#ifdef CONFIG_SDL
106
-#include <SDL.h>
107
+#ifdef CONFIG_DARWIN
108
+#include <CoreFoundation/CoreFoundation.h>
109
#endif
110
111
-int qemu_default_main(void)
112
+static int qemu_default_main(void)
113
{
114
int status;
115
116
@@ -XXX,XX +XXX,XX @@ int qemu_default_main(void)
117
return status;
118
}
119
120
-int (*qemu_main)(void) = qemu_default_main;
121
+/*
122
+ * Various macOS system libraries, including the Cocoa UI and anything using
123
+ * libdispatch, such as ParavirtualizedGraphics.framework, requires that the
124
+ * main runloop, on the main (initial) thread be running or at least regularly
125
+ * polled for events. A special mode is therefore supported, where the QEMU
126
+ * main loop runs on a separate thread and the main thread handles the
127
+ * CF/Cocoa runloop.
128
+ */
129
+
130
+static void *call_qemu_default_main(void *opaque)
131
+{
132
+ int status;
133
+
134
+ bql_lock();
135
+ status = qemu_default_main();
136
+ bql_unlock();
137
+
138
+ exit(status);
139
+}
140
+
141
+#ifdef CONFIG_DARWIN
142
+static int os_darwin_cfrunloop_main(void)
143
+{
144
+ CFRunLoopRun();
145
+ abort();
146
+}
147
+
148
+qemu_main_fn qemu_main = os_darwin_cfrunloop_main;
149
+#else
150
+qemu_main_fn qemu_main;
151
+#endif
152
153
int main(int argc, char **argv)
154
{
155
+ QemuThread main_loop_thread;
156
+
157
qemu_init(argc, argv);
158
- return qemu_main();
159
+ if (qemu_main) {
160
+ qemu_thread_create(&main_loop_thread, "qemu_main",
161
+ call_qemu_default_main, NULL, QEMU_THREAD_DETACHED);
162
+ bql_unlock();
163
+ return qemu_main();
164
+ } else {
165
+ qemu_default_main();
166
+ }
167
}
168
diff --git a/ui/cocoa.m b/ui/cocoa.m
169
index XXXXXXX..XXXXXXX 100644
170
--- a/ui/cocoa.m
171
+++ b/ui/cocoa.m
172
@@ -XXX,XX +XXX,XX @@
173
int height;
174
} QEMUScreen;
175
176
+@class QemuCocoaPasteboardTypeOwner;
177
+
178
static void cocoa_update(DisplayChangeListener *dcl,
179
int x, int y, int w, int h);
180
181
@@ -XXX,XX +XXX,XX @@ static void cocoa_switch(DisplayChangeListener *dcl,
182
static NSInteger cbchangecount = -1;
183
static QemuClipboardInfo *cbinfo;
184
static QemuEvent cbevent;
185
+static QemuCocoaPasteboardTypeOwner *cbowner;
186
187
// Utility functions to run specified code block with the BQL held
188
typedef void (^CodeBlock)(void);
189
@@ -XXX,XX +XXX,XX @@ - (void) dealloc
190
{
191
COCOA_DEBUG("QemuCocoaAppController: dealloc\n");
192
193
- if (cocoaView)
194
- [cocoaView release];
195
+ [cocoaView release];
196
+ [cbowner release];
197
+ cbowner = nil;
198
+
199
[super dealloc];
200
}
201
202
@@ -XXX,XX +XXX,XX @@ - (void)pasteboard:(NSPasteboard *)sender provideDataForType:(NSPasteboardType)t
203
204
@end
205
206
-static QemuCocoaPasteboardTypeOwner *cbowner;
207
-
208
static void cocoa_clipboard_notify(Notifier *notifier, void *data);
209
static void cocoa_clipboard_request(QemuClipboardInfo *info,
210
QemuClipboardType type);
211
@@ -XXX,XX +XXX,XX @@ static void cocoa_clipboard_request(QemuClipboardInfo *info,
212
}
213
}
214
215
-/*
216
- * The startup process for the OSX/Cocoa UI is complicated, because
217
- * OSX insists that the UI runs on the initial main thread, and so we
218
- * need to start a second thread which runs the qemu_default_main():
219
- * in main():
220
- * in cocoa_display_init():
221
- * assign cocoa_main to qemu_main
222
- * create application, menus, etc
223
- * in cocoa_main():
224
- * create qemu-main thread
225
- * enter OSX run loop
226
- */
227
-
228
-static void *call_qemu_main(void *opaque)
229
-{
230
- int status;
231
-
232
- COCOA_DEBUG("Second thread: calling qemu_default_main()\n");
233
- bql_lock();
234
- status = qemu_default_main();
235
- bql_unlock();
236
- COCOA_DEBUG("Second thread: qemu_default_main() returned, exiting\n");
237
- [cbowner release];
238
- exit(status);
239
-}
240
-
241
static int cocoa_main(void)
242
{
243
- QemuThread thread;
244
-
245
- COCOA_DEBUG("Entered %s()\n", __func__);
246
-
247
- bql_unlock();
248
- qemu_thread_create(&thread, "qemu_main", call_qemu_main,
249
- NULL, QEMU_THREAD_DETACHED);
250
-
251
- // Start the main event loop
252
COCOA_DEBUG("Main thread: entering OSX run loop\n");
253
[NSApp run];
254
COCOA_DEBUG("Main thread: left OSX run loop, which should never happen\n");
255
@@ -XXX,XX +XXX,XX @@ static void cocoa_display_init(DisplayState *ds, DisplayOptions *opts)
256
257
COCOA_DEBUG("qemu_cocoa: cocoa_display_init\n");
258
259
- qemu_main = cocoa_main;
260
-
261
// Pull this console process up to being a fully-fledged graphical
262
// app with a menubar and Dock icon
263
ProcessSerialNumber psn = { 0, kCurrentProcess };
264
@@ -XXX,XX +XXX,XX @@ static void cocoa_display_init(DisplayState *ds, DisplayOptions *opts)
265
qemu_clipboard_peer_register(&cbpeer);
266
267
[pool release];
268
+
269
+ /*
270
+ * The Cocoa UI will run the NSApplication runloop on the main thread
271
+ * rather than the default Core Foundation one.
272
+ */
273
+ qemu_main = cocoa_main;
274
}
275
276
static QemuDisplay qemu_display_cocoa = {
277
diff --git a/ui/sdl2.c b/ui/sdl2.c
278
index XXXXXXX..XXXXXXX 100644
279
--- a/ui/sdl2.c
280
+++ b/ui/sdl2.c
281
@@ -XXX,XX +XXX,XX @@
282
#include "sysemu/sysemu.h"
283
#include "ui/win32-kbd-hook.h"
284
#include "qemu/log.h"
285
+#include "qemu-main.h"
286
287
static int sdl2_num_outputs;
288
static struct sdl2_console *sdl2_console;
289
@@ -XXX,XX +XXX,XX @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o)
290
}
291
292
atexit(sdl_cleanup);
293
+
294
+ /* SDL's event polling (in dpy_refresh) must happen on the main thread. */
295
+ qemu_main = NULL;
296
}
297
298
static QemuDisplay qemu_display_sdl2 = {
299
--
300
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
MacOS provides a framework (library) that allows any vmm to implement a
2
paravirtualized 3d graphics passthrough to the host metal stack called
3
ParavirtualizedGraphics.Framework (PVG). The library abstracts away
4
almost every aspect of the paravirtualized device model and only provides
5
and receives callbacks on MMIO access as well as to share memory address
6
space between the VM and PVG.
7
1
8
This patch implements a QEMU device that drives PVG for the VMApple
9
variant of it.
10
11
Signed-off-by: Alexander Graf <graf@amazon.com>
12
Co-authored-by: Alexander Graf <graf@amazon.com>
13
14
Subsequent changes:
15
16
* Cherry-pick/rebase conflict fixes, API use updates.
17
* Moved from hw/vmapple/ (useful outside that machine type)
18
* Overhaul of threading model, many thread safety improvements.
19
* Asynchronous rendering.
20
* Memory and object lifetime fixes.
21
* Refactoring to split generic and (vmapple) MMIO variant specific
22
code.
23
24
Implementation wise, most of the complexity lies in the differing threading
25
models of ParavirtualizedGraphics.framework, which uses libdispatch and
26
internal locks, versus QEMU, which heavily uses the BQL, especially during
27
memory-mapped device I/O. Great care has therefore been taken to prevent
28
deadlocks by never calling into PVG methods while holding the BQL, and
29
similarly never acquiring the BQL in a callback from PVG. Different strategies
30
have been used (libdispatch, blocking and non-blocking BHs, RCU, etc.)
31
depending on the specific requirements at each framework entry and exit point.
32
33
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
34
---
35
36
v2:
37
38
* Cherry-pick/rebase conflict fixes
39
* BQL function renaming
40
* Moved from hw/vmapple/ (useful outside that machine type)
41
* Code review comments: Switched to DEFINE_TYPES macro & little endian
42
MMIO.
43
* Removed some dead/superfluous code
44
* Mad set_mode thread & memory safe
45
* Added migration blocker due to lack of (de-)serialisation.
46
* Fixes to ObjC refcounting and autorelease pool usage.
47
* Fixed ObjC new/init misuse
48
* Switched to ObjC category extension for private property.
49
* Simplified task memory mapping and made it thread safe.
50
* Refactoring to split generic and vmapple MMIO variant specific
51
code.
52
* Switched to asynchronous MMIO writes on x86-64
53
* Rendering and graphics update are now done asynchronously
54
* Fixed cursor handling
55
* Coding convention fixes
56
* Removed software cursor compositing
57
58
v3:
59
60
* Rebased on latest upstream, fixed breakages including switching to Resettable methods.
61
* Squashed patches dealing with dGPUs, MMIO area size, and GPU picking.
62
* Allow re-entrant MMIO; this simplifies the code and solves the divergence
63
between x86-64 and arm64 variants.
64
65
v4:
66
67
* Renamed '-vmapple' device variant to '-mmio'
68
* MMIO device type now requires aarch64 host and guest
69
* Complete overhaul of the glue code for making Qemu's and
70
ParavirtualizedGraphics.framework's threading and synchronisation models
71
work together. Calls into PVG are from dispatch queues while the
72
BQL-holding initiating thread processes AIO context events; callbacks from
73
PVG are scheduled as BHs on the BQL/main AIO context, awaiting completion
74
where necessary.
75
* Guest frame rendering state is covered by the BQL, with only the PVG calls
76
outside the lock, and serialised on the named render_queue.
77
* Simplified logic for dropping frames in-flight during mode changes, fixed
78
bug in pending frames logic.
79
* Addressed smaller code review notes such as: function naming, object type
80
declarations, type names/declarations/casts, code formatting, #include
81
order, over-cautious ObjC retain/release, what goes in init vs realize,
82
etc.
83
84
v5:
85
86
* Smaller non-functional fixes in response to review comments, such as using
87
NULL for the AIO_WAIT_WHILE context argument, type name formatting,
88
deleting leftover debug code, logging improvements, state struct field
89
order and documentation improvements, etc.
90
* Instead of a single condition variable for all synchronous BH job types,
91
there is now one for each callback block. This reduces the number
92
of threads being awoken unnecessarily to near zero.
93
* MMIO device variant: Unified the BH job for raising interrupts.
94
* Use DMA APIs for PVG framework's guest memory read requests.
95
* Thread safety improvements: ensure mutable AppleGFXState fields are not
96
accessed outside the appropriate lock. Added dedicated mutex for the task
97
list.
98
* Retain references to MemoryRegions for which there exist mappings in each
99
PGTask, and for IOSurface mappings.
100
101
v6:
102
103
* Switched PGTask_s's' mapped_regions from GPtrArray to GArray
104
* Allow DisplaySurface to manage its own vram now that texture -> vram copy
105
occurs under BQL.
106
* Memory mapping operations now use RCU_READ_LOCK_GUARD() where possible
107
instead of a heavy-weight BH job to acquire the BQL.
108
* Changed PVG cursor and mode setting callbacks to kick off BHs instead of
109
libdispatch tasks which then locked the BQL explicitly.
110
* The single remaining callback which must wait for a BH to complete now
111
creates an ephemeral QemuSemaphore to await completion.
112
* Re-removed tracking of mapped surface manager memory regions. Just look up
113
and ref/unref the memory regions in the map/unmap callbacks.
114
* Re-ordered functions in apple-gfx.m to group them by area of functionality.
115
* Improved comments and tweaked some names.
116
117
v7:
118
119
* Use g_ptr_array_find() helper function
120
* Error handling coding style tweak
121
122
hw/display/Kconfig | 9 +
123
hw/display/apple-gfx-mmio.m | 281 +++++++++++++
124
hw/display/apple-gfx.h | 65 +++
125
hw/display/apple-gfx.m | 770 ++++++++++++++++++++++++++++++++++++
126
hw/display/meson.build | 4 +
127
hw/display/trace-events | 28 ++
128
meson.build | 4 +
129
7 files changed, 1161 insertions(+)
130
create mode 100644 hw/display/apple-gfx-mmio.m
131
create mode 100644 hw/display/apple-gfx.h
132
create mode 100644 hw/display/apple-gfx.m
133
134
diff --git a/hw/display/Kconfig b/hw/display/Kconfig
135
index XXXXXXX..XXXXXXX 100644
136
--- a/hw/display/Kconfig
137
+++ b/hw/display/Kconfig
138
@@ -XXX,XX +XXX,XX @@ config XLNX_DISPLAYPORT
139
140
config DM163
141
bool
142
+
143
+config MAC_PVG
144
+ bool
145
+ default y
146
+
147
+config MAC_PVG_MMIO
148
+ bool
149
+ depends on MAC_PVG && AARCH64
150
+
151
diff --git a/hw/display/apple-gfx-mmio.m b/hw/display/apple-gfx-mmio.m
152
new file mode 100644
153
index XXXXXXX..XXXXXXX
154
--- /dev/null
155
+++ b/hw/display/apple-gfx-mmio.m
156
@@ -XXX,XX +XXX,XX @@
157
+/*
158
+ * QEMU Apple ParavirtualizedGraphics.framework device, MMIO (arm64) variant
159
+ *
160
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
161
+ *
162
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
163
+ * See the COPYING file in the top-level directory.
164
+ *
165
+ * SPDX-License-Identifier: GPL-2.0-or-later
166
+ *
167
+ * ParavirtualizedGraphics.framework is a set of libraries that macOS provides
168
+ * which implements 3d graphics passthrough to the host as well as a
169
+ * proprietary guest communication channel to drive it. This device model
170
+ * implements support to drive that library from within QEMU as an MMIO-based
171
+ * system device for macOS on arm64 VMs.
172
+ */
173
+
174
+#include "qemu/osdep.h"
175
+#import <ParavirtualizedGraphics/ParavirtualizedGraphics.h>
176
+#include "apple-gfx.h"
177
+#include "monitor/monitor.h"
178
+#include "hw/sysbus.h"
179
+#include "hw/irq.h"
180
+#include "trace.h"
181
+#include "qemu/log.h"
182
+
183
+OBJECT_DECLARE_SIMPLE_TYPE(AppleGFXMMIOState, APPLE_GFX_MMIO)
184
+
185
+/*
186
+ * ParavirtualizedGraphics.Framework only ships header files for the PCI
187
+ * variant which does not include IOSFC descriptors and host devices. We add
188
+ * their definitions here so that we can also work with the ARM version.
189
+ */
190
+typedef bool(^IOSFCRaiseInterrupt)(uint32_t vector);
191
+typedef bool(^IOSFCUnmapMemory)(
192
+ void *, void *, void *, void *, void *, void *);
193
+typedef bool(^IOSFCMapMemory)(
194
+ uint64_t phys, uint64_t len, bool ro, void **va, void *, void *);
195
+
196
+@interface PGDeviceDescriptor (IOSurfaceMapper)
197
+@property (readwrite, nonatomic) bool usingIOSurfaceMapper;
198
+@end
199
+
200
+@interface PGIOSurfaceHostDeviceDescriptor : NSObject
201
+-(PGIOSurfaceHostDeviceDescriptor *)init;
202
+@property (readwrite, nonatomic, copy, nullable) IOSFCMapMemory mapMemory;
203
+@property (readwrite, nonatomic, copy, nullable) IOSFCUnmapMemory unmapMemory;
204
+@property (readwrite, nonatomic, copy, nullable) IOSFCRaiseInterrupt raiseInterrupt;
205
+@end
206
+
207
+@interface PGIOSurfaceHostDevice : NSObject
208
+-(instancetype)initWithDescriptor:(PGIOSurfaceHostDeviceDescriptor *)desc;
209
+-(uint32_t)mmioReadAtOffset:(size_t)offset;
210
+-(void)mmioWriteAtOffset:(size_t)offset value:(uint32_t)value;
211
+@end
212
+
213
+struct AppleGFXMapSurfaceMemoryJob;
214
+struct AppleGFXMMIOState {
215
+ SysBusDevice parent_obj;
216
+
217
+ AppleGFXState common;
218
+
219
+ qemu_irq irq_gfx;
220
+ qemu_irq irq_iosfc;
221
+ MemoryRegion iomem_iosfc;
222
+ PGIOSurfaceHostDevice *pgiosfc;
223
+};
224
+
225
+typedef struct AppleGFXMMIOJob {
226
+ AppleGFXMMIOState *state;
227
+ uint64_t offset;
228
+ uint64_t value;
229
+ bool completed;
230
+} AppleGFXMMIOJob;
231
+
232
+static void iosfc_do_read(void *opaque)
233
+{
234
+ AppleGFXMMIOJob *job = opaque;
235
+ job->value = [job->state->pgiosfc mmioReadAtOffset:job->offset];
236
+ qatomic_set(&job->completed, true);
237
+ aio_wait_kick();
238
+}
239
+
240
+static uint64_t iosfc_read(void *opaque, hwaddr offset, unsigned size)
241
+{
242
+ AppleGFXMMIOJob job = {
243
+ .state = opaque,
244
+ .offset = offset,
245
+ .completed = false,
246
+ };
247
+ dispatch_queue_t queue =
248
+ dispatch_get_global_queue(DISPATCH_QUEUE_PRIORITY_DEFAULT, 0);
249
+
250
+ dispatch_async_f(queue, &job, iosfc_do_read);
251
+ AIO_WAIT_WHILE(NULL, !qatomic_read(&job.completed));
252
+
253
+ trace_apple_gfx_mmio_iosfc_read(offset, job.value);
254
+ return job.value;
255
+}
256
+
257
+static void iosfc_do_write(void *opaque)
258
+{
259
+ AppleGFXMMIOJob *job = opaque;
260
+ [job->state->pgiosfc mmioWriteAtOffset:job->offset value:job->value];
261
+ qatomic_set(&job->completed, true);
262
+ aio_wait_kick();
263
+}
264
+
265
+static void iosfc_write(void *opaque, hwaddr offset, uint64_t val,
266
+ unsigned size)
267
+{
268
+ AppleGFXMMIOJob job = {
269
+ .state = opaque,
270
+ .offset = offset,
271
+ .value = val,
272
+ .completed = false,
273
+ };
274
+ dispatch_queue_t queue =
275
+ dispatch_get_global_queue(DISPATCH_QUEUE_PRIORITY_DEFAULT, 0);
276
+
277
+ dispatch_async_f(queue, &job, iosfc_do_write);
278
+ AIO_WAIT_WHILE(NULL, !qatomic_read(&job.completed));
279
+
280
+ trace_apple_gfx_mmio_iosfc_write(offset, val);
281
+}
282
+
283
+static const MemoryRegionOps apple_iosfc_ops = {
284
+ .read = iosfc_read,
285
+ .write = iosfc_write,
286
+ .endianness = DEVICE_LITTLE_ENDIAN,
287
+ .valid = {
288
+ .min_access_size = 4,
289
+ .max_access_size = 8,
290
+ },
291
+ .impl = {
292
+ .min_access_size = 4,
293
+ .max_access_size = 8,
294
+ },
295
+};
296
+
297
+static void raise_irq_bh(void *opaque)
298
+{
299
+ qemu_irq *irq = opaque;
300
+
301
+ qemu_irq_pulse(*irq);
302
+}
303
+
304
+static void *apple_gfx_mmio_map_surface_memory(uint64_t guest_physical_address,
305
+ uint64_t length, bool read_only)
306
+{
307
+ mach_vm_address_t mem;
308
+ MemoryRegion *region = NULL;
309
+
310
+ RCU_READ_LOCK_GUARD();
311
+ mem = apple_gfx_host_address_for_gpa_range(guest_physical_address,
312
+ length, read_only, &region);
313
+
314
+ if (mem != 0) {
315
+ memory_region_ref(region);
316
+ }
317
+
318
+ return (void *)mem;
319
+}
320
+
321
+static bool apple_gfx_mmio_unmap_surface_memory(void *virtual_address)
322
+{
323
+ MemoryRegion *region;
324
+ ram_addr_t offset = 0;
325
+
326
+ RCU_READ_LOCK_GUARD();
327
+ region = memory_region_from_host(virtual_address, &offset);
328
+ if (!region) {
329
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: memory at %p to be unmapped not "
330
+ "found.\n",
331
+ __func__,
332
+ virtual_address);
333
+ return false;
334
+ }
335
+
336
+ trace_apple_gfx_iosfc_unmap_memory_region(virtual_address, region);
337
+ memory_region_unref(region);
338
+ return true;
339
+}
340
+
341
+static PGIOSurfaceHostDevice *apple_gfx_prepare_iosurface_host_device(
342
+ AppleGFXMMIOState *s)
343
+{
344
+ PGIOSurfaceHostDeviceDescriptor *iosfc_desc =
345
+ [PGIOSurfaceHostDeviceDescriptor new];
346
+ PGIOSurfaceHostDevice *iosfc_host_dev = nil;
347
+
348
+ iosfc_desc.mapMemory =
349
+ ^bool(uint64_t phys, uint64_t len, bool ro, void **va, void *e, void *f) {
350
+ *va = apple_gfx_mmio_map_surface_memory(phys, len, ro);
351
+
352
+ trace_apple_gfx_iosfc_map_memory(phys, len, ro, va, e, f, *va);
353
+
354
+ return *va != NULL;
355
+ };
356
+
357
+ iosfc_desc.unmapMemory =
358
+ ^bool(void *va, void *b, void *c, void *d, void *e, void *f) {
359
+ return apple_gfx_mmio_unmap_surface_memory(s);
360
+ };
361
+
362
+ iosfc_desc.raiseInterrupt = ^bool(uint32_t vector) {
363
+ trace_apple_gfx_iosfc_raise_irq(vector);
364
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
365
+ raise_irq_bh, &s->irq_iosfc);
366
+ return true;
367
+ };
368
+
369
+ iosfc_host_dev =
370
+ [[PGIOSurfaceHostDevice alloc] initWithDescriptor:iosfc_desc];
371
+ [iosfc_desc release];
372
+ return iosfc_host_dev;
373
+}
374
+
375
+static void apple_gfx_mmio_realize(DeviceState *dev, Error **errp)
376
+{
377
+ @autoreleasepool {
378
+ AppleGFXMMIOState *s = APPLE_GFX_MMIO(dev);
379
+ PGDeviceDescriptor *desc = [PGDeviceDescriptor new];
380
+
381
+ desc.raiseInterrupt = ^(uint32_t vector) {
382
+ trace_apple_gfx_raise_irq(vector);
383
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
384
+ raise_irq_bh, &s->irq_gfx);
385
+ };
386
+
387
+ desc.usingIOSurfaceMapper = true;
388
+ s->pgiosfc = apple_gfx_prepare_iosurface_host_device(s);
389
+
390
+ apple_gfx_common_realize(&s->common, desc, errp);
391
+
392
+ [desc release];
393
+ desc = nil;
394
+ }
395
+}
396
+
397
+static void apple_gfx_mmio_init(Object *obj)
398
+{
399
+ AppleGFXMMIOState *s = APPLE_GFX_MMIO(obj);
400
+
401
+ apple_gfx_common_init(obj, &s->common, TYPE_APPLE_GFX_MMIO);
402
+
403
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->common.iomem_gfx);
404
+ memory_region_init_io(&s->iomem_iosfc, obj, &apple_iosfc_ops, s,
405
+ TYPE_APPLE_GFX_MMIO, 0x10000);
406
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem_iosfc);
407
+ sysbus_init_irq(SYS_BUS_DEVICE(s), &s->irq_gfx);
408
+ sysbus_init_irq(SYS_BUS_DEVICE(s), &s->irq_iosfc);
409
+}
410
+
411
+static void apple_gfx_mmio_reset(Object *obj, ResetType type)
412
+{
413
+ AppleGFXMMIOState *s = APPLE_GFX_MMIO(obj);
414
+ [s->common.pgdev reset];
415
+}
416
+
417
+
418
+static void apple_gfx_mmio_class_init(ObjectClass *klass, void *data)
419
+{
420
+ DeviceClass *dc = DEVICE_CLASS(klass);
421
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
422
+
423
+ rc->phases.hold = apple_gfx_mmio_reset;
424
+ dc->hotpluggable = false;
425
+ dc->realize = apple_gfx_mmio_realize;
426
+}
427
+
428
+static TypeInfo apple_gfx_mmio_types[] = {
429
+ {
430
+ .name = TYPE_APPLE_GFX_MMIO,
431
+ .parent = TYPE_SYS_BUS_DEVICE,
432
+ .instance_size = sizeof(AppleGFXMMIOState),
433
+ .class_init = apple_gfx_mmio_class_init,
434
+ .instance_init = apple_gfx_mmio_init,
435
+ }
436
+};
437
+DEFINE_TYPES(apple_gfx_mmio_types)
438
diff --git a/hw/display/apple-gfx.h b/hw/display/apple-gfx.h
439
new file mode 100644
440
index XXXXXXX..XXXXXXX
441
--- /dev/null
442
+++ b/hw/display/apple-gfx.h
443
@@ -XXX,XX +XXX,XX @@
444
+/*
445
+ * Data structures and functions shared between variants of the macOS
446
+ * ParavirtualizedGraphics.framework based apple-gfx display adapter.
447
+ *
448
+ * SPDX-License-Identifier: GPL-2.0-or-later
449
+ */
450
+
451
+#ifndef QEMU_APPLE_GFX_H
452
+#define QEMU_APPLE_GFX_H
453
+
454
+#define TYPE_APPLE_GFX_MMIO "apple-gfx-mmio"
455
+#define TYPE_APPLE_GFX_PCI "apple-gfx-pci"
456
+
457
+#include "qemu/osdep.h"
458
+#include <dispatch/dispatch.h>
459
+#import <ParavirtualizedGraphics/ParavirtualizedGraphics.h>
460
+#include "qemu/typedefs.h"
461
+#include "exec/memory.h"
462
+#include "ui/surface.h"
463
+
464
+@class PGDeviceDescriptor;
465
+@protocol PGDevice;
466
+@protocol PGDisplay;
467
+@protocol MTLDevice;
468
+@protocol MTLTexture;
469
+@protocol MTLCommandQueue;
470
+
471
+typedef QTAILQ_HEAD(, PGTask_s) PGTaskList;
472
+
473
+typedef struct AppleGFXState {
474
+ /* Initialised on init/realize() */
475
+ MemoryRegion iomem_gfx;
476
+ id<PGDevice> pgdev;
477
+ id<PGDisplay> pgdisp;
478
+ QemuConsole *con;
479
+ id<MTLDevice> mtl;
480
+ id<MTLCommandQueue> mtl_queue;
481
+ dispatch_queue_t render_queue;
482
+
483
+ /* List `tasks` is protected by task_mutex */
484
+ QemuMutex task_mutex;
485
+ PGTaskList tasks;
486
+
487
+ /* Mutable state (BQL protected) */
488
+ QEMUCursor *cursor;
489
+ DisplaySurface *surface;
490
+ id<MTLTexture> texture;
491
+ int32_t pending_frames; /* # guest frames in the rendering pipeline */
492
+ bool gfx_update_requested; /* QEMU display system wants a new frame */
493
+ bool new_frame_ready; /* Guest has rendered a frame, ready to be used */
494
+ bool using_managed_texture_storage;
495
+
496
+ /* Mutable state (atomic) */
497
+ bool cursor_show;
498
+} AppleGFXState;
499
+
500
+void apple_gfx_common_init(Object *obj, AppleGFXState *s, const char* obj_name);
501
+void apple_gfx_common_realize(AppleGFXState *s, PGDeviceDescriptor *desc,
502
+ Error **errp);
503
+uintptr_t apple_gfx_host_address_for_gpa_range(uint64_t guest_physical,
504
+ uint64_t length, bool read_only,
505
+ MemoryRegion **mapping_in_region);
506
+
507
+#endif
508
+
509
diff --git a/hw/display/apple-gfx.m b/hw/display/apple-gfx.m
510
new file mode 100644
511
index XXXXXXX..XXXXXXX
512
--- /dev/null
513
+++ b/hw/display/apple-gfx.m
514
@@ -XXX,XX +XXX,XX @@
515
+/*
516
+ * QEMU Apple ParavirtualizedGraphics.framework device
517
+ *
518
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
519
+ *
520
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
521
+ * See the COPYING file in the top-level directory.
522
+ *
523
+ * SPDX-License-Identifier: GPL-2.0-or-later
524
+ *
525
+ * ParavirtualizedGraphics.framework is a set of libraries that macOS provides
526
+ * which implements 3d graphics passthrough to the host as well as a
527
+ * proprietary guest communication channel to drive it. This device model
528
+ * implements support to drive that library from within QEMU.
529
+ */
530
+
531
+#include "qemu/osdep.h"
532
+#import <ParavirtualizedGraphics/ParavirtualizedGraphics.h>
533
+#include <mach/mach_vm.h>
534
+#include "apple-gfx.h"
535
+#include "trace.h"
536
+#include "qemu-main.h"
537
+#include "exec/address-spaces.h"
538
+#include "migration/blocker.h"
539
+#include "monitor/monitor.h"
540
+#include "qemu/main-loop.h"
541
+#include "qemu/cutils.h"
542
+#include "qemu/log.h"
543
+#include "qapi/visitor.h"
544
+#include "qapi/error.h"
545
+#include "sysemu/dma.h"
546
+#include "ui/console.h"
547
+
548
+static const PGDisplayCoord_t apple_gfx_modes[] = {
549
+ { .x = 1440, .y = 1080 },
550
+ { .x = 1280, .y = 1024 },
551
+};
552
+
553
+/* ------ PGTask and task operations: new/destroy/map/unmap ------ */
554
+
555
+/*
556
+ * This implements the type declared in <ParavirtualizedGraphics/PGDevice.h>
557
+ * which is opaque from the framework's point of view. It is used in callbacks
558
+ * in the form of its typedef PGTask_t, which also already exists in the
559
+ * framework headers.
560
+ *
561
+ * A "task" in PVG terminology represents a host-virtual contiguous address
562
+ * range which is reserved in a large chunk on task creation. The mapMemory
563
+ * callback then requests ranges of guest system memory (identified by their
564
+ * GPA) to be mapped into subranges of this reserved address space.
565
+ * This type of operation isn't well-supported by QEMU's memory subsystem,
566
+ * but it is fortunately trivial to achieve with Darwin's mach_vm_remap() call,
567
+ * which allows us to refer to the same backing memory via multiple virtual
568
+ * address ranges. The Mach VM APIs are therefore used throughout for managing
569
+ * task memory.
570
+ */
571
+struct PGTask_s {
572
+ QTAILQ_ENTRY(PGTask_s) node;
573
+ AppleGFXState *s;
574
+ mach_vm_address_t address;
575
+ uint64_t len;
576
+ /*
577
+ * All unique MemoryRegions for which a mapping has been created in in this
578
+ * task, and on which we have thus called memory_region_ref(). There are
579
+ * usually very few regions of system RAM in total, so we expect this array
580
+ * to be very short. Therefore, no need for sorting or fancy search
581
+ * algorithms, linear search will do.
582
+ * Protected by AppleGFXState's task_mutex.
583
+ */
584
+ GPtrArray *mapped_regions;
585
+};
586
+
587
+static Error *apple_gfx_mig_blocker;
588
+
589
+static PGTask_t *apple_gfx_new_task(AppleGFXState *s, uint64_t len)
590
+{
591
+ mach_vm_address_t task_mem;
592
+ PGTask_t *task;
593
+ kern_return_t r;
594
+
595
+ r = mach_vm_allocate(mach_task_self(), &task_mem, len, VM_FLAGS_ANYWHERE);
596
+ if (r != KERN_SUCCESS) {
597
+ return NULL;
598
+ }
599
+
600
+ task = g_new0(PGTask_t, 1);
601
+ task->s = s;
602
+ task->address = task_mem;
603
+ task->len = len;
604
+ task->mapped_regions = g_ptr_array_sized_new(2 /* Usually enough */);
605
+
606
+ QEMU_LOCK_GUARD(&s->task_mutex);
607
+ QTAILQ_INSERT_TAIL(&s->tasks, task, node);
608
+
609
+ return task;
610
+}
611
+
612
+static void apple_gfx_destroy_task(AppleGFXState *s, PGTask_t *task)
613
+{
614
+ GPtrArray *regions = task->mapped_regions;
615
+ MemoryRegion *region;
616
+ size_t i;
617
+
618
+ for (i = 0; i < regions->len; ++i) {
619
+ region = g_ptr_array_index(regions, i);
620
+ memory_region_unref(region);
621
+ }
622
+ g_ptr_array_unref(regions);
623
+
624
+ mach_vm_deallocate(mach_task_self(), task->address, task->len);
625
+
626
+ QEMU_LOCK_GUARD(&s->task_mutex);
627
+ QTAILQ_REMOVE(&s->tasks, task, node);
628
+ g_free(task);
629
+}
630
+
631
+uintptr_t apple_gfx_host_address_for_gpa_range(uint64_t guest_physical,
632
+ uint64_t length, bool read_only,
633
+ MemoryRegion **mapping_in_region)
634
+{
635
+ MemoryRegion *ram_region;
636
+ uintptr_t host_address;
637
+ hwaddr ram_region_offset = 0;
638
+ hwaddr ram_region_length = length;
639
+
640
+ ram_region = address_space_translate(&address_space_memory,
641
+ guest_physical,
642
+ &ram_region_offset,
643
+ &ram_region_length, !read_only,
644
+ MEMTXATTRS_UNSPECIFIED);
645
+
646
+ if (!ram_region || ram_region_length < length ||
647
+ !memory_access_is_direct(ram_region, !read_only)) {
648
+ return 0;
649
+ }
650
+
651
+ host_address = (uintptr_t)memory_region_get_ram_ptr(ram_region);
652
+ if (host_address == 0) {
653
+ return 0;
654
+ }
655
+ host_address += ram_region_offset;
656
+ *mapping_in_region = ram_region;
657
+ return host_address;
658
+}
659
+
660
+/* Returns false if the region is already in the array */
661
+static bool add_new_region(GPtrArray *regions, MemoryRegion *region)
662
+{
663
+ guint found_index;
664
+
665
+ if (g_ptr_array_find(regions, region, &found_index)) {
666
+ return false;
667
+ }
668
+
669
+ g_ptr_array_add(regions, region);
670
+ return true;
671
+}
672
+
673
+static bool apple_gfx_task_map_memory(AppleGFXState *s, PGTask_t *task,
674
+ uint64_t virtual_offset,
675
+ PGPhysicalMemoryRange_t *ranges,
676
+ uint32_t range_count, bool read_only)
677
+{
678
+ kern_return_t r;
679
+ mach_vm_address_t target, source;
680
+ vm_prot_t cur_protection, max_protection;
681
+ bool success = true;
682
+ MemoryRegion *region;
683
+
684
+ RCU_READ_LOCK_GUARD();
685
+ QEMU_LOCK_GUARD(&s->task_mutex);
686
+
687
+ trace_apple_gfx_map_memory(task, range_count, virtual_offset, read_only);
688
+ for (int i = 0; i < range_count; i++) {
689
+ PGPhysicalMemoryRange_t *range = &ranges[i];
690
+
691
+ target = task->address + virtual_offset;
692
+ virtual_offset += range->physicalLength;
693
+
694
+ trace_apple_gfx_map_memory_range(i, range->physicalAddress,
695
+ range->physicalLength);
696
+
697
+ region = NULL;
698
+ source = apple_gfx_host_address_for_gpa_range(range->physicalAddress,
699
+ range->physicalLength,
700
+ read_only, &region);
701
+ if (source == 0) {
702
+ success = false;
703
+ continue;
704
+ }
705
+
706
+ if (add_new_region(task->mapped_regions, region)) {
707
+ memory_region_ref(region);
708
+ }
709
+
710
+ cur_protection = 0;
711
+ max_protection = 0;
712
+ // Map guest RAM at range->physicalAddress into PG task memory range
713
+ r = mach_vm_remap(mach_task_self(),
714
+ &target, range->physicalLength, vm_page_size - 1,
715
+ VM_FLAGS_FIXED | VM_FLAGS_OVERWRITE,
716
+ mach_task_self(),
717
+ source, false /* shared mapping, no copy */,
718
+ &cur_protection, &max_protection,
719
+ VM_INHERIT_COPY);
720
+ trace_apple_gfx_remap(r, source, target);
721
+ g_assert(r == KERN_SUCCESS);
722
+ }
723
+
724
+ return success;
725
+}
726
+
727
+static void apple_gfx_task_unmap_memory(AppleGFXState *s, PGTask_t *task,
728
+ uint64_t virtual_offset, uint64_t length)
729
+{
730
+ kern_return_t r;
731
+ mach_vm_address_t range_address;
732
+
733
+ trace_apple_gfx_unmap_memory(task, virtual_offset, length);
734
+
735
+ /*
736
+ * Replace task memory range with fresh 0 pages, undoing the mapping
737
+ * from guest RAM.
738
+ */
739
+ range_address = task->address + virtual_offset;
740
+ r = mach_vm_allocate(mach_task_self(), &range_address, length,
741
+ VM_FLAGS_FIXED | VM_FLAGS_OVERWRITE);
742
+ g_assert(r == KERN_SUCCESS);
743
+}
744
+
745
+/* ------ Rendering and frame management ------ */
746
+
747
+static void apple_gfx_render_frame_completed(AppleGFXState *s,
748
+ uint32_t width, uint32_t height);
749
+
750
+static void apple_gfx_render_new_frame_bql_unlock(AppleGFXState *s)
751
+{
752
+ BOOL r;
753
+ bool managed_texture = s->using_managed_texture_storage;
754
+ uint32_t width = surface_width(s->surface);
755
+ uint32_t height = surface_height(s->surface);
756
+ MTLRegion region = MTLRegionMake2D(0, 0, width, height);
757
+ id<MTLCommandBuffer> command_buffer = [s->mtl_queue commandBuffer];
758
+ id<MTLTexture> texture = s->texture;
759
+
760
+ assert(bql_locked());
761
+ [texture retain];
762
+
763
+ bql_unlock();
764
+
765
+ /* This is not safe to call from the BQL due to PVG-internal locks causing
766
+ * deadlocks. */
767
+ r = [s->pgdisp encodeCurrentFrameToCommandBuffer:command_buffer
768
+ texture:texture
769
+ region:region];
770
+ if (!r) {
771
+ [texture release];
772
+ bql_lock();
773
+ --s->pending_frames;
774
+ bql_unlock();
775
+ qemu_log_mask(LOG_GUEST_ERROR,
776
+ "%s: encodeCurrentFrameToCommandBuffer:texture:region: "
777
+ "failed\n", __func__);
778
+ return;
779
+ }
780
+
781
+ if (managed_texture) {
782
+ /* "Managed" textures exist in both VRAM and RAM and must be synced. */
783
+ id<MTLBlitCommandEncoder> blit = [command_buffer blitCommandEncoder];
784
+ [blit synchronizeResource:texture];
785
+ [blit endEncoding];
786
+ }
787
+ [texture release];
788
+ [command_buffer addCompletedHandler:
789
+ ^(id<MTLCommandBuffer> cb)
790
+ {
791
+ dispatch_async(s->render_queue, ^{
792
+ apple_gfx_render_frame_completed(s, width, height);
793
+ });
794
+ }];
795
+ [command_buffer commit];
796
+}
797
+
798
+static void copy_mtl_texture_to_surface_mem(id<MTLTexture> texture, void *vram)
799
+{
800
+ /* TODO: Skip this entirely on a pure Metal or headless/guest-only
801
+ * rendering path, else use a blit command encoder? Needs careful
802
+ * (double?) buffering design. */
803
+ size_t width = texture.width, height = texture.height;
804
+ MTLRegion region = MTLRegionMake2D(0, 0, width, height);
805
+ [texture getBytes:vram
806
+ bytesPerRow:(width * 4)
807
+ bytesPerImage:(width * height * 4)
808
+ fromRegion:region
809
+ mipmapLevel:0
810
+ slice:0];
811
+}
812
+
813
+static void apple_gfx_render_frame_completed(AppleGFXState *s,
814
+ uint32_t width, uint32_t height)
815
+{
816
+ bql_lock();
817
+ --s->pending_frames;
818
+ assert(s->pending_frames >= 0);
819
+
820
+ /* Only update display if mode hasn't changed since we started rendering. */
821
+ if (width == surface_width(s->surface) &&
822
+ height == surface_height(s->surface)) {
823
+ copy_mtl_texture_to_surface_mem(s->texture, surface_data(s->surface));
824
+ if (s->gfx_update_requested) {
825
+ s->gfx_update_requested = false;
826
+ dpy_gfx_update_full(s->con);
827
+ graphic_hw_update_done(s->con);
828
+ s->new_frame_ready = false;
829
+ } else {
830
+ s->new_frame_ready = true;
831
+ }
832
+ }
833
+ if (s->pending_frames > 0) {
834
+ apple_gfx_render_new_frame_bql_unlock(s);
835
+ } else {
836
+ bql_unlock();
837
+ }
838
+}
839
+
840
+static void apple_gfx_fb_update_display(void *opaque)
841
+{
842
+ AppleGFXState *s = opaque;
843
+
844
+ assert(bql_locked());
845
+ if (s->new_frame_ready) {
846
+ dpy_gfx_update_full(s->con);
847
+ s->new_frame_ready = false;
848
+ graphic_hw_update_done(s->con);
849
+ } else if (s->pending_frames > 0) {
850
+ s->gfx_update_requested = true;
851
+ } else {
852
+ graphic_hw_update_done(s->con);
853
+ }
854
+}
855
+
856
+static const GraphicHwOps apple_gfx_fb_ops = {
857
+ .gfx_update = apple_gfx_fb_update_display,
858
+ .gfx_update_async = true,
859
+};
860
+
861
+/* ------ Mouse cursor and display mode setting ------ */
862
+
863
+static void set_mode(AppleGFXState *s, uint32_t width, uint32_t height)
864
+{
865
+ MTLTextureDescriptor *textureDescriptor;
866
+
867
+ if (s->surface &&
868
+ width == surface_width(s->surface) &&
869
+ height == surface_height(s->surface)) {
870
+ return;
871
+ }
872
+
873
+ [s->texture release];
874
+
875
+ s->surface = qemu_create_displaysurface(width, height);
876
+
877
+ @autoreleasepool {
878
+ textureDescriptor =
879
+ [MTLTextureDescriptor
880
+ texture2DDescriptorWithPixelFormat:MTLPixelFormatBGRA8Unorm
881
+ width:width
882
+ height:height
883
+ mipmapped:NO];
884
+ textureDescriptor.usage = s->pgdisp.minimumTextureUsage;
885
+ s->texture = [s->mtl newTextureWithDescriptor:textureDescriptor];
886
+ }
887
+
888
+ s->using_managed_texture_storage =
889
+ (s->texture.storageMode == MTLStorageModeManaged);
890
+ dpy_gfx_replace_surface(s->con, s->surface);
891
+}
892
+
893
+static void update_cursor(AppleGFXState *s)
894
+{
895
+ assert(bql_locked());
896
+ dpy_mouse_set(s->con, s->pgdisp.cursorPosition.x,
897
+ s->pgdisp.cursorPosition.y, qatomic_read(&s->cursor_show));
898
+}
899
+
900
+static void update_cursor_bh(void *opaque)
901
+{
902
+ AppleGFXState *s = opaque;
903
+ update_cursor(s);
904
+}
905
+
906
+typedef struct AppleGFXSetCursorGlyphJob {
907
+ AppleGFXState *s;
908
+ NSBitmapImageRep *glyph;
909
+ PGDisplayCoord_t hotspot;
910
+} AppleGFXSetCursorGlyphJob;
911
+
912
+static void set_cursor_glyph(void *opaque)
913
+{
914
+ AppleGFXSetCursorGlyphJob *job = opaque;
915
+ AppleGFXState *s = job->s;
916
+ NSBitmapImageRep *glyph = job->glyph;
917
+ uint32_t bpp = glyph.bitsPerPixel;
918
+ size_t width = glyph.pixelsWide;
919
+ size_t height = glyph.pixelsHigh;
920
+ size_t padding_bytes_per_row = glyph.bytesPerRow - width * 4;
921
+ const uint8_t* px_data = glyph.bitmapData;
922
+
923
+ trace_apple_gfx_cursor_set(bpp, width, height);
924
+
925
+ if (s->cursor) {
926
+ cursor_unref(s->cursor);
927
+ s->cursor = NULL;
928
+ }
929
+
930
+ if (bpp == 32) { /* Shouldn't be anything else, but just to be safe...*/
931
+ s->cursor = cursor_alloc(width, height);
932
+ s->cursor->hot_x = job->hotspot.x;
933
+ s->cursor->hot_y = job->hotspot.y;
934
+
935
+ uint32_t *dest_px = s->cursor->data;
936
+
937
+ for (size_t y = 0; y < height; ++y) {
938
+ for (size_t x = 0; x < width; ++x) {
939
+ /* NSBitmapImageRep's red & blue channels are swapped
940
+ * compared to QEMUCursor's. */
941
+ *dest_px =
942
+ (px_data[0] << 16u) |
943
+ (px_data[1] << 8u) |
944
+ (px_data[2] << 0u) |
945
+ (px_data[3] << 24u);
946
+ ++dest_px;
947
+ px_data += 4;
948
+ }
949
+ px_data += padding_bytes_per_row;
950
+ }
951
+ dpy_cursor_define(s->con, s->cursor);
952
+ update_cursor(s);
953
+ }
954
+ [glyph release];
955
+
956
+ g_free(job);
957
+}
958
+
959
+/* ------ DMA (device reading system memory) ------ */
960
+
961
+typedef struct AppleGFXReadMemoryJob {
962
+ QemuSemaphore sem;
963
+ hwaddr physical_address;
964
+ uint64_t length;
965
+ void *dst;
966
+ bool success;
967
+} AppleGFXReadMemoryJob;
968
+
969
+static void apple_gfx_do_read_memory(void *opaque)
970
+{
971
+ AppleGFXReadMemoryJob *job = opaque;
972
+ MemTxResult r;
973
+
974
+ r = dma_memory_read(&address_space_memory, job->physical_address,
975
+ job->dst, job->length, MEMTXATTRS_UNSPECIFIED);
976
+ job->success = r == MEMTX_OK;
977
+
978
+ qemu_sem_post(&job->sem);
979
+}
980
+
981
+static bool apple_gfx_read_memory(AppleGFXState *s, hwaddr physical_address,
982
+ uint64_t length, void *dst)
983
+{
984
+ AppleGFXReadMemoryJob job = {
985
+ .physical_address = physical_address, .length = length, .dst = dst
986
+ };
987
+
988
+ trace_apple_gfx_read_memory(physical_address, length, dst);
989
+
990
+ /* Performing DMA requires BQL, so do it in a BH. */
991
+ qemu_sem_init(&job.sem, 0);
992
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
993
+ apple_gfx_do_read_memory, &job);
994
+ qemu_sem_wait(&job.sem);
995
+ qemu_sem_destroy(&job.sem);
996
+ return job.success;
997
+}
998
+
999
+/* ------ Memory-mapped device I/O operations ------ */
1000
+
1001
+static dispatch_queue_t get_background_queue(void)
1002
+{
1003
+ return dispatch_get_global_queue(DISPATCH_QUEUE_PRIORITY_DEFAULT, 0);
1004
+}
1005
+
1006
+typedef struct AppleGFXIOJob {
1007
+ AppleGFXState *state;
1008
+ uint64_t offset;
1009
+ uint64_t value;
1010
+ bool completed;
1011
+} AppleGFXIOJob;
1012
+
1013
+static void apple_gfx_do_read(void *opaque)
1014
+{
1015
+ AppleGFXIOJob *job = opaque;
1016
+ job->value = [job->state->pgdev mmioReadAtOffset:job->offset];
1017
+ qatomic_set(&job->completed, true);
1018
+ aio_wait_kick();
1019
+}
1020
+
1021
+static uint64_t apple_gfx_read(void *opaque, hwaddr offset, unsigned size)
1022
+{
1023
+ AppleGFXIOJob job = {
1024
+ .state = opaque,
1025
+ .offset = offset,
1026
+ .completed = false,
1027
+ };
1028
+ dispatch_queue_t queue = get_background_queue();
1029
+
1030
+ dispatch_async_f(queue, &job, apple_gfx_do_read);
1031
+ AIO_WAIT_WHILE(NULL, !qatomic_read(&job.completed));
1032
+
1033
+ trace_apple_gfx_read(offset, job.value);
1034
+ return job.value;
1035
+}
1036
+
1037
+static void apple_gfx_do_write(void *opaque)
1038
+{
1039
+ AppleGFXIOJob *job = opaque;
1040
+ [job->state->pgdev mmioWriteAtOffset:job->offset value:job->value];
1041
+ qatomic_set(&job->completed, true);
1042
+ aio_wait_kick();
1043
+}
1044
+
1045
+static void apple_gfx_write(void *opaque, hwaddr offset, uint64_t val,
1046
+ unsigned size)
1047
+{
1048
+ /*
1049
+ * The methods mmioReadAtOffset: and especially mmioWriteAtOffset: can
1050
+ * trigger synchronous operations on other dispatch queues, which in turn
1051
+ * may call back out on one or more of the callback blocks. For this reason,
1052
+ * and as we are holding the BQL, we invoke the I/O methods on a pool
1053
+ * thread and handle AIO tasks while we wait. Any work in the callbacks
1054
+ * requiring the BQL will in turn schedule BHs which this thread will
1055
+ * process while waiting.
1056
+ */
1057
+ AppleGFXIOJob job = {
1058
+ .state = opaque,
1059
+ .offset = offset,
1060
+ .value = val,
1061
+ .completed = false,
1062
+ };
1063
+ dispatch_queue_t queue = get_background_queue();
1064
+
1065
+ dispatch_async_f(queue, &job, apple_gfx_do_write);
1066
+ AIO_WAIT_WHILE(NULL, !qatomic_read(&job.completed));
1067
+
1068
+ trace_apple_gfx_write(offset, val);
1069
+}
1070
+
1071
+static const MemoryRegionOps apple_gfx_ops = {
1072
+ .read = apple_gfx_read,
1073
+ .write = apple_gfx_write,
1074
+ .endianness = DEVICE_LITTLE_ENDIAN,
1075
+ .valid = {
1076
+ .min_access_size = 4,
1077
+ .max_access_size = 8,
1078
+ },
1079
+ .impl = {
1080
+ .min_access_size = 4,
1081
+ .max_access_size = 4,
1082
+ },
1083
+};
1084
+
1085
+static size_t apple_gfx_get_default_mmio_range_size(void)
1086
+{
1087
+ size_t mmio_range_size;
1088
+ @autoreleasepool {
1089
+ PGDeviceDescriptor *desc = [PGDeviceDescriptor new];
1090
+ mmio_range_size = desc.mmioLength;
1091
+ [desc release];
1092
+ }
1093
+ return mmio_range_size;
1094
+}
1095
+
1096
+/* ------ Initialisation and startup ------ */
1097
+
1098
+void apple_gfx_common_init(Object *obj, AppleGFXState *s, const char* obj_name)
1099
+{
1100
+ size_t mmio_range_size = apple_gfx_get_default_mmio_range_size();
1101
+
1102
+ trace_apple_gfx_common_init(obj_name, mmio_range_size);
1103
+ memory_region_init_io(&s->iomem_gfx, obj, &apple_gfx_ops, s, obj_name,
1104
+ mmio_range_size);
1105
+
1106
+ /* TODO: PVG framework supports serialising device state: integrate it! */
1107
+}
1108
+
1109
+static void apple_gfx_register_task_mapping_handlers(AppleGFXState *s,
1110
+ PGDeviceDescriptor *desc)
1111
+{
1112
+ desc.createTask = ^(uint64_t vmSize, void * _Nullable * _Nonnull baseAddress) {
1113
+ PGTask_t *task = apple_gfx_new_task(s, vmSize);
1114
+ *baseAddress = (void *)task->address;
1115
+ trace_apple_gfx_create_task(vmSize, *baseAddress);
1116
+ return task;
1117
+ };
1118
+
1119
+ desc.destroyTask = ^(PGTask_t * _Nonnull task) {
1120
+ trace_apple_gfx_destroy_task(task, task->mapped_regions->len);
1121
+
1122
+ apple_gfx_destroy_task(s, task);
1123
+ };
1124
+
1125
+ desc.mapMemory = ^bool(PGTask_t * _Nonnull task, uint32_t range_count,
1126
+ uint64_t virtual_offset, bool read_only,
1127
+ PGPhysicalMemoryRange_t * _Nonnull ranges) {
1128
+ return apple_gfx_task_map_memory(s, task, virtual_offset,
1129
+ ranges, range_count, read_only);
1130
+ };
1131
+
1132
+ desc.unmapMemory = ^bool(PGTask_t * _Nonnull task, uint64_t virtual_offset,
1133
+ uint64_t length) {
1134
+ apple_gfx_task_unmap_memory(s, task, virtual_offset, length);
1135
+ return true;
1136
+ };
1137
+
1138
+ desc.readMemory = ^bool(uint64_t physical_address, uint64_t length,
1139
+ void * _Nonnull dst) {
1140
+ return apple_gfx_read_memory(s, physical_address, length, dst);
1141
+ };
1142
+}
1143
+
1144
+static PGDisplayDescriptor *apple_gfx_prepare_display_descriptor(AppleGFXState *s)
1145
+{
1146
+ PGDisplayDescriptor *disp_desc = [PGDisplayDescriptor new];
1147
+
1148
+ disp_desc.name = @"QEMU display";
1149
+ disp_desc.sizeInMillimeters = NSMakeSize(400., 300.); /* A 20" display */
1150
+ disp_desc.queue = dispatch_get_main_queue();
1151
+ disp_desc.newFrameEventHandler = ^(void) {
1152
+ trace_apple_gfx_new_frame();
1153
+ dispatch_async(s->render_queue, ^{
1154
+ /* Drop frames if we get too far ahead. */
1155
+ bql_lock();
1156
+ if (s->pending_frames >= 2) {
1157
+ bql_unlock();
1158
+ return;
1159
+ }
1160
+ ++s->pending_frames;
1161
+ if (s->pending_frames > 1) {
1162
+ bql_unlock();
1163
+ return;
1164
+ }
1165
+ @autoreleasepool {
1166
+ apple_gfx_render_new_frame_bql_unlock(s);
1167
+ }
1168
+ });
1169
+ };
1170
+ disp_desc.modeChangeHandler = ^(PGDisplayCoord_t sizeInPixels,
1171
+ OSType pixelFormat) {
1172
+ trace_apple_gfx_mode_change(sizeInPixels.x, sizeInPixels.y);
1173
+
1174
+ BQL_LOCK_GUARD();
1175
+ set_mode(s, sizeInPixels.x, sizeInPixels.y);
1176
+ };
1177
+ disp_desc.cursorGlyphHandler = ^(NSBitmapImageRep *glyph,
1178
+ PGDisplayCoord_t hotspot) {
1179
+ AppleGFXSetCursorGlyphJob *job = g_malloc0(sizeof(*job));
1180
+ job->s = s;
1181
+ job->glyph = glyph;
1182
+ job->hotspot = hotspot;
1183
+ [glyph retain];
1184
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
1185
+ set_cursor_glyph, job);
1186
+ };
1187
+ disp_desc.cursorShowHandler = ^(BOOL show) {
1188
+ trace_apple_gfx_cursor_show(show);
1189
+ qatomic_set(&s->cursor_show, show);
1190
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
1191
+ update_cursor_bh, s);
1192
+ };
1193
+ disp_desc.cursorMoveHandler = ^(void) {
1194
+ trace_apple_gfx_cursor_move();
1195
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
1196
+ update_cursor_bh, s);
1197
+ };
1198
+
1199
+ return disp_desc;
1200
+}
1201
+
1202
+static NSArray<PGDisplayMode*>* apple_gfx_prepare_display_mode_array(void)
1203
+{
1204
+ PGDisplayMode *modes[ARRAY_SIZE(apple_gfx_modes)];
1205
+ NSArray<PGDisplayMode*>* mode_array = nil;
1206
+ int i;
1207
+
1208
+ for (i = 0; i < ARRAY_SIZE(apple_gfx_modes); i++) {
1209
+ modes[i] =
1210
+ [[PGDisplayMode alloc] initWithSizeInPixels:apple_gfx_modes[i] refreshRateInHz:60.];
1211
+ }
1212
+
1213
+ mode_array = [NSArray arrayWithObjects:modes count:ARRAY_SIZE(apple_gfx_modes)];
1214
+
1215
+ for (i = 0; i < ARRAY_SIZE(apple_gfx_modes); i++) {
1216
+ [modes[i] release];
1217
+ modes[i] = nil;
1218
+ }
1219
+
1220
+ return mode_array;
1221
+}
1222
+
1223
+static id<MTLDevice> copy_suitable_metal_device(void)
1224
+{
1225
+ id<MTLDevice> dev = nil;
1226
+ NSArray<id<MTLDevice>> *devs = MTLCopyAllDevices();
1227
+
1228
+ /* Prefer a unified memory GPU. Failing that, pick a non-removable GPU. */
1229
+ for (size_t i = 0; i < devs.count; ++i) {
1230
+ if (devs[i].hasUnifiedMemory) {
1231
+ dev = devs[i];
1232
+ break;
1233
+ }
1234
+ if (!devs[i].removable) {
1235
+ dev = devs[i];
1236
+ }
1237
+ }
1238
+
1239
+ if (dev != nil) {
1240
+ [dev retain];
1241
+ } else {
1242
+ dev = MTLCreateSystemDefaultDevice();
1243
+ }
1244
+ [devs release];
1245
+
1246
+ return dev;
1247
+}
1248
+
1249
+void apple_gfx_common_realize(AppleGFXState *s, PGDeviceDescriptor *desc,
1250
+ Error **errp)
1251
+{
1252
+ PGDisplayDescriptor *disp_desc = nil;
1253
+
1254
+ if (apple_gfx_mig_blocker == NULL) {
1255
+ error_setg(&apple_gfx_mig_blocker,
1256
+ "Migration state blocked by apple-gfx display device");
1257
+ if (migrate_add_blocker(&apple_gfx_mig_blocker, errp) < 0) {
1258
+ return;
1259
+ }
1260
+ }
1261
+
1262
+ qemu_mutex_init(&s->task_mutex);
1263
+ QTAILQ_INIT(&s->tasks);
1264
+ s->render_queue = dispatch_queue_create("apple-gfx.render",
1265
+ DISPATCH_QUEUE_SERIAL);
1266
+ s->mtl = copy_suitable_metal_device();
1267
+ s->mtl_queue = [s->mtl newCommandQueue];
1268
+
1269
+ desc.device = s->mtl;
1270
+
1271
+ apple_gfx_register_task_mapping_handlers(s, desc);
1272
+
1273
+ s->pgdev = PGNewDeviceWithDescriptor(desc);
1274
+
1275
+ disp_desc = apple_gfx_prepare_display_descriptor(s);
1276
+ s->pgdisp = [s->pgdev newDisplayWithDescriptor:disp_desc
1277
+ port:0 serialNum:1234];
1278
+ [disp_desc release];
1279
+ s->pgdisp.modeList = apple_gfx_prepare_display_mode_array();
1280
+
1281
+ s->con = graphic_console_init(NULL, 0, &apple_gfx_fb_ops, s);
1282
+
1283
+ qatomic_set(&s->cursor_show, true);
1284
+}
1285
diff --git a/hw/display/meson.build b/hw/display/meson.build
1286
index XXXXXXX..XXXXXXX 100644
1287
--- a/hw/display/meson.build
1288
+++ b/hw/display/meson.build
1289
@@ -XXX,XX +XXX,XX @@ system_ss.add(when: 'CONFIG_ARTIST', if_true: files('artist.c'))
1290
1291
system_ss.add(when: 'CONFIG_ATI_VGA', if_true: [files('ati.c', 'ati_2d.c', 'ati_dbg.c'), pixman])
1292
1293
+system_ss.add(when: 'CONFIG_MAC_PVG', if_true: [files('apple-gfx.m'), pvg, metal])
1294
+if cpu == 'aarch64'
1295
+ system_ss.add(when: 'CONFIG_MAC_PVG_MMIO', if_true: [files('apple-gfx-mmio.m'), pvg, metal])
1296
+endif
1297
1298
if config_all_devices.has_key('CONFIG_VIRTIO_GPU')
1299
virtio_gpu_ss = ss.source_set()
1300
diff --git a/hw/display/trace-events b/hw/display/trace-events
1301
index XXXXXXX..XXXXXXX 100644
1302
--- a/hw/display/trace-events
1303
+++ b/hw/display/trace-events
1304
@@ -XXX,XX +XXX,XX @@ dm163_bits_ppi(unsigned dest_width) "dest_width : %u"
1305
dm163_leds(int led, uint32_t value) "led %d: 0x%x"
1306
dm163_channels(int channel, uint8_t value) "channel %d: 0x%x"
1307
dm163_refresh_rate(uint32_t rr) "refresh rate %d"
1308
+
1309
+# apple-gfx.m
1310
+apple_gfx_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
1311
+apple_gfx_write(uint64_t offset, uint64_t val) "offset=0x%"PRIx64" val=0x%"PRIx64
1312
+apple_gfx_create_task(uint32_t vm_size, void *va) "vm_size=0x%x base_addr=%p"
1313
+apple_gfx_destroy_task(void *task, unsigned int num_mapped_regions) "task=%p, task->mapped_regions->len=%u"
1314
+apple_gfx_map_memory(void *task, uint32_t range_count, uint64_t virtual_offset, uint32_t read_only) "task=%p range_count=0x%x virtual_offset=0x%"PRIx64" read_only=%d"
1315
+apple_gfx_map_memory_range(uint32_t i, uint64_t phys_addr, uint64_t phys_len) "[%d] phys_addr=0x%"PRIx64" phys_len=0x%"PRIx64
1316
+apple_gfx_remap(uint64_t retval, uint64_t source, uint64_t target) "retval=%"PRId64" source=0x%"PRIx64" target=0x%"PRIx64
1317
+apple_gfx_unmap_memory(void *task, uint64_t virtual_offset, uint64_t length) "task=%p virtual_offset=0x%"PRIx64" length=0x%"PRIx64
1318
+apple_gfx_read_memory(uint64_t phys_address, uint64_t length, void *dst) "phys_addr=0x%"PRIx64" length=0x%"PRIx64" dest=%p"
1319
+apple_gfx_raise_irq(uint32_t vector) "vector=0x%x"
1320
+apple_gfx_new_frame(void) ""
1321
+apple_gfx_mode_change(uint64_t x, uint64_t y) "x=%"PRId64" y=%"PRId64
1322
+apple_gfx_cursor_set(uint32_t bpp, uint64_t width, uint64_t height) "bpp=%d width=%"PRId64" height=0x%"PRId64
1323
+apple_gfx_cursor_show(uint32_t show) "show=%d"
1324
+apple_gfx_cursor_move(void) ""
1325
+apple_gfx_common_init(const char *device_name, size_t mmio_size) "device: %s; MMIO size: %zu bytes"
1326
+
1327
+# apple-gfx-mmio.m
1328
+apple_gfx_mmio_iosfc_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
1329
+apple_gfx_mmio_iosfc_write(uint64_t offset, uint64_t val) "offset=0x%"PRIx64" val=0x%"PRIx64
1330
+apple_gfx_iosfc_map_memory(uint64_t phys, uint64_t len, uint32_t ro, void *va, void *e, void *f, void* va_result) "phys=0x%"PRIx64" len=0x%"PRIx64" ro=%d va=%p e=%p f=%p -> *va=%p"
1331
+apple_gfx_iosfc_map_memory_new_region(size_t i, void *region, uint64_t start, uint64_t end) "index=%zu, region=%p, 0x%"PRIx64"-0x%"PRIx64
1332
+apple_gfx_iosfc_unmap_memory(void *a, void *b, void *c, void *d, void *e, void *f) "a=%p b=%p c=%p d=%p e=%p f=%p"
1333
+apple_gfx_iosfc_unmap_memory_region(void* mem, void *region) "unmapping @ %p from memory region %p"
1334
+apple_gfx_iosfc_raise_irq(uint32_t vector) "vector=0x%x"
1335
+
1336
diff --git a/meson.build b/meson.build
1337
index XXXXXXX..XXXXXXX 100644
1338
--- a/meson.build
1339
+++ b/meson.build
1340
@@ -XXX,XX +XXX,XX @@ socket = []
1341
version_res = []
1342
coref = []
1343
iokit = []
1344
+pvg = []
1345
+metal = []
1346
emulator_link_args = []
1347
midl = not_found
1348
widl = not_found
1349
@@ -XXX,XX +XXX,XX @@ elif host_os == 'darwin'
1350
coref = dependency('appleframeworks', modules: 'CoreFoundation')
1351
iokit = dependency('appleframeworks', modules: 'IOKit', required: false)
1352
host_dsosuf = '.dylib'
1353
+ pvg = dependency('appleframeworks', modules: 'ParavirtualizedGraphics')
1354
+ metal = dependency('appleframeworks', modules: 'Metal')
1355
elif host_os == 'sunos'
1356
socket = [cc.find_library('socket'),
1357
cc.find_library('nsl'),
1358
--
1359
2.39.3 (Apple Git-145)
1360
1361
diff view generated by jsdifflib
Deleted patch
1
This change wires up the PCI variant of the paravirtualised
2
graphics device, mainly useful for x86-64 macOS guests, implemented
3
by macOS's ParavirtualizedGraphics.framework. It builds on code
4
shared with the vmapple/mmio variant of the PVG device.
5
1
6
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
7
---
8
9
v4:
10
11
* Threading improvements analogous to those in common apple-gfx code
12
and mmio device variant.
13
* Smaller code review issues addressed.
14
15
v5:
16
17
* Minor error handling improvement.
18
19
v6:
20
21
* Removed an unused function parameter.
22
23
hw/display/Kconfig | 4 +
24
hw/display/apple-gfx-pci.m | 148 +++++++++++++++++++++++++++++++++++++
25
hw/display/meson.build | 1 +
26
3 files changed, 153 insertions(+)
27
create mode 100644 hw/display/apple-gfx-pci.m
28
29
diff --git a/hw/display/Kconfig b/hw/display/Kconfig
30
index XXXXXXX..XXXXXXX 100644
31
--- a/hw/display/Kconfig
32
+++ b/hw/display/Kconfig
33
@@ -XXX,XX +XXX,XX @@ config MAC_PVG_MMIO
34
bool
35
depends on MAC_PVG && AARCH64
36
37
+config MAC_PVG_PCI
38
+ bool
39
+ depends on MAC_PVG && PCI
40
+ default y if PCI_DEVICES
41
diff --git a/hw/display/apple-gfx-pci.m b/hw/display/apple-gfx-pci.m
42
new file mode 100644
43
index XXXXXXX..XXXXXXX
44
--- /dev/null
45
+++ b/hw/display/apple-gfx-pci.m
46
@@ -XXX,XX +XXX,XX @@
47
+/*
48
+ * QEMU Apple ParavirtualizedGraphics.framework device, PCI variant
49
+ *
50
+ * Copyright © 2023-2024 Phil Dennis-Jordan
51
+ *
52
+ * SPDX-License-Identifier: GPL-2.0-or-later
53
+ *
54
+ * ParavirtualizedGraphics.framework is a set of libraries that macOS provides
55
+ * which implements 3d graphics passthrough to the host as well as a
56
+ * proprietary guest communication channel to drive it. This device model
57
+ * implements support to drive that library from within QEMU as a PCI device
58
+ * aimed primarily at x86-64 macOS VMs.
59
+ */
60
+
61
+#include "apple-gfx.h"
62
+#include "hw/pci/pci_device.h"
63
+#include "hw/pci/msi.h"
64
+#include "qapi/error.h"
65
+#include "trace.h"
66
+#import <ParavirtualizedGraphics/ParavirtualizedGraphics.h>
67
+
68
+OBJECT_DECLARE_SIMPLE_TYPE(AppleGFXPCIState, APPLE_GFX_PCI)
69
+
70
+struct AppleGFXPCIState {
71
+ PCIDevice parent_obj;
72
+
73
+ AppleGFXState common;
74
+};
75
+
76
+static const char* apple_gfx_pci_option_rom_path = NULL;
77
+
78
+static void apple_gfx_init_option_rom_path(void)
79
+{
80
+ NSURL *option_rom_url = PGCopyOptionROMURL();
81
+ const char *option_rom_path = option_rom_url.fileSystemRepresentation;
82
+ apple_gfx_pci_option_rom_path = g_strdup(option_rom_path);
83
+ [option_rom_url release];
84
+}
85
+
86
+static void apple_gfx_pci_init(Object *obj)
87
+{
88
+ AppleGFXPCIState *s = APPLE_GFX_PCI(obj);
89
+
90
+ if (!apple_gfx_pci_option_rom_path) {
91
+ /* The following is done on device not class init to avoid running
92
+ * ObjC code before fork() in -daemonize mode. */
93
+ PCIDeviceClass *pci = PCI_DEVICE_CLASS(object_get_class(obj));
94
+ apple_gfx_init_option_rom_path();
95
+ pci->romfile = apple_gfx_pci_option_rom_path;
96
+ }
97
+
98
+ apple_gfx_common_init(obj, &s->common, TYPE_APPLE_GFX_PCI);
99
+}
100
+
101
+typedef struct AppleGFXPCIInterruptJob {
102
+ PCIDevice *device;
103
+ uint32_t vector;
104
+} AppleGFXPCIInterruptJob;
105
+
106
+static void apple_gfx_pci_raise_interrupt(void *opaque)
107
+{
108
+ AppleGFXPCIInterruptJob *job = opaque;
109
+
110
+ if (msi_enabled(job->device)) {
111
+ msi_notify(job->device, job->vector);
112
+ }
113
+ g_free(job);
114
+}
115
+
116
+static void apple_gfx_pci_interrupt(PCIDevice *dev, uint32_t vector)
117
+{
118
+ AppleGFXPCIInterruptJob *job;
119
+
120
+ trace_apple_gfx_raise_irq(vector);
121
+ job = g_malloc0(sizeof(*job));
122
+ job->device = dev;
123
+ job->vector = vector;
124
+ aio_bh_schedule_oneshot(qemu_get_aio_context(),
125
+ apple_gfx_pci_raise_interrupt, job);
126
+}
127
+
128
+static void apple_gfx_pci_realize(PCIDevice *dev, Error **errp)
129
+{
130
+ AppleGFXPCIState *s = APPLE_GFX_PCI(dev);
131
+ int ret;
132
+
133
+ pci_register_bar(dev, PG_PCI_BAR_MMIO,
134
+ PCI_BASE_ADDRESS_SPACE_MEMORY, &s->common.iomem_gfx);
135
+
136
+ ret = msi_init(dev, 0x0 /* config offset; 0 = find space */,
137
+ PG_PCI_MAX_MSI_VECTORS, true /* msi64bit */,
138
+ false /*msi_per_vector_mask*/, errp);
139
+ if (ret != 0) {
140
+ return;
141
+ }
142
+
143
+ @autoreleasepool {
144
+ PGDeviceDescriptor *desc = [PGDeviceDescriptor new];
145
+ desc.raiseInterrupt = ^(uint32_t vector) {
146
+ apple_gfx_pci_interrupt(dev, vector);
147
+ };
148
+
149
+ apple_gfx_common_realize(&s->common, desc, errp);
150
+ [desc release];
151
+ desc = nil;
152
+ }
153
+}
154
+
155
+static void apple_gfx_pci_reset(Object *obj, ResetType type)
156
+{
157
+ AppleGFXPCIState *s = APPLE_GFX_PCI(obj);
158
+ [s->common.pgdev reset];
159
+}
160
+
161
+static void apple_gfx_pci_class_init(ObjectClass *klass, void *data)
162
+{
163
+ DeviceClass *dc = DEVICE_CLASS(klass);
164
+ PCIDeviceClass *pci = PCI_DEVICE_CLASS(klass);
165
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
166
+
167
+ rc->phases.hold = apple_gfx_pci_reset;
168
+ dc->desc = "macOS Paravirtualized Graphics PCI Display Controller";
169
+ dc->hotpluggable = false;
170
+ set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
171
+
172
+ pci->vendor_id = PG_PCI_VENDOR_ID;
173
+ pci->device_id = PG_PCI_DEVICE_ID;
174
+ pci->class_id = PCI_CLASS_DISPLAY_OTHER;
175
+ pci->realize = apple_gfx_pci_realize;
176
+
177
+ // TODO: Property for setting mode list
178
+}
179
+
180
+static TypeInfo apple_gfx_pci_types[] = {
181
+ {
182
+ .name = TYPE_APPLE_GFX_PCI,
183
+ .parent = TYPE_PCI_DEVICE,
184
+ .instance_size = sizeof(AppleGFXPCIState),
185
+ .class_init = apple_gfx_pci_class_init,
186
+ .instance_init = apple_gfx_pci_init,
187
+ .interfaces = (InterfaceInfo[]) {
188
+ { INTERFACE_PCIE_DEVICE },
189
+ { },
190
+ },
191
+ }
192
+};
193
+DEFINE_TYPES(apple_gfx_pci_types)
194
+
195
diff --git a/hw/display/meson.build b/hw/display/meson.build
196
index XXXXXXX..XXXXXXX 100644
197
--- a/hw/display/meson.build
198
+++ b/hw/display/meson.build
199
@@ -XXX,XX +XXX,XX @@ system_ss.add(when: 'CONFIG_MAC_PVG', if_true: [files('apple-gfx.m'), pv
200
if cpu == 'aarch64'
201
system_ss.add(when: 'CONFIG_MAC_PVG_MMIO', if_true: [files('apple-gfx-mmio.m'), pvg, metal])
202
endif
203
+system_ss.add(when: 'CONFIG_MAC_PVG_PCI', if_true: [files('apple-gfx-pci.m'), pvg, metal])
204
205
if config_all_devices.has_key('CONFIG_VIRTIO_GPU')
206
virtio_gpu_ss = ss.source_set()
207
--
208
2.39.3 (Apple Git-145)
209
210
diff view generated by jsdifflib
Deleted patch
1
This change adds a property 'display_modes' on the graphics device
2
which permits specifying a list of display modes. (screen resolution
3
and refresh rate)
4
1
5
The property is an array of a custom type to make the syntax slightly
6
less awkward to use, for example:
7
8
-device '{"driver":"apple-gfx-pci", "display-modes":["1920x1080@60", "3840x2160@60"]}'
9
10
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
11
---
12
13
v4:
14
15
* Switched to the native array property type, which recently gained
16
     command line support.
17
* The property has also been added to the -mmio variant.
18
* Tidied up the code a little.
19
20
v5:
21
22
* Better error handling and buffer management in property parsing and
23
output.
24
25
v6:
26
27
* Switched to using NSMutableArray for the mode list to avoid need for
28
allocating a temporary array - previously done with alloca.
29
30
v7:
31
32
* Simplified error handling in property parsing
33
34
hw/display/apple-gfx-mmio.m | 8 +++
35
hw/display/apple-gfx-pci.m | 9 ++-
36
hw/display/apple-gfx.h | 12 ++++
37
hw/display/apple-gfx.m | 136 +++++++++++++++++++++++++++++++-----
38
hw/display/trace-events | 2 +
39
5 files changed, 147 insertions(+), 20 deletions(-)
40
41
diff --git a/hw/display/apple-gfx-mmio.m b/hw/display/apple-gfx-mmio.m
42
index XXXXXXX..XXXXXXX 100644
43
--- a/hw/display/apple-gfx-mmio.m
44
+++ b/hw/display/apple-gfx-mmio.m
45
@@ -XXX,XX +XXX,XX @@ static void apple_gfx_mmio_reset(Object *obj, ResetType type)
46
[s->common.pgdev reset];
47
}
48
49
+static Property apple_gfx_mmio_properties[] = {
50
+ DEFINE_PROP_ARRAY("display-modes", AppleGFXMMIOState,
51
+ common.num_display_modes, common.display_modes,
52
+ qdev_prop_display_mode, AppleGFXDisplayMode),
53
+ DEFINE_PROP_END_OF_LIST(),
54
+};
55
56
static void apple_gfx_mmio_class_init(ObjectClass *klass, void *data)
57
{
58
@@ -XXX,XX +XXX,XX @@ static void apple_gfx_mmio_class_init(ObjectClass *klass, void *data)
59
rc->phases.hold = apple_gfx_mmio_reset;
60
dc->hotpluggable = false;
61
dc->realize = apple_gfx_mmio_realize;
62
+
63
+ device_class_set_props(dc, apple_gfx_mmio_properties);
64
}
65
66
static TypeInfo apple_gfx_mmio_types[] = {
67
diff --git a/hw/display/apple-gfx-pci.m b/hw/display/apple-gfx-pci.m
68
index XXXXXXX..XXXXXXX 100644
69
--- a/hw/display/apple-gfx-pci.m
70
+++ b/hw/display/apple-gfx-pci.m
71
@@ -XXX,XX +XXX,XX @@ static void apple_gfx_pci_reset(Object *obj, ResetType type)
72
[s->common.pgdev reset];
73
}
74
75
+static Property apple_gfx_pci_properties[] = {
76
+ DEFINE_PROP_ARRAY("display-modes", AppleGFXPCIState,
77
+ common.num_display_modes, common.display_modes,
78
+ qdev_prop_display_mode, AppleGFXDisplayMode),
79
+ DEFINE_PROP_END_OF_LIST(),
80
+};
81
+
82
static void apple_gfx_pci_class_init(ObjectClass *klass, void *data)
83
{
84
DeviceClass *dc = DEVICE_CLASS(klass);
85
@@ -XXX,XX +XXX,XX @@ static void apple_gfx_pci_class_init(ObjectClass *klass, void *data)
86
pci->class_id = PCI_CLASS_DISPLAY_OTHER;
87
pci->realize = apple_gfx_pci_realize;
88
89
- // TODO: Property for setting mode list
90
+ device_class_set_props(dc, apple_gfx_pci_properties);
91
}
92
93
static TypeInfo apple_gfx_pci_types[] = {
94
diff --git a/hw/display/apple-gfx.h b/hw/display/apple-gfx.h
95
index XXXXXXX..XXXXXXX 100644
96
--- a/hw/display/apple-gfx.h
97
+++ b/hw/display/apple-gfx.h
98
@@ -XXX,XX +XXX,XX @@
99
#import <ParavirtualizedGraphics/ParavirtualizedGraphics.h>
100
#include "qemu/typedefs.h"
101
#include "exec/memory.h"
102
+#include "hw/qdev-properties.h"
103
#include "ui/surface.h"
104
105
@class PGDeviceDescriptor;
106
@@ -XXX,XX +XXX,XX @@
107
108
typedef QTAILQ_HEAD(, PGTask_s) PGTaskList;
109
110
+struct AppleGFXDisplayMode;
111
typedef struct AppleGFXState {
112
/* Initialised on init/realize() */
113
MemoryRegion iomem_gfx;
114
@@ -XXX,XX +XXX,XX @@ typedef struct AppleGFXState {
115
id<MTLDevice> mtl;
116
id<MTLCommandQueue> mtl_queue;
117
dispatch_queue_t render_queue;
118
+ struct AppleGFXDisplayMode *display_modes;
119
+ uint32_t num_display_modes;
120
121
/* List `tasks` is protected by task_mutex */
122
QemuMutex task_mutex;
123
@@ -XXX,XX +XXX,XX @@ typedef struct AppleGFXState {
124
bool cursor_show;
125
} AppleGFXState;
126
127
+typedef struct AppleGFXDisplayMode {
128
+ uint16_t width_px;
129
+ uint16_t height_px;
130
+ uint16_t refresh_rate_hz;
131
+} AppleGFXDisplayMode;
132
+
133
void apple_gfx_common_init(Object *obj, AppleGFXState *s, const char* obj_name);
134
void apple_gfx_common_realize(AppleGFXState *s, PGDeviceDescriptor *desc,
135
Error **errp);
136
@@ -XXX,XX +XXX,XX @@ uintptr_t apple_gfx_host_address_for_gpa_range(uint64_t guest_physical,
137
uint64_t length, bool read_only,
138
MemoryRegion **mapping_in_region);
139
140
+extern const PropertyInfo qdev_prop_display_mode;
141
+
142
#endif
143
144
diff --git a/hw/display/apple-gfx.m b/hw/display/apple-gfx.m
145
index XXXXXXX..XXXXXXX 100644
146
--- a/hw/display/apple-gfx.m
147
+++ b/hw/display/apple-gfx.m
148
@@ -XXX,XX +XXX,XX @@
149
#include "sysemu/dma.h"
150
#include "ui/console.h"
151
152
-static const PGDisplayCoord_t apple_gfx_modes[] = {
153
- { .x = 1440, .y = 1080 },
154
- { .x = 1280, .y = 1024 },
155
+static const AppleGFXDisplayMode apple_gfx_default_modes[] = {
156
+ { 1920, 1080, 60 },
157
+ { 1440, 1080, 60 },
158
+ { 1280, 1024, 60 },
159
};
160
161
/* ------ PGTask and task operations: new/destroy/map/unmap ------ */
162
@@ -XXX,XX +XXX,XX @@ static void apple_gfx_register_task_mapping_handlers(AppleGFXState *s,
163
return disp_desc;
164
}
165
166
-static NSArray<PGDisplayMode*>* apple_gfx_prepare_display_mode_array(void)
167
+static NSArray<PGDisplayMode *> *apple_gfx_create_display_mode_array(
168
+ const AppleGFXDisplayMode display_modes[], uint32_t display_mode_count)
169
{
170
- PGDisplayMode *modes[ARRAY_SIZE(apple_gfx_modes)];
171
- NSArray<PGDisplayMode*>* mode_array = nil;
172
- int i;
173
-
174
- for (i = 0; i < ARRAY_SIZE(apple_gfx_modes); i++) {
175
- modes[i] =
176
- [[PGDisplayMode alloc] initWithSizeInPixels:apple_gfx_modes[i] refreshRateInHz:60.];
177
- }
178
-
179
- mode_array = [NSArray arrayWithObjects:modes count:ARRAY_SIZE(apple_gfx_modes)];
180
-
181
- for (i = 0; i < ARRAY_SIZE(apple_gfx_modes); i++) {
182
- [modes[i] release];
183
- modes[i] = nil;
184
+ uint32_t i;
185
+ PGDisplayMode *mode_obj;
186
+ NSMutableArray<PGDisplayMode *> *mode_array =
187
+ [[NSMutableArray alloc] initWithCapacity:display_mode_count];
188
+
189
+ for (i = 0; i < display_mode_count; i++) {
190
+ const AppleGFXDisplayMode *mode = &display_modes[i];
191
+ trace_apple_gfx_display_mode(i, mode->width_px, mode->height_px);
192
+ PGDisplayCoord_t mode_size = { mode->width_px, mode->height_px };
193
+
194
+ mode_obj =
195
+ [[PGDisplayMode alloc] initWithSizeInPixels:mode_size
196
+ refreshRateInHz:mode->refresh_rate_hz];
197
+ [mode_array addObject:mode_obj];
198
+ [mode_obj release];
199
}
200
201
return mode_array;
202
@@ -XXX,XX +XXX,XX @@ void apple_gfx_common_realize(AppleGFXState *s, PGDeviceDescriptor *desc,
203
Error **errp)
204
{
205
PGDisplayDescriptor *disp_desc = nil;
206
+ const AppleGFXDisplayMode *display_modes = apple_gfx_default_modes;
207
+ int num_display_modes = ARRAY_SIZE(apple_gfx_default_modes);
208
+ NSArray<PGDisplayMode *> *mode_array;
209
210
if (apple_gfx_mig_blocker == NULL) {
211
error_setg(&apple_gfx_mig_blocker,
212
@@ -XXX,XX +XXX,XX @@ void apple_gfx_common_realize(AppleGFXState *s, PGDeviceDescriptor *desc,
213
s->pgdisp = [s->pgdev newDisplayWithDescriptor:disp_desc
214
port:0 serialNum:1234];
215
[disp_desc release];
216
- s->pgdisp.modeList = apple_gfx_prepare_display_mode_array();
217
+
218
+ if (s->display_modes != NULL && s->num_display_modes > 0) {
219
+ trace_apple_gfx_common_realize_modes_property(s->num_display_modes);
220
+ display_modes = s->display_modes;
221
+ num_display_modes = s->num_display_modes;
222
+ }
223
+ s->pgdisp.modeList = mode_array =
224
+ apple_gfx_create_display_mode_array(display_modes, num_display_modes);
225
+ [mode_array release];
226
227
s->con = graphic_console_init(NULL, 0, &apple_gfx_fb_ops, s);
228
229
qatomic_set(&s->cursor_show, true);
230
}
231
+
232
+/* ------ Display mode list device property ------ */
233
+
234
+static void apple_gfx_get_display_mode(Object *obj, Visitor *v,
235
+ const char *name, void *opaque,
236
+ Error **errp)
237
+{
238
+ Property *prop = opaque;
239
+ AppleGFXDisplayMode *mode = object_field_prop_ptr(obj, prop);
240
+ /* 3 uint16s (max 5 digits) + 2 separator characters + nul. */
241
+ char buffer[5 * 3 + 2 + 1];
242
+ char *pos = buffer;
243
+
244
+ int rc = snprintf(buffer, sizeof(buffer),
245
+ "%"PRIu16"x%"PRIu16"@%"PRIu16,
246
+ mode->width_px, mode->height_px,
247
+ mode->refresh_rate_hz);
248
+ assert(rc < sizeof(buffer));
249
+
250
+ visit_type_str(v, name, &pos, errp);
251
+}
252
+
253
+static void apple_gfx_set_display_mode(Object *obj, Visitor *v,
254
+ const char *name, void *opaque,
255
+ Error **errp)
256
+{
257
+ Property *prop = opaque;
258
+ AppleGFXDisplayMode *mode = object_field_prop_ptr(obj, prop);
259
+ const char *endptr;
260
+ g_autofree char *str = NULL;
261
+ int ret;
262
+ int val;
263
+
264
+ visit_type_str(v, name, &str, errp);
265
+ if (*errp) {
266
+ return;
267
+ }
268
+
269
+ endptr = str;
270
+
271
+ ret = qemu_strtoi(endptr, &endptr, 10, &val);
272
+ if (ret || val > UINT16_MAX || val <= 0) {
273
+ error_setg(errp, "width in '%s' must be a decimal integer number "
274
+ "of pixels in the range 1..65535", name);
275
+ return;
276
+ }
277
+ mode->width_px = val;
278
+ if (*endptr != 'x') {
279
+ goto separator_error;
280
+ }
281
+
282
+ ret = qemu_strtoi(endptr + 1, &endptr, 10, &val);
283
+ if (ret || val > UINT16_MAX || val <= 0) {
284
+ error_setg(errp, "height in '%s' must be a decimal integer number "
285
+ "of pixels in the range 1..65535", name);
286
+ return;
287
+ }
288
+ mode->height_px = val;
289
+ if (*endptr != '@') {
290
+ goto separator_error;
291
+ }
292
+
293
+ ret = qemu_strtoi(endptr + 1, &endptr, 10, &val);
294
+ if (ret || val > UINT16_MAX || val <= 0) {
295
+ error_setg(errp, "refresh rate in '%s'"
296
+ " must be a positive decimal integer (Hertz)", name);
297
+ return;
298
+ }
299
+ mode->refresh_rate_hz = val;
300
+ return;
301
+
302
+separator_error:
303
+ error_setg(errp, "Each display mode takes the format "
304
+ "'<width>x<height>@<rate>'");
305
+}
306
+
307
+const PropertyInfo qdev_prop_display_mode = {
308
+ .name = "display_mode",
309
+ .description =
310
+ "Display mode in pixels and Hertz, as <width>x<height>@<refresh-rate> "
311
+ "Example: 3840x2160@60",
312
+ .get = apple_gfx_get_display_mode,
313
+ .set = apple_gfx_set_display_mode,
314
+};
315
diff --git a/hw/display/trace-events b/hw/display/trace-events
316
index XXXXXXX..XXXXXXX 100644
317
--- a/hw/display/trace-events
318
+++ b/hw/display/trace-events
319
@@ -XXX,XX +XXX,XX @@ apple_gfx_cursor_set(uint32_t bpp, uint64_t width, uint64_t height) "bpp=%d widt
320
apple_gfx_cursor_show(uint32_t show) "show=%d"
321
apple_gfx_cursor_move(void) ""
322
apple_gfx_common_init(const char *device_name, size_t mmio_size) "device: %s; MMIO size: %zu bytes"
323
+apple_gfx_common_realize_modes_property(uint32_t num_modes) "using %u modes supplied by 'display-modes' device property"
324
+apple_gfx_display_mode(uint32_t mode_idx, uint16_t width_px, uint16_t height_px) "mode %2"PRIu32": %4"PRIu16"x%4"PRIu16
325
326
# apple-gfx-mmio.m
327
apple_gfx_mmio_iosfc_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
328
--
329
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
I'm happy to take responsibility for the macOS PV graphics code. As
2
HVF patches don't seem to get much attention at the moment, I'm also
3
adding myself as designated reviewer for HVF and x86 HVF to try and
4
improve that.
5
1
6
I anticipate that the resulting workload should be covered by the
7
funding I'm receiving for improving Qemu in combination with macOS. As
8
of right now this runs out at the end of 2024; I expect the workload on
9
apple-gfx should be relatively minor and manageable in my spare time
10
beyond that. I may have to remove myself from more general HVF duties
11
once the contract runs out if it's more than I can manage.
12
13
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
14
---
15
MAINTAINERS | 7 +++++++
16
1 file changed, 7 insertions(+)
17
18
diff --git a/MAINTAINERS b/MAINTAINERS
19
index XXXXXXX..XXXXXXX 100644
20
--- a/MAINTAINERS
21
+++ b/MAINTAINERS
22
@@ -XXX,XX +XXX,XX @@ F: target/arm/hvf/
23
X86 HVF CPUs
24
M: Cameron Esfahani <dirty@apple.com>
25
M: Roman Bolshakov <rbolshakov@ddn.com>
26
+R: Phil Dennis-Jordan <phil@philjordan.eu>
27
W: https://wiki.qemu.org/Features/HVF
28
S: Maintained
29
F: target/i386/hvf/
30
@@ -XXX,XX +XXX,XX @@ F: target/i386/hvf/
31
HVF
32
M: Cameron Esfahani <dirty@apple.com>
33
M: Roman Bolshakov <rbolshakov@ddn.com>
34
+R: Phil Dennis-Jordan <phil@philjordan.eu>
35
W: https://wiki.qemu.org/Features/HVF
36
S: Maintained
37
F: accel/hvf/
38
@@ -XXX,XX +XXX,XX @@ F: hw/display/edid*
39
F: include/hw/display/edid.h
40
F: qemu-edid.c
41
42
+macOS PV Graphics (apple-gfx)
43
+M: Phil Dennis-Jordan <phil@philjordan.eu>
44
+S: Maintained
45
+F: hw/display/apple-gfx*
46
+
47
PIIX4 South Bridge (i82371AB)
48
M: Hervé Poussineau <hpoussin@reactos.org>
49
M: Philippe Mathieu-Daudé <philmd@linaro.org>
50
--
51
2.39.3 (Apple Git-145)
52
53
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
We will introduce a number of devices that are specific to the vmapple
4
target machine. To keep them all tidily together, let's put them into
5
a single target directory.
6
7
Signed-off-by: Alexander Graf <graf@amazon.com>
8
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
9
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
10
---
11
MAINTAINERS | 7 +++++++
12
hw/Kconfig | 1 +
13
hw/meson.build | 1 +
14
hw/vmapple/Kconfig | 1 +
15
hw/vmapple/meson.build | 0
16
hw/vmapple/trace-events | 2 ++
17
hw/vmapple/trace.h | 1 +
18
meson.build | 1 +
19
8 files changed, 14 insertions(+)
20
create mode 100644 hw/vmapple/Kconfig
21
create mode 100644 hw/vmapple/meson.build
22
create mode 100644 hw/vmapple/trace-events
23
create mode 100644 hw/vmapple/trace.h
24
25
diff --git a/MAINTAINERS b/MAINTAINERS
26
index XXXXXXX..XXXXXXX 100644
27
--- a/MAINTAINERS
28
+++ b/MAINTAINERS
29
@@ -XXX,XX +XXX,XX @@ F: hw/hyperv/hv-balloon*.h
30
F: include/hw/hyperv/dynmem-proto.h
31
F: include/hw/hyperv/hv-balloon.h
32
33
+VMapple
34
+M: Alexander Graf <agraf@csgraf.de>
35
+R: Phil Dennis-Jordan <phil@philjordan.eu>
36
+S: Maintained
37
+F: hw/vmapple/*
38
+F: include/hw/vmapple/*
39
+
40
Subsystems
41
----------
42
Overall Audio backends
43
diff --git a/hw/Kconfig b/hw/Kconfig
44
index XXXXXXX..XXXXXXX 100644
45
--- a/hw/Kconfig
46
+++ b/hw/Kconfig
47
@@ -XXX,XX +XXX,XX @@ source ufs/Kconfig
48
source usb/Kconfig
49
source virtio/Kconfig
50
source vfio/Kconfig
51
+source vmapple/Kconfig
52
source xen/Kconfig
53
source watchdog/Kconfig
54
55
diff --git a/hw/meson.build b/hw/meson.build
56
index XXXXXXX..XXXXXXX 100644
57
--- a/hw/meson.build
58
+++ b/hw/meson.build
59
@@ -XXX,XX +XXX,XX @@ subdir('ufs')
60
subdir('usb')
61
subdir('vfio')
62
subdir('virtio')
63
+subdir('vmapple')
64
subdir('watchdog')
65
subdir('xen')
66
subdir('xenpv')
67
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
68
new file mode 100644
69
index XXXXXXX..XXXXXXX
70
--- /dev/null
71
+++ b/hw/vmapple/Kconfig
72
@@ -0,0 +1 @@
73
+
74
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
75
new file mode 100644
76
index XXXXXXX..XXXXXXX
77
diff --git a/hw/vmapple/trace-events b/hw/vmapple/trace-events
78
new file mode 100644
79
index XXXXXXX..XXXXXXX
80
--- /dev/null
81
+++ b/hw/vmapple/trace-events
82
@@ -XXX,XX +XXX,XX @@
83
+# See docs/devel/tracing.rst for syntax documentation.
84
+
85
diff --git a/hw/vmapple/trace.h b/hw/vmapple/trace.h
86
new file mode 100644
87
index XXXXXXX..XXXXXXX
88
--- /dev/null
89
+++ b/hw/vmapple/trace.h
90
@@ -0,0 +1 @@
91
+#include "trace/trace-hw_vmapple.h"
92
diff --git a/meson.build b/meson.build
93
index XXXXXXX..XXXXXXX 100644
94
--- a/meson.build
95
+++ b/meson.build
96
@@ -XXX,XX +XXX,XX @@ if have_system
97
'hw/usb',
98
'hw/vfio',
99
'hw/virtio',
100
+ 'hw/vmapple',
101
'hw/watchdog',
102
'hw/xen',
103
'hw/gpio',
104
--
105
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
In addition to the ISA and PCI variants of pvpanic, let's add an MMIO
4
platform device that we can use in embedded arm environments.
5
6
Signed-off-by: Alexander Graf <graf@amazon.com>
7
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
10
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
11
---
12
13
v3:
14
* Rebased on upstream, updated a header path
15
16
hw/misc/Kconfig | 4 +++
17
hw/misc/meson.build | 1 +
18
hw/misc/pvpanic-mmio.c | 61 +++++++++++++++++++++++++++++++++++++++
19
include/hw/misc/pvpanic.h | 1 +
20
4 files changed, 67 insertions(+)
21
create mode 100644 hw/misc/pvpanic-mmio.c
22
23
diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
24
index XXXXXXX..XXXXXXX 100644
25
--- a/hw/misc/Kconfig
26
+++ b/hw/misc/Kconfig
27
@@ -XXX,XX +XXX,XX @@ config PVPANIC_ISA
28
depends on ISA_BUS
29
select PVPANIC_COMMON
30
31
+config PVPANIC_MMIO
32
+ bool
33
+ select PVPANIC_COMMON
34
+
35
config AUX
36
bool
37
select I2C
38
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
39
index XXXXXXX..XXXXXXX 100644
40
--- a/hw/misc/meson.build
41
+++ b/hw/misc/meson.build
42
@@ -XXX,XX +XXX,XX @@ system_ss.add(when: 'CONFIG_ARMSSE_MHU', if_true: files('armsse-mhu.c'))
43
44
system_ss.add(when: 'CONFIG_PVPANIC_ISA', if_true: files('pvpanic-isa.c'))
45
system_ss.add(when: 'CONFIG_PVPANIC_PCI', if_true: files('pvpanic-pci.c'))
46
+system_ss.add(when: 'CONFIG_PVPANIC_MMIO', if_true: files('pvpanic-mmio.c'))
47
system_ss.add(when: 'CONFIG_AUX', if_true: files('auxbus.c'))
48
system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
49
'aspeed_hace.c',
50
diff --git a/hw/misc/pvpanic-mmio.c b/hw/misc/pvpanic-mmio.c
51
new file mode 100644
52
index XXXXXXX..XXXXXXX
53
--- /dev/null
54
+++ b/hw/misc/pvpanic-mmio.c
55
@@ -XXX,XX +XXX,XX @@
56
+/*
57
+ * QEMU simulated pvpanic device (MMIO frontend)
58
+ *
59
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
60
+ *
61
+ * SPDX-License-Identifier: GPL-2.0-or-later
62
+ */
63
+
64
+#include "qemu/osdep.h"
65
+
66
+#include "hw/qdev-properties.h"
67
+#include "hw/misc/pvpanic.h"
68
+#include "hw/sysbus.h"
69
+#include "standard-headers/misc/pvpanic.h"
70
+
71
+OBJECT_DECLARE_SIMPLE_TYPE(PVPanicMMIOState, PVPANIC_MMIO_DEVICE)
72
+
73
+#define PVPANIC_MMIO_SIZE 0x2
74
+
75
+struct PVPanicMMIOState {
76
+ SysBusDevice parent_obj;
77
+
78
+ PVPanicState pvpanic;
79
+};
80
+
81
+static void pvpanic_mmio_initfn(Object *obj)
82
+{
83
+ PVPanicMMIOState *s = PVPANIC_MMIO_DEVICE(obj);
84
+
85
+ pvpanic_setup_io(&s->pvpanic, DEVICE(s), PVPANIC_MMIO_SIZE);
86
+ sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->pvpanic.mr);
87
+}
88
+
89
+static Property pvpanic_mmio_properties[] = {
90
+ DEFINE_PROP_UINT8("events", PVPanicMMIOState, pvpanic.events,
91
+ PVPANIC_PANICKED | PVPANIC_CRASH_LOADED),
92
+ DEFINE_PROP_END_OF_LIST(),
93
+};
94
+
95
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
96
+{
97
+ DeviceClass *dc = DEVICE_CLASS(klass);
98
+
99
+ device_class_set_props(dc, pvpanic_mmio_properties);
100
+ set_bit(DEVICE_CATEGORY_MISC, dc->categories);
101
+}
102
+
103
+static const TypeInfo pvpanic_mmio_info = {
104
+ .name = TYPE_PVPANIC_MMIO_DEVICE,
105
+ .parent = TYPE_SYS_BUS_DEVICE,
106
+ .instance_size = sizeof(PVPanicMMIOState),
107
+ .instance_init = pvpanic_mmio_initfn,
108
+ .class_init = pvpanic_mmio_class_init,
109
+};
110
+
111
+static void pvpanic_register_types(void)
112
+{
113
+ type_register_static(&pvpanic_mmio_info);
114
+}
115
+
116
+type_init(pvpanic_register_types)
117
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
118
index XXXXXXX..XXXXXXX 100644
119
--- a/include/hw/misc/pvpanic.h
120
+++ b/include/hw/misc/pvpanic.h
121
@@ -XXX,XX +XXX,XX @@
122
123
#define TYPE_PVPANIC_ISA_DEVICE "pvpanic"
124
#define TYPE_PVPANIC_PCI_DEVICE "pvpanic-pci"
125
+#define TYPE_PVPANIC_MMIO_DEVICE "pvpanic-mmio"
126
127
#define PVPANIC_IOPORT_PROP "ioport"
128
129
--
130
2.39.3 (Apple Git-145)
131
132
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
MacOS unconditionally disables interrupts of the physical timer on boot
4
and then continues to use the virtual one. We don't really want to support
5
a full physical timer emulation, so let's just ignore those writes.
6
7
Signed-off-by: Alexander Graf <graf@amazon.com>
8
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
9
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
10
---
11
target/arm/hvf/hvf.c | 9 +++++++++
12
1 file changed, 9 insertions(+)
13
14
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
15
index XXXXXXX..XXXXXXX 100644
16
--- a/target/arm/hvf/hvf.c
17
+++ b/target/arm/hvf/hvf.c
18
@@ -XXX,XX +XXX,XX @@
19
20
#include "qemu/osdep.h"
21
#include "qemu/error-report.h"
22
+#include "qemu/log.h"
23
24
#include "sysemu/runstate.h"
25
#include "sysemu/hvf.h"
26
@@ -XXX,XX +XXX,XX @@ void hvf_arm_init_debug(void)
27
#define SYSREG_OSLSR_EL1 SYSREG(2, 0, 1, 1, 4)
28
#define SYSREG_OSDLR_EL1 SYSREG(2, 0, 1, 3, 4)
29
#define SYSREG_CNTPCT_EL0 SYSREG(3, 3, 14, 0, 1)
30
+#define SYSREG_CNTP_CTL_EL0 SYSREG(3, 3, 14, 2, 1)
31
#define SYSREG_PMCR_EL0 SYSREG(3, 3, 9, 12, 0)
32
#define SYSREG_PMUSERENR_EL0 SYSREG(3, 3, 9, 14, 0)
33
#define SYSREG_PMCNTENSET_EL0 SYSREG(3, 3, 9, 12, 1)
34
@@ -XXX,XX +XXX,XX @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
35
case SYSREG_OSLAR_EL1:
36
env->cp15.oslsr_el1 = val & 1;
37
return 0;
38
+ case SYSREG_CNTP_CTL_EL0:
39
+ /*
40
+ * Guests should not rely on the physical counter, but macOS emits
41
+ * disable writes to it. Let it do so, but ignore the requests.
42
+ */
43
+ qemu_log_mask(LOG_UNIMP, "Unsupported write to CNTP_CTL_EL0\n");
44
+ return 0;
45
case SYSREG_OSDLR_EL1:
46
/* Dummy register */
47
return 0;
48
--
49
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
Some boards such as vmapple don't do real legacy PCI IRQ swizzling.
4
Instead, they just keep allocating more board IRQ lines for each new
5
legacy IRQ. Let's support that mode by giving instantiators a new
6
"nr_irqs" property they can use to support more than 4 legacy IRQ lines.
7
In this mode, GPEX will export more IRQ lines, one for each device.
8
9
Signed-off-by: Alexander Graf <graf@amazon.com>
10
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
11
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
12
---
13
14
v4:
15
16
* Turned pair of IRQ arrays into array of structs.
17
* Simplified swizzling logic selection.
18
19
hw/arm/sbsa-ref.c | 2 +-
20
hw/arm/virt.c | 2 +-
21
hw/i386/microvm.c | 2 +-
22
hw/loongarch/virt.c | 2 +-
23
hw/mips/loongson3_virt.c | 2 +-
24
hw/openrisc/virt.c | 12 +++++------
25
hw/pci-host/gpex.c | 43 ++++++++++++++++++++++++++++++--------
26
hw/riscv/virt.c | 12 +++++------
27
hw/xtensa/virt.c | 2 +-
28
include/hw/pci-host/gpex.h | 7 +++----
29
10 files changed, 55 insertions(+), 31 deletions(-)
30
31
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
32
index XXXXXXX..XXXXXXX 100644
33
--- a/hw/arm/sbsa-ref.c
34
+++ b/hw/arm/sbsa-ref.c
35
@@ -XXX,XX +XXX,XX @@ static void create_pcie(SBSAMachineState *sms)
36
/* Map IO port space */
37
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, base_pio);
38
39
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
40
+ for (i = 0; i < PCI_NUM_PINS; i++) {
41
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
42
qdev_get_gpio_in(sms->gic, irq + i));
43
gpex_set_irq_num(GPEX_HOST(dev), i, irq + i);
44
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
45
index XXXXXXX..XXXXXXX 100644
46
--- a/hw/arm/virt.c
47
+++ b/hw/arm/virt.c
48
@@ -XXX,XX +XXX,XX @@ static void create_pcie(VirtMachineState *vms)
49
/* Map IO port space */
50
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, base_pio);
51
52
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
53
+ for (i = 0; i < PCI_NUM_PINS; i++) {
54
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
55
qdev_get_gpio_in(vms->gic, irq + i));
56
gpex_set_irq_num(GPEX_HOST(dev), i, irq + i);
57
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
58
index XXXXXXX..XXXXXXX 100644
59
--- a/hw/i386/microvm.c
60
+++ b/hw/i386/microvm.c
61
@@ -XXX,XX +XXX,XX @@ static void create_gpex(MicrovmMachineState *mms)
62
mms->gpex.mmio64.base, mmio64_alias);
63
}
64
65
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
66
+ for (i = 0; i < PCI_NUM_PINS; i++) {
67
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
68
x86ms->gsi[mms->gpex.irq + i]);
69
}
70
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
71
index XXXXXXX..XXXXXXX 100644
72
--- a/hw/loongarch/virt.c
73
+++ b/hw/loongarch/virt.c
74
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
75
memory_region_add_subregion(get_system_memory(), VIRT_PCI_IO_BASE,
76
pio_alias);
77
78
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
79
+ for (i = 0; i < PCI_NUM_PINS; i++) {
80
sysbus_connect_irq(d, i,
81
qdev_get_gpio_in(pch_pic, 16 + i));
82
gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
83
diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c
84
index XXXXXXX..XXXXXXX 100644
85
--- a/hw/mips/loongson3_virt.c
86
+++ b/hw/mips/loongson3_virt.c
87
@@ -XXX,XX +XXX,XX @@ static inline void loongson3_virt_devices_init(MachineState *machine,
88
virt_memmap[VIRT_PCIE_PIO].base, s->pio_alias);
89
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, virt_memmap[VIRT_PCIE_PIO].base);
90
91
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
92
+ for (i = 0; i < PCI_NUM_PINS; i++) {
93
irq = qdev_get_gpio_in(pic, PCIE_IRQ_BASE + i);
94
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq);
95
gpex_set_irq_num(GPEX_HOST(dev), i, PCIE_IRQ_BASE + i);
96
diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c
97
index XXXXXXX..XXXXXXX 100644
98
--- a/hw/openrisc/virt.c
99
+++ b/hw/openrisc/virt.c
100
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(void *fdt, char *nodename, int irq_base,
101
{
102
int pin, dev;
103
uint32_t irq_map_stride = 0;
104
- uint32_t full_irq_map[GPEX_NUM_IRQS * GPEX_NUM_IRQS * 6] = {};
105
+ uint32_t full_irq_map[PCI_NUM_PINS * PCI_NUM_PINS * 6] = {};
106
uint32_t *irq_map = full_irq_map;
107
108
/*
109
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(void *fdt, char *nodename, int irq_base,
110
* possible slot) seeing the interrupt-map-mask will allow the table
111
* to wrap to any number of devices.
112
*/
113
- for (dev = 0; dev < GPEX_NUM_IRQS; dev++) {
114
+ for (dev = 0; dev < PCI_NUM_PINS; dev++) {
115
int devfn = dev << 3;
116
117
- for (pin = 0; pin < GPEX_NUM_IRQS; pin++) {
118
- int irq_nr = irq_base + ((pin + PCI_SLOT(devfn)) % GPEX_NUM_IRQS);
119
+ for (pin = 0; pin < PCI_NUM_PINS; pin++) {
120
+ int irq_nr = irq_base + ((pin + PCI_SLOT(devfn)) % PCI_NUM_PINS);
121
int i = 0;
122
123
/* Fill PCI address cells */
124
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(void *fdt, char *nodename, int irq_base,
125
}
126
127
qemu_fdt_setprop(fdt, nodename, "interrupt-map", full_irq_map,
128
- GPEX_NUM_IRQS * GPEX_NUM_IRQS *
129
+ PCI_NUM_PINS * PCI_NUM_PINS *
130
irq_map_stride * sizeof(uint32_t));
131
132
qemu_fdt_setprop_cells(fdt, nodename, "interrupt-map-mask",
133
@@ -XXX,XX +XXX,XX @@ static void openrisc_virt_pcie_init(OR1KVirtState *state,
134
memory_region_add_subregion(get_system_memory(), pio_base, alias);
135
136
/* Connect IRQ lines. */
137
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
138
+ for (i = 0; i < PCI_NUM_PINS; i++) {
139
pcie_irq = get_per_cpu_irq(cpus, num_cpus, irq_base + i);
140
141
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, pcie_irq);
142
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
143
index XXXXXXX..XXXXXXX 100644
144
--- a/hw/pci-host/gpex.c
145
+++ b/hw/pci-host/gpex.c
146
@@ -XXX,XX +XXX,XX @@
147
#include "qemu/osdep.h"
148
#include "qapi/error.h"
149
#include "hw/irq.h"
150
+#include "hw/pci/pci_bus.h"
151
#include "hw/pci-host/gpex.h"
152
#include "hw/qdev-properties.h"
153
#include "migration/vmstate.h"
154
@@ -XXX,XX +XXX,XX @@
155
* GPEX host
156
*/
157
158
+struct GPEXIrq {
159
+ qemu_irq irq;
160
+ int irq_num;
161
+};
162
+
163
static void gpex_set_irq(void *opaque, int irq_num, int level)
164
{
165
GPEXHost *s = opaque;
166
167
- qemu_set_irq(s->irq[irq_num], level);
168
+ qemu_set_irq(s->irq[irq_num].irq, level);
169
}
170
171
int gpex_set_irq_num(GPEXHost *s, int index, int gsi)
172
{
173
- if (index >= GPEX_NUM_IRQS) {
174
+ if (index >= s->num_irqs) {
175
return -EINVAL;
176
}
177
178
- s->irq_num[index] = gsi;
179
+ s->irq[index].irq_num = gsi;
180
return 0;
181
}
182
183
@@ -XXX,XX +XXX,XX @@ static PCIINTxRoute gpex_route_intx_pin_to_irq(void *opaque, int pin)
184
{
185
PCIINTxRoute route;
186
GPEXHost *s = opaque;
187
- int gsi = s->irq_num[pin];
188
+ int gsi = s->irq[pin].irq_num;
189
190
route.irq = gsi;
191
if (gsi < 0) {
192
@@ -XXX,XX +XXX,XX @@ static PCIINTxRoute gpex_route_intx_pin_to_irq(void *opaque, int pin)
193
return route;
194
}
195
196
+static int gpex_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin)
197
+{
198
+ PCIBus *bus = pci_device_root_bus(pci_dev);
199
+
200
+ return (PCI_SLOT(pci_dev->devfn) + pin) % bus->nirq;
201
+}
202
+
203
static void gpex_host_realize(DeviceState *dev, Error **errp)
204
{
205
PCIHostState *pci = PCI_HOST_BRIDGE(dev);
206
@@ -XXX,XX +XXX,XX @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
207
PCIExpressHost *pex = PCIE_HOST_BRIDGE(dev);
208
int i;
209
210
+ s->irq = g_malloc0_n(s->num_irqs, sizeof(*s->irq));
211
+
212
pcie_host_mmcfg_init(pex, PCIE_MMCFG_SIZE_MAX);
213
sysbus_init_mmio(sbd, &pex->mmio);
214
215
@@ -XXX,XX +XXX,XX @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
216
sysbus_init_mmio(sbd, &s->io_ioport);
217
}
218
219
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
220
- sysbus_init_irq(sbd, &s->irq[i]);
221
- s->irq_num[i] = -1;
222
+ for (i = 0; i < s->num_irqs; i++) {
223
+ sysbus_init_irq(sbd, &s->irq[i].irq);
224
+ s->irq[i].irq_num = -1;
225
}
226
227
pci->bus = pci_register_root_bus(dev, "pcie.0", gpex_set_irq,
228
- pci_swizzle_map_irq_fn, s, &s->io_mmio,
229
- &s->io_ioport, 0, 4, TYPE_PCIE_BUS);
230
+ gpex_swizzle_map_irq_fn,
231
+ s, &s->io_mmio, &s->io_ioport, 0,
232
+ s->num_irqs, TYPE_PCIE_BUS);
233
234
pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
235
qdev_realize(DEVICE(&s->gpex_root), BUS(pci->bus), &error_fatal);
236
}
237
238
+static void gpex_host_unrealize(DeviceState *dev)
239
+{
240
+ GPEXHost *s = GPEX_HOST(dev);
241
+
242
+ g_free(s->irq);
243
+}
244
+
245
static const char *gpex_host_root_bus_path(PCIHostState *host_bridge,
246
PCIBus *rootbus)
247
{
248
@@ -XXX,XX +XXX,XX @@ static Property gpex_host_properties[] = {
249
gpex_cfg.mmio64.base, 0),
250
DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MMIO_SIZE, GPEXHost,
251
gpex_cfg.mmio64.size, 0),
252
+ DEFINE_PROP_UINT8("num-irqs", GPEXHost, num_irqs, PCI_NUM_PINS),
253
DEFINE_PROP_END_OF_LIST(),
254
};
255
256
@@ -XXX,XX +XXX,XX @@ static void gpex_host_class_init(ObjectClass *klass, void *data)
257
258
hc->root_bus_path = gpex_host_root_bus_path;
259
dc->realize = gpex_host_realize;
260
+ dc->unrealize = gpex_host_unrealize;
261
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
262
dc->fw_name = "pci";
263
device_class_set_props(dc, gpex_host_properties);
264
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
265
index XXXXXXX..XXXXXXX 100644
266
--- a/hw/riscv/virt.c
267
+++ b/hw/riscv/virt.c
268
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(RISCVVirtState *s, void *fdt, char *nodename,
269
{
270
int pin, dev;
271
uint32_t irq_map_stride = 0;
272
- uint32_t full_irq_map[GPEX_NUM_IRQS * GPEX_NUM_IRQS *
273
+ uint32_t full_irq_map[PCI_NUM_PINS * PCI_NUM_PINS *
274
FDT_MAX_INT_MAP_WIDTH] = {};
275
uint32_t *irq_map = full_irq_map;
276
277
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(RISCVVirtState *s, void *fdt, char *nodename,
278
* possible slot) seeing the interrupt-map-mask will allow the table
279
* to wrap to any number of devices.
280
*/
281
- for (dev = 0; dev < GPEX_NUM_IRQS; dev++) {
282
+ for (dev = 0; dev < PCI_NUM_PINS; dev++) {
283
int devfn = dev * 0x8;
284
285
- for (pin = 0; pin < GPEX_NUM_IRQS; pin++) {
286
- int irq_nr = PCIE_IRQ + ((pin + PCI_SLOT(devfn)) % GPEX_NUM_IRQS);
287
+ for (pin = 0; pin < PCI_NUM_PINS; pin++) {
288
+ int irq_nr = PCIE_IRQ + ((pin + PCI_SLOT(devfn)) % PCI_NUM_PINS);
289
int i = 0;
290
291
/* Fill PCI address cells */
292
@@ -XXX,XX +XXX,XX @@ static void create_pcie_irq_map(RISCVVirtState *s, void *fdt, char *nodename,
293
}
294
295
qemu_fdt_setprop(fdt, nodename, "interrupt-map", full_irq_map,
296
- GPEX_NUM_IRQS * GPEX_NUM_IRQS *
297
+ PCI_NUM_PINS * PCI_NUM_PINS *
298
irq_map_stride * sizeof(uint32_t));
299
300
qemu_fdt_setprop_cells(fdt, nodename, "interrupt-map-mask",
301
@@ -XXX,XX +XXX,XX @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem,
302
303
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, pio_base);
304
305
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
306
+ for (i = 0; i < PCI_NUM_PINS; i++) {
307
irq = qdev_get_gpio_in(irqchip, PCIE_IRQ + i);
308
309
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq);
310
diff --git a/hw/xtensa/virt.c b/hw/xtensa/virt.c
311
index XXXXXXX..XXXXXXX 100644
312
--- a/hw/xtensa/virt.c
313
+++ b/hw/xtensa/virt.c
314
@@ -XXX,XX +XXX,XX @@ static void create_pcie(MachineState *ms, CPUXtensaState *env, int irq_base,
315
/* Connect IRQ lines. */
316
extints = xtensa_get_extints(env);
317
318
- for (i = 0; i < GPEX_NUM_IRQS; i++) {
319
+ for (i = 0; i < PCI_NUM_PINS; i++) {
320
void *q = extints[irq_base + i];
321
322
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, q);
323
diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
324
index XXXXXXX..XXXXXXX 100644
325
--- a/include/hw/pci-host/gpex.h
326
+++ b/include/hw/pci-host/gpex.h
327
@@ -XXX,XX +XXX,XX @@ OBJECT_DECLARE_SIMPLE_TYPE(GPEXHost, GPEX_HOST)
328
#define TYPE_GPEX_ROOT_DEVICE "gpex-root"
329
OBJECT_DECLARE_SIMPLE_TYPE(GPEXRootState, GPEX_ROOT_DEVICE)
330
331
-#define GPEX_NUM_IRQS 4
332
-
333
struct GPEXRootState {
334
/*< private >*/
335
PCIDevice parent_obj;
336
@@ -XXX,XX +XXX,XX @@ struct GPEXConfig {
337
PCIBus *bus;
338
};
339
340
+typedef struct GPEXIrq GPEXIrq;
341
struct GPEXHost {
342
/*< private >*/
343
PCIExpressHost parent_obj;
344
@@ -XXX,XX +XXX,XX @@ struct GPEXHost {
345
MemoryRegion io_mmio;
346
MemoryRegion io_ioport_window;
347
MemoryRegion io_mmio_window;
348
- qemu_irq irq[GPEX_NUM_IRQS];
349
- int irq_num[GPEX_NUM_IRQS];
350
+ GPEXIrq *irq;
351
+ uint8_t num_irqs;
352
353
bool allow_unmapped_accesses;
354
355
--
356
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
VMApple contains an "aes" engine device that it uses to encrypt and
4
decrypt its nvram. It has trivial hard coded keys it uses for that
5
purpose.
6
7
Add device emulation for this device model.
8
9
Signed-off-by: Alexander Graf <graf@amazon.com>
10
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
11
---
12
13
v3:
14
15
* Rebased on latest upstream and fixed minor breakages.
16
* Replaced legacy device reset method with Resettable method
17
18
v4:
19
20
* Improved logging of unimplemented functions and guest errors.
21
* Better adherence to naming and coding conventions.
22
* Cleaner error handling and recovery, including using g_autoptr
23
24
v5:
25
26
* More logging improvements
27
* Use xxx64_overflow() functions for hexdump buffer size calculations.
28
29
v7:
30
31
* Coding style tweaks.
32
33
hw/vmapple/Kconfig | 2 +
34
hw/vmapple/aes.c | 578 +++++++++++++++++++++++++++++++++++
35
hw/vmapple/meson.build | 1 +
36
hw/vmapple/trace-events | 14 +
37
include/hw/vmapple/vmapple.h | 17 ++
38
include/qemu/cutils.h | 15 +
39
util/hexdump.c | 18 ++
40
7 files changed, 645 insertions(+)
41
create mode 100644 hw/vmapple/aes.c
42
create mode 100644 include/hw/vmapple/vmapple.h
43
44
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
45
index XXXXXXX..XXXXXXX 100644
46
--- a/hw/vmapple/Kconfig
47
+++ b/hw/vmapple/Kconfig
48
@@ -1 +1,3 @@
49
+config VMAPPLE_AES
50
+ bool
51
52
diff --git a/hw/vmapple/aes.c b/hw/vmapple/aes.c
53
new file mode 100644
54
index XXXXXXX..XXXXXXX
55
--- /dev/null
56
+++ b/hw/vmapple/aes.c
57
@@ -XXX,XX +XXX,XX @@
58
+/*
59
+ * QEMU Apple AES device emulation
60
+ *
61
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
62
+ *
63
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
64
+ * See the COPYING file in the top-level directory.
65
+ *
66
+ * SPDX-License-Identifier: GPL-2.0-or-later
67
+ */
68
+
69
+#include "qemu/osdep.h"
70
+#include "trace.h"
71
+#include "crypto/hash.h"
72
+#include "crypto/aes.h"
73
+#include "crypto/cipher.h"
74
+#include "hw/irq.h"
75
+#include "hw/sysbus.h"
76
+#include "hw/vmapple/vmapple.h"
77
+#include "migration/vmstate.h"
78
+#include "qemu/cutils.h"
79
+#include "qemu/log.h"
80
+#include "qemu/module.h"
81
+#include "sysemu/dma.h"
82
+
83
+OBJECT_DECLARE_SIMPLE_TYPE(AESState, APPLE_AES)
84
+
85
+#define MAX_FIFO_SIZE 9
86
+
87
+#define CMD_KEY 0x1
88
+#define CMD_KEY_CONTEXT_SHIFT 27
89
+#define CMD_KEY_CONTEXT_MASK (0x1 << CMD_KEY_CONTEXT_SHIFT)
90
+#define CMD_KEY_SELECT_MAX_IDX 0x7
91
+#define CMD_KEY_SELECT_SHIFT 24
92
+#define CMD_KEY_SELECT_MASK (CMD_KEY_SELECT_MAX_IDX << CMD_KEY_SELECT_SHIFT)
93
+#define CMD_KEY_KEY_LEN_NUM 4u
94
+#define CMD_KEY_KEY_LEN_SHIFT 22
95
+#define CMD_KEY_KEY_LEN_MASK ((CMD_KEY_KEY_LEN_NUM - 1u) << CMD_KEY_KEY_LEN_SHIFT)
96
+#define CMD_KEY_ENCRYPT_SHIFT 20
97
+#define CMD_KEY_ENCRYPT_MASK (0x1 << CMD_KEY_ENCRYPT_SHIFT)
98
+#define CMD_KEY_BLOCK_MODE_SHIFT 16
99
+#define CMD_KEY_BLOCK_MODE_MASK (0x3 << CMD_KEY_BLOCK_MODE_SHIFT)
100
+#define CMD_IV 0x2
101
+#define CMD_IV_CONTEXT_SHIFT 26
102
+#define CMD_IV_CONTEXT_MASK (0x3 << CMD_KEY_CONTEXT_SHIFT)
103
+#define CMD_DSB 0x3
104
+#define CMD_SKG 0x4
105
+#define CMD_DATA 0x5
106
+#define CMD_DATA_KEY_CTX_SHIFT 27
107
+#define CMD_DATA_KEY_CTX_MASK (0x1 << CMD_DATA_KEY_CTX_SHIFT)
108
+#define CMD_DATA_IV_CTX_SHIFT 25
109
+#define CMD_DATA_IV_CTX_MASK (0x3 << CMD_DATA_IV_CTX_SHIFT)
110
+#define CMD_DATA_LEN_MASK 0xffffff
111
+#define CMD_STORE_IV 0x6
112
+#define CMD_STORE_IV_ADDR_MASK 0xffffff
113
+#define CMD_WRITE_REG 0x7
114
+#define CMD_FLAG 0x8
115
+#define CMD_FLAG_STOP_MASK BIT(26)
116
+#define CMD_FLAG_RAISE_IRQ_MASK BIT(27)
117
+#define CMD_FLAG_INFO_MASK 0xff
118
+#define CMD_MAX 0x10
119
+
120
+#define CMD_SHIFT 28
121
+
122
+#define REG_STATUS 0xc
123
+#define REG_STATUS_DMA_READ_RUNNING BIT(0)
124
+#define REG_STATUS_DMA_READ_PENDING BIT(1)
125
+#define REG_STATUS_DMA_WRITE_RUNNING BIT(2)
126
+#define REG_STATUS_DMA_WRITE_PENDING BIT(3)
127
+#define REG_STATUS_BUSY BIT(4)
128
+#define REG_STATUS_EXECUTING BIT(5)
129
+#define REG_STATUS_READY BIT(6)
130
+#define REG_STATUS_TEXT_DPA_SEEDED BIT(7)
131
+#define REG_STATUS_UNWRAP_DPA_SEEDED BIT(8)
132
+
133
+#define REG_IRQ_STATUS 0x18
134
+#define REG_IRQ_STATUS_INVALID_CMD BIT(2)
135
+#define REG_IRQ_STATUS_FLAG BIT(5)
136
+#define REG_IRQ_ENABLE 0x1c
137
+#define REG_WATERMARK 0x20
138
+#define REG_Q_STATUS 0x24
139
+#define REG_FLAG_INFO 0x30
140
+#define REG_FIFO 0x200
141
+
142
+static const uint32_t key_lens[CMD_KEY_KEY_LEN_NUM] = {
143
+ [0] = 16,
144
+ [1] = 24,
145
+ [2] = 32,
146
+ [3] = 64,
147
+};
148
+
149
+typedef struct Key {
150
+ uint32_t key_len;
151
+ uint8_t key[32];
152
+} Key;
153
+
154
+typedef struct IV {
155
+ uint32_t iv[4];
156
+} IV;
157
+
158
+static Key builtin_keys[CMD_KEY_SELECT_MAX_IDX + 1] = {
159
+ [1] = {
160
+ .key_len = 32,
161
+ .key = { 0x1 },
162
+ },
163
+ [2] = {
164
+ .key_len = 32,
165
+ .key = { 0x2 },
166
+ },
167
+ [3] = {
168
+ .key_len = 32,
169
+ .key = { 0x3 },
170
+ }
171
+};
172
+
173
+struct AESState {
174
+ SysBusDevice parent_obj;
175
+
176
+ qemu_irq irq;
177
+ MemoryRegion iomem1;
178
+ MemoryRegion iomem2;
179
+ AddressSpace *as;
180
+
181
+ uint32_t status;
182
+ uint32_t q_status;
183
+ uint32_t irq_status;
184
+ uint32_t irq_enable;
185
+ uint32_t watermark;
186
+ uint32_t flag_info;
187
+ uint32_t fifo[MAX_FIFO_SIZE];
188
+ uint32_t fifo_idx;
189
+ Key key[2];
190
+ IV iv[4];
191
+ bool is_encrypt;
192
+ QCryptoCipherMode block_mode;
193
+};
194
+
195
+static void aes_update_irq(AESState *s)
196
+{
197
+ qemu_set_irq(s->irq, !!(s->irq_status & s->irq_enable));
198
+}
199
+
200
+static uint64_t aes1_read(void *opaque, hwaddr offset, unsigned size)
201
+{
202
+ AESState *s = opaque;
203
+ uint64_t res = 0;
204
+
205
+ switch (offset) {
206
+ case REG_STATUS:
207
+ res = s->status;
208
+ break;
209
+ case REG_IRQ_STATUS:
210
+ res = s->irq_status;
211
+ break;
212
+ case REG_IRQ_ENABLE:
213
+ res = s->irq_enable;
214
+ break;
215
+ case REG_WATERMARK:
216
+ res = s->watermark;
217
+ break;
218
+ case REG_Q_STATUS:
219
+ res = s->q_status;
220
+ break;
221
+ case REG_FLAG_INFO:
222
+ res = s->flag_info;
223
+ break;
224
+
225
+ default:
226
+ qemu_log_mask(LOG_UNIMP, "%s: Unknown AES MMIO offset %" PRIx64 "\n",
227
+ __func__, offset);
228
+ break;
229
+ }
230
+
231
+ trace_aes_read(offset, res);
232
+
233
+ return res;
234
+}
235
+
236
+static void fifo_append(AESState *s, uint64_t val)
237
+{
238
+ if (s->fifo_idx == MAX_FIFO_SIZE) {
239
+ /* Exceeded the FIFO. Bail out */
240
+ return;
241
+ }
242
+
243
+ s->fifo[s->fifo_idx++] = val;
244
+}
245
+
246
+static bool has_payload(AESState *s, uint32_t elems)
247
+{
248
+ return s->fifo_idx >= (elems + 1);
249
+}
250
+
251
+static bool cmd_key(AESState *s)
252
+{
253
+ uint32_t cmd = s->fifo[0];
254
+ uint32_t key_select = (cmd & CMD_KEY_SELECT_MASK) >> CMD_KEY_SELECT_SHIFT;
255
+ uint32_t ctxt = (cmd & CMD_KEY_CONTEXT_MASK) >> CMD_KEY_CONTEXT_SHIFT;
256
+ uint32_t key_len;
257
+
258
+ switch ((cmd & CMD_KEY_BLOCK_MODE_MASK) >> CMD_KEY_BLOCK_MODE_SHIFT) {
259
+ case 0:
260
+ s->block_mode = QCRYPTO_CIPHER_MODE_ECB;
261
+ break;
262
+ case 1:
263
+ s->block_mode = QCRYPTO_CIPHER_MODE_CBC;
264
+ break;
265
+ default:
266
+ return false;
267
+ }
268
+
269
+ s->is_encrypt = cmd & CMD_KEY_ENCRYPT_MASK;
270
+ key_len = key_lens[(cmd & CMD_KEY_KEY_LEN_MASK) >> CMD_KEY_KEY_LEN_SHIFT];
271
+
272
+ if (key_select) {
273
+ trace_aes_cmd_key_select_builtin(ctxt, key_select,
274
+ s->is_encrypt ? "en" : "de",
275
+ QCryptoCipherMode_str(s->block_mode));
276
+ s->key[ctxt] = builtin_keys[key_select];
277
+ } else {
278
+ trace_aes_cmd_key_select_new(ctxt, key_len,
279
+ s->is_encrypt ? "en" : "de",
280
+ QCryptoCipherMode_str(s->block_mode));
281
+ if (key_len > sizeof(s->key[ctxt].key)) {
282
+ return false;
283
+ }
284
+ if (!has_payload(s, key_len / sizeof(uint32_t))) {
285
+ /* wait for payload */
286
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: No payload\n", __func__);
287
+ return false;
288
+ }
289
+ memcpy(&s->key[ctxt].key, &s->fifo[1], key_len);
290
+ s->key[ctxt].key_len = key_len;
291
+ }
292
+
293
+ return true;
294
+}
295
+
296
+static bool cmd_iv(AESState *s)
297
+{
298
+ uint32_t cmd = s->fifo[0];
299
+ uint32_t ctxt = (cmd & CMD_IV_CONTEXT_MASK) >> CMD_IV_CONTEXT_SHIFT;
300
+
301
+ if (!has_payload(s, 4)) {
302
+ /* wait for payload */
303
+ return false;
304
+ }
305
+ memcpy(&s->iv[ctxt].iv, &s->fifo[1], sizeof(s->iv[ctxt].iv));
306
+ trace_aes_cmd_iv(ctxt, s->fifo[1], s->fifo[2], s->fifo[3], s->fifo[4]);
307
+
308
+ return true;
309
+}
310
+
311
+static void dump_data(const char *desc, const void *p, size_t len)
312
+{
313
+ static const size_t MAX_LEN = 0x1000;
314
+ char hex[MAX_LEN * 2 + 1] = "";
315
+
316
+ if (len > MAX_LEN) {
317
+ return;
318
+ }
319
+
320
+ qemu_hexdump_to_buffer(hex, sizeof(hex), p, len);
321
+ trace_aes_dump_data(desc, hex);
322
+}
323
+
324
+static bool cmd_data(AESState *s)
325
+{
326
+ uint32_t cmd = s->fifo[0];
327
+ uint32_t ctxt_iv = 0;
328
+ uint32_t ctxt_key = (cmd & CMD_DATA_KEY_CTX_MASK) >> CMD_DATA_KEY_CTX_SHIFT;
329
+ uint32_t len = cmd & CMD_DATA_LEN_MASK;
330
+ uint64_t src_addr = s->fifo[2];
331
+ uint64_t dst_addr = s->fifo[3];
332
+ QCryptoCipherAlgo alg;
333
+ g_autoptr(QCryptoCipher) cipher = NULL;
334
+ g_autoptr(GByteArray) src = NULL;
335
+ g_autoptr(GByteArray) dst = NULL;
336
+ MemTxResult r;
337
+
338
+ src_addr |= ((uint64_t)s->fifo[1] << 16) & 0xffff00000000ULL;
339
+ dst_addr |= ((uint64_t)s->fifo[1] << 32) & 0xffff00000000ULL;
340
+
341
+ trace_aes_cmd_data(ctxt_key, ctxt_iv, src_addr, dst_addr, len);
342
+
343
+ if (!has_payload(s, 3)) {
344
+ /* wait for payload */
345
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: No payload\n", __func__);
346
+ return false;
347
+ }
348
+
349
+ if (ctxt_key >= ARRAY_SIZE(s->key) ||
350
+ ctxt_iv >= ARRAY_SIZE(s->iv)) {
351
+ /* Invalid input */
352
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Invalid key or iv\n", __func__);
353
+ return false;
354
+ }
355
+
356
+ src = g_byte_array_sized_new(len);
357
+ g_byte_array_set_size(src, len);
358
+ dst = g_byte_array_sized_new(len);
359
+ g_byte_array_set_size(dst, len);
360
+
361
+ r = dma_memory_read(s->as, src_addr, src->data, len, MEMTXATTRS_UNSPECIFIED);
362
+ if (r != MEMTX_OK) {
363
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: DMA read of %"PRIu32" bytes "
364
+ "from 0x%"PRIx64" failed. (r=%d)\n",
365
+ __func__, len, src_addr, r);
366
+ return false;
367
+ }
368
+
369
+ dump_data("cmd_data(): src_data=", src->data, len);
370
+
371
+ switch (s->key[ctxt_key].key_len) {
372
+ case 128 / 8:
373
+ alg = QCRYPTO_CIPHER_ALGO_AES_128;
374
+ break;
375
+ case 192 / 8:
376
+ alg = QCRYPTO_CIPHER_ALGO_AES_192;
377
+ break;
378
+ case 256 / 8:
379
+ alg = QCRYPTO_CIPHER_ALGO_AES_256;
380
+ break;
381
+ default:
382
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Invalid key length\n", __func__);
383
+ return false;
384
+ }
385
+ cipher = qcrypto_cipher_new(alg, s->block_mode,
386
+ s->key[ctxt_key].key,
387
+ s->key[ctxt_key].key_len, NULL);
388
+ if (!cipher) {
389
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Failed to create cipher object\n",
390
+ __func__);
391
+ return false;
392
+ }
393
+ if (s->block_mode != QCRYPTO_CIPHER_MODE_ECB) {
394
+ if (qcrypto_cipher_setiv(cipher, (void *)s->iv[ctxt_iv].iv,
395
+ sizeof(s->iv[ctxt_iv].iv), NULL) != 0) {
396
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Failed to set IV\n", __func__);
397
+ return false;
398
+ }
399
+ }
400
+ if (s->is_encrypt) {
401
+ if (qcrypto_cipher_encrypt(cipher, src->data, dst->data, len, NULL) != 0) {
402
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Encryption failed\n", __func__);
403
+ return false;
404
+ }
405
+ } else {
406
+ if (qcrypto_cipher_decrypt(cipher, src->data, dst->data, len, NULL) != 0) {
407
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Decryption failed\n", __func__);
408
+ return false;
409
+ }
410
+ }
411
+
412
+ dump_data("cmd_data(): dst_data=", dst->data, len);
413
+ r = dma_memory_write(s->as, dst_addr, dst->data, len, MEMTXATTRS_UNSPECIFIED);
414
+ if (r != MEMTX_OK) {
415
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: DMA write of %"PRIu32" bytes "
416
+ "to 0x%"PRIx64" failed. (r=%d)\n",
417
+ __func__, len, src_addr, r);
418
+ return false;
419
+ }
420
+
421
+ return true;
422
+}
423
+
424
+static bool cmd_store_iv(AESState *s)
425
+{
426
+ uint32_t cmd = s->fifo[0];
427
+ uint32_t ctxt = (cmd & CMD_IV_CONTEXT_MASK) >> CMD_IV_CONTEXT_SHIFT;
428
+ uint64_t addr = s->fifo[1];
429
+
430
+ if (!has_payload(s, 1)) {
431
+ /* wait for payload */
432
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: No payload\n", __func__);
433
+ return false;
434
+ }
435
+
436
+ if (ctxt >= ARRAY_SIZE(s->iv)) {
437
+ /* Invalid context selected */
438
+ return false;
439
+ }
440
+
441
+ addr |= ((uint64_t)cmd << 32) & 0xff00000000ULL;
442
+ cpu_physical_memory_write(addr, &s->iv[ctxt].iv, sizeof(s->iv[ctxt].iv));
443
+
444
+ trace_aes_cmd_store_iv(ctxt, addr, s->iv[ctxt].iv[0], s->iv[ctxt].iv[1],
445
+ s->iv[ctxt].iv[2], s->iv[ctxt].iv[3]);
446
+
447
+ return true;
448
+}
449
+
450
+static bool cmd_flag(AESState *s)
451
+{
452
+ uint32_t cmd = s->fifo[0];
453
+ uint32_t raise_irq = cmd & CMD_FLAG_RAISE_IRQ_MASK;
454
+
455
+ /* We always process data when it's coming in, so fire an IRQ immediately */
456
+ if (raise_irq) {
457
+ s->irq_status |= REG_IRQ_STATUS_FLAG;
458
+ }
459
+
460
+ s->flag_info = cmd & CMD_FLAG_INFO_MASK;
461
+
462
+ trace_aes_cmd_flag(!!raise_irq, s->flag_info);
463
+
464
+ return true;
465
+}
466
+
467
+static void fifo_process(AESState *s)
468
+{
469
+ uint32_t cmd = s->fifo[0] >> CMD_SHIFT;
470
+ bool success = false;
471
+
472
+ if (!s->fifo_idx) {
473
+ return;
474
+ }
475
+
476
+ switch (cmd) {
477
+ case CMD_KEY:
478
+ success = cmd_key(s);
479
+ break;
480
+ case CMD_IV:
481
+ success = cmd_iv(s);
482
+ break;
483
+ case CMD_DATA:
484
+ success = cmd_data(s);
485
+ break;
486
+ case CMD_STORE_IV:
487
+ success = cmd_store_iv(s);
488
+ break;
489
+ case CMD_FLAG:
490
+ success = cmd_flag(s);
491
+ break;
492
+ default:
493
+ s->irq_status |= REG_IRQ_STATUS_INVALID_CMD;
494
+ break;
495
+ }
496
+
497
+ if (success) {
498
+ s->fifo_idx = 0;
499
+ }
500
+
501
+ trace_aes_fifo_process(cmd, success ? 1 : 0);
502
+}
503
+
504
+static void aes1_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
505
+{
506
+ AESState *s = opaque;
507
+
508
+ trace_aes_write(offset, val);
509
+
510
+ switch (offset) {
511
+ case REG_IRQ_STATUS:
512
+ s->irq_status &= ~val;
513
+ break;
514
+ case REG_IRQ_ENABLE:
515
+ s->irq_enable = val;
516
+ break;
517
+ case REG_FIFO:
518
+ fifo_append(s, val);
519
+ fifo_process(s);
520
+ break;
521
+ default:
522
+ qemu_log_mask(LOG_UNIMP,
523
+ "%s: Unknown AES MMIO offset %"PRIx64", data %"PRIx64"\n",
524
+ __func__, offset, val);
525
+ return;
526
+ }
527
+
528
+ aes_update_irq(s);
529
+}
530
+
531
+static const MemoryRegionOps aes1_ops = {
532
+ .read = aes1_read,
533
+ .write = aes1_write,
534
+ .endianness = DEVICE_NATIVE_ENDIAN,
535
+ .valid = {
536
+ .min_access_size = 4,
537
+ .max_access_size = 8,
538
+ },
539
+ .impl = {
540
+ .min_access_size = 4,
541
+ .max_access_size = 4,
542
+ },
543
+};
544
+
545
+static uint64_t aes2_read(void *opaque, hwaddr offset, unsigned size)
546
+{
547
+ uint64_t res = 0;
548
+
549
+ switch (offset) {
550
+ case 0:
551
+ res = 0;
552
+ break;
553
+ default:
554
+ qemu_log_mask(LOG_UNIMP,
555
+ "%s: Unknown AES MMIO 2 offset %"PRIx64"\n",
556
+ __func__, offset);
557
+ break;
558
+ }
559
+
560
+ trace_aes_2_read(offset, res);
561
+
562
+ return res;
563
+}
564
+
565
+static void aes2_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
566
+{
567
+ trace_aes_2_write(offset, val);
568
+
569
+ switch (offset) {
570
+ default:
571
+ qemu_log_mask(LOG_UNIMP,
572
+ "%s: Unknown AES MMIO 2 offset %"PRIx64", data %"PRIx64"\n",
573
+ __func__, offset, val);
574
+ return;
575
+ }
576
+}
577
+
578
+static const MemoryRegionOps aes2_ops = {
579
+ .read = aes2_read,
580
+ .write = aes2_write,
581
+ .endianness = DEVICE_NATIVE_ENDIAN,
582
+ .valid = {
583
+ .min_access_size = 4,
584
+ .max_access_size = 8,
585
+ },
586
+ .impl = {
587
+ .min_access_size = 4,
588
+ .max_access_size = 4,
589
+ },
590
+};
591
+
592
+static void aes_reset(Object *obj, ResetType type)
593
+{
594
+ AESState *s = APPLE_AES(obj);
595
+
596
+ s->status = 0x3f80;
597
+ s->q_status = 2;
598
+ s->irq_status = 0;
599
+ s->irq_enable = 0;
600
+ s->watermark = 0;
601
+}
602
+
603
+static void aes_init(Object *obj)
604
+{
605
+ AESState *s = APPLE_AES(obj);
606
+
607
+ memory_region_init_io(&s->iomem1, obj, &aes1_ops, s, TYPE_APPLE_AES, 0x4000);
608
+ memory_region_init_io(&s->iomem2, obj, &aes2_ops, s, TYPE_APPLE_AES, 0x4000);
609
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem1);
610
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem2);
611
+ sysbus_init_irq(SYS_BUS_DEVICE(s), &s->irq);
612
+ s->as = &address_space_memory;
613
+}
614
+
615
+static void aes_class_init(ObjectClass *klass, void *data)
616
+{
617
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
618
+
619
+ rc->phases.hold = aes_reset;
620
+}
621
+
622
+static const TypeInfo aes_info = {
623
+ .name = TYPE_APPLE_AES,
624
+ .parent = TYPE_SYS_BUS_DEVICE,
625
+ .instance_size = sizeof(AESState),
626
+ .class_init = aes_class_init,
627
+ .instance_init = aes_init,
628
+};
629
+
630
+static void aes_register_types(void)
631
+{
632
+ type_register_static(&aes_info);
633
+}
634
+
635
+type_init(aes_register_types)
636
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
637
index XXXXXXX..XXXXXXX 100644
638
--- a/hw/vmapple/meson.build
639
+++ b/hw/vmapple/meson.build
640
@@ -0,0 +1 @@
641
+system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c'))
642
diff --git a/hw/vmapple/trace-events b/hw/vmapple/trace-events
643
index XXXXXXX..XXXXXXX 100644
644
--- a/hw/vmapple/trace-events
645
+++ b/hw/vmapple/trace-events
646
@@ -XXX,XX +XXX,XX @@
647
# See docs/devel/tracing.rst for syntax documentation.
648
649
+# aes.c
650
+aes_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
651
+aes_cmd_key_select_builtin(uint32_t ctx, uint32_t key_id, const char *direction, const char *cipher) "[%d] Selecting builtin key %d to %scrypt with %s"
652
+aes_cmd_key_select_new(uint32_t ctx, uint32_t key_len, const char *direction, const char *cipher) "[%d] Selecting new key size=%d to %scrypt with %s"
653
+aes_cmd_iv(uint32_t ctx, uint32_t iv0, uint32_t iv1, uint32_t iv2, uint32_t iv3) "[%d] 0x%08x 0x%08x 0x%08x 0x%08x"
654
+aes_cmd_data(uint32_t key, uint32_t iv, uint64_t src, uint64_t dst, uint32_t len) "[key=%d iv=%d] src=0x%"PRIx64" dst=0x%"PRIx64" len=0x%x"
655
+aes_cmd_store_iv(uint32_t ctx, uint64_t addr, uint32_t iv0, uint32_t iv1, uint32_t iv2, uint32_t iv3) "[%d] addr=0x%"PRIx64"x -> 0x%08x 0x%08x 0x%08x 0x%08x"
656
+aes_cmd_flag(uint32_t raise, uint32_t flag_info) "raise=%d flag_info=0x%x"
657
+aes_fifo_process(uint32_t cmd, uint32_t success) "cmd=%d success=%d"
658
+aes_write(uint64_t offset, uint64_t val) "offset=0x%"PRIx64" val=0x%"PRIx64
659
+aes_2_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
660
+aes_2_write(uint64_t offset, uint64_t val) "offset=0x%"PRIx64" val=0x%"PRIx64
661
+aes_dump_data(const char *desc, const char *hex) "%s%s"
662
+
663
diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h
664
new file mode 100644
665
index XXXXXXX..XXXXXXX
666
--- /dev/null
667
+++ b/include/hw/vmapple/vmapple.h
668
@@ -XXX,XX +XXX,XX @@
669
+/*
670
+ * Devices specific to the VMApple machine type
671
+ *
672
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
673
+ *
674
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
675
+ * See the COPYING file in the top-level directory.
676
+ *
677
+ * SPDX-License-Identifier: GPL-2.0-or-later
678
+ */
679
+
680
+#ifndef HW_VMAPPLE_VMAPPLE_H
681
+#define HW_VMAPPLE_VMAPPLE_H
682
+
683
+#define TYPE_APPLE_AES "apple-aes"
684
+
685
+#endif /* HW_VMAPPLE_VMAPPLE_H */
686
diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h
687
index XXXXXXX..XXXXXXX 100644
688
--- a/include/qemu/cutils.h
689
+++ b/include/qemu/cutils.h
690
@@ -XXX,XX +XXX,XX @@ GString *qemu_hexdump_line(GString *str, const void *buf, size_t len,
691
void qemu_hexdump(FILE *fp, const char *prefix,
692
const void *bufptr, size_t size);
693
694
+/**
695
+ * qemu_hexdump_to_buffer:
696
+ * @buffer: output string buffer
697
+ * @buffer_size: amount of available space in buffer. Must be at least
698
+ * data_size*2+1.
699
+ * @data: input bytes
700
+ * @data_size: number of bytes in data
701
+ *
702
+ * Converts the @data_size bytes in @data into hex digit pairs, writing them to
703
+ * @buffer. Finally, a nul terminating character is written; @buffer therefore
704
+ * needs space for (data_size*2+1) chars.
705
+ */
706
+void qemu_hexdump_to_buffer(char *restrict buffer, size_t buffer_size,
707
+ const uint8_t *restrict data, size_t data_size);
708
+
709
#endif
710
diff --git a/util/hexdump.c b/util/hexdump.c
711
index XXXXXXX..XXXXXXX 100644
712
--- a/util/hexdump.c
713
+++ b/util/hexdump.c
714
@@ -XXX,XX +XXX,XX @@
715
716
#include "qemu/osdep.h"
717
#include "qemu/cutils.h"
718
+#include "qemu/host-utils.h"
719
720
static inline char hexdump_nibble(unsigned x)
721
{
722
@@ -XXX,XX +XXX,XX @@ void qemu_hexdump(FILE *fp, const char *prefix,
723
}
724
725
}
726
+
727
+void qemu_hexdump_to_buffer(char *restrict buffer, size_t buffer_size,
728
+ const uint8_t *restrict data, size_t data_size)
729
+{
730
+ size_t i;
731
+ uint64_t required_buffer_size;
732
+ bool overflow = umul64_overflow(data_size, 2, &required_buffer_size);
733
+ overflow |= uadd64_overflow(required_buffer_size, 1, &required_buffer_size);
734
+ assert(!overflow && buffer_size >= required_buffer_size);
735
+
736
+ for (i = 0; i < data_size; i++) {
737
+ uint8_t val = data[i];
738
+ *(buffer++) = hexdump_nibble(val >> 4);
739
+ *(buffer++) = hexdump_nibble(val & 0xf);
740
+ }
741
+ *buffer = '\0';
742
+}
743
--
744
2.39.3 (Apple Git-145)
745
746
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
The VMApple machine exposes AUX and ROOT block devices (as well as USB OTG
4
emulation) via virtio-pci as well as a special, simple backdoor platform
5
device.
6
7
This patch implements this backdoor platform device to the best of my
8
understanding. I left out any USB OTG parts; they're only needed for
9
guest recovery and I don't understand the protocol yet.
10
11
Signed-off-by: Alexander Graf <graf@amazon.com>
12
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
13
---
14
15
v4:
16
17
* Moved most header code to .c, rest to vmapple.h
18
* Better compliance with coding, naming, and formatting conventions.
19
20
hw/vmapple/Kconfig | 3 +
21
hw/vmapple/bdif.c | 261 +++++++++++++++++++++++++++++++++++
22
hw/vmapple/meson.build | 1 +
23
hw/vmapple/trace-events | 5 +
24
include/hw/vmapple/vmapple.h | 2 +
25
5 files changed, 272 insertions(+)
26
create mode 100644 hw/vmapple/bdif.c
27
28
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
29
index XXXXXXX..XXXXXXX 100644
30
--- a/hw/vmapple/Kconfig
31
+++ b/hw/vmapple/Kconfig
32
@@ -XXX,XX +XXX,XX @@
33
config VMAPPLE_AES
34
bool
35
36
+config VMAPPLE_BDIF
37
+ bool
38
+
39
diff --git a/hw/vmapple/bdif.c b/hw/vmapple/bdif.c
40
new file mode 100644
41
index XXXXXXX..XXXXXXX
42
--- /dev/null
43
+++ b/hw/vmapple/bdif.c
44
@@ -XXX,XX +XXX,XX @@
45
+/*
46
+ * VMApple Backdoor Interface
47
+ *
48
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
49
+ *
50
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
51
+ * See the COPYING file in the top-level directory.
52
+ *
53
+ * SPDX-License-Identifier: GPL-2.0-or-later
54
+ */
55
+
56
+#include "qemu/osdep.h"
57
+#include "qemu/units.h"
58
+#include "qemu/log.h"
59
+#include "qemu/module.h"
60
+#include "trace.h"
61
+#include "hw/vmapple/vmapple.h"
62
+#include "hw/sysbus.h"
63
+#include "hw/block/block.h"
64
+#include "qapi/error.h"
65
+#include "sysemu/block-backend.h"
66
+
67
+OBJECT_DECLARE_SIMPLE_TYPE(VMAppleBdifState, VMAPPLE_BDIF)
68
+
69
+struct VMAppleBdifState {
70
+ SysBusDevice parent_obj;
71
+
72
+ BlockBackend *aux;
73
+ BlockBackend *root;
74
+ MemoryRegion mmio;
75
+};
76
+
77
+#define VMAPPLE_BDIF_SIZE 0x00200000
78
+
79
+#define REG_DEVID_MASK 0xffff0000
80
+#define DEVID_ROOT 0x00000000
81
+#define DEVID_AUX 0x00010000
82
+#define DEVID_USB 0x00100000
83
+
84
+#define REG_STATUS 0x0
85
+#define REG_STATUS_ACTIVE BIT(0)
86
+#define REG_CFG 0x4
87
+#define REG_CFG_ACTIVE BIT(1)
88
+#define REG_UNK1 0x8
89
+#define REG_BUSY 0x10
90
+#define REG_BUSY_READY BIT(0)
91
+#define REG_UNK2 0x400
92
+#define REG_CMD 0x408
93
+#define REG_NEXT_DEVICE 0x420
94
+#define REG_UNK3 0x434
95
+
96
+typedef struct VblkSector {
97
+ uint32_t pad;
98
+ uint32_t pad2;
99
+ uint32_t sector;
100
+ uint32_t pad3;
101
+} VblkSector;
102
+
103
+typedef struct VblkReqCmd {
104
+ uint64_t addr;
105
+ uint32_t len;
106
+ uint32_t flags;
107
+} VblkReqCmd;
108
+
109
+typedef struct VblkReq {
110
+ VblkReqCmd sector;
111
+ VblkReqCmd data;
112
+ VblkReqCmd retval;
113
+} VblkReq;
114
+
115
+#define VBLK_DATA_FLAGS_READ 0x00030001
116
+#define VBLK_DATA_FLAGS_WRITE 0x00010001
117
+
118
+#define VBLK_RET_SUCCESS 0
119
+#define VBLK_RET_FAILED 1
120
+
121
+static uint64_t bdif_read(void *opaque, hwaddr offset, unsigned size)
122
+{
123
+ uint64_t ret = -1;
124
+ uint64_t devid = offset & REG_DEVID_MASK;
125
+
126
+ switch (offset & ~REG_DEVID_MASK) {
127
+ case REG_STATUS:
128
+ ret = REG_STATUS_ACTIVE;
129
+ break;
130
+ case REG_CFG:
131
+ ret = REG_CFG_ACTIVE;
132
+ break;
133
+ case REG_UNK1:
134
+ ret = 0x420;
135
+ break;
136
+ case REG_BUSY:
137
+ ret = REG_BUSY_READY;
138
+ break;
139
+ case REG_UNK2:
140
+ ret = 0x1;
141
+ break;
142
+ case REG_UNK3:
143
+ ret = 0x0;
144
+ break;
145
+ case REG_NEXT_DEVICE:
146
+ switch (devid) {
147
+ case DEVID_ROOT:
148
+ ret = 0x8000000;
149
+ break;
150
+ case DEVID_AUX:
151
+ ret = 0x10000;
152
+ break;
153
+ }
154
+ break;
155
+ }
156
+
157
+ trace_bdif_read(offset, size, ret);
158
+ return ret;
159
+}
160
+
161
+static void le2cpu_sector(VblkSector *sector)
162
+{
163
+ sector->sector = le32_to_cpu(sector->sector);
164
+}
165
+
166
+static void le2cpu_reqcmd(VblkReqCmd *cmd)
167
+{
168
+ cmd->addr = le64_to_cpu(cmd->addr);
169
+ cmd->len = le32_to_cpu(cmd->len);
170
+ cmd->flags = le32_to_cpu(cmd->flags);
171
+}
172
+
173
+static void le2cpu_req(VblkReq *req)
174
+{
175
+ le2cpu_reqcmd(&req->sector);
176
+ le2cpu_reqcmd(&req->data);
177
+ le2cpu_reqcmd(&req->retval);
178
+}
179
+
180
+static void vblk_cmd(uint64_t devid, BlockBackend *blk, uint64_t value,
181
+ uint64_t static_off)
182
+{
183
+ VblkReq req;
184
+ VblkSector sector;
185
+ uint64_t off = 0;
186
+ char *buf = NULL;
187
+ uint8_t ret = VBLK_RET_FAILED;
188
+ int r;
189
+
190
+ cpu_physical_memory_read(value, &req, sizeof(req));
191
+ le2cpu_req(&req);
192
+
193
+ if (req.sector.len != sizeof(sector)) {
194
+ ret = VBLK_RET_FAILED;
195
+ goto out;
196
+ }
197
+
198
+ /* Read the vblk command */
199
+ cpu_physical_memory_read(req.sector.addr, &sector, sizeof(sector));
200
+ le2cpu_sector(&sector);
201
+
202
+ off = sector.sector * 512ULL + static_off;
203
+
204
+ /* Sanity check that we're not allocating bogus sizes */
205
+ if (req.data.len > 128 * MiB) {
206
+ goto out;
207
+ }
208
+
209
+ buf = g_malloc0(req.data.len);
210
+ switch (req.data.flags) {
211
+ case VBLK_DATA_FLAGS_READ:
212
+ r = blk_pread(blk, off, req.data.len, buf, 0);
213
+ trace_bdif_vblk_read(devid == DEVID_AUX ? "aux" : "root",
214
+ req.data.addr, off, req.data.len, r);
215
+ if (r < 0) {
216
+ goto out;
217
+ }
218
+ cpu_physical_memory_write(req.data.addr, buf, req.data.len);
219
+ ret = VBLK_RET_SUCCESS;
220
+ break;
221
+ case VBLK_DATA_FLAGS_WRITE:
222
+ /* Not needed, iBoot only reads */
223
+ break;
224
+ default:
225
+ break;
226
+ }
227
+
228
+out:
229
+ g_free(buf);
230
+ cpu_physical_memory_write(req.retval.addr, &ret, 1);
231
+}
232
+
233
+static void bdif_write(void *opaque, hwaddr offset,
234
+ uint64_t value, unsigned size)
235
+{
236
+ VMAppleBdifState *s = opaque;
237
+ uint64_t devid = (offset & REG_DEVID_MASK);
238
+
239
+ trace_bdif_write(offset, size, value);
240
+
241
+ switch (offset & ~REG_DEVID_MASK) {
242
+ case REG_CMD:
243
+ switch (devid) {
244
+ case DEVID_ROOT:
245
+ vblk_cmd(devid, s->root, value, 0x0);
246
+ break;
247
+ case DEVID_AUX:
248
+ vblk_cmd(devid, s->aux, value, 0x0);
249
+ break;
250
+ }
251
+ break;
252
+ }
253
+}
254
+
255
+static const MemoryRegionOps bdif_ops = {
256
+ .read = bdif_read,
257
+ .write = bdif_write,
258
+ .endianness = DEVICE_NATIVE_ENDIAN,
259
+ .valid = {
260
+ .min_access_size = 1,
261
+ .max_access_size = 8,
262
+ },
263
+ .impl = {
264
+ .min_access_size = 1,
265
+ .max_access_size = 8,
266
+ },
267
+};
268
+
269
+static void bdif_init(Object *obj)
270
+{
271
+ VMAppleBdifState *s = VMAPPLE_BDIF(obj);
272
+
273
+ memory_region_init_io(&s->mmio, obj, &bdif_ops, obj,
274
+ "VMApple Backdoor Interface", VMAPPLE_BDIF_SIZE);
275
+ sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
276
+}
277
+
278
+static Property bdif_properties[] = {
279
+ DEFINE_PROP_DRIVE("aux", VMAppleBdifState, aux),
280
+ DEFINE_PROP_DRIVE("root", VMAppleBdifState, root),
281
+ DEFINE_PROP_END_OF_LIST(),
282
+};
283
+
284
+static void bdif_class_init(ObjectClass *klass, void *data)
285
+{
286
+ DeviceClass *dc = DEVICE_CLASS(klass);
287
+
288
+ dc->desc = "VMApple Backdoor Interface";
289
+ device_class_set_props(dc, bdif_properties);
290
+}
291
+
292
+static const TypeInfo bdif_info = {
293
+ .name = TYPE_VMAPPLE_BDIF,
294
+ .parent = TYPE_SYS_BUS_DEVICE,
295
+ .instance_size = sizeof(VMAppleBdifState),
296
+ .instance_init = bdif_init,
297
+ .class_init = bdif_class_init,
298
+};
299
+
300
+static void bdif_register_types(void)
301
+{
302
+ type_register_static(&bdif_info);
303
+}
304
+
305
+type_init(bdif_register_types)
306
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
307
index XXXXXXX..XXXXXXX 100644
308
--- a/hw/vmapple/meson.build
309
+++ b/hw/vmapple/meson.build
310
@@ -1 +1,2 @@
311
system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c'))
312
+system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c'))
313
diff --git a/hw/vmapple/trace-events b/hw/vmapple/trace-events
314
index XXXXXXX..XXXXXXX 100644
315
--- a/hw/vmapple/trace-events
316
+++ b/hw/vmapple/trace-events
317
@@ -XXX,XX +XXX,XX @@ aes_2_read(uint64_t offset, uint64_t res) "offset=0x%"PRIx64" res=0x%"PRIx64
318
aes_2_write(uint64_t offset, uint64_t val) "offset=0x%"PRIx64" val=0x%"PRIx64
319
aes_dump_data(const char *desc, const char *hex) "%s%s"
320
321
+# bdif.c
322
+bdif_read(uint64_t offset, uint32_t size, uint64_t value) "offset=0x%"PRIx64" size=0x%x value=0x%"PRIx64
323
+bdif_write(uint64_t offset, uint32_t size, uint64_t value) "offset=0x%"PRIx64" size=0x%x value=0x%"PRIx64
324
+bdif_vblk_read(const char *dev, uint64_t addr, uint64_t offset, uint32_t len, int r) "dev=%s addr=0x%"PRIx64" off=0x%"PRIx64" size=0x%x r=%d"
325
+
326
diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h
327
index XXXXXXX..XXXXXXX 100644
328
--- a/include/hw/vmapple/vmapple.h
329
+++ b/include/hw/vmapple/vmapple.h
330
@@ -XXX,XX +XXX,XX @@
331
332
#define TYPE_APPLE_AES "apple-aes"
333
334
+#define TYPE_VMAPPLE_BDIF "vmapple-bdif"
335
+
336
#endif /* HW_VMAPPLE_VMAPPLE_H */
337
--
338
2.39.3 (Apple Git-145)
339
340
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
Instead of device tree or other more standardized means, VMApple passes
4
platform configuration to the first stage boot loader in a binary encoded
5
format that resides at a dedicated RAM region in physical address space.
6
7
This patch models this configuration space as a qdev device which we can
8
then map at the fixed location in the address space. That way, we can
9
influence and annotate all configuration fields easily.
10
11
Signed-off-by: Alexander Graf <graf@amazon.com>
12
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
13
---
14
15
v3:
16
17
* Replaced legacy device reset method with Resettable method
18
19
v4:
20
21
* Fixed initialisation of default values for properties
22
* Dropped superfluous endianness conversions
23
* Moved most header code to .c, device name #define goes in vmapple.h
24
25
v5:
26
27
* Improved error reporting in case of string property buffer overflow.
28
29
v7:
30
31
* Changed error messages for overrun of properties with
32
fixed-length strings to be more useful to users than developers.
33
34
hw/vmapple/Kconfig | 3 +
35
hw/vmapple/cfg.c | 196 +++++++++++++++++++++++++++++++++++
36
hw/vmapple/meson.build | 1 +
37
include/hw/vmapple/vmapple.h | 2 +
38
4 files changed, 202 insertions(+)
39
create mode 100644 hw/vmapple/cfg.c
40
41
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
42
index XXXXXXX..XXXXXXX 100644
43
--- a/hw/vmapple/Kconfig
44
+++ b/hw/vmapple/Kconfig
45
@@ -XXX,XX +XXX,XX @@ config VMAPPLE_AES
46
config VMAPPLE_BDIF
47
bool
48
49
+config VMAPPLE_CFG
50
+ bool
51
+
52
diff --git a/hw/vmapple/cfg.c b/hw/vmapple/cfg.c
53
new file mode 100644
54
index XXXXXXX..XXXXXXX
55
--- /dev/null
56
+++ b/hw/vmapple/cfg.c
57
@@ -XXX,XX +XXX,XX @@
58
+/*
59
+ * VMApple Configuration Region
60
+ *
61
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
62
+ *
63
+ * SPDX-License-Identifier: GPL-2.0-or-later
64
+ *
65
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
66
+ * See the COPYING file in the top-level directory.
67
+ */
68
+
69
+#include "qemu/osdep.h"
70
+#include "hw/vmapple/vmapple.h"
71
+#include "hw/sysbus.h"
72
+#include "qemu/log.h"
73
+#include "qemu/module.h"
74
+#include "qapi/error.h"
75
+#include "net/net.h"
76
+
77
+OBJECT_DECLARE_SIMPLE_TYPE(VMAppleCfgState, VMAPPLE_CFG)
78
+
79
+#define VMAPPLE_CFG_SIZE 0x00010000
80
+
81
+typedef struct VMAppleCfg {
82
+ uint32_t version; /* 0x000 */
83
+ uint32_t nr_cpus; /* 0x004 */
84
+ uint32_t unk1; /* 0x008 */
85
+ uint32_t unk2; /* 0x00c */
86
+ uint32_t unk3; /* 0x010 */
87
+ uint32_t unk4; /* 0x014 */
88
+ uint64_t ecid; /* 0x018 */
89
+ uint64_t ram_size; /* 0x020 */
90
+ uint32_t run_installer1; /* 0x028 */
91
+ uint32_t unk5; /* 0x02c */
92
+ uint32_t unk6; /* 0x030 */
93
+ uint32_t run_installer2; /* 0x034 */
94
+ uint32_t rnd; /* 0x038 */
95
+ uint32_t unk7; /* 0x03c */
96
+ MACAddr mac_en0; /* 0x040 */
97
+ uint8_t pad1[2];
98
+ MACAddr mac_en1; /* 0x048 */
99
+ uint8_t pad2[2];
100
+ MACAddr mac_wifi0; /* 0x050 */
101
+ uint8_t pad3[2];
102
+ MACAddr mac_bt0; /* 0x058 */
103
+ uint8_t pad4[2];
104
+ uint8_t reserved[0xa0]; /* 0x060 */
105
+ uint32_t cpu_ids[0x80]; /* 0x100 */
106
+ uint8_t scratch[0x200]; /* 0x180 */
107
+ char serial[32]; /* 0x380 */
108
+ char unk8[32]; /* 0x3a0 */
109
+ char model[32]; /* 0x3c0 */
110
+ uint8_t unk9[32]; /* 0x3e0 */
111
+ uint32_t unk10; /* 0x400 */
112
+ char soc_name[32]; /* 0x404 */
113
+} VMAppleCfg;
114
+
115
+struct VMAppleCfgState {
116
+ SysBusDevice parent_obj;
117
+ VMAppleCfg cfg;
118
+
119
+ MemoryRegion mem;
120
+ char *serial;
121
+ char *model;
122
+ char *soc_name;
123
+};
124
+
125
+static void vmapple_cfg_reset(Object *obj, ResetType type)
126
+{
127
+ VMAppleCfgState *s = VMAPPLE_CFG(obj);
128
+ VMAppleCfg *cfg;
129
+
130
+ cfg = memory_region_get_ram_ptr(&s->mem);
131
+ memset(cfg, 0, VMAPPLE_CFG_SIZE);
132
+ *cfg = s->cfg;
133
+}
134
+
135
+static bool set_fixlen_property_or_error(char *restrict dst,
136
+ const char *restrict src,
137
+ size_t dst_size, Error **errp,
138
+ const char *property_name)
139
+{
140
+ size_t len;
141
+
142
+ len = g_strlcpy(dst, src, dst_size);
143
+ if (len < dst_size) { /* len does not count nul terminator */
144
+ return true;
145
+ }
146
+
147
+ error_setg(errp,
148
+ "Failed to set property '%s' on VMApple 'cfg' device: length "
149
+ "(%zu) exceeds maximum of %zu",
150
+ property_name, len, dst_size - 1);
151
+ return false;
152
+}
153
+
154
+#define set_fixlen_property_or_return(dst_array, src, errp, property_name) \
155
+ do { \
156
+ if (!set_fixlen_property_or_error((dst_array), (src), \
157
+ ARRAY_SIZE(dst_array), \
158
+ (errp), property_name)) { \
159
+ return; \
160
+ } \
161
+ } while (0)
162
+
163
+static void vmapple_cfg_realize(DeviceState *dev, Error **errp)
164
+{
165
+ VMAppleCfgState *s = VMAPPLE_CFG(dev);
166
+ uint32_t i;
167
+
168
+ if (!s->serial) {
169
+ s->serial = g_strdup("1234");
170
+ }
171
+ if (!s->model) {
172
+ s->model = g_strdup("VM0001");
173
+ }
174
+ if (!s->soc_name) {
175
+ s->soc_name = g_strdup("Apple M1 (Virtual)");
176
+ }
177
+
178
+ set_fixlen_property_or_return(s->cfg.serial, s->serial, errp, "serial");
179
+ set_fixlen_property_or_return(s->cfg.model, s->model, errp, "model");
180
+ set_fixlen_property_or_return(s->cfg.soc_name, s->soc_name, errp, "soc_name");
181
+ set_fixlen_property_or_return(s->cfg.unk8, "D/A", errp, "unk8");
182
+ s->cfg.version = 2;
183
+ s->cfg.unk1 = 1;
184
+ s->cfg.unk2 = 1;
185
+ s->cfg.unk3 = 0x20;
186
+ s->cfg.unk4 = 0;
187
+ s->cfg.unk5 = 1;
188
+ s->cfg.unk6 = 1;
189
+ s->cfg.unk7 = 0;
190
+ s->cfg.unk10 = 1;
191
+
192
+ if (s->cfg.nr_cpus > ARRAY_SIZE(s->cfg.cpu_ids)) {
193
+ error_setg(errp,
194
+ "Failed to create %u CPUs, vmapple machine supports %zu max",
195
+ s->cfg.nr_cpus, ARRAY_SIZE(s->cfg.cpu_ids));
196
+ return;
197
+ }
198
+ for (i = 0; i < s->cfg.nr_cpus; i++) {
199
+ s->cfg.cpu_ids[i] = i;
200
+ }
201
+}
202
+
203
+static void vmapple_cfg_init(Object *obj)
204
+{
205
+ VMAppleCfgState *s = VMAPPLE_CFG(obj);
206
+
207
+ memory_region_init_ram(&s->mem, obj, "VMApple Config", VMAPPLE_CFG_SIZE,
208
+ &error_fatal);
209
+ sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mem);
210
+}
211
+
212
+static Property vmapple_cfg_properties[] = {
213
+ DEFINE_PROP_UINT32("nr-cpus", VMAppleCfgState, cfg.nr_cpus, 1),
214
+ DEFINE_PROP_UINT64("ecid", VMAppleCfgState, cfg.ecid, 0),
215
+ DEFINE_PROP_UINT64("ram-size", VMAppleCfgState, cfg.ram_size, 0),
216
+ DEFINE_PROP_UINT32("run_installer1", VMAppleCfgState, cfg.run_installer1, 0),
217
+ DEFINE_PROP_UINT32("run_installer2", VMAppleCfgState, cfg.run_installer2, 0),
218
+ DEFINE_PROP_UINT32("rnd", VMAppleCfgState, cfg.rnd, 0),
219
+ DEFINE_PROP_MACADDR("mac-en0", VMAppleCfgState, cfg.mac_en0),
220
+ DEFINE_PROP_MACADDR("mac-en1", VMAppleCfgState, cfg.mac_en1),
221
+ DEFINE_PROP_MACADDR("mac-wifi0", VMAppleCfgState, cfg.mac_wifi0),
222
+ DEFINE_PROP_MACADDR("mac-bt0", VMAppleCfgState, cfg.mac_bt0),
223
+ DEFINE_PROP_STRING("serial", VMAppleCfgState, serial),
224
+ DEFINE_PROP_STRING("model", VMAppleCfgState, model),
225
+ DEFINE_PROP_STRING("soc_name", VMAppleCfgState, soc_name),
226
+ DEFINE_PROP_END_OF_LIST(),
227
+};
228
+
229
+static void vmapple_cfg_class_init(ObjectClass *klass, void *data)
230
+{
231
+ DeviceClass *dc = DEVICE_CLASS(klass);
232
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
233
+
234
+ dc->realize = vmapple_cfg_realize;
235
+ dc->desc = "VMApple Configuration Region";
236
+ device_class_set_props(dc, vmapple_cfg_properties);
237
+ rc->phases.hold = vmapple_cfg_reset;
238
+}
239
+
240
+static const TypeInfo vmapple_cfg_info = {
241
+ .name = TYPE_VMAPPLE_CFG,
242
+ .parent = TYPE_SYS_BUS_DEVICE,
243
+ .instance_size = sizeof(VMAppleCfgState),
244
+ .instance_init = vmapple_cfg_init,
245
+ .class_init = vmapple_cfg_class_init,
246
+};
247
+
248
+static void vmapple_cfg_register_types(void)
249
+{
250
+ type_register_static(&vmapple_cfg_info);
251
+}
252
+
253
+type_init(vmapple_cfg_register_types)
254
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
255
index XXXXXXX..XXXXXXX 100644
256
--- a/hw/vmapple/meson.build
257
+++ b/hw/vmapple/meson.build
258
@@ -XXX,XX +XXX,XX @@
259
system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c'))
260
system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c'))
261
+system_ss.add(when: 'CONFIG_VMAPPLE_CFG', if_true: files('cfg.c'))
262
diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h
263
index XXXXXXX..XXXXXXX 100644
264
--- a/include/hw/vmapple/vmapple.h
265
+++ b/include/hw/vmapple/vmapple.h
266
@@ -XXX,XX +XXX,XX @@
267
268
#define TYPE_VMAPPLE_BDIF "vmapple-bdif"
269
270
+#define TYPE_VMAPPLE_CFG "vmapple-cfg"
271
+
272
#endif /* HW_VMAPPLE_VMAPPLE_H */
273
--
274
2.39.3 (Apple Git-145)
275
276
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
Apple has its own virtio-blk PCI device ID where it deviates from the
4
official virtio-pci spec slightly: It puts a new "apple type"
5
field at a static offset in config space and introduces a new barrier
6
command.
7
8
This patch first creates a mechanism for virtio-blk downstream classes to
9
handle unknown commands. It then creates such a downstream class and a new
10
vmapple-virtio-blk-pci class which support the additional apple type config
11
identifier as well as the barrier command.
12
13
It then exposes 2 subclasses from that that we can use to expose root and
14
aux virtio-blk devices: "vmapple-virtio-root" and "vmapple-virtio-aux".
15
16
Signed-off-by: Alexander Graf <graf@amazon.com>
17
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
18
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
19
---
20
21
v4:
22
23
* Use recommended object type declaration pattern.
24
* Correctly log unimplemented code paths.
25
* Most header code moved to .c, type name #defines moved to vmapple.h
26
27
v5:
28
29
* Corrected handling of potentially unaligned writes to virtio config area.
30
* Simplified passing through device variant type to subobject.
31
32
hw/block/virtio-blk.c | 19 ++-
33
hw/vmapple/Kconfig | 3 +
34
hw/vmapple/meson.build | 1 +
35
hw/vmapple/virtio-blk.c | 226 +++++++++++++++++++++++++++++++++
36
include/hw/pci/pci_ids.h | 1 +
37
include/hw/virtio/virtio-blk.h | 12 +-
38
include/hw/vmapple/vmapple.h | 4 +
39
7 files changed, 261 insertions(+), 5 deletions(-)
40
create mode 100644 hw/vmapple/virtio-blk.c
41
42
diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c
43
index XXXXXXX..XXXXXXX 100644
44
--- a/hw/block/virtio-blk.c
45
+++ b/hw/block/virtio-blk.c
46
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_init_request(VirtIOBlock *s, VirtQueue *vq,
47
req->mr_next = NULL;
48
}
49
50
-static void virtio_blk_free_request(VirtIOBlockReq *req)
51
+void virtio_blk_free_request(VirtIOBlockReq *req)
52
{
53
g_free(req);
54
}
55
56
-static void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status)
57
+void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status)
58
{
59
VirtIOBlock *s = req->dev;
60
VirtIODevice *vdev = VIRTIO_DEVICE(s);
61
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
62
break;
63
}
64
default:
65
- virtio_blk_req_complete(req, VIRTIO_BLK_S_UNSUPP);
66
- virtio_blk_free_request(req);
67
+ {
68
+ /*
69
+ * Give subclasses a chance to handle unknown requests. This way the
70
+ * class lookup is not in the hot path.
71
+ */
72
+ VirtIOBlkClass *vbk = VIRTIO_BLK_GET_CLASS(s);
73
+ if (!vbk->handle_unknown_request ||
74
+ !vbk->handle_unknown_request(req, mrb, type)) {
75
+ virtio_blk_req_complete(req, VIRTIO_BLK_S_UNSUPP);
76
+ virtio_blk_free_request(req);
77
+ }
78
+ }
79
}
80
return 0;
81
}
82
@@ -XXX,XX +XXX,XX @@ static const TypeInfo virtio_blk_info = {
83
.instance_size = sizeof(VirtIOBlock),
84
.instance_init = virtio_blk_instance_init,
85
.class_init = virtio_blk_class_init,
86
+ .class_size = sizeof(VirtIOBlkClass),
87
};
88
89
static void virtio_register_types(void)
90
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
91
index XXXXXXX..XXXXXXX 100644
92
--- a/hw/vmapple/Kconfig
93
+++ b/hw/vmapple/Kconfig
94
@@ -XXX,XX +XXX,XX @@ config VMAPPLE_BDIF
95
config VMAPPLE_CFG
96
bool
97
98
+config VMAPPLE_VIRTIO_BLK
99
+ bool
100
+
101
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
102
index XXXXXXX..XXXXXXX 100644
103
--- a/hw/vmapple/meson.build
104
+++ b/hw/vmapple/meson.build
105
@@ -XXX,XX +XXX,XX @@
106
system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c'))
107
system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c'))
108
system_ss.add(when: 'CONFIG_VMAPPLE_CFG', if_true: files('cfg.c'))
109
+system_ss.add(when: 'CONFIG_VMAPPLE_VIRTIO_BLK', if_true: files('virtio-blk.c'))
110
diff --git a/hw/vmapple/virtio-blk.c b/hw/vmapple/virtio-blk.c
111
new file mode 100644
112
index XXXXXXX..XXXXXXX
113
--- /dev/null
114
+++ b/hw/vmapple/virtio-blk.c
115
@@ -XXX,XX +XXX,XX @@
116
+/*
117
+ * VMApple specific VirtIO Block implementation
118
+ *
119
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
120
+ *
121
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
122
+ * See the COPYING file in the top-level directory.
123
+ *
124
+ * SPDX-License-Identifier: GPL-2.0-or-later
125
+ *
126
+ * VMApple uses almost standard VirtIO Block, but with a few key differences:
127
+ *
128
+ * - Different PCI device/vendor ID
129
+ * - An additional "type" identifier to differentiate AUX and Root volumes
130
+ * - An additional BARRIER command
131
+ */
132
+
133
+#include "qemu/osdep.h"
134
+#include "hw/vmapple/vmapple.h"
135
+#include "hw/virtio/virtio-blk.h"
136
+#include "hw/virtio/virtio-pci.h"
137
+#include "qemu/bswap.h"
138
+#include "qemu/log.h"
139
+#include "qemu/module.h"
140
+#include "qapi/error.h"
141
+
142
+OBJECT_DECLARE_TYPE(VMAppleVirtIOBlk, VMAppleVirtIOBlkClass, VMAPPLE_VIRTIO_BLK)
143
+
144
+typedef struct VMAppleVirtIOBlkClass {
145
+ VirtIOBlkClass parent;
146
+
147
+ void (*get_config)(VirtIODevice *vdev, uint8_t *config);
148
+} VMAppleVirtIOBlkClass;
149
+
150
+typedef struct VMAppleVirtIOBlk {
151
+ VirtIOBlock parent_obj;
152
+
153
+ uint32_t apple_type;
154
+} VMAppleVirtIOBlk;
155
+
156
+/*
157
+ * vmapple-virtio-blk-pci: This extends VirtioPCIProxy.
158
+ */
159
+#define TYPE_VMAPPLE_VIRTIO_BLK_PCI "vmapple-virtio-blk-pci-base"
160
+OBJECT_DECLARE_SIMPLE_TYPE(VMAppleVirtIOBlkPCI, VMAPPLE_VIRTIO_BLK_PCI)
161
+
162
+#define VIRTIO_BLK_T_APPLE_BARRIER 0x10000
163
+
164
+#define VIRTIO_APPLE_TYPE_ROOT 1
165
+#define VIRTIO_APPLE_TYPE_AUX 2
166
+
167
+static bool vmapple_virtio_blk_handle_unknown_request(VirtIOBlockReq *req,
168
+ MultiReqBuffer *mrb,
169
+ uint32_t type)
170
+{
171
+ switch (type) {
172
+ case VIRTIO_BLK_T_APPLE_BARRIER:
173
+ qemu_log_mask(LOG_UNIMP, "%s: Barrier requests are currently no-ops\n",
174
+ __func__);
175
+ virtio_blk_req_complete(req, VIRTIO_BLK_S_OK);
176
+ virtio_blk_free_request(req);
177
+ return true;
178
+ default:
179
+ return false;
180
+ }
181
+}
182
+
183
+/*
184
+ * VMApple virtio-blk uses the same config format as normal virtio, with one
185
+ * exception: It adds an "apple type" specififer at the same location that
186
+ * the spec reserves for max_secure_erase_sectors. Let's hook into the
187
+ * get_config code path here, run it as usual and then patch in the apple type.
188
+ */
189
+static void vmapple_virtio_blk_get_config(VirtIODevice *vdev, uint8_t *config)
190
+{
191
+ VMAppleVirtIOBlk *dev = VMAPPLE_VIRTIO_BLK(vdev);
192
+ VMAppleVirtIOBlkClass *vvbk = VMAPPLE_VIRTIO_BLK_GET_CLASS(dev);
193
+ struct virtio_blk_config *blkcfg = (struct virtio_blk_config *)config;
194
+
195
+ vvbk->get_config(vdev, config);
196
+
197
+ g_assert(dev->parent_obj.config_size >= endof(struct virtio_blk_config, zoned));
198
+
199
+ /* Apple abuses the field for max_secure_erase_sectors as type id */
200
+ stl_he_p(&blkcfg->max_secure_erase_sectors, dev->apple_type);
201
+}
202
+
203
+static void vmapple_virtio_blk_class_init(ObjectClass *klass, void *data)
204
+{
205
+ VirtIOBlkClass *vbk = VIRTIO_BLK_CLASS(klass);
206
+ VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
207
+ VMAppleVirtIOBlkClass *vvbk = VMAPPLE_VIRTIO_BLK_CLASS(klass);
208
+
209
+ vbk->handle_unknown_request = vmapple_virtio_blk_handle_unknown_request;
210
+ vvbk->get_config = vdc->get_config;
211
+ vdc->get_config = vmapple_virtio_blk_get_config;
212
+}
213
+
214
+static const TypeInfo vmapple_virtio_blk_info = {
215
+ .name = TYPE_VMAPPLE_VIRTIO_BLK,
216
+ .parent = TYPE_VIRTIO_BLK,
217
+ .instance_size = sizeof(VMAppleVirtIOBlk),
218
+ .class_init = vmapple_virtio_blk_class_init,
219
+};
220
+
221
+/* PCI Devices */
222
+
223
+struct VMAppleVirtIOBlkPCI {
224
+ VirtIOPCIProxy parent_obj;
225
+ VMAppleVirtIOBlk vdev;
226
+ uint32_t apple_type;
227
+};
228
+
229
+
230
+static Property vmapple_virtio_blk_pci_properties[] = {
231
+ DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
232
+ DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
233
+ VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
234
+ DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
235
+ DEV_NVECTORS_UNSPECIFIED),
236
+ DEFINE_PROP_END_OF_LIST(),
237
+};
238
+
239
+static void vmapple_virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
240
+{
241
+ VMAppleVirtIOBlkPCI *dev = VMAPPLE_VIRTIO_BLK_PCI(vpci_dev);
242
+ DeviceState *vdev = DEVICE(&dev->vdev);
243
+ VirtIOBlkConf *conf = &dev->vdev.parent_obj.conf;
244
+
245
+ if (conf->num_queues == VIRTIO_BLK_AUTO_NUM_QUEUES) {
246
+ conf->num_queues = virtio_pci_optimal_num_queues(0);
247
+ }
248
+
249
+ if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
250
+ vpci_dev->nvectors = conf->num_queues + 1;
251
+ }
252
+
253
+ /*
254
+ * We don't support zones, but we need the additional config space size.
255
+ * Let's just expose the feature so the rest of the virtio-blk logic
256
+ * allocates enough space for us. The guest will ignore zones anyway.
257
+ */
258
+ virtio_add_feature(&dev->vdev.parent_obj.host_features, VIRTIO_BLK_F_ZONED);
259
+ /* Propagate the apple type down to the virtio-blk device */
260
+ dev->vdev.apple_type = dev->apple_type;
261
+ /* and spawn the virtio-blk device */
262
+ qdev_realize(vdev, BUS(&vpci_dev->bus), errp);
263
+
264
+ /*
265
+ * The virtio-pci machinery adjusts its vendor/device ID based on whether
266
+ * we support modern or legacy virtio. Let's patch it back to the Apple
267
+ * identifiers here.
268
+ */
269
+ pci_config_set_vendor_id(vpci_dev->pci_dev.config, PCI_VENDOR_ID_APPLE);
270
+ pci_config_set_device_id(vpci_dev->pci_dev.config,
271
+ PCI_DEVICE_ID_APPLE_VIRTIO_BLK);
272
+}
273
+
274
+static void vmapple_virtio_blk_pci_class_init(ObjectClass *klass, void *data)
275
+{
276
+ DeviceClass *dc = DEVICE_CLASS(klass);
277
+ VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
278
+ PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
279
+
280
+ set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
281
+ device_class_set_props(dc, vmapple_virtio_blk_pci_properties);
282
+ k->realize = vmapple_virtio_blk_pci_realize;
283
+ pcidev_k->vendor_id = PCI_VENDOR_ID_APPLE;
284
+ pcidev_k->device_id = PCI_DEVICE_ID_APPLE_VIRTIO_BLK;
285
+ pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
286
+ pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
287
+}
288
+
289
+static void vmapple_virtio_blk_pci_instance_init(Object *obj)
290
+{
291
+ VMAppleVirtIOBlkPCI *dev = VMAPPLE_VIRTIO_BLK_PCI(obj);
292
+
293
+ virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
294
+ TYPE_VMAPPLE_VIRTIO_BLK);
295
+}
296
+
297
+static const VirtioPCIDeviceTypeInfo vmapple_virtio_blk_pci_info = {
298
+ .base_name = TYPE_VMAPPLE_VIRTIO_BLK_PCI,
299
+ .generic_name = "vmapple-virtio-blk-pci",
300
+ .instance_size = sizeof(VMAppleVirtIOBlkPCI),
301
+ .instance_init = vmapple_virtio_blk_pci_instance_init,
302
+ .class_init = vmapple_virtio_blk_pci_class_init,
303
+};
304
+
305
+static void vmapple_virtio_root_instance_init(Object *obj)
306
+{
307
+ VMAppleVirtIOBlkPCI *dev = VMAPPLE_VIRTIO_BLK_PCI(obj);
308
+
309
+ dev->apple_type = VIRTIO_APPLE_TYPE_ROOT;
310
+}
311
+
312
+static const TypeInfo vmapple_virtio_root_info = {
313
+ .name = TYPE_VMAPPLE_VIRTIO_ROOT,
314
+ .parent = "vmapple-virtio-blk-pci",
315
+ .instance_size = sizeof(VMAppleVirtIOBlkPCI),
316
+ .instance_init = vmapple_virtio_root_instance_init,
317
+};
318
+
319
+static void vmapple_virtio_aux_instance_init(Object *obj)
320
+{
321
+ VMAppleVirtIOBlkPCI *dev = VMAPPLE_VIRTIO_BLK_PCI(obj);
322
+
323
+ dev->apple_type = VIRTIO_APPLE_TYPE_AUX;
324
+}
325
+
326
+static const TypeInfo vmapple_virtio_aux_info = {
327
+ .name = TYPE_VMAPPLE_VIRTIO_AUX,
328
+ .parent = "vmapple-virtio-blk-pci",
329
+ .instance_size = sizeof(VMAppleVirtIOBlkPCI),
330
+ .instance_init = vmapple_virtio_aux_instance_init,
331
+};
332
+
333
+static void vmapple_virtio_blk_register_types(void)
334
+{
335
+ type_register_static(&vmapple_virtio_blk_info);
336
+ virtio_pci_types_register(&vmapple_virtio_blk_pci_info);
337
+ type_register_static(&vmapple_virtio_root_info);
338
+ type_register_static(&vmapple_virtio_aux_info);
339
+}
340
+
341
+type_init(vmapple_virtio_blk_register_types)
342
diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h
343
index XXXXXXX..XXXXXXX 100644
344
--- a/include/hw/pci/pci_ids.h
345
+++ b/include/hw/pci/pci_ids.h
346
@@ -XXX,XX +XXX,XX @@
347
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020
348
#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b
349
#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021
350
+#define PCI_DEVICE_ID_APPLE_VIRTIO_BLK 0x1a00
351
352
#define PCI_VENDOR_ID_SUN 0x108e
353
#define PCI_DEVICE_ID_SUN_EBUS 0x1000
354
diff --git a/include/hw/virtio/virtio-blk.h b/include/hw/virtio/virtio-blk.h
355
index XXXXXXX..XXXXXXX 100644
356
--- a/include/hw/virtio/virtio-blk.h
357
+++ b/include/hw/virtio/virtio-blk.h
358
@@ -XXX,XX +XXX,XX @@
359
#include "qapi/qapi-types-virtio.h"
360
361
#define TYPE_VIRTIO_BLK "virtio-blk-device"
362
-OBJECT_DECLARE_SIMPLE_TYPE(VirtIOBlock, VIRTIO_BLK)
363
+OBJECT_DECLARE_TYPE(VirtIOBlock, VirtIOBlkClass, VIRTIO_BLK)
364
365
/* This is the last element of the write scatter-gather list */
366
struct virtio_blk_inhdr
367
@@ -XXX,XX +XXX,XX @@ typedef struct MultiReqBuffer {
368
bool is_write;
369
} MultiReqBuffer;
370
371
+typedef struct VirtIOBlkClass {
372
+ /*< private >*/
373
+ VirtioDeviceClass parent;
374
+ /*< public >*/
375
+ bool (*handle_unknown_request)(VirtIOBlockReq *req, MultiReqBuffer *mrb,
376
+ uint32_t type);
377
+} VirtIOBlkClass;
378
+
379
void virtio_blk_handle_vq(VirtIOBlock *s, VirtQueue *vq);
380
+void virtio_blk_free_request(VirtIOBlockReq *req);
381
+void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status);
382
383
#endif
384
diff --git a/include/hw/vmapple/vmapple.h b/include/hw/vmapple/vmapple.h
385
index XXXXXXX..XXXXXXX 100644
386
--- a/include/hw/vmapple/vmapple.h
387
+++ b/include/hw/vmapple/vmapple.h
388
@@ -XXX,XX +XXX,XX @@
389
390
#define TYPE_VMAPPLE_CFG "vmapple-cfg"
391
392
+#define TYPE_VMAPPLE_VIRTIO_BLK "vmapple-virtio-blk"
393
+#define TYPE_VMAPPLE_VIRTIO_ROOT "vmapple-virtio-root"
394
+#define TYPE_VMAPPLE_VIRTIO_AUX "vmapple-virtio-aux"
395
+
396
#endif /* HW_VMAPPLE_VMAPPLE_H */
397
--
398
2.39.3 (Apple Git-145)
399
400
diff view generated by jsdifflib
Deleted patch
1
The virtio_blk_free_request() function has been a 1-liner forwarding
2
to g_free() for a while now. We may as well call g_free on the request
3
pointer directly.
4
1
5
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
6
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
7
---
8
hw/block/virtio-blk.c | 43 +++++++++++++++-------------------
9
hw/vmapple/virtio-blk.c | 2 +-
10
include/hw/virtio/virtio-blk.h | 1 -
11
3 files changed, 20 insertions(+), 26 deletions(-)
12
13
diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c
14
index XXXXXXX..XXXXXXX 100644
15
--- a/hw/block/virtio-blk.c
16
+++ b/hw/block/virtio-blk.c
17
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_init_request(VirtIOBlock *s, VirtQueue *vq,
18
req->mr_next = NULL;
19
}
20
21
-void virtio_blk_free_request(VirtIOBlockReq *req)
22
-{
23
- g_free(req);
24
-}
25
-
26
void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status)
27
{
28
VirtIOBlock *s = req->dev;
29
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_rw_error(VirtIOBlockReq *req, int error,
30
if (acct_failed) {
31
block_acct_failed(blk_get_stats(s->blk), &req->acct);
32
}
33
- virtio_blk_free_request(req);
34
+ g_free(req);
35
}
36
37
blk_error_action(s->blk, action, is_read, error);
38
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_rw_complete(void *opaque, int ret)
39
40
virtio_blk_req_complete(req, VIRTIO_BLK_S_OK);
41
block_acct_done(blk_get_stats(s->blk), &req->acct);
42
- virtio_blk_free_request(req);
43
+ g_free(req);
44
}
45
}
46
47
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_flush_complete(void *opaque, int ret)
48
49
virtio_blk_req_complete(req, VIRTIO_BLK_S_OK);
50
block_acct_done(blk_get_stats(s->blk), &req->acct);
51
- virtio_blk_free_request(req);
52
+ g_free(req);
53
}
54
55
static void virtio_blk_discard_write_zeroes_complete(void *opaque, int ret)
56
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_discard_write_zeroes_complete(void *opaque, int ret)
57
if (is_write_zeroes) {
58
block_acct_done(blk_get_stats(s->blk), &req->acct);
59
}
60
- virtio_blk_free_request(req);
61
+ g_free(req);
62
}
63
64
static VirtIOBlockReq *virtio_blk_get_request(VirtIOBlock *s, VirtQueue *vq)
65
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_handle_scsi(VirtIOBlockReq *req)
66
67
fail:
68
virtio_blk_req_complete(req, status);
69
- virtio_blk_free_request(req);
70
+ g_free(req);
71
}
72
73
static inline void submit_requests(VirtIOBlock *s, MultiReqBuffer *mrb,
74
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_zone_report_complete(void *opaque, int ret)
75
76
out:
77
virtio_blk_req_complete(req, err_status);
78
- virtio_blk_free_request(req);
79
+ g_free(req);
80
g_free(data->zone_report_data.zones);
81
g_free(data);
82
}
83
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_handle_zone_report(VirtIOBlockReq *req,
84
return;
85
out:
86
virtio_blk_req_complete(req, err_status);
87
- virtio_blk_free_request(req);
88
+ g_free(req);
89
}
90
91
static void virtio_blk_zone_mgmt_complete(void *opaque, int ret)
92
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_zone_mgmt_complete(void *opaque, int ret)
93
}
94
95
virtio_blk_req_complete(req, err_status);
96
- virtio_blk_free_request(req);
97
+ g_free(req);
98
}
99
100
static int virtio_blk_handle_zone_mgmt(VirtIOBlockReq *req, BlockZoneOp op)
101
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_zone_mgmt(VirtIOBlockReq *req, BlockZoneOp op)
102
return 0;
103
out:
104
virtio_blk_req_complete(req, err_status);
105
- virtio_blk_free_request(req);
106
+ g_free(req);
107
return err_status;
108
}
109
110
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_zone_append_complete(void *opaque, int ret)
111
112
out:
113
virtio_blk_req_complete(req, err_status);
114
- virtio_blk_free_request(req);
115
+ g_free(req);
116
g_free(data);
117
}
118
119
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_zone_append(VirtIOBlockReq *req,
120
121
out:
122
virtio_blk_req_complete(req, err_status);
123
- virtio_blk_free_request(req);
124
+ g_free(req);
125
return err_status;
126
}
127
128
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
129
virtio_blk_req_complete(req, VIRTIO_BLK_S_IOERR);
130
block_acct_invalid(blk_get_stats(s->blk),
131
is_write ? BLOCK_ACCT_WRITE : BLOCK_ACCT_READ);
132
- virtio_blk_free_request(req);
133
+ g_free(req);
134
return 0;
135
}
136
137
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
138
VIRTIO_BLK_ID_BYTES));
139
iov_from_buf(in_iov, in_num, 0, serial, size);
140
virtio_blk_req_complete(req, VIRTIO_BLK_S_OK);
141
- virtio_blk_free_request(req);
142
+ g_free(req);
143
break;
144
}
145
case VIRTIO_BLK_T_ZONE_APPEND & ~VIRTIO_BLK_T_OUT:
146
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
147
if (unlikely(!(type & VIRTIO_BLK_T_OUT) ||
148
out_len > sizeof(dwz_hdr))) {
149
virtio_blk_req_complete(req, VIRTIO_BLK_S_UNSUPP);
150
- virtio_blk_free_request(req);
151
+ g_free(req);
152
return 0;
153
}
154
155
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
156
is_write_zeroes);
157
if (err_status != VIRTIO_BLK_S_OK) {
158
virtio_blk_req_complete(req, err_status);
159
- virtio_blk_free_request(req);
160
+ g_free(req);
161
}
162
163
break;
164
@@ -XXX,XX +XXX,XX @@ static int virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb)
165
if (!vbk->handle_unknown_request ||
166
!vbk->handle_unknown_request(req, mrb, type)) {
167
virtio_blk_req_complete(req, VIRTIO_BLK_S_UNSUPP);
168
- virtio_blk_free_request(req);
169
+ g_free(req);
170
}
171
}
172
}
173
@@ -XXX,XX +XXX,XX @@ void virtio_blk_handle_vq(VirtIOBlock *s, VirtQueue *vq)
174
while ((req = virtio_blk_get_request(s, vq))) {
175
if (virtio_blk_handle_request(req, &mrb)) {
176
virtqueue_detach_element(req->vq, &req->elem, 0);
177
- virtio_blk_free_request(req);
178
+ g_free(req);
179
break;
180
}
181
}
182
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_dma_restart_bh(void *opaque)
183
while (req) {
184
next = req->next;
185
virtqueue_detach_element(req->vq, &req->elem, 0);
186
- virtio_blk_free_request(req);
187
+ g_free(req);
188
req = next;
189
}
190
break;
191
@@ -XXX,XX +XXX,XX @@ static void virtio_blk_reset(VirtIODevice *vdev)
192
/* No other threads can access req->vq here */
193
virtqueue_detach_element(req->vq, &req->elem, 0);
194
195
- virtio_blk_free_request(req);
196
+ g_free(req);
197
}
198
}
199
200
diff --git a/hw/vmapple/virtio-blk.c b/hw/vmapple/virtio-blk.c
201
index XXXXXXX..XXXXXXX 100644
202
--- a/hw/vmapple/virtio-blk.c
203
+++ b/hw/vmapple/virtio-blk.c
204
@@ -XXX,XX +XXX,XX @@ static bool vmapple_virtio_blk_handle_unknown_request(VirtIOBlockReq *req,
205
qemu_log_mask(LOG_UNIMP, "%s: Barrier requests are currently no-ops\n",
206
__func__);
207
virtio_blk_req_complete(req, VIRTIO_BLK_S_OK);
208
- virtio_blk_free_request(req);
209
+ g_free(req);
210
return true;
211
default:
212
return false;
213
diff --git a/include/hw/virtio/virtio-blk.h b/include/hw/virtio/virtio-blk.h
214
index XXXXXXX..XXXXXXX 100644
215
--- a/include/hw/virtio/virtio-blk.h
216
+++ b/include/hw/virtio/virtio-blk.h
217
@@ -XXX,XX +XXX,XX @@ typedef struct VirtIOBlkClass {
218
} VirtIOBlkClass;
219
220
void virtio_blk_handle_vq(VirtIOBlock *s, VirtQueue *vq);
221
-void virtio_blk_free_request(VirtIOBlockReq *req);
222
void virtio_blk_req_complete(VirtIOBlockReq *req, unsigned char status);
223
224
#endif
225
--
226
2.39.3 (Apple Git-145)
diff view generated by jsdifflib
Deleted patch
1
From: Alexander Graf <graf@amazon.com>
2
1
3
Apple defines a new "vmapple" machine type as part of its proprietary
4
macOS Virtualization.Framework vmm. This machine type is similar to the
5
virt one, but with subtle differences in base devices, a few special
6
vmapple device additions and a vastly different boot chain.
7
8
This patch reimplements this machine type in QEMU. To use it, you
9
have to have a readily installed version of macOS for VMApple,
10
run on macOS with -accel hvf, pass the Virtualization.Framework
11
boot rom (AVPBooter) in via -bios, pass the aux and root volume as pflash
12
and pass aux and root volume as virtio drives. In addition, you also
13
need to find the machine UUID and pass that as -M vmapple,uuid= parameter:
14
15
$ qemu-system-aarch64 -accel hvf -M vmapple,uuid=0x1234 -m 4G \
16
-bios /System/Library/Frameworks/Virtualization.framework/Versions/A/Resources/AVPBooter.vmapple2.bin
17
-drive file=aux,if=pflash,format=raw \
18
-drive file=root,if=pflash,format=raw \
19
-drive file=aux,if=none,id=aux,format=raw \
20
-device vmapple-virtio-aux,drive=aux \
21
-drive file=root,if=none,id=root,format=raw \
22
-device vmapple-virtio-root,drive=root
23
24
With all these in place, you should be able to see macOS booting
25
successfully.
26
27
Known issues:
28
- Keyboard and mouse/tablet input is laggy. The reason for this is
29
either that macOS's XHCI driver is broken when the device/platform
30
does not support MSI/MSI-X, or there's some unfortunate interplay
31
with Qemu's XHCI implementation in this scenario.
32
- Currently only macOS 12 guests are supported. The boot process for
33
13+ will need further investigation and adjustment.
34
35
Signed-off-by: Alexander Graf <graf@amazon.com>
36
Co-authored-by: Phil Dennis-Jordan <phil@philjordan.eu>
37
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
38
---
39
v3:
40
* Rebased on latest upstream, updated affinity and NIC creation
41
API usage
42
* Included Apple-variant virtio-blk in build dependency
43
* Updated API usage for setting 'redist-region-count' array-typed property on GIC.
44
* Switched from virtio HID devices (for which macOS 12 does not contain
45
drivers) to an XHCI USB controller and USB HID devices.
46
47
v4:
48
* Fixups for v4 changes to the other patches in the set.
49
* Corrected the assert macro to use
50
* Removed superfluous endian conversions corresponding to cfg's.
51
* Init error handling improvement.
52
* No need to select CPU type on TCG, as only HVF is supported.
53
* Machine type version bumped to 9.2
54
* #include order improved
55
56
v5:
57
* Fixed memory reservation for ecam alias region.
58
* Better error handling setting properties on devices.
59
* Simplified the machine ECID/UUID extraction script and actually created a
60
file for it rather than quoting its code in documentation.
61
62
v7:
63
* Tiny error handling fix, un-inlined function.
64
65
MAINTAINERS | 1 +
66
contrib/vmapple/uuid.sh | 9 +
67
docs/system/arm/vmapple.rst | 60 ++++
68
docs/system/target-arm.rst | 1 +
69
hw/vmapple/Kconfig | 20 ++
70
hw/vmapple/meson.build | 1 +
71
hw/vmapple/vmapple.c | 659 ++++++++++++++++++++++++++++++++++++
72
7 files changed, 751 insertions(+)
73
create mode 100755 contrib/vmapple/uuid.sh
74
create mode 100644 docs/system/arm/vmapple.rst
75
create mode 100644 hw/vmapple/vmapple.c
76
77
diff --git a/MAINTAINERS b/MAINTAINERS
78
index XXXXXXX..XXXXXXX 100644
79
--- a/MAINTAINERS
80
+++ b/MAINTAINERS
81
@@ -XXX,XX +XXX,XX @@ R: Phil Dennis-Jordan <phil@philjordan.eu>
82
S: Maintained
83
F: hw/vmapple/*
84
F: include/hw/vmapple/*
85
+F: docs/system/arm/vmapple.rst
86
87
Subsystems
88
----------
89
diff --git a/contrib/vmapple/uuid.sh b/contrib/vmapple/uuid.sh
90
new file mode 100755
91
index XXXXXXX..XXXXXXX
92
--- /dev/null
93
+++ b/contrib/vmapple/uuid.sh
94
@@ -XXX,XX +XXX,XX @@
95
+#!/bin/sh
96
+# Used for converting a guest provisioned using Virtualization.framework
97
+# for use with the QEMU 'vmapple' aarch64 machine type.
98
+#
99
+# Extracts the Machine UUID from Virtualization.framework VM JSON file.
100
+# (as produced by 'macosvm', passed as command line argument)
101
+
102
+plutil -extract machineId raw "$1" | base64 -d | plutil -extract ECID raw -
103
+
104
diff --git a/docs/system/arm/vmapple.rst b/docs/system/arm/vmapple.rst
105
new file mode 100644
106
index XXXXXXX..XXXXXXX
107
--- /dev/null
108
+++ b/docs/system/arm/vmapple.rst
109
@@ -XXX,XX +XXX,XX @@
110
+VMApple machine emulation
111
+========================================================================================
112
+
113
+VMApple is the device model that the macOS built-in hypervisor called "Virtualization.framework"
114
+exposes to Apple Silicon macOS guests. The "vmapple" machine model in QEMU implements the same
115
+device model, but does not use any code from Virtualization.Framework.
116
+
117
+Prerequisites
118
+-------------
119
+
120
+To run the vmapple machine model, you need to
121
+
122
+ * Run on Apple Silicon
123
+ * Run on macOS 12.0 or above
124
+ * Have an already installed copy of a Virtualization.Framework macOS 12 virtual machine. I will
125
+ assume that you installed it using the macosvm CLI.
126
+
127
+First, we need to extract the UUID from the virtual machine that you installed. You can do this
128
+by running the shell script in contrib/vmapple/uuid.sh on the macosvm.json file.
129
+
130
+.. code-block:: bash
131
+ :caption: uuid.sh script to extract the UUID from a macosvm.json file
132
+
133
+ $ contrib/vmapple/uuid.sh "path/to/macosvm.json"
134
+
135
+Now we also need to trim the aux partition. It contains metadata that we can just discard:
136
+
137
+.. code-block:: bash
138
+ :caption: Command to trim the aux file
139
+
140
+ $ dd if="aux.img" of="aux.img.trimmed" bs=$(( 0x4000 )) skip=1
141
+
142
+How to run
143
+----------
144
+
145
+Then, we can launch QEMU with the Virtualization.Framework pre-boot environment and the readily
146
+installed target disk images. I recommend to port forward the VM's ssh and vnc ports to the host
147
+to get better interactive access into the target system:
148
+
149
+.. code-block:: bash
150
+ :caption: Example execution command line
151
+
152
+ $ UUID=$(uuid.sh macosvm.json)
153
+ $ AVPBOOTER=/System/Library/Frameworks/Virtualization.framework/Resources/AVPBooter.vmapple2.bin
154
+ $ AUX=aux.img.trimmed
155
+ $ DISK=disk.img
156
+ $ qemu-system-aarch64 \
157
+ -serial mon:stdio \
158
+ -m 4G \
159
+ -accel hvf \
160
+ -M vmapple,uuid=$UUID \
161
+ -bios $AVPBOOTER \
162
+ -drive file="$AUX",if=pflash,format=raw \
163
+ -drive file="$DISK",if=pflash,format=raw \
164
+ -drive file="$AUX",if=none,id=aux,format=raw \
165
+ -drive file="$DISK",if=none,id=root,format=raw \
166
+ -device vmapple-virtio-aux,drive=aux \
167
+ -device vmapple-virtio-root,drive=root \
168
+ -net user,ipv6=off,hostfwd=tcp::2222-:22,hostfwd=tcp::5901-:5900 \
169
+ -net nic,model=virtio-net-pci \
170
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
171
index XXXXXXX..XXXXXXX 100644
172
--- a/docs/system/target-arm.rst
173
+++ b/docs/system/target-arm.rst
174
@@ -XXX,XX +XXX,XX @@ Board-specific documentation
175
arm/stellaris
176
arm/stm32
177
arm/virt
178
+ arm/vmapple
179
arm/xenpvh
180
arm/xlnx-versal-virt
181
arm/xlnx-zynq
182
diff --git a/hw/vmapple/Kconfig b/hw/vmapple/Kconfig
183
index XXXXXXX..XXXXXXX 100644
184
--- a/hw/vmapple/Kconfig
185
+++ b/hw/vmapple/Kconfig
186
@@ -XXX,XX +XXX,XX @@ config VMAPPLE_CFG
187
config VMAPPLE_VIRTIO_BLK
188
bool
189
190
+config VMAPPLE
191
+ bool
192
+ depends on ARM
193
+ depends on HVF
194
+ default y if ARM
195
+ imply PCI_DEVICES
196
+ select ARM_GIC
197
+ select PLATFORM_BUS
198
+ select PCI_EXPRESS
199
+ select PCI_EXPRESS_GENERIC_BRIDGE
200
+ select PL011 # UART
201
+ select PL031 # RTC
202
+ select PL061 # GPIO
203
+ select GPIO_PWR
204
+ select PVPANIC_MMIO
205
+ select VMAPPLE_AES
206
+ select VMAPPLE_BDIF
207
+ select VMAPPLE_CFG
208
+ select MAC_PVG_MMIO
209
+ select VMAPPLE_VIRTIO_BLK
210
diff --git a/hw/vmapple/meson.build b/hw/vmapple/meson.build
211
index XXXXXXX..XXXXXXX 100644
212
--- a/hw/vmapple/meson.build
213
+++ b/hw/vmapple/meson.build
214
@@ -XXX,XX +XXX,XX @@ system_ss.add(when: 'CONFIG_VMAPPLE_AES', if_true: files('aes.c'))
215
system_ss.add(when: 'CONFIG_VMAPPLE_BDIF', if_true: files('bdif.c'))
216
system_ss.add(when: 'CONFIG_VMAPPLE_CFG', if_true: files('cfg.c'))
217
system_ss.add(when: 'CONFIG_VMAPPLE_VIRTIO_BLK', if_true: files('virtio-blk.c'))
218
+specific_ss.add(when: 'CONFIG_VMAPPLE', if_true: files('vmapple.c'))
219
diff --git a/hw/vmapple/vmapple.c b/hw/vmapple/vmapple.c
220
new file mode 100644
221
index XXXXXXX..XXXXXXX
222
--- /dev/null
223
+++ b/hw/vmapple/vmapple.c
224
@@ -XXX,XX +XXX,XX @@
225
+/*
226
+ * VMApple machine emulation
227
+ *
228
+ * Copyright © 2023 Amazon.com, Inc. or its affiliates. All Rights Reserved.
229
+ *
230
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
231
+ * See the COPYING file in the top-level directory.
232
+ *
233
+ * SPDX-License-Identifier: GPL-2.0-or-later
234
+ *
235
+ * VMApple is the device model that the macOS built-in hypervisor called
236
+ * "Virtualization.framework" exposes to Apple Silicon macOS guests. The
237
+ * machine model in this file implements the same device model in QEMU, but
238
+ * does not use any code from Virtualization.Framework.
239
+ */
240
+
241
+#include "qemu/osdep.h"
242
+#include "qemu/bitops.h"
243
+#include "qemu/datadir.h"
244
+#include "qemu/error-report.h"
245
+#include "qemu/guest-random.h"
246
+#include "qemu/help-texts.h"
247
+#include "qemu/log.h"
248
+#include "qemu/module.h"
249
+#include "qemu/option.h"
250
+#include "qemu/units.h"
251
+#include "monitor/qdev.h"
252
+#include "hw/boards.h"
253
+#include "hw/irq.h"
254
+#include "hw/loader.h"
255
+#include "hw/qdev-properties.h"
256
+#include "hw/sysbus.h"
257
+#include "hw/usb.h"
258
+#include "hw/arm/boot.h"
259
+#include "hw/arm/primecell.h"
260
+#include "hw/char/pl011.h"
261
+#include "hw/intc/arm_gic.h"
262
+#include "hw/intc/arm_gicv3_common.h"
263
+#include "hw/misc/pvpanic.h"
264
+#include "hw/pci-host/gpex.h"
265
+#include "hw/usb/xhci.h"
266
+#include "hw/virtio/virtio-pci.h"
267
+#include "hw/vmapple/vmapple.h"
268
+#include "net/net.h"
269
+#include "qapi/error.h"
270
+#include "qapi/qmp/qlist.h"
271
+#include "qapi/visitor.h"
272
+#include "qapi/qapi-visit-common.h"
273
+#include "standard-headers/linux/input.h"
274
+#include "sysemu/hvf.h"
275
+#include "sysemu/kvm.h"
276
+#include "sysemu/reset.h"
277
+#include "sysemu/runstate.h"
278
+#include "sysemu/sysemu.h"
279
+#include "target/arm/internals.h"
280
+#include "target/arm/kvm_arm.h"
281
+
282
+struct VMAppleMachineClass {
283
+ MachineClass parent;
284
+};
285
+
286
+struct VMAppleMachineState {
287
+ MachineState parent;
288
+
289
+ Notifier machine_done;
290
+ struct arm_boot_info bootinfo;
291
+ MemMapEntry *memmap;
292
+ const int *irqmap;
293
+ DeviceState *gic;
294
+ DeviceState *cfg;
295
+ Notifier powerdown_notifier;
296
+ PCIBus *bus;
297
+ MemoryRegion fw_mr;
298
+ MemoryRegion ecam_alias;
299
+ uint64_t uuid;
300
+};
301
+
302
+#define DEFINE_VMAPPLE_MACHINE_LATEST(major, minor, latest) \
303
+ static void vmapple##major##_##minor##_class_init(ObjectClass *oc, \
304
+ void *data) \
305
+ { \
306
+ MachineClass *mc = MACHINE_CLASS(oc); \
307
+ vmapple_machine_##major##_##minor##_options(mc); \
308
+ mc->desc = "QEMU " # major "." # minor " Apple Virtual Machine"; \
309
+ if (latest) { \
310
+ mc->alias = "vmapple"; \
311
+ } \
312
+ } \
313
+ static const TypeInfo machvmapple##major##_##minor##_info = { \
314
+ .name = MACHINE_TYPE_NAME("vmapple-" # major "." # minor), \
315
+ .parent = TYPE_VMAPPLE_MACHINE, \
316
+ .class_init = vmapple##major##_##minor##_class_init, \
317
+ }; \
318
+ static void machvmapple_machine_##major##_##minor##_init(void) \
319
+ { \
320
+ type_register_static(&machvmapple##major##_##minor##_info); \
321
+ } \
322
+ type_init(machvmapple_machine_##major##_##minor##_init);
323
+
324
+#define DEFINE_VMAPPLE_MACHINE_AS_LATEST(major, minor) \
325
+ DEFINE_VMAPPLE_MACHINE_LATEST(major, minor, true)
326
+#define DEFINE_VMAPPLE_MACHINE(major, minor) \
327
+ DEFINE_VMAPPLE_MACHINE_LATEST(major, minor, false)
328
+
329
+#define TYPE_VMAPPLE_MACHINE MACHINE_TYPE_NAME("vmapple")
330
+OBJECT_DECLARE_TYPE(VMAppleMachineState, VMAppleMachineClass, VMAPPLE_MACHINE)
331
+
332
+/* Number of external interrupt lines to configure the GIC with */
333
+#define NUM_IRQS 256
334
+
335
+enum {
336
+ VMAPPLE_FIRMWARE,
337
+ VMAPPLE_CONFIG,
338
+ VMAPPLE_MEM,
339
+ VMAPPLE_GIC_DIST,
340
+ VMAPPLE_GIC_REDIST,
341
+ VMAPPLE_UART,
342
+ VMAPPLE_RTC,
343
+ VMAPPLE_PCIE,
344
+ VMAPPLE_PCIE_MMIO,
345
+ VMAPPLE_PCIE_ECAM,
346
+ VMAPPLE_GPIO,
347
+ VMAPPLE_PVPANIC,
348
+ VMAPPLE_APV_GFX,
349
+ VMAPPLE_APV_IOSFC,
350
+ VMAPPLE_AES_1,
351
+ VMAPPLE_AES_2,
352
+ VMAPPLE_BDOOR,
353
+ VMAPPLE_MEMMAP_LAST,
354
+};
355
+
356
+static MemMapEntry memmap[] = {
357
+ [VMAPPLE_FIRMWARE] = { 0x00100000, 0x00100000 },
358
+ [VMAPPLE_CONFIG] = { 0x00400000, 0x00010000 },
359
+
360
+ [VMAPPLE_GIC_DIST] = { 0x10000000, 0x00010000 },
361
+ [VMAPPLE_GIC_REDIST] = { 0x10010000, 0x00400000 },
362
+
363
+ [VMAPPLE_UART] = { 0x20010000, 0x00010000 },
364
+ [VMAPPLE_RTC] = { 0x20050000, 0x00001000 },
365
+ [VMAPPLE_GPIO] = { 0x20060000, 0x00001000 },
366
+ [VMAPPLE_PVPANIC] = { 0x20070000, 0x00000002 },
367
+ [VMAPPLE_BDOOR] = { 0x30000000, 0x00200000 },
368
+ [VMAPPLE_APV_GFX] = { 0x30200000, 0x00010000 },
369
+ [VMAPPLE_APV_IOSFC] = { 0x30210000, 0x00010000 },
370
+ [VMAPPLE_AES_1] = { 0x30220000, 0x00004000 },
371
+ [VMAPPLE_AES_2] = { 0x30230000, 0x00004000 },
372
+ [VMAPPLE_PCIE_ECAM] = { 0x40000000, 0x10000000 },
373
+ [VMAPPLE_PCIE_MMIO] = { 0x50000000, 0x1fff0000 },
374
+
375
+ /* Actual RAM size depends on configuration */
376
+ [VMAPPLE_MEM] = { 0x70000000ULL, GiB},
377
+};
378
+
379
+static const int irqmap[] = {
380
+ [VMAPPLE_UART] = 1,
381
+ [VMAPPLE_RTC] = 2,
382
+ [VMAPPLE_GPIO] = 0x5,
383
+ [VMAPPLE_APV_IOSFC] = 0x10,
384
+ [VMAPPLE_APV_GFX] = 0x11,
385
+ [VMAPPLE_AES_1] = 0x12,
386
+ [VMAPPLE_PCIE] = 0x20,
387
+};
388
+
389
+#define GPEX_NUM_IRQS 16
390
+
391
+static void create_bdif(VMAppleMachineState *vms, MemoryRegion *mem)
392
+{
393
+ DeviceState *bdif;
394
+ SysBusDevice *bdif_sb;
395
+ DriveInfo *di_aux = drive_get(IF_PFLASH, 0, 0);
396
+ DriveInfo *di_root = drive_get(IF_PFLASH, 0, 1);
397
+
398
+ if (!di_aux) {
399
+ error_report("No AUX device. Please specify one as pflash drive.");
400
+ exit(1);
401
+ }
402
+
403
+ if (!di_root) {
404
+ /* Fall back to the first IF_VIRTIO device as root device */
405
+ di_root = drive_get(IF_VIRTIO, 0, 0);
406
+ }
407
+
408
+ if (!di_root) {
409
+ error_report("No root device. Please specify one as virtio drive.");
410
+ exit(1);
411
+ }
412
+
413
+ /* PV backdoor device */
414
+ bdif = qdev_new(TYPE_VMAPPLE_BDIF);
415
+ bdif_sb = SYS_BUS_DEVICE(bdif);
416
+ sysbus_mmio_map(bdif_sb, 0, vms->memmap[VMAPPLE_BDOOR].base);
417
+
418
+ qdev_prop_set_drive(DEVICE(bdif), "aux", blk_by_legacy_dinfo(di_aux));
419
+ qdev_prop_set_drive(DEVICE(bdif), "root", blk_by_legacy_dinfo(di_root));
420
+
421
+ sysbus_realize_and_unref(bdif_sb, &error_fatal);
422
+}
423
+
424
+static void create_pvpanic(VMAppleMachineState *vms, MemoryRegion *mem)
425
+{
426
+ SysBusDevice *cfg;
427
+
428
+ vms->cfg = qdev_new(TYPE_PVPANIC_MMIO_DEVICE);
429
+ cfg = SYS_BUS_DEVICE(vms->cfg);
430
+ sysbus_mmio_map(cfg, 0, vms->memmap[VMAPPLE_PVPANIC].base);
431
+
432
+ sysbus_realize_and_unref(cfg, &error_fatal);
433
+}
434
+
435
+static void create_cfg(VMAppleMachineState *vms, MemoryRegion *mem)
436
+{
437
+ SysBusDevice *cfg;
438
+ MachineState *machine = MACHINE(vms);
439
+ uint32_t rnd = 1;
440
+
441
+ vms->cfg = qdev_new(TYPE_VMAPPLE_CFG);
442
+ cfg = SYS_BUS_DEVICE(vms->cfg);
443
+ sysbus_mmio_map(cfg, 0, vms->memmap[VMAPPLE_CONFIG].base);
444
+
445
+ qemu_guest_getrandom_nofail(&rnd, sizeof(rnd));
446
+
447
+ qdev_prop_set_uint32(vms->cfg, "nr-cpus", machine->smp.cpus);
448
+ qdev_prop_set_uint64(vms->cfg, "ecid", vms->uuid);
449
+ qdev_prop_set_uint64(vms->cfg, "ram-size", machine->ram_size);
450
+ qdev_prop_set_uint32(vms->cfg, "rnd", rnd);
451
+
452
+ sysbus_realize_and_unref(cfg, &error_fatal);
453
+}
454
+
455
+static void create_gfx(VMAppleMachineState *vms, MemoryRegion *mem)
456
+{
457
+ int irq_gfx = vms->irqmap[VMAPPLE_APV_GFX];
458
+ int irq_iosfc = vms->irqmap[VMAPPLE_APV_IOSFC];
459
+ SysBusDevice *gfx;
460
+
461
+ gfx = SYS_BUS_DEVICE(qdev_new("apple-gfx-mmio"));
462
+ sysbus_mmio_map(gfx, 0, vms->memmap[VMAPPLE_APV_GFX].base);
463
+ sysbus_mmio_map(gfx, 1, vms->memmap[VMAPPLE_APV_IOSFC].base);
464
+ sysbus_connect_irq(gfx, 0, qdev_get_gpio_in(vms->gic, irq_gfx));
465
+ sysbus_connect_irq(gfx, 1, qdev_get_gpio_in(vms->gic, irq_iosfc));
466
+ sysbus_realize_and_unref(gfx, &error_fatal);
467
+}
468
+
469
+static void create_aes(VMAppleMachineState *vms, MemoryRegion *mem)
470
+{
471
+ int irq = vms->irqmap[VMAPPLE_AES_1];
472
+ SysBusDevice *aes;
473
+
474
+ aes = SYS_BUS_DEVICE(qdev_new(TYPE_APPLE_AES));
475
+ sysbus_mmio_map(aes, 0, vms->memmap[VMAPPLE_AES_1].base);
476
+ sysbus_mmio_map(aes, 1, vms->memmap[VMAPPLE_AES_2].base);
477
+ sysbus_connect_irq(aes, 0, qdev_get_gpio_in(vms->gic, irq));
478
+ sysbus_realize_and_unref(aes, &error_fatal);
479
+}
480
+
481
+static int arm_gic_ppi_index(int cpu_nr, int ppi_index)
482
+{
483
+ return NUM_IRQS + cpu_nr * GIC_INTERNAL + ppi_index;
484
+}
485
+
486
+static void create_gic(VMAppleMachineState *vms, MemoryRegion *mem)
487
+{
488
+ MachineState *ms = MACHINE(vms);
489
+ /* We create a standalone GIC */
490
+ SysBusDevice *gicbusdev;
491
+ QList *redist_region_count;
492
+ int i;
493
+ unsigned int smp_cpus = ms->smp.cpus;
494
+
495
+ vms->gic = qdev_new(gicv3_class_name());
496
+ qdev_prop_set_uint32(vms->gic, "revision", 3);
497
+ qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus);
498
+ /*
499
+ * Note that the num-irq property counts both internal and external
500
+ * interrupts; there are always 32 of the former (mandated by GIC spec).
501
+ */
502
+ qdev_prop_set_uint32(vms->gic, "num-irq", NUM_IRQS + 32);
503
+
504
+ uint32_t redist0_capacity =
505
+ vms->memmap[VMAPPLE_GIC_REDIST].size / GICV3_REDIST_SIZE;
506
+ uint32_t redist0_count = MIN(smp_cpus, redist0_capacity);
507
+
508
+ redist_region_count = qlist_new();
509
+ qlist_append_int(redist_region_count, redist0_count);
510
+ qdev_prop_set_array(vms->gic, "redist-region-count", redist_region_count);
511
+
512
+ gicbusdev = SYS_BUS_DEVICE(vms->gic);
513
+ sysbus_realize_and_unref(gicbusdev, &error_fatal);
514
+ sysbus_mmio_map(gicbusdev, 0, vms->memmap[VMAPPLE_GIC_DIST].base);
515
+ sysbus_mmio_map(gicbusdev, 1, vms->memmap[VMAPPLE_GIC_REDIST].base);
516
+
517
+ /*
518
+ * Wire the outputs from each CPU's generic timer and the GICv3
519
+ * maintenance interrupt signal to the appropriate GIC PPI inputs,
520
+ * and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs.
521
+ */
522
+ for (i = 0; i < smp_cpus; i++) {
523
+ DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
524
+
525
+ /* Map the virt timer to PPI 27 */
526
+ qdev_connect_gpio_out(cpudev, GTIMER_VIRT,
527
+ qdev_get_gpio_in(vms->gic,
528
+ arm_gic_ppi_index(i, 27)));
529
+
530
+ /* Map the GIC IRQ and FIQ lines to CPU */
531
+ sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
532
+ sysbus_connect_irq(gicbusdev, i + smp_cpus,
533
+ qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
534
+ }
535
+}
536
+
537
+static void create_uart(const VMAppleMachineState *vms, int uart,
538
+ MemoryRegion *mem, Chardev *chr)
539
+{
540
+ hwaddr base = vms->memmap[uart].base;
541
+ int irq = vms->irqmap[uart];
542
+ DeviceState *dev = qdev_new(TYPE_PL011);
543
+ SysBusDevice *s = SYS_BUS_DEVICE(dev);
544
+
545
+ qdev_prop_set_chr(dev, "chardev", chr);
546
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
547
+ memory_region_add_subregion(mem, base,
548
+ sysbus_mmio_get_region(s, 0));
549
+ sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq));
550
+}
551
+
552
+static void create_rtc(const VMAppleMachineState *vms)
553
+{
554
+ hwaddr base = vms->memmap[VMAPPLE_RTC].base;
555
+ int irq = vms->irqmap[VMAPPLE_RTC];
556
+
557
+ sysbus_create_simple("pl031", base, qdev_get_gpio_in(vms->gic, irq));
558
+}
559
+
560
+static DeviceState *gpio_key_dev;
561
+static void vmapple_powerdown_req(Notifier *n, void *opaque)
562
+{
563
+ /* use gpio Pin 3 for power button event */
564
+ qemu_set_irq(qdev_get_gpio_in(gpio_key_dev, 0), 1);
565
+}
566
+
567
+static void create_gpio_devices(const VMAppleMachineState *vms, int gpio,
568
+ MemoryRegion *mem)
569
+{
570
+ DeviceState *pl061_dev;
571
+ hwaddr base = vms->memmap[gpio].base;
572
+ int irq = vms->irqmap[gpio];
573
+ SysBusDevice *s;
574
+
575
+ pl061_dev = qdev_new("pl061");
576
+ /* Pull lines down to 0 if not driven by the PL061 */
577
+ qdev_prop_set_uint32(pl061_dev, "pullups", 0);
578
+ qdev_prop_set_uint32(pl061_dev, "pulldowns", 0xff);
579
+ s = SYS_BUS_DEVICE(pl061_dev);
580
+ sysbus_realize_and_unref(s, &error_fatal);
581
+ memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0));
582
+ sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq));
583
+ gpio_key_dev = sysbus_create_simple("gpio-key", -1,
584
+ qdev_get_gpio_in(pl061_dev, 3));
585
+}
586
+
587
+static void vmapple_firmware_init(VMAppleMachineState *vms,
588
+ MemoryRegion *sysmem)
589
+{
590
+ hwaddr size = vms->memmap[VMAPPLE_FIRMWARE].size;
591
+ hwaddr base = vms->memmap[VMAPPLE_FIRMWARE].base;
592
+ const char *bios_name;
593
+ int image_size;
594
+ char *fname;
595
+
596
+ bios_name = MACHINE(vms)->firmware;
597
+ if (!bios_name) {
598
+ error_report("No firmware specified");
599
+ exit(1);
600
+ }
601
+
602
+ fname = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
603
+ if (!fname) {
604
+ error_report("Could not find ROM image '%s'", bios_name);
605
+ exit(1);
606
+ }
607
+
608
+ memory_region_init_ram(&vms->fw_mr, NULL, "firmware", size, &error_fatal);
609
+ image_size = load_image_mr(fname, &vms->fw_mr);
610
+
611
+ g_free(fname);
612
+ if (image_size < 0) {
613
+ error_report("Could not load ROM image '%s'", bios_name);
614
+ exit(1);
615
+ }
616
+
617
+ memory_region_add_subregion(get_system_memory(), base, &vms->fw_mr);
618
+}
619
+
620
+static void create_pcie(VMAppleMachineState *vms)
621
+{
622
+ hwaddr base_mmio = vms->memmap[VMAPPLE_PCIE_MMIO].base;
623
+ hwaddr size_mmio = vms->memmap[VMAPPLE_PCIE_MMIO].size;
624
+ hwaddr base_ecam = vms->memmap[VMAPPLE_PCIE_ECAM].base;
625
+ hwaddr size_ecam = vms->memmap[VMAPPLE_PCIE_ECAM].size;
626
+ int irq = vms->irqmap[VMAPPLE_PCIE];
627
+ MemoryRegion *mmio_alias;
628
+ MemoryRegion *mmio_reg;
629
+ MemoryRegion *ecam_reg;
630
+ DeviceState *dev;
631
+ int i;
632
+ PCIHostState *pci;
633
+ DeviceState *usb_controller;
634
+ USBBus *usb_bus;
635
+
636
+ dev = qdev_new(TYPE_GPEX_HOST);
637
+ qdev_prop_set_uint32(dev, "num-irqs", GPEX_NUM_IRQS);
638
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
639
+
640
+ /* Map only the first size_ecam bytes of ECAM space */
641
+ ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
642
+ memory_region_init_alias(&vms->ecam_alias, OBJECT(dev), "pcie-ecam",
643
+ ecam_reg, 0, size_ecam);
644
+ memory_region_add_subregion(get_system_memory(), base_ecam,
645
+ &vms->ecam_alias);
646
+
647
+ /*
648
+ * Map the MMIO window from [0x50000000-0x7fff0000] in PCI space into
649
+ * system address space at [0x50000000-0x7fff0000].
650
+ */
651
+ mmio_alias = g_new0(MemoryRegion, 1);
652
+ mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
653
+ memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio",
654
+ mmio_reg, base_mmio, size_mmio);
655
+ memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias);
656
+
657
+ for (i = 0; i < GPEX_NUM_IRQS; i++) {
658
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
659
+ qdev_get_gpio_in(vms->gic, irq + i));
660
+ gpex_set_irq_num(GPEX_HOST(dev), i, irq + i);
661
+ }
662
+
663
+ pci = PCI_HOST_BRIDGE(dev);
664
+ vms->bus = pci->bus;
665
+ g_assert(vms->bus);
666
+
667
+ while ((dev = qemu_create_nic_device("virtio-net-pci", true, NULL))) {
668
+ qdev_realize_and_unref(dev, BUS(vms->bus), &error_fatal);
669
+ }
670
+
671
+ usb_controller = qdev_new(TYPE_QEMU_XHCI);
672
+ qdev_realize_and_unref(usb_controller, BUS(pci->bus), &error_fatal);
673
+
674
+ usb_bus = USB_BUS(object_resolve_type_unambiguous(TYPE_USB_BUS,
675
+ &error_fatal));
676
+ usb_create_simple(usb_bus, "usb-kbd");
677
+ usb_create_simple(usb_bus, "usb-tablet");
678
+}
679
+
680
+static void vmapple_reset(void *opaque)
681
+{
682
+ VMAppleMachineState *vms = opaque;
683
+ hwaddr base = vms->memmap[VMAPPLE_FIRMWARE].base;
684
+
685
+ cpu_set_pc(first_cpu, base);
686
+}
687
+
688
+static void mach_vmapple_init(MachineState *machine)
689
+{
690
+ VMAppleMachineState *vms = VMAPPLE_MACHINE(machine);
691
+ MachineClass *mc = MACHINE_GET_CLASS(machine);
692
+ const CPUArchIdList *possible_cpus;
693
+ MemoryRegion *sysmem = get_system_memory();
694
+ int n;
695
+ unsigned int smp_cpus = machine->smp.cpus;
696
+ unsigned int max_cpus = machine->smp.max_cpus;
697
+
698
+ vms->memmap = memmap;
699
+ machine->usb = true;
700
+
701
+ possible_cpus = mc->possible_cpu_arch_ids(machine);
702
+ assert(possible_cpus->len == max_cpus);
703
+ for (n = 0; n < possible_cpus->len; n++) {
704
+ Object *cpu;
705
+ CPUState *cs;
706
+
707
+ if (n >= smp_cpus) {
708
+ break;
709
+ }
710
+
711
+ cpu = object_new(possible_cpus->cpus[n].type);
712
+ object_property_set_int(cpu, "mp-affinity",
713
+ possible_cpus->cpus[n].arch_id, &error_fatal);
714
+
715
+ cs = CPU(cpu);
716
+ cs->cpu_index = n;
717
+
718
+ numa_cpu_pre_plug(&possible_cpus->cpus[cs->cpu_index], DEVICE(cpu),
719
+ &error_fatal);
720
+
721
+ if (object_property_find(cpu, "has_el3")) {
722
+ object_property_set_bool(cpu, "has_el3", false, &error_fatal);
723
+ }
724
+ if (object_property_find(cpu, "has_el2")) {
725
+ object_property_set_bool(cpu, "has_el2", false, &error_fatal);
726
+ }
727
+ object_property_set_int(cpu, "psci-conduit", QEMU_PSCI_CONDUIT_HVC,
728
+ &error_fatal);
729
+
730
+ /* Secondary CPUs start in PSCI powered-down state */
731
+ if (n > 0) {
732
+ object_property_set_bool(cpu, "start-powered-off", true,
733
+ &error_fatal);
734
+ }
735
+
736
+ object_property_set_link(cpu, "memory", OBJECT(sysmem), &error_abort);
737
+ qdev_realize(DEVICE(cpu), NULL, &error_fatal);
738
+ object_unref(cpu);
739
+ }
740
+
741
+ memory_region_add_subregion(sysmem, vms->memmap[VMAPPLE_MEM].base,
742
+ machine->ram);
743
+
744
+ create_gic(vms, sysmem);
745
+ create_bdif(vms, sysmem);
746
+ create_pvpanic(vms, sysmem);
747
+ create_aes(vms, sysmem);
748
+ create_gfx(vms, sysmem);
749
+ create_uart(vms, VMAPPLE_UART, sysmem, serial_hd(0));
750
+ create_rtc(vms);
751
+ create_pcie(vms);
752
+
753
+ create_gpio_devices(vms, VMAPPLE_GPIO, sysmem);
754
+
755
+ vmapple_firmware_init(vms, sysmem);
756
+ create_cfg(vms, sysmem);
757
+
758
+ /* connect powerdown request */
759
+ vms->powerdown_notifier.notify = vmapple_powerdown_req;
760
+ qemu_register_powerdown_notifier(&vms->powerdown_notifier);
761
+
762
+ vms->bootinfo.ram_size = machine->ram_size;
763
+ vms->bootinfo.board_id = -1;
764
+ vms->bootinfo.loader_start = vms->memmap[VMAPPLE_MEM].base;
765
+ vms->bootinfo.skip_dtb_autoload = true;
766
+ vms->bootinfo.firmware_loaded = true;
767
+ arm_load_kernel(ARM_CPU(first_cpu), machine, &vms->bootinfo);
768
+
769
+ qemu_register_reset(vmapple_reset, vms);
770
+}
771
+
772
+static CpuInstanceProperties
773
+vmapple_cpu_index_to_props(MachineState *ms, unsigned cpu_index)
774
+{
775
+ MachineClass *mc = MACHINE_GET_CLASS(ms);
776
+ const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms);
777
+
778
+ assert(cpu_index < possible_cpus->len);
779
+ return possible_cpus->cpus[cpu_index].props;
780
+}
781
+
782
+
783
+static int64_t vmapple_get_default_cpu_node_id(const MachineState *ms, int idx)
784
+{
785
+ return idx % ms->numa_state->num_nodes;
786
+}
787
+
788
+static const CPUArchIdList *vmapple_possible_cpu_arch_ids(MachineState *ms)
789
+{
790
+ int n;
791
+ unsigned int max_cpus = ms->smp.max_cpus;
792
+
793
+ if (ms->possible_cpus) {
794
+ assert(ms->possible_cpus->len == max_cpus);
795
+ return ms->possible_cpus;
796
+ }
797
+
798
+ ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
799
+ sizeof(CPUArchId) * max_cpus);
800
+ ms->possible_cpus->len = max_cpus;
801
+ for (n = 0; n < ms->possible_cpus->len; n++) {
802
+ ms->possible_cpus->cpus[n].type = ms->cpu_type;
803
+ ms->possible_cpus->cpus[n].arch_id =
804
+ arm_build_mp_affinity(n, GICV3_TARGETLIST_BITS);
805
+ ms->possible_cpus->cpus[n].props.has_thread_id = true;
806
+ ms->possible_cpus->cpus[n].props.thread_id = n;
807
+ }
808
+ return ms->possible_cpus;
809
+}
810
+
811
+static void vmapple_get_uuid(Object *obj, Visitor *v, const char *name,
812
+ void *opaque, Error **errp)
813
+{
814
+ VMAppleMachineState *vms = VMAPPLE_MACHINE(obj);
815
+
816
+ visit_type_uint64(v, name, &vms->uuid, errp);
817
+}
818
+
819
+static void vmapple_set_uuid(Object *obj, Visitor *v, const char *name,
820
+ void *opaque, Error **errp)
821
+{
822
+ VMAppleMachineState *vms = VMAPPLE_MACHINE(obj);
823
+ Error *error = NULL;
824
+
825
+ visit_type_uint64(v, name, &vms->uuid, &error);
826
+ if (error) {
827
+ error_propagate(errp, error);
828
+ return;
829
+ }
830
+}
831
+
832
+static void vmapple_machine_class_init(ObjectClass *oc, void *data)
833
+{
834
+ MachineClass *mc = MACHINE_CLASS(oc);
835
+
836
+ mc->init = mach_vmapple_init;
837
+ mc->max_cpus = 32;
838
+ mc->block_default_type = IF_VIRTIO;
839
+ mc->no_cdrom = 1;
840
+ mc->pci_allow_0_address = true;
841
+ mc->minimum_page_bits = 12;
842
+ mc->possible_cpu_arch_ids = vmapple_possible_cpu_arch_ids;
843
+ mc->cpu_index_to_instance_props = vmapple_cpu_index_to_props;
844
+ mc->default_cpu_type = ARM_CPU_TYPE_NAME("host");
845
+ mc->get_default_cpu_node_id = vmapple_get_default_cpu_node_id;
846
+ mc->default_ram_id = "mach-vmapple.ram";
847
+
848
+ object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy",
849
+ "on", true);
850
+
851
+ object_class_property_add(oc, "uuid", "uint64", vmapple_get_uuid,
852
+ vmapple_set_uuid, NULL, NULL);
853
+ object_class_property_set_description(oc, "uuid", "Machine UUID (SDOM)");
854
+}
855
+
856
+static void vmapple_instance_init(Object *obj)
857
+{
858
+ VMAppleMachineState *vms = VMAPPLE_MACHINE(obj);
859
+
860
+ vms->irqmap = irqmap;
861
+}
862
+
863
+static const TypeInfo vmapple_machine_info = {
864
+ .name = TYPE_VMAPPLE_MACHINE,
865
+ .parent = TYPE_MACHINE,
866
+ .abstract = true,
867
+ .instance_size = sizeof(VMAppleMachineState),
868
+ .class_size = sizeof(VMAppleMachineClass),
869
+ .class_init = vmapple_machine_class_init,
870
+ .instance_init = vmapple_instance_init,
871
+};
872
+
873
+static void machvmapple_machine_init(void)
874
+{
875
+ type_register_static(&vmapple_machine_info);
876
+}
877
+type_init(machvmapple_machine_init);
878
+
879
+static void vmapple_machine_9_2_options(MachineClass *mc)
880
+{
881
+}
882
+DEFINE_VMAPPLE_MACHINE_AS_LATEST(9, 2)
883
+
884
--
885
2.39.3 (Apple Git-145)
886
887
diff view generated by jsdifflib