Series comparison

-[PULL v2 0/8] loongarch-to-apply queue
+[PULL v2 0/6] loongarch-to-apply queue
-The following changes since commit 92ec7805190313c9e628f8fc4eb4f932c15247bd:
+The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595:
-  Merge tag 'pull-riscv-to-apply-20241031-1' of https://github.com/alistair23/qemu into staging (2024-10-31 16:34:25 +0000)
+  Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500)
 are available in the Git repository at:
-  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20241102
+  https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227
-for you to fetch changes up to 47b54e15bbe78722c62dfafc3e04deded820c05e:
+for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424:
-  target/loongarch: Add steal time support on migration (2024-11-02 15:45:45 +0800)
+  target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800)
 ----------------------------------------------------------------
-pull-loongarch-20241102
+pull-loongarch-20241227
 v1 ... v2
 . Modify patch auther inconsistent with SOB
-V2: Fix no 'asm/unistd_64.h' build error.
-    Add a new patch (hw/loongarch/boot: Use warn_report when no kernel filename).
 ----------------------------------------------------------------
-Bibo Mao (7):
+Bibo Mao (5):
-      target/loongarch: Add loongson binary translation feature
+      target/loongarch: Use actual operand size with vbsrl check
-      target/loongarch: Implement lbt registers save/restore function
+      hw/loongarch/virt: Create fdt table on machine creation done notification
-      target/loongarch/kvm: Implement LoongArch PMU extension
+      hw/loongarch/virt: Improve fdt table creation for CPU object
-      linux-headers: Add unistd_64.h
+      target/loongarch: Use auto method with LSX feature
-      linux-headers: loongarch: Add kvm_para.h
+      target/loongarch: Use auto method with LASX feature
       linux-headers: Update to Linux v6.12-rc5
       target/loongarch: Add steal time support on migration
-Song Gao (1):
+Guo Hongyu (1):
-      hw/loongarch/boot: Use warn_report when no kernel filename
+      target/loongarch: Fix vldi inst
- hw/loongarch/boot.c                                |   5 +-
+ hw/loongarch/virt.c                             | 142 ++++++++++++++----------
- include/standard-headers/drm/drm_fourcc.h          |  43 +++
+ target/loongarch/cpu.c                          |  86 ++++++++------
- include/standard-headers/linux/const.h             |  17 ++
+ target/loongarch/cpu.h                          |   4 +
- include/standard-headers/linux/ethtool.h           | 226 ++++++++++++++
+ target/loongarch/kvm/kvm.c                      | 107 ++++++++++++++++++
- include/standard-headers/linux/fuse.h              |  22 +-
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc |   4 +-
- include/standard-headers/linux/input-event-codes.h |   2 +
+files changed, 249 insertions(+), 94 deletions(-)
  include/standard-headers/linux/pci_regs.h          |  41 ++-
  include/standard-headers/linux/virtio_balloon.h    |  16 +-
  include/standard-headers/linux/virtio_gpu.h        |   1 +
  linux-headers/asm-arm64/mman.h                     |   9 +
  linux-headers/asm-arm64/unistd.h                   |  25 +-
  linux-headers/asm-arm64/unistd_64.h                | 324 ++++++++++++++++++++
  linux-headers/asm-generic/unistd.h                 |   6 +-
  linux-headers/asm-loongarch/kvm.h                  |  24 ++
  linux-headers/asm-loongarch/kvm_para.h             |  21 ++
  linux-headers/asm-loongarch/unistd.h               |   4 +-
  linux-headers/asm-loongarch/unistd_64.h            | 320 ++++++++++++++++++++
  linux-headers/asm-riscv/kvm.h                      |   7 +
  linux-headers/asm-riscv/unistd.h                   |  41 +--
  linux-headers/asm-riscv/unistd_32.h                | 315 ++++++++++++++++++++
  linux-headers/asm-riscv/unistd_64.h                | 325 +++++++++++++++++++++
  linux-headers/asm-x86/kvm.h                        |   2 +
  linux-headers/asm-x86/unistd_64.h                  |   1 +
  linux-headers/asm-x86/unistd_x32.h                 |   1 +
  linux-headers/linux/bits.h                         |   3 +
  linux-headers/linux/const.h                        |  17 ++
  linux-headers/linux/iommufd.h                      | 143 +++++++--
  linux-headers/linux/kvm.h                          |  23 +-
  linux-headers/linux/mman.h                         |   1 +
  linux-headers/linux/psp-sev.h                      |  28 ++
  scripts/update-linux-headers.sh                    |   7 +
  target/loongarch/cpu.c                             |  43 +++
  target/loongarch/cpu.h                             |  23 ++
  target/loongarch/kvm/kvm.c                         | 225 +++++++++++++-
  target/loongarch/loongarch-qmp-cmds.c              |   2 +-
  target/loongarch/machine.c                         |  30 +-
 files changed, 2243 insertions(+), 100 deletions(-)
  create mode 100644 linux-headers/asm-arm64/unistd_64.h
  create mode 100644 linux-headers/asm-loongarch/kvm_para.h
  create mode 100644 linux-headers/asm-loongarch/unistd_64.h
  create mode 100644 linux-headers/asm-riscv/unistd_32.h
  create mode 100644 linux-headers/asm-riscv/unistd_64.h

-[PULL v2 5/8] linux-headers: loongarch: Add kvm_para.h
+[PULL v2 1/6] target/loongarch: Fix vldi inst
-From: Bibo Mao <maobibo@loongson.cn>
+From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
-KVM LBT supports on LoongArch depends on the linux-header file
+Refer to the link below for a description of the vldi instructions:
-kvm_para.h, add header file kvm_para.h here.
+https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
 Fixed errors in vldi instruction implementation.
+Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
+Tested-by: Xianglai Li <lixianglai@loongson.cn>
+Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Acked-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20241028023809.1554405-3-maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- scripts/update-linux-headers.sh | 1 +
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
-file changed, 1 insertion(+)
+file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh
+diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-index XXXXXXX..XXXXXXX 100755
+index XXXXXXX..XXXXXXX 100644
---- a/scripts/update-linux-headers.sh
+--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-+++ b/scripts/update-linux-headers.sh
++++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-@@ -XXX,XX +XXX,XX @@ EOF
+@@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm)
-         cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-riscv/"
+         break;
-     fi
+     case 1:
-     if [ $arch = loongarch ]; then
+         /* data: {2{16'0, imm[7:0], 8'0}} */
-+        cp "$hdrdir/include/asm/kvm_para.h" "$output/linux-headers/asm-loongarch/"
+-        data = (t << 24) | (t << 8);
-         cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-loongarch/"
++        data = (t << 40) | (t << 8);
-     fi
+         break;
- done
+     case 2:
          /* data: {2{8'0, imm[7:0], 16'0}} */
 --
-.34.1
+.43.5

-[PULL v2 7/8] hw/loongarch/boot: Use warn_report when no kernel filename
+[PULL v2 2/6] target/loongarch: Use actual operand size with vbsrl check
-When we run “qemu-system-loongarch64 -qmp stdio -vnc none -S”,
+Hardcoded 32 bytes is used for vbsrl emulation check, there is
-we get an error message “Need kernel filename” and then we can't use qmp cmd to query some information.
+problem when options lsx=on,lasx=off is used for vbsrl.v instruction
-So, we just throw a warning and then the cpus starts running from address VIRT_FLASH0_BASE.
+in TCG mode. It injects LASX exception rather LSX exception.
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Here actual operand size is used.
 Cc: qemu-stable@nongnu.org
 Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve")
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
-Message-Id: <20241030012359.4040817-1-gaosong@loongson.cn>
 ---
- hw/loongarch/boot.c | 5 ++---
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
-file changed, 2 insertions(+), 3 deletions(-)
+file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
+diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
 index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/boot.c
+--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-+++ b/hw/loongarch/boot.c
++++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-@@ -XXX,XX +XXX,XX @@ static void init_boot_rom(struct loongarch_boot_info *info, void *p)
+@@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz)
  static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
  {
-     void *p, *bp;
+     int i, ofs;
--    int64_t kernel_addr = 0;
-+    int64_t kernel_addr = VIRT_FLASH0_BASE;
+-    if (!check_vec(ctx, 32)) {
-     LoongArchCPU *lacpu;
++    if (!check_vec(ctx, oprsz)) {
-     CPUState *cs;
+         return true;
@@ -XXX,XX +XXX,XX @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
          kernel_addr = load_kernel_info(info);
      } else {
          if(!qtest_enabled()) {
 -            error_report("Need kernel filename\n");
 -            exit(1);
 +            warn_report("No kernel provided, booting from flash drive.");
          }
      }
 --
-.34.1
+.43.5

-[PULL v2 8/8] target/loongarch: Add steal time support on migration
+[PULL v2 3/6] hw/loongarch/virt: Create fdt table on machine creation done notification
-From: Bibo Mao <maobibo@loongson.cn>
+The same with ACPI table, fdt table is created on machine done
+notification. Some objects like CPU objects can be created with cold-plug
-With pv steal time supported, VM machine needs get physical address
+method with command such as -smp x, -device la464-loongarch-cpu, so all
-of each vcpu and notify new host during migration. Here two
+objects finish to create when machine is done.
 functions kvm_get_stealtime/kvm_set_stealtime, and guest steal time
 physical address is only updated on KVM_PUT_FULL_STATE stage.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240930064040.753929-1-maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- target/loongarch/cpu.h     |  3 ++
+ hw/loongarch/virt.c | 103 ++++++++++++++++++++++++--------------------
- target/loongarch/kvm/kvm.c | 65 ++++++++++++++++++++++++++++++++++++++
+file changed, 57 insertions(+), 46 deletions(-)
  target/loongarch/machine.c |  6 ++--
 files changed, 72 insertions(+), 2 deletions(-)
-diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/cpu.h
+--- a/hw/loongarch/virt.c
-+++ b/target/loongarch/cpu.h
++++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ typedef struct CPUArchState {
+@@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
-     uint64_t CSR_DBG;
+     }
-     uint64_t CSR_DERA;
+ }
-     uint64_t CSR_DSAVE;
-+    struct {
++static void virt_fdt_setup(LoongArchVirtMachineState *lvms)
 +        uint64_t guest_addr;
 +    } stealtime;
  #ifdef CONFIG_TCG
      float_status fp_status;
 diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm.c
 +++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
      KVM_CAP_LAST_INFO
  };
 +static int kvm_get_stealtime(CPUState *cs)
 +{
-+    CPULoongArchState *env = cpu_env(cs);
++    MachineState *machine = MACHINE(lvms);
-+    int err;
++    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
-+    struct kvm_device_attr attr = {
++    int i;
-+        .group = KVM_LOONGARCH_VCPU_PVTIME_CTRL,
++
-+        .attr = KVM_LOONGARCH_VCPU_PVTIME_GPA,
++    create_fdt(lvms);
-+        .addr = (uint64_t)&env->stealtime.guest_addr,
++    fdt_add_cpu_nodes(lvms);
-+    };
++    fdt_add_memory_nodes(machine);
-+
++    fdt_add_fw_cfg_node(lvms);
-+    err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr);
++    fdt_add_flash_node(lvms);
-+    if (err) {
++
-+        return 0;
++    /* Add cpu interrupt-controller */
 +    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
 +    /* Add Extend I/O Interrupt Controller node */
 +    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
 +    /* Add PCH PIC node */
 +    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
 +    /* Add PCH MSI node */
 +    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
 +    /* Add pcie node */
 +    fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle);
 +
 +    /*
 +     * Create uart fdt node in reverse order so that they appear
 +     * in the finished device tree lowest address first
 +     */
 +    for (i = VIRT_UART_COUNT; i-- > 0;) {
 +        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
 +        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
 +        fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0);
 +    }
 +
-+    err = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, attr);
++    fdt_add_rtc_node(lvms, &pch_pic_phandle);
-+    if (err) {
++    fdt_add_ged_reset(lvms);
-+        error_report("PVTIME: KVM_GET_DEVICE_ATTR: %s", strerror(errno));
++    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
-+        return err;
++                                   VIRT_PLATFORM_BUS_BASEADDRESS,
-+    }
++                                   VIRT_PLATFORM_BUS_SIZE,
-+
++                                   VIRT_PLATFORM_BUS_IRQ);
-+    return 0;
++
 +    /*
 +     * Since lowmem region starts from 0 and Linux kernel legacy start address
 +     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
 +     * access. FDT size limit with 1 MiB.
 +     * Put the FDT into the memory map as a ROM image: this will ensure
 +     * the FDT is copied again upon reset, even if addr points into RAM.
 +     */
 +    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
 +    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
 +                          &address_space_memory);
 +    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 +            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
 +}
 +
-+static int kvm_set_stealtime(CPUState *cs)
+ static void virt_done(Notifier *notifier, void *data)
 +{
 +    CPULoongArchState *env = cpu_env(cs);
 +    int err;
 +    struct kvm_device_attr attr = {
 +        .group = KVM_LOONGARCH_VCPU_PVTIME_CTRL,
 +        .attr = KVM_LOONGARCH_VCPU_PVTIME_GPA,
 +        .addr = (uint64_t)&env->stealtime.guest_addr,
 +    };
 +
 +    err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr);
 +    if (err) {
 +        return 0;
 +    }
 +
 +    err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, attr);
 +    if (err) {
 +        error_report("PVTIME: KVM_SET_DEVICE_ATTR %s with gpa "TARGET_FMT_lx,
 +                      strerror(errno), env->stealtime.guest_addr);
 +        return err;
 +    }
 +
 +    return 0;
 +}
 +
  static int kvm_loongarch_get_regs_core(CPUState *cs)
  {
-     int ret = 0;
+     LoongArchVirtMachineState *lvms = container_of(notifier,
-@@ -XXX,XX +XXX,XX @@ int kvm_arch_get_registers(CPUState *cs, Error **errp)
+                                       LoongArchVirtMachineState, machine_done);
-         return ret;
+     virt_build_smbios(lvms);
-     }
+     loongarch_acpi_setup(lvms);
++    virt_fdt_setup(lvms);
-+    ret = kvm_get_stealtime(cs);
+ }
-+    if (ret) {
-+        return ret;
+ static void virt_powerdown_req(Notifier *notifier, void *opaque)
-+    }
+@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
-+
+ }
-     ret = kvm_loongarch_get_mpstate(cs);
-     return ret;
+ static void virt_devices_init(DeviceState *pch_pic,
- }
+-                                   LoongArchVirtMachineState *lvms,
-@@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level, Error **errp)
+-                                   uint32_t *pch_pic_phandle,
-         return ret;
+-                                   uint32_t *pch_msi_phandle)
-     }
++                                   LoongArchVirtMachineState *lvms)
+ {
-+    if (level >= KVM_PUT_FULL_STATE) {
+     MachineClass *mc = MACHINE_GET_CLASS(lvms);
-+        /*
+     DeviceState *gpex_dev;
-+         * only KVM_PUT_FULL_STATE is required, kvm kernel will clear
+@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
-+         * guest_addr for KVM_PUT_RESET_STATE
+         gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
-+         */
+     }
-+        ret = kvm_set_stealtime(cs);
-+        if (ret) {
+-    /* Add pcie node */
-+            return ret;
+-    fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
-+        }
+-
-+    }
+     /*
-+
+      * Create uart fdt node in reverse order so that they appear
-     ret = kvm_loongarch_put_mpstate(cs);
+      * in the finished device tree lowest address first
-     return ret;
+@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
- }
+         serial_mm_init(get_system_memory(), base, 0,
-diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c
+                        qdev_get_gpio_in(pch_pic, irq),
-index XXXXXXX..XXXXXXX 100644
+, serial_hd(i), DEVICE_LITTLE_ENDIAN);
---- a/target/loongarch/machine.c
+-        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
-+++ b/target/loongarch/machine.c
+     }
-@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_tlb = {
- /* LoongArch CPU state */
+     /* Network init */
- const VMStateDescription vmstate_loongarch_cpu = {
+@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
-     .name = "cpu",
+     sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
--    .version_id = 2,
+                          qdev_get_gpio_in(pch_pic,
--    .minimum_version_id = 2,
+                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
-+    .version_id = 3,
+-    fdt_add_rtc_node(lvms, pch_pic_phandle);
-+    .minimum_version_id = 3,
+-    fdt_add_ged_reset(lvms);
-     .fields = (const VMStateField[]) {
-         VMSTATE_UINTTL_ARRAY(env.gpr, LoongArchCPU, 32),
+     /* acpi ged */
-         VMSTATE_UINTTL(env.pc, LoongArchCPU),
+     lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
-@@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_loongarch_cpu = {
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
-         VMSTATE_UINT64(env.CSR_DSAVE, LoongArchCPU),
+     CPULoongArchState *env;
+     CPUState *cpu_state;
-         VMSTATE_UINT64(kvm_state_counter, LoongArchCPU),
+     int cpu, pin, i, start, num;
-+        /* PV steal time */
+-    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
-+        VMSTATE_UINT64(env.stealtime.guest_addr, LoongArchCPU),
+     /*
-         VMSTATE_END_OF_LIST()
+      * Extended IRQ model.
-     },
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
      memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
                     sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
 -    /* Add cpu interrupt-controller */
 -    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
 -
      for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
          cpu_state = qemu_get_cpu(cpu);
          cpudev = DEVICE(cpu_state);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
          }
      }
 -    /* Add Extend I/O Interrupt Controller node */
 -    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
 -
      pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
      num = VIRT_PCH_PIC_IRQ_NUM;
      qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
          qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
      }
 -    /* Add PCH PIC node */
 -    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
 -
      pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
      start   =  num;
      num = EXTIOI_IRQS - start;
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
                                qdev_get_gpio_in(extioi, i + start));
      }
 -    /* Add PCH MSI node */
 -    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
 -
 -    virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
 +    virt_devices_init(pch_pic, lvms);
  }
  static void virt_firmware_init(LoongArchVirtMachineState *lvms)
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
          cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
      }
 -    create_fdt(lvms);
 -
      /* Create IOCSR space */
      memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
                            machine, "iocsr", UINT64_MAX);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
          lacpu = LOONGARCH_CPU(cpu);
          lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
      }
 -    fdt_add_cpu_nodes(lvms);
 -    fdt_add_memory_nodes(machine);
      fw_cfg_add_memory(machine);
      /* Node0 memory */
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                          memmap_table,
                          sizeof(struct memmap_entry) * (memmap_entries));
      }
 -    fdt_add_fw_cfg_node(lvms);
 -    fdt_add_flash_node(lvms);
      /* Initialize the IO interrupt subsystem */
      virt_irq_init(lvms);
 -    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
 -                                   VIRT_PLATFORM_BUS_BASEADDRESS,
 -                                   VIRT_PLATFORM_BUS_SIZE,
 -                                   VIRT_PLATFORM_BUS_IRQ);
      lvms->machine_done.notify = virt_done;
      qemu_add_machine_init_done_notifier(&lvms->machine_done);
       /* connect powerdown request */
      lvms->powerdown_notifier.notify = virt_powerdown_req;
      qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
 -    /*
 -     * Since lowmem region starts from 0 and Linux kernel legacy start address
 -     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
 -     * access. FDT size limit with 1 MiB.
 -     * Put the FDT into the memory map as a ROM image: this will ensure
 -     * the FDT is copied again upon reset, even if addr points into RAM.
 -     */
 -    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
 -    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
 -                          &address_space_memory);
 -    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 -            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
 -
      lvms->bootinfo.ram_size = ram_size;
      loongarch_load_kernel(machine, &lvms->bootinfo);
  }
 --
-.34.1
+.43.5

-[PULL v2 2/8] target/loongarch: Implement lbt registers save/restore function
+[PULL v2 4/6] hw/loongarch/virt: Improve fdt table creation for CPU object
-From: Bibo Mao <maobibo@loongson.cn>
+For CPU object, possible_cpu_arch_ids() function is used rather than
+smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus
-Six registers scr0 - scr3, eflags and ftop are added in percpu vmstate.
+is not accurate for all possible CPU objects, possible_cpu_arch_ids()
-And two functions kvm_loongarch_get_lbt/kvm_loongarch_put_lbt are added
+is used here.
 to save/restore lbt registers.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240929070405.235200-3-maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- target/loongarch/cpu.h     | 12 ++++++++
+ hw/loongarch/virt.c | 39 +++++++++++++++++++++++++--------------
- target/loongarch/kvm/kvm.c | 62 ++++++++++++++++++++++++++++++++++++++
+file changed, 25 insertions(+), 14 deletions(-)
  target/loongarch/machine.c | 24 +++++++++++++++
 files changed, 98 insertions(+)
-diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/cpu.h
+--- a/hw/loongarch/virt.c
-+++ b/target/loongarch/cpu.h
++++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ enum loongarch_features {
+@@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms)
-     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
+ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
- };
+ {
+     int num;
-+typedef struct  LoongArchBT {
+-    const MachineState *ms = MACHINE(lvms);
-+    /* scratch registers */
+-    int smp_cpus = ms->smp.cpus;
-+    uint64_t scr0;
++    MachineState *ms = MACHINE(lvms);
-+    uint64_t scr1;
++    MachineClass *mc = MACHINE_GET_CLASS(ms);
-+    uint64_t scr2;
++    const CPUArchIdList *possible_cpus;
-+    uint64_t scr3;
++    LoongArchCPU *cpu;
-+    /* loongarch eflags */
++    CPUState *cs;
-+    uint32_t eflags;
++    char *nodename, *map_path;
-+    uint32_t ftop;
-+} lbt_t;
+     qemu_fdt_add_subnode(ms->fdt, "/cpus");
      qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1);
      qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0);
      /* cpu nodes */
 -    for (num = smp_cpus - 1; num >= 0; num--) {
 -        char *nodename = g_strdup_printf("/cpus/cpu@%d", num);
 -        LoongArchCPU *cpu = LOONGARCH_CPU(qemu_get_cpu(num));
 -        CPUState *cs = CPU(cpu);
 +    possible_cpus = mc->possible_cpu_arch_ids(ms);
 +    for (num = 0; num < possible_cpus->len; num++) {
 +        cs = possible_cpus->cpus[num].cpu;
 +        if (cs == NULL) {
 +            continue;
 +        }
 +
- typedef struct CPUArchState {
++        nodename = g_strdup_printf("/cpus/cpu@%d", num);
-     uint64_t gpr[32];
++        cpu = LOONGARCH_CPU(cs);
-     uint64_t pc;
-@@ -XXX,XX +XXX,XX @@ typedef struct CPUArchState {
+         qemu_fdt_add_subnode(ms->fdt, nodename);
-     fpr_t fpr[32];
+         qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu");
-     bool cf[8];
+         qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
-     uint32_t fcsr0;
+                                 cpu->dtb_compatible);
-+    lbt_t  lbt;
+-        if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) {
++        if (possible_cpus->cpus[num].props.has_node_id) {
-     uint32_t cpucfg[21];
+             qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id",
+-                ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
-diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
++                possible_cpus->cpus[num].props.node_id);
-index XXXXXXX..XXXXXXX 100644
+         }
---- a/target/loongarch/kvm/kvm.c
+         qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num);
-+++ b/target/loongarch/kvm/kvm.c
+         qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle",
-@@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_put_regs_fp(CPUState *cs)
+@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
-     return ret;
      /*cpu map */
      qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map");
 +    for (num = 0; num < possible_cpus->len; num++) {
 +        cs = possible_cpus->cpus[num].cpu;
 +        if (cs == NULL) {
 +            continue;
 +        }
 -    for (num = smp_cpus - 1; num >= 0; num--) {
 -        char *cpu_path = g_strdup_printf("/cpus/cpu@%d", num);
 -        char *map_path;
 -
 +        nodename = g_strdup_printf("/cpus/cpu@%d", num);
          if (ms->smp.threads > 1) {
              map_path = g_strdup_printf(
                  "/cpus/cpu-map/socket%d/core%d/thread%d",
@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
                  num % ms->smp.cores);
          }
          qemu_fdt_add_path(ms->fdt, map_path);
 -        qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path);
 +        qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", nodename);
          g_free(map_path);
 -        g_free(cpu_path);
 +        g_free(nodename);
      }
  }
-+static int kvm_loongarch_put_lbt(CPUState *cs)
-+{
-+    CPULoongArchState *env = cpu_env(cs);
-+    uint64_t val;
-+    int ret;
-+
-+    /* check whether vm support LBT firstly */
-+    if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) {
-+        return 0;
-+    }
-+
-+    /* set six LBT registers including scr0-scr3, eflags, ftop */
-+    ret = kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0);
-+    ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1);
-+    ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2);
-+    ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3);
-+    /*
-+     * Be cautious, KVM_REG_LOONGARCH_LBT_FTOP is defined as 64-bit however
-+     * lbt.ftop is 32-bit; the same with KVM_REG_LOONGARCH_LBT_EFLAGS register
-+     */
-+    val = env->lbt.eflags;
-+    ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val);
-+    val = env->lbt.ftop;
-+    ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val);
-+
-+    return ret;
-+}
-+
-+static int kvm_loongarch_get_lbt(CPUState *cs)
-+{
-+    CPULoongArchState *env = cpu_env(cs);
-+    uint64_t val;
-+    int ret;
-+
-+    /* check whether vm support LBT firstly */
-+    if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) {
-+        return 0;
-+    }
-+
-+    /* get six LBT registers including scr0-scr3, eflags, ftop */
-+    ret = kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0);
-+    ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1);
-+    ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2);
-+    ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3);
-+    ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val);
-+    env->lbt.eflags = (uint32_t)val;
-+    ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val);
-+    env->lbt.ftop = (uint32_t)val;
-+
-+    return ret;
-+}
-+
- void kvm_arch_reset_vcpu(CPUState *cs)
- {
-     CPULoongArchState *env = cpu_env(cs);
-@@ -XXX,XX +XXX,XX @@ int kvm_arch_get_registers(CPUState *cs, Error **errp)
-         return ret;
-     }
-+    ret = kvm_loongarch_get_lbt(cs);
-+    if (ret) {
-+        return ret;
-+    }
-+
-     ret = kvm_loongarch_get_mpstate(cs);
-     return ret;
- }
-@@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level, Error **errp)
-         return ret;
-     }
-+    ret = kvm_loongarch_put_lbt(cs);
-+    if (ret) {
-+        return ret;
-+    }
-+
-     ret = kvm_loongarch_put_mpstate(cs);
-     return ret;
- }
-diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c
-index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/machine.c
-+++ b/target/loongarch/machine.c
-@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_lasx = {
-     },
- };
-+static bool lbt_needed(void *opaque)
-+{
-+    LoongArchCPU *cpu = opaque;
-+
-+    return !!FIELD_EX64(cpu->env.cpucfg[2], CPUCFG2, LBT_ALL);
-+}
-+
-+static const VMStateDescription vmstate_lbt = {
-+    .name = "cpu/lbt",
-+    .version_id = 0,
-+    .minimum_version_id = 0,
-+    .needed = lbt_needed,
-+    .fields = (const VMStateField[]) {
-+        VMSTATE_UINT64(env.lbt.scr0,   LoongArchCPU),
-+        VMSTATE_UINT64(env.lbt.scr1,   LoongArchCPU),
-+        VMSTATE_UINT64(env.lbt.scr2,   LoongArchCPU),
-+        VMSTATE_UINT64(env.lbt.scr3,   LoongArchCPU),
-+        VMSTATE_UINT32(env.lbt.eflags, LoongArchCPU),
-+        VMSTATE_UINT32(env.lbt.ftop,   LoongArchCPU),
-+        VMSTATE_END_OF_LIST()
-+    },
-+};
-+
- #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
- static bool tlb_needed(void *opaque)
- {
-@@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_loongarch_cpu = {
- #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
-         &vmstate_tlb,
- #endif
-+        &vmstate_lbt,
-         NULL
-     }
- };
 --
-.34.1
+.43.5

-[PULL v2 1/8] target/loongarch: Add loongson binary translation feature
+[PULL v2 5/6] target/loongarch: Use auto method with LSX feature
-From: Bibo Mao <maobibo@loongson.cn>
+Like LBT feature, add type OnOffAuto for LSX feature setting. Also
+add LSX feature detection with new VM ioctl command, fallback to old
-Loongson Binary Translation (LBT) is used to accelerate binary
+method if it is not supported.
 translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM
 eflags (eflags) and x87 fpu stack pointer (ftop).
 Now LBT feature is added in kvm mode, not supported in TCG mode since
 it is not emulated. Feature variable lbt is added with OnOffAuto type,
 If lbt feature is not supported with KVM host, it reports error if there
 is lbt=on command line.
 If there is no any command line about lbt parameter, it checks whether
 KVM host supports lbt feature and set the corresponding value in cpucfg.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240929070405.235200-2-maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- target/loongarch/cpu.c                | 24 +++++++++++
+ target/loongarch/cpu.c     | 38 +++++++++++++++------------
- target/loongarch/cpu.h                |  6 +++
+ target/loongarch/cpu.h     |  2 ++
- target/loongarch/kvm/kvm.c            | 57 ++++++++++++++++++++++++++-
+ target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++
- target/loongarch/loongarch-qmp-cmds.c |  2 +-
+files changed, 77 insertions(+), 17 deletions(-)
 files changed, 87 insertions(+), 2 deletions(-)
 diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.c
 +++ b/target/loongarch/cpu.c
-@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
+@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
      CPULoongArchState *env = &cpu->env;
 +    uint32_t data = 0;
      int i;
      for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
      cpu->dtb_compatible = "loongarch,Loongson-3A5000";
      env->cpucfg[0] = 0x14c010;  /* PRID */
 -    uint32_t data = 0;
      data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
      data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
      data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
      CPULoongArchState *env = &cpu->env;
 -
 +    uint32_t data = 0;
      int i;
      for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
      cpu->dtb_compatible = "loongarch,Loongson-1C103";
      env->cpucfg[0] = 0x148042;  /* PRID */
 -    uint32_t data = 0;
      data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
      data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
      data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
  static bool loongarch_get_lsx(Object *obj, Error **errp)
  {
 -    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 -    bool ret;
 -
 -    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
 -        ret = true;
 -    } else {
 -        ret = false;
 -    }
 -    return ret;
 +    return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF;
  }
  static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +    uint32_t val;
 -    if (value) {
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
 -    } else {
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
 +    cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +    if (kvm_enabled()) {
 +        /* kvm feature detection in function kvm_arch_init_vcpu */
 +        return;
      }
- }
++
++    /* LSX feature detection in TCG mode */
-+static bool loongarch_get_lbt(Object *obj, Error **errp)
++    val = cpu->env.cpucfg[2];
-+{
++    if (cpu->lsx == ON_OFF_AUTO_ON) {
-+    return LOONGARCH_CPU(obj)->lbt != ON_OFF_AUTO_OFF;
++        if (FIELD_EX32(val, CPUCFG2, LSX) == 0) {
-+}
++            error_setg(errp, "Failed to enable LSX in TCG mode");
-+
++            return;
-+static void loongarch_set_lbt(Object *obj, bool value, Error **errp)
++        }
-+{
++    }
-+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
++
-+
++    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
-+    cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+ }
-+}
-+
+ static bool loongarch_get_lasx(Object *obj, Error **errp)
- void loongarch_cpu_post_init(Object *obj)
+@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
  {
-+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-+
 +    cpu->lsx = ON_OFF_AUTO_AUTO;
      object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                               loongarch_set_lsx);
      object_property_add_bool(obj, "lasx", loongarch_get_lasx,
-                              loongarch_set_lasx);
+@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
-+    /* lbt is enabled only in kvm mode, not supported in tcg mode */
-+    if (kvm_enabled()) {
+     } else {
-+        cpu->lbt = ON_OFF_AUTO_AUTO;
+         cpu->lbt = ON_OFF_AUTO_OFF;
-+        object_property_add_bool(obj, "lbt", loongarch_get_lbt,
++        cpu->pmu = ON_OFF_AUTO_OFF;
-+                                 loongarch_set_lbt);
+     }
-+        object_property_set_description(obj, "lbt",
+ }
-+                                   "Set off to disable Binary Tranlation.");
 +    } else {
 +        cpu->lbt = ON_OFF_AUTO_OFF;
 +    }
  }
  static void loongarch_cpu_init(Object *obj)
 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.h
 +++ b/target/loongarch/cpu.h
-@@ -XXX,XX +XXX,XX @@ FIELD(CPUCFG2, LLFTP_VER, 15, 3)
+@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
  FIELD(CPUCFG2, LBT_X86, 18, 1)
  FIELD(CPUCFG2, LBT_ARM, 19, 1)
  FIELD(CPUCFG2, LBT_MIPS, 20, 1)
 +FIELD(CPUCFG2, LBT_ALL, 18, 3)
  FIELD(CPUCFG2, LSPW, 21, 1)
  FIELD(CPUCFG2, LAM, 22, 1)
@@ -XXX,XX +XXX,XX @@ struct LoongArchTLB {
  typedef struct LoongArchTLB LoongArchTLB;
  #endif
-+enum loongarch_features {
+ enum loongarch_features {
-+    LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
++    LOONGARCH_FEATURE_LSX,
-+};
+     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
-+
+     LOONGARCH_FEATURE_PMU,
- typedef struct CPUArchState {
+ };
      uint64_t gpr[32];
      uint64_t pc;
 @@ -XXX,XX +XXX,XX @@ struct ArchCPU {
-     CPULoongArchState env;
-     QEMUTimer timer;
      uint32_t  phy_id;
-+    OnOffAuto lbt;
+     OnOffAuto lbt;
      OnOffAuto pmu;
 +    OnOffAuto lsx;
      /* 'compatible' string for this CPU for Linux device trees */
      const char *dtb_compatible;
 diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm.c
 +++ b/target/loongarch/kvm/kvm.c
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
- #include <sys/ioctl.h>
+ {
- #include <linux/kvm.h>
+     int ret;
+     struct kvm_device_attr attr;
-+#include "qapi/error.h"
++    uint64_t val;
- #include "qemu/timer.h"
- #include "qemu/error-report.h"
+     switch (feature) {
- #include "qemu/main-loop.h"
++    case LOONGARCH_FEATURE_LSX:
@@ -XXX,XX +XXX,XX @@ static void kvm_loongarch_vm_stage_change(void *opaque, bool running,
      }
  }
 +static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
 +{
 +    int ret;
 +    struct kvm_device_attr attr;
 +
 +    switch (feature) {
 +    case LOONGARCH_FEATURE_LBT:
 +        /*
 +         * Return all if all the LBT features are supported such as:
 +         *  KVM_LOONGARCH_VM_FEAT_X86BT
 +         *  KVM_LOONGARCH_VM_FEAT_ARMBT
 +         *  KVM_LOONGARCH_VM_FEAT_MIPSBT
 +         */
 +        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
-+        attr.attr = KVM_LOONGARCH_VM_FEAT_X86BT;
++        attr.attr = KVM_LOONGARCH_VM_FEAT_LSX;
 +        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
-+        attr.attr = KVM_LOONGARCH_VM_FEAT_ARMBT;
++        if (ret == 0) {
-+        ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
++            return true;
-+        attr.attr = KVM_LOONGARCH_VM_FEAT_MIPSBT;
++        }
-+        ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
++
-+        return (ret == 0);
++        /* Fallback to old kernel detect interface */
-+    default:
++        val = 0;
 +        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
 +        /* Cpucfg2 */
 +        attr.attr  = 2;
 +        attr.addr = (uint64_t)&val;
 +        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (!ret) {
 +            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
 +            if (ret) {
 +                return false;
 +            }
 +
 +            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX);
 +            return (ret != 0);
 +        }
 +        return false;
-+    }
++
-+}
+     case LOONGARCH_FEATURE_LBT:
-+
+         /*
-+static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
+          * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
      return false;
  }
 +static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
 +{
 +    CPULoongArchState *env = cpu_env(cs);
 +    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
 +    bool kvm_supported;
 +
-+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LBT);
++    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX);
-+    if (cpu->lbt == ON_OFF_AUTO_ON) {
++    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0);
 +    if (cpu->lsx == ON_OFF_AUTO_ON) {
 +        if (kvm_supported) {
-+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7);
++            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
 +        } else {
-+            error_setg(errp, "'lbt' feature not supported by KVM on this host");
++            error_setg(errp, "'lsx' feature not supported by KVM on this host");
 +            return -ENOTSUP;
 +        }
-+    } else if ((cpu->lbt == ON_OFF_AUTO_AUTO) && kvm_supported) {
++    } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) {
-+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7);
++        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
 +    }
 +
 +    return 0;
 +}
 +
- int kvm_arch_init_vcpu(CPUState *cs)
+ static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
  {
-     uint64_t val;
+     CPULoongArchState *env = cpu_env(cs);
-+    int ret;
+@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
 +    Error *local_err = NULL;
 +    ret = 0;
      qemu_add_vm_change_state_handler(kvm_loongarch_vm_stage_change, cs);
      if (!kvm_get_one_reg(cs, KVM_REG_LOONGARCH_DEBUG_INST, &val)) {
          brk_insn = val;
      }
--    return 0;
++    ret = kvm_cpu_check_lsx(cs, &local_err);
 +    ret = kvm_cpu_check_lbt(cs, &local_err);
 +    if (ret < 0) {
 +        error_report_err(local_err);
 +    }
-+    return ret;
++
- }
+     ret = kvm_cpu_check_lbt(cs, &local_err);
+     if (ret < 0) {
- int kvm_arch_destroy_vcpu(CPUState *cs)
+         error_report_err(local_err);
 diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/loongarch-qmp-cmds.c
 +++ b/target/loongarch/loongarch-qmp-cmds.c
@@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
  }
  static const char *cpu_model_advertised_features[] = {
 -    "lsx", "lasx", NULL
 +    "lsx", "lasx", "lbt", NULL
  };
  CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
 --
-.34.1
+.43.5

-[PULL v2 3/8] target/loongarch/kvm: Implement LoongArch PMU extension
+[PULL v2 6/6] target/loongarch: Use auto method with LASX feature
-From: Bibo Mao <maobibo@loongson.cn>
+Like LSX feature, add type OnOffAuto for LASX feature setting.
-Implement PMU extension for LoongArch kvm mode. Use OnOffAuto type
-variable pmu to check the PMU feature. If the PMU Feature is not supported
-with KVM host, it reports error if there is pmu=on command line.
-If there is no any command line about pmu parameter, it checks whether
-KVM host supports the PMU Feature and set the corresponding value in cpucfg.
-This patch is based on lbt patch located at
-  https://lore.kernel.org/qemu-devel/20240904061859.86615-1-maobibo@loongson.cn
-Co-developed-by: Song Gao <gaosong@loongson.cn>
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240918082315.2345034-1-maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- target/loongarch/cpu.c                | 19 +++++++++++++
+ target/loongarch/cpu.c     | 50 +++++++++++++++++++++++------------
- target/loongarch/cpu.h                |  2 ++
+ target/loongarch/cpu.h     |  2 ++
- target/loongarch/kvm/kvm.c            | 41 +++++++++++++++++++++++++++
+ target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++
- target/loongarch/loongarch-qmp-cmds.c |  2 +-
+files changed, 89 insertions(+), 16 deletions(-)
 files changed, 63 insertions(+), 1 deletion(-)
 diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.c
 +++ b/target/loongarch/cpu.c
-@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lbt(Object *obj, bool value, Error **errp)
+@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
-     cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+     uint32_t val;
      cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +    if (cpu->lsx == ON_OFF_AUTO_OFF) {
 +        cpu->lasx = ON_OFF_AUTO_OFF;
 +        if (cpu->lasx == ON_OFF_AUTO_ON) {
 +            error_setg(errp, "Failed to disable LSX since LASX is enabled");
 +            return;
 +        }
 +    }
 +
      if (kvm_enabled()) {
          /* kvm feature detection in function kvm_arch_init_vcpu */
          return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
              error_setg(errp, "Failed to enable LSX in TCG mode");
              return;
          }
 +    } else {
 +        cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0);
 +        val = cpu->env.cpucfg[2];
      }
      cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
  static bool loongarch_get_lasx(Object *obj, Error **errp)
  {
 -    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 -    bool ret;
 -
 -    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
 -        ret = true;
 -    } else {
 -        ret = false;
 -    }
 -    return ret;
 +    return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF;
  }
-+static bool loongarch_get_pmu(Object *obj, Error **errp)
+ static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
 +{
 +    return LOONGARCH_CPU(obj)->pmu != ON_OFF_AUTO_OFF;
 +}
 +
 +static void loongarch_set_pmu(Object *obj, bool value, Error **errp)
 +{
 +    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +
 +    cpu->pmu = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +}
 +
  void loongarch_cpu_post_init(Object *obj)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
++    uint32_t val;
+-    if (value) {
+-    if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
+-            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
+-    }
+-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
+-    } else {
+-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
++    cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
++    if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) {
++        error_setg(errp, "Failed to enable LASX since lSX is disabled");
++        return;
++    }
++
++    if (kvm_enabled()) {
++        /* kvm feature detection in function kvm_arch_init_vcpu */
++        return;
+     }
++
++    /* LASX feature detection in TCG mode */
++    val = cpu->env.cpucfg[2];
++    if (cpu->lasx == ON_OFF_AUTO_ON) {
++        if (FIELD_EX32(val, CPUCFG2, LASX) == 0) {
++            error_setg(errp, "Failed to enable LASX in TCG mode");
++            return;
++        }
++    }
++
++    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
+ }
+ static bool loongarch_get_lbt(Object *obj, Error **errp)
 @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
-                                  loongarch_set_lbt);
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-         object_property_set_description(obj, "lbt",
-                                    "Set off to disable Binary Tranlation.");
+     cpu->lsx = ON_OFF_AUTO_AUTO;
-+
++    cpu->lasx = ON_OFF_AUTO_AUTO;
-+        cpu->pmu = ON_OFF_AUTO_AUTO;
+     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
-+        object_property_add_bool(obj, "pmu", loongarch_get_pmu,
+                              loongarch_set_lsx);
-+                                 loongarch_set_pmu);
+     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
 +        object_property_set_description(obj, "pmu",
 +                                   "Set off to performance monitor unit.");
 +
      } else {
          cpu->lbt = ON_OFF_AUTO_OFF;
      }
 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.h
 +++ b/target/loongarch/cpu.h
 @@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
  enum loongarch_features {
+     LOONGARCH_FEATURE_LSX,
++    LOONGARCH_FEATURE_LASX,
      LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
-+    LOONGARCH_FEATURE_PMU,
+     LOONGARCH_FEATURE_PMU,
  };
- typedef struct  LoongArchBT {
 @@ -XXX,XX +XXX,XX @@ struct ArchCPU {
-     QEMUTimer timer;
-     uint32_t  phy_id;
      OnOffAuto lbt;
-+    OnOffAuto pmu;
+     OnOffAuto pmu;
      OnOffAuto lsx;
 +    OnOffAuto lasx;
      /* 'compatible' string for this CPU for Linux device trees */
      const char *dtb_compatible;
 diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm.c
 +++ b/target/loongarch/kvm/kvm.c
 @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
-         attr.attr = KVM_LOONGARCH_VM_FEAT_MIPSBT;
+         }
-         ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+         return false;
-         return (ret == 0);
 +    case LOONGARCH_FEATURE_LASX:
 +        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
 +        attr.attr = KVM_LOONGARCH_VM_FEAT_LASX;
 +        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (ret == 0) {
 +            return true;
 +        }
 +
-+    case LOONGARCH_FEATURE_PMU:
++        /* Fallback to old kernel detect interface */
-+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
++        val = 0;
-+        attr.attr = KVM_LOONGARCH_VM_FEAT_PMU;
++        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
-+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
++        /* Cpucfg2 */
-+        return (ret == 0);
++        attr.attr  = 2;
 +        attr.addr = (uint64_t)&val;
 +        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (!ret) {
 +            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
 +            if (ret) {
 +                return false;
 +            }
 +
-     default:
++            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX);
-         return false;
++            return (ret != 0);
-     }
++        }
 +        return false;
 +
-+    return false;
+     case LOONGARCH_FEATURE_LBT:
- }
+         /*
+          * Return all if all the LBT features are supported such as:
- static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
+@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
      return 0;
  }
-+static int kvm_cpu_check_pmu(CPUState *cs, Error **errp)
++static int kvm_cpu_check_lasx(CPUState *cs, Error **errp)
 +{
++    CPULoongArchState *env = cpu_env(cs);
 +    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
-+    CPULoongArchState *env = cpu_env(cs);
 +    bool kvm_supported;
 +
-+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_PMU);
++    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX);
-+    if (cpu->pmu == ON_OFF_AUTO_ON) {
++    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0);
-+        if (!kvm_supported) {
++    if (cpu->lasx == ON_OFF_AUTO_ON) {
-+            error_setg(errp, "'pmu' feature not supported by KVM on the host");
++        if (kvm_supported) {
 +            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
 +        } else {
 +            error_setg(errp, "'lasx' feature not supported by KVM on host");
 +            return -ENOTSUP;
 +        }
-+    } else if (cpu->pmu != ON_OFF_AUTO_AUTO) {
++    } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) {
-+        /* disable pmu if ON_OFF_AUTO_OFF is set */
++        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
 +        kvm_supported = false;
 +    }
 +
-+    if (kvm_supported) {
-+        env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMP, 1);
-+        env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMNUM, 3);
-+        env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMBITS, 63);
-+        env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, UPM, 1);
-+    }
 +    return 0;
 +}
 +
- int kvm_arch_init_vcpu(CPUState *cs)
+ static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
  {
-     uint64_t val;
+     CPULoongArchState *env = cpu_env(cs);
 @@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
-     if (ret < 0) {
          error_report_err(local_err);
      }
-+
-+    ret = kvm_cpu_check_pmu(cs, &local_err);
++    ret = kvm_cpu_check_lasx(cs, &local_err);
 +    if (ret < 0) {
 +        error_report_err(local_err);
 +    }
 +
-     return ret;
+     ret = kvm_cpu_check_lbt(cs, &local_err);
- }
+     if (ret < 0) {
+         error_report_err(local_err);
 diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/loongarch-qmp-cmds.c
 +++ b/target/loongarch/loongarch-qmp-cmds.c
@@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
  }
  static const char *cpu_model_advertised_features[] = {
 -    "lsx", "lasx", "lbt", NULL
 +    "lsx", "lasx", "lbt", "pmu", NULL
  };
  CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
 --
-.34.1
+.43.5

-[PULL v2 4/8] linux-headers: Add unistd_64.h
+Deleted patch
-From: Bibo Mao <maobibo@loongson.cn>
-since 6.11, unistd.h includes header file unistd_64.h directly on
-some platforms, here add unistd_64.h on these platforms. Affected
-platforms are ARM64, LoongArch64 and Riscv. Otherwise there will
-be compiling error such as:
-linux-headers/asm/unistd.h:3:10: fatal error: asm/unistd_64.h: No such file or directory
- #include <asm/unistd_64.h>
-Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Acked-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20241028023809.1554405-2-maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
----
- scripts/update-linux-headers.sh | 6 ++++++
-file changed, 6 insertions(+)
-diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh
-index XXXXXXX..XXXXXXX 100755
---- a/scripts/update-linux-headers.sh
-+++ b/scripts/update-linux-headers.sh
-@@ -XXX,XX +XXX,XX @@ EOF
-     fi
-     if [ $arch = arm64 ]; then
-         cp "$hdrdir/include/asm/sve_context.h" "$output/linux-headers/asm-arm64/"
-+        cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-arm64/"
-     fi
-     if [ $arch = x86 ]; then
-         cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-x86/"
-@@ -XXX,XX +XXX,XX @@ EOF
-     fi
-     if [ $arch = riscv ]; then
-         cp "$hdrdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv/"
-+        cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-riscv/"
-+        cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-riscv/"
-+    fi
-+    if [ $arch = loongarch ]; then
-+        cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-loongarch/"
-     fi
- done
- arch=
---
-.34.1

The following changes since commit 92ec7805190313c9e628f8fc4eb4f932c15247bd:

Merge tag 'pull-riscv-to-apply-20241031-1' of https://github.com/alistair23/qemu into staging (2024-10-31 16:34:25 +0000)

are available in the Git repository at:

https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20241102

for you to fetch changes up to 47b54e15bbe78722c62dfafc3e04deded820c05e:

target/loongarch: Add steal time support on migration (2024-11-02 15:45:45 +0800)

----------------------------------------------------------------
pull-loongarch-20241102

V2: Fix no 'asm/unistd_64.h' build error.
    Add a new patch (hw/loongarch/boot: Use warn_report when no kernel filename).
----------------------------------------------------------------
Bibo Mao (7):
      target/loongarch: Add loongson binary translation feature
      target/loongarch: Implement lbt registers save/restore function
      target/loongarch/kvm: Implement LoongArch PMU extension
      linux-headers: Add unistd_64.h
      linux-headers: loongarch: Add kvm_para.h
      linux-headers: Update to Linux v6.12-rc5
      target/loongarch: Add steal time support on migration

Song Gao (1):
      hw/loongarch/boot: Use warn_report when no kernel filename

hw/loongarch/boot.c                                |   5 +-
 include/standard-headers/drm/drm_fourcc.h          |  43 +++
 include/standard-headers/linux/const.h             |  17 ++
 include/standard-headers/linux/ethtool.h           | 226 ++++++++++++++
 include/standard-headers/linux/fuse.h              |  22 +-
 include/standard-headers/linux/input-event-codes.h |   2 +
 include/standard-headers/linux/pci_regs.h          |  41 ++-
 include/standard-headers/linux/virtio_balloon.h    |  16 +-
 include/standard-headers/linux/virtio_gpu.h        |   1 +
 linux-headers/asm-arm64/mman.h                     |   9 +
 linux-headers/asm-arm64/unistd.h                   |  25 +-
 linux-headers/asm-arm64/unistd_64.h                | 324 ++++++++++++++++++++
 linux-headers/asm-generic/unistd.h                 |   6 +-
 linux-headers/asm-loongarch/kvm.h                  |  24 ++
 linux-headers/asm-loongarch/kvm_para.h             |  21 ++
 linux-headers/asm-loongarch/unistd.h               |   4 +-
 linux-headers/asm-loongarch/unistd_64.h            | 320 ++++++++++++++++++++
 linux-headers/asm-riscv/kvm.h                      |   7 +
 linux-headers/asm-riscv/unistd.h                   |  41 +--
 linux-headers/asm-riscv/unistd_32.h                | 315 ++++++++++++++++++++
 linux-headers/asm-riscv/unistd_64.h                | 325 +++++++++++++++++++++
 linux-headers/asm-x86/kvm.h                        |   2 +
 linux-headers/asm-x86/unistd_64.h                  |   1 +
 linux-headers/asm-x86/unistd_x32.h                 |   1 +
 linux-headers/linux/bits.h                         |   3 +
 linux-headers/linux/const.h                        |  17 ++
 linux-headers/linux/iommufd.h                      | 143 +++++++--
 linux-headers/linux/kvm.h                          |  23 +-
 linux-headers/linux/mman.h                         |   1 +
 linux-headers/linux/psp-sev.h                      |  28 ++
 scripts/update-linux-headers.sh                    |   7 +
 target/loongarch/cpu.c                             |  43 +++
 target/loongarch/cpu.h                             |  23 ++
 target/loongarch/kvm/kvm.c                         | 225 +++++++++++++-
 target/loongarch/loongarch-qmp-cmds.c              |   2 +-
 target/loongarch/machine.c                         |  30 +-
 36 files changed, 2243 insertions(+), 100 deletions(-)
 create mode 100644 linux-headers/asm-arm64/unistd_64.h
 create mode 100644 linux-headers/asm-loongarch/kvm_para.h
 create mode 100644 linux-headers/asm-loongarch/unistd_64.h
 create mode 100644 linux-headers/asm-riscv/unistd_32.h
 create mode 100644 linux-headers/asm-riscv/unistd_64.h

From: Bibo Mao <maobibo@loongson.cn>

Loongson Binary Translation (LBT) is used to accelerate binary
translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM
eflags (eflags) and x87 fpu stack pointer (ftop).

Now LBT feature is added in kvm mode, not supported in TCG mode since
it is not emulated. Feature variable lbt is added with OnOffAuto type,
If lbt feature is not supported with KVM host, it reports error if there
is lbt=on command line.

If there is no any command line about lbt parameter, it checks whether
KVM host supports lbt feature and set the corresponding value in cpucfg.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240929070405.235200-2-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/cpu.c                | 24 +++++++++++
 target/loongarch/cpu.h                |  6 +++
 target/loongarch/kvm/kvm.c            | 57 ++++++++++++++++++++++++++-
 target/loongarch/loongarch-qmp-cmds.c |  2 +-
 4 files changed, 87 insertions(+), 2 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
     }
 }
 
+static bool loongarch_get_lbt(Object *obj, Error **errp)
+{
+    return LOONGARCH_CPU(obj)->lbt != ON_OFF_AUTO_OFF;
+}
+
+static void loongarch_set_lbt(Object *obj, bool value, Error **errp)
+{
+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+
+    cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+}
+
 void loongarch_cpu_post_init(Object *obj)
 {
+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                              loongarch_set_lsx);
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
                              loongarch_set_lasx);
+    /* lbt is enabled only in kvm mode, not supported in tcg mode */
+    if (kvm_enabled()) {
+        cpu->lbt = ON_OFF_AUTO_AUTO;
+        object_property_add_bool(obj, "lbt", loongarch_get_lbt,
+                                 loongarch_set_lbt);
+        object_property_set_description(obj, "lbt",
+                                   "Set off to disable Binary Tranlation.");
+    } else {
+        cpu->lbt = ON_OFF_AUTO_OFF;
+    }
 }
 
 static void loongarch_cpu_init(Object *obj)
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ FIELD(CPUCFG2, LLFTP_VER, 15, 3)
 FIELD(CPUCFG2, LBT_X86, 18, 1)
 FIELD(CPUCFG2, LBT_ARM, 19, 1)
 FIELD(CPUCFG2, LBT_MIPS, 20, 1)
+FIELD(CPUCFG2, LBT_ALL, 18, 3)
 FIELD(CPUCFG2, LSPW, 21, 1)
 FIELD(CPUCFG2, LAM, 22, 1)
 
@@ -XXX,XX +XXX,XX @@ struct LoongArchTLB {
 typedef struct LoongArchTLB LoongArchTLB;
 #endif
 
+enum loongarch_features {
+    LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
+};
+
 typedef struct CPUArchState {
     uint64_t gpr[32];
     uint64_t pc;
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     CPULoongArchState env;
     QEMUTimer timer;
     uint32_t  phy_id;
+    OnOffAuto lbt;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@
 #include <sys/ioctl.h>
 #include <linux/kvm.h>
 
+#include "qapi/error.h"
 #include "qemu/timer.h"
 #include "qemu/error-report.h"
 #include "qemu/main-loop.h"
@@ -XXX,XX +XXX,XX @@ static void kvm_loongarch_vm_stage_change(void *opaque, bool running,
     }
 }
 
+static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
+{
+    int ret;
+    struct kvm_device_attr attr;
+
+    switch (feature) {
+    case LOONGARCH_FEATURE_LBT:
+        /*
+         * Return all if all the LBT features are supported such as:
+         *  KVM_LOONGARCH_VM_FEAT_X86BT
+         *  KVM_LOONGARCH_VM_FEAT_ARMBT
+         *  KVM_LOONGARCH_VM_FEAT_MIPSBT
+         */
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_X86BT;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        attr.attr = KVM_LOONGARCH_VM_FEAT_ARMBT;
+        ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        attr.attr = KVM_LOONGARCH_VM_FEAT_MIPSBT;
+        ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        return (ret == 0);
+    default:
+        return false;
+    }
+}
+
+static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LBT);
+    if (cpu->lbt == ON_OFF_AUTO_ON) {
+        if (kvm_supported) {
+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7);
+        } else {
+            error_setg(errp, "'lbt' feature not supported by KVM on this host");
+            return -ENOTSUP;
+        }
+    } else if ((cpu->lbt == ON_OFF_AUTO_AUTO) && kvm_supported) {
+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7);
+    }
+
+    return 0;
+}
+
 int kvm_arch_init_vcpu(CPUState *cs)
 {
     uint64_t val;
+    int ret;
+    Error *local_err = NULL;
 
+    ret = 0;
     qemu_add_vm_change_state_handler(kvm_loongarch_vm_stage_change, cs);
 
     if (!kvm_get_one_reg(cs, KVM_REG_LOONGARCH_DEBUG_INST, &val)) {
         brk_insn = val;
     }
 
-    return 0;
+    ret = kvm_cpu_check_lbt(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+    return ret;
 }
 
 int kvm_arch_destroy_vcpu(CPUState *cs)
diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/loongarch-qmp-cmds.c
+++ b/target/loongarch/loongarch-qmp-cmds.c
@@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
 }
 
 static const char *cpu_model_advertised_features[] = {
-    "lsx", "lasx", NULL
+    "lsx", "lasx", "lbt", NULL
 };
 
 CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

Six registers scr0 - scr3, eflags and ftop are added in percpu vmstate.
And two functions kvm_loongarch_get_lbt/kvm_loongarch_put_lbt are added
to save/restore lbt registers.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240929070405.235200-3-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/cpu.h     | 12 ++++++++
 target/loongarch/kvm/kvm.c | 62 ++++++++++++++++++++++++++++++++++++++
 target/loongarch/machine.c | 24 +++++++++++++++
 3 files changed, 98 insertions(+)

diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ enum loongarch_features {
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
 };
 
+typedef struct  LoongArchBT {
+    /* scratch registers */
+    uint64_t scr0;
+    uint64_t scr1;
+    uint64_t scr2;
+    uint64_t scr3;
+    /* loongarch eflags */
+    uint32_t eflags;
+    uint32_t ftop;
+} lbt_t;
+
 typedef struct CPUArchState {
     uint64_t gpr[32];
     uint64_t pc;
@@ -XXX,XX +XXX,XX @@ typedef struct CPUArchState {
     fpr_t fpr[32];
     bool cf[8];
     uint32_t fcsr0;
+    lbt_t  lbt;
 
     uint32_t cpucfg[21];
 
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_put_regs_fp(CPUState *cs)
     return ret;
 }
 
+static int kvm_loongarch_put_lbt(CPUState *cs)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    uint64_t val;
+    int ret;
+
+    /* check whether vm support LBT firstly */
+    if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) {
+        return 0;
+    }
+
+    /* set six LBT registers including scr0-scr3, eflags, ftop */
+    ret = kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0);
+    ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1);
+    ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2);
+    ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3);
+    /*
+     * Be cautious, KVM_REG_LOONGARCH_LBT_FTOP is defined as 64-bit however
+     * lbt.ftop is 32-bit; the same with KVM_REG_LOONGARCH_LBT_EFLAGS register
+     */
+    val = env->lbt.eflags;
+    ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val);
+    val = env->lbt.ftop;
+    ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val);
+
+    return ret;
+}
+
+static int kvm_loongarch_get_lbt(CPUState *cs)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    uint64_t val;
+    int ret;
+
+    /* check whether vm support LBT firstly */
+    if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) {
+        return 0;
+    }
+
+    /* get six LBT registers including scr0-scr3, eflags, ftop */
+    ret = kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0);
+    ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1);
+    ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2);
+    ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3);
+    ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val);
+    env->lbt.eflags = (uint32_t)val;
+    ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val);
+    env->lbt.ftop = (uint32_t)val;
+
+    return ret;
+}
+
 void kvm_arch_reset_vcpu(CPUState *cs)
 {
     CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_get_registers(CPUState *cs, Error **errp)
         return ret;
     }
 
+    ret = kvm_loongarch_get_lbt(cs);
+    if (ret) {
+        return ret;
+    }
+
     ret = kvm_loongarch_get_mpstate(cs);
     return ret;
 }
@@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level, Error **errp)
         return ret;
     }
 
+    ret = kvm_loongarch_put_lbt(cs);
+    if (ret) {
+        return ret;
+    }
+
     ret = kvm_loongarch_put_mpstate(cs);
     return ret;
 }
diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/machine.c
+++ b/target/loongarch/machine.c
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_lasx = {
     },
 };
 
+static bool lbt_needed(void *opaque)
+{
+    LoongArchCPU *cpu = opaque;
+
+    return !!FIELD_EX64(cpu->env.cpucfg[2], CPUCFG2, LBT_ALL);
+}
+
+static const VMStateDescription vmstate_lbt = {
+    .name = "cpu/lbt",
+    .version_id = 0,
+    .minimum_version_id = 0,
+    .needed = lbt_needed,
+    .fields = (const VMStateField[]) {
+        VMSTATE_UINT64(env.lbt.scr0,   LoongArchCPU),
+        VMSTATE_UINT64(env.lbt.scr1,   LoongArchCPU),
+        VMSTATE_UINT64(env.lbt.scr2,   LoongArchCPU),
+        VMSTATE_UINT64(env.lbt.scr3,   LoongArchCPU),
+        VMSTATE_UINT32(env.lbt.eflags, LoongArchCPU),
+        VMSTATE_UINT32(env.lbt.ftop,   LoongArchCPU),
+        VMSTATE_END_OF_LIST()
+    },
+};
+
 #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
 static bool tlb_needed(void *opaque)
 {
@@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_loongarch_cpu = {
 #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
         &vmstate_tlb,
 #endif
+        &vmstate_lbt,
         NULL
     }
 };
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

Implement PMU extension for LoongArch kvm mode. Use OnOffAuto type
variable pmu to check the PMU feature. If the PMU Feature is not supported
with KVM host, it reports error if there is pmu=on command line.

If there is no any command line about pmu parameter, it checks whether
KVM host supports the PMU Feature and set the corresponding value in cpucfg.

This patch is based on lbt patch located at
  https://lore.kernel.org/qemu-devel/20240904061859.86615-1-maobibo@loongson.cn

Co-developed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240918082315.2345034-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/cpu.c                | 19 +++++++++++++
 target/loongarch/cpu.h                |  2 ++
 target/loongarch/kvm/kvm.c            | 41 +++++++++++++++++++++++++++
 target/loongarch/loongarch-qmp-cmds.c |  2 +-
 4 files changed, 63 insertions(+), 1 deletion(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lbt(Object *obj, bool value, Error **errp)
     cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 }
 
+static bool loongarch_get_pmu(Object *obj, Error **errp)
+{
+    return LOONGARCH_CPU(obj)->pmu != ON_OFF_AUTO_OFF;
+}
+
+static void loongarch_set_pmu(Object *obj, bool value, Error **errp)
+{
+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+
+    cpu->pmu = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+}
+
 void loongarch_cpu_post_init(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
                                  loongarch_set_lbt);
         object_property_set_description(obj, "lbt",
                                    "Set off to disable Binary Tranlation.");
+
+        cpu->pmu = ON_OFF_AUTO_AUTO;
+        object_property_add_bool(obj, "pmu", loongarch_get_pmu,
+                                 loongarch_set_pmu);
+        object_property_set_description(obj, "pmu",
+                                   "Set off to performance monitor unit.");
+
     } else {
         cpu->lbt = ON_OFF_AUTO_OFF;
     }
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
 
 enum loongarch_features {
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
+    LOONGARCH_FEATURE_PMU,
 };
 
 typedef struct  LoongArchBT {
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     QEMUTimer timer;
     uint32_t  phy_id;
     OnOffAuto lbt;
+    OnOffAuto pmu;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
         attr.attr = KVM_LOONGARCH_VM_FEAT_MIPSBT;
         ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
         return (ret == 0);
+
+    case LOONGARCH_FEATURE_PMU:
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_PMU;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        return (ret == 0);
+
     default:
         return false;
     }
+
+    return false;
 }
 
 static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
     return 0;
 }
 
+static int kvm_cpu_check_pmu(CPUState *cs, Error **errp)
+{
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    CPULoongArchState *env = cpu_env(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_PMU);
+    if (cpu->pmu == ON_OFF_AUTO_ON) {
+        if (!kvm_supported) {
+            error_setg(errp, "'pmu' feature not supported by KVM on the host");
+            return -ENOTSUP;
+        }
+    } else if (cpu->pmu != ON_OFF_AUTO_AUTO) {
+        /* disable pmu if ON_OFF_AUTO_OFF is set */
+        kvm_supported = false;
+    }
+
+    if (kvm_supported) {
+        env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMP, 1);
+        env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMNUM, 3);
+        env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMBITS, 63);
+        env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, UPM, 1);
+    }
+    return 0;
+}
+
 int kvm_arch_init_vcpu(CPUState *cs)
 {
     uint64_t val;
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
     if (ret < 0) {
         error_report_err(local_err);
     }
+
+    ret = kvm_cpu_check_pmu(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+
     return ret;
 }
 
diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/loongarch-qmp-cmds.c
+++ b/target/loongarch/loongarch-qmp-cmds.c
@@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
 }
 
 static const char *cpu_model_advertised_features[] = {
-    "lsx", "lasx", "lbt", NULL
+    "lsx", "lasx", "lbt", "pmu", NULL
 };
 
 CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

since 6.11, unistd.h includes header file unistd_64.h directly on
some platforms, here add unistd_64.h on these platforms. Affected
platforms are ARM64, LoongArch64 and Riscv. Otherwise there will
be compiling error such as:

linux-headers/asm/unistd.h:3:10: fatal error: asm/unistd_64.h: No such file or directory
 #include <asm/unistd_64.h>

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20241028023809.1554405-2-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 scripts/update-linux-headers.sh | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh
index XXXXXXX..XXXXXXX 100755
--- a/scripts/update-linux-headers.sh
+++ b/scripts/update-linux-headers.sh
@@ -XXX,XX +XXX,XX @@ EOF
     fi
     if [ $arch = arm64 ]; then
         cp "$hdrdir/include/asm/sve_context.h" "$output/linux-headers/asm-arm64/"
+        cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-arm64/"
     fi
     if [ $arch = x86 ]; then
         cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-x86/"
@@ -XXX,XX +XXX,XX @@ EOF
     fi
     if [ $arch = riscv ]; then
         cp "$hdrdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv/"
+        cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-riscv/"
+        cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-riscv/"
+    fi
+    if [ $arch = loongarch ]; then
+        cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-loongarch/"
     fi
 done
 arch=
-- 
2.34.1

When we run “qemu-system-loongarch64 -qmp stdio -vnc none -S”,
we get an error message “Need kernel filename” and then we can't use qmp cmd to query some information.
So, we just throw a warning and then the cpus starts running from address VIRT_FLASH0_BASE.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20241030012359.4040817-1-gaosong@loongson.cn>
---
 hw/loongarch/boot.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -XXX,XX +XXX,XX @@ static void init_boot_rom(struct loongarch_boot_info *info, void *p)
 static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
 {
     void *p, *bp;
-    int64_t kernel_addr = 0;
+    int64_t kernel_addr = VIRT_FLASH0_BASE;
     LoongArchCPU *lacpu;
     CPUState *cs;
 
@@ -XXX,XX +XXX,XX @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
         kernel_addr = load_kernel_info(info);
     } else {
         if(!qtest_enabled()) {
-            error_report("Need kernel filename\n");
-            exit(1);
+            warn_report("No kernel provided, booting from flash drive.");
         }
     }
 
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

With pv steal time supported, VM machine needs get physical address
of each vcpu and notify new host during migration. Here two
functions kvm_get_stealtime/kvm_set_stealtime, and guest steal time
physical address is only updated on KVM_PUT_FULL_STATE stage.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240930064040.753929-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/cpu.h     |  3 ++
 target/loongarch/kvm/kvm.c | 65 ++++++++++++++++++++++++++++++++++++++
 target/loongarch/machine.c |  6 ++--
 3 files changed, 72 insertions(+), 2 deletions(-)

diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct CPUArchState {
     uint64_t CSR_DBG;
     uint64_t CSR_DERA;
     uint64_t CSR_DSAVE;
+    struct {
+        uint64_t guest_addr;
+    } stealtime;
 
 #ifdef CONFIG_TCG
     float_status fp_status;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
     KVM_CAP_LAST_INFO
 };
 
+static int kvm_get_stealtime(CPUState *cs)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    int err;
+    struct kvm_device_attr attr = {
+        .group = KVM_LOONGARCH_VCPU_PVTIME_CTRL,
+        .attr = KVM_LOONGARCH_VCPU_PVTIME_GPA,
+        .addr = (uint64_t)&env->stealtime.guest_addr,
+    };
+
+    err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr);
+    if (err) {
+        return 0;
+    }
+
+    err = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, attr);
+    if (err) {
+        error_report("PVTIME: KVM_GET_DEVICE_ATTR: %s", strerror(errno));
+        return err;
+    }
+
+    return 0;
+}
+
+static int kvm_set_stealtime(CPUState *cs)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    int err;
+    struct kvm_device_attr attr = {
+        .group = KVM_LOONGARCH_VCPU_PVTIME_CTRL,
+        .attr = KVM_LOONGARCH_VCPU_PVTIME_GPA,
+        .addr = (uint64_t)&env->stealtime.guest_addr,
+    };
+
+    err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr);
+    if (err) {
+        return 0;
+    }
+
+    err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, attr);
+    if (err) {
+        error_report("PVTIME: KVM_SET_DEVICE_ATTR %s with gpa "TARGET_FMT_lx,
+                      strerror(errno), env->stealtime.guest_addr);
+        return err;
+    }
+
+    return 0;
+}
+
 static int kvm_loongarch_get_regs_core(CPUState *cs)
 {
     int ret = 0;
@@ -XXX,XX +XXX,XX @@ int kvm_arch_get_registers(CPUState *cs, Error **errp)
         return ret;
     }
 
+    ret = kvm_get_stealtime(cs);
+    if (ret) {
+        return ret;
+    }
+
     ret = kvm_loongarch_get_mpstate(cs);
     return ret;
 }
@@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level, Error **errp)
         return ret;
     }
 
+    if (level >= KVM_PUT_FULL_STATE) {
+        /*
+         * only KVM_PUT_FULL_STATE is required, kvm kernel will clear
+         * guest_addr for KVM_PUT_RESET_STATE
+         */
+        ret = kvm_set_stealtime(cs);
+        if (ret) {
+            return ret;
+        }
+    }
+
     ret = kvm_loongarch_put_mpstate(cs);
     return ret;
 }
diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/machine.c
+++ b/target/loongarch/machine.c
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_tlb = {
 /* LoongArch CPU state */
 const VMStateDescription vmstate_loongarch_cpu = {
     .name = "cpu",
-    .version_id = 2,
-    .minimum_version_id = 2,
+    .version_id = 3,
+    .minimum_version_id = 3,
     .fields = (const VMStateField[]) {
         VMSTATE_UINTTL_ARRAY(env.gpr, LoongArchCPU, 32),
         VMSTATE_UINTTL(env.pc, LoongArchCPU),
@@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_loongarch_cpu = {
         VMSTATE_UINT64(env.CSR_DSAVE, LoongArchCPU),
 
         VMSTATE_UINT64(kvm_state_counter, LoongArchCPU),
+        /* PV steal time */
+        VMSTATE_UINT64(env.stealtime.guest_addr, LoongArchCPU),
 
         VMSTATE_END_OF_LIST()
     },
-- 
2.34.1

The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595:

Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500)

are available in the Git repository at:

https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227

for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424:

target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800)

----------------------------------------------------------------
pull-loongarch-20241227
v1 ... v2
  1. Modify patch auther inconsistent with SOB

----------------------------------------------------------------
Bibo Mao (5):
      target/loongarch: Use actual operand size with vbsrl check
      hw/loongarch/virt: Create fdt table on machine creation done notification
      hw/loongarch/virt: Improve fdt table creation for CPU object
      target/loongarch: Use auto method with LSX feature
      target/loongarch: Use auto method with LASX feature

Guo Hongyu (1):
      target/loongarch: Fix vldi inst

hw/loongarch/virt.c                             | 142 ++++++++++++++----------
 target/loongarch/cpu.c                          |  86 ++++++++------
 target/loongarch/cpu.h                          |   4 +
 target/loongarch/kvm/kvm.c                      | 107 ++++++++++++++++++
 target/loongarch/tcg/insn_trans/trans_vec.c.inc |   4 +-
 5 files changed, 249 insertions(+), 94 deletions(-)

From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>

Refer to the link below for a description of the vldi instructions:
https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
Fixed errors in vldi instruction implementation.

Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
Tested-by: Xianglai Li <lixianglai@loongson.cn>
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm)
         break;
     case 1:
         /* data: {2{16'0, imm[7:0], 8'0}} */
-        data = (t << 24) | (t << 8);
+        data = (t << 40) | (t << 8);
         break;
     case 2:
         /* data: {2{8'0, imm[7:0], 16'0}} */
-- 
2.43.5

Hardcoded 32 bytes is used for vbsrl emulation check, there is
problem when options lsx=on,lasx=off is used for vbsrl.v instruction
in TCG mode. It injects LASX exception rather LSX exception.

Here actual operand size is used.

Cc: qemu-stable@nongnu.org
Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve")
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz)
 {
     int i, ofs;
 
-    if (!check_vec(ctx, 32)) {
+    if (!check_vec(ctx, oprsz)) {
         return true;
     }
 
-- 
2.43.5

The same with ACPI table, fdt table is created on machine done
notification. Some objects like CPU objects can be created with cold-plug
method with command such as -smp x, -device la464-loongarch-cpu, so all
objects finish to create when machine is done.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/loongarch/virt.c | 103 ++++++++++++++++++++++++--------------------
 1 file changed, 57 insertions(+), 46 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
     }
 }
 
+static void virt_fdt_setup(LoongArchVirtMachineState *lvms)
+{
+    MachineState *machine = MACHINE(lvms);
+    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
+    int i;
+
+    create_fdt(lvms);
+    fdt_add_cpu_nodes(lvms);
+    fdt_add_memory_nodes(machine);
+    fdt_add_fw_cfg_node(lvms);
+    fdt_add_flash_node(lvms);
+
+    /* Add cpu interrupt-controller */
+    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
+    /* Add Extend I/O Interrupt Controller node */
+    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
+    /* Add PCH PIC node */
+    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
+    /* Add PCH MSI node */
+    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
+    /* Add pcie node */
+    fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle);
+
+    /*
+     * Create uart fdt node in reverse order so that they appear
+     * in the finished device tree lowest address first
+     */
+    for (i = VIRT_UART_COUNT; i-- > 0;) {
+        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
+        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
+        fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0);
+    }
+
+    fdt_add_rtc_node(lvms, &pch_pic_phandle);
+    fdt_add_ged_reset(lvms);
+    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
+                                   VIRT_PLATFORM_BUS_BASEADDRESS,
+                                   VIRT_PLATFORM_BUS_SIZE,
+                                   VIRT_PLATFORM_BUS_IRQ);
+
+    /*
+     * Since lowmem region starts from 0 and Linux kernel legacy start address
+     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
+     * access. FDT size limit with 1 MiB.
+     * Put the FDT into the memory map as a ROM image: this will ensure
+     * the FDT is copied again upon reset, even if addr points into RAM.
+     */
+    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
+    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
+                          &address_space_memory);
+    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
+            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
+}
+
 static void virt_done(Notifier *notifier, void *data)
 {
     LoongArchVirtMachineState *lvms = container_of(notifier,
                                       LoongArchVirtMachineState, machine_done);
     virt_build_smbios(lvms);
     loongarch_acpi_setup(lvms);
+    virt_fdt_setup(lvms);
 }
 
 static void virt_powerdown_req(Notifier *notifier, void *opaque)
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
 }
 
 static void virt_devices_init(DeviceState *pch_pic,
-                                   LoongArchVirtMachineState *lvms,
-                                   uint32_t *pch_pic_phandle,
-                                   uint32_t *pch_msi_phandle)
+                                   LoongArchVirtMachineState *lvms)
 {
     MachineClass *mc = MACHINE_GET_CLASS(lvms);
     DeviceState *gpex_dev;
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
         gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
     }
 
-    /* Add pcie node */
-    fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
-
     /*
      * Create uart fdt node in reverse order so that they appear
      * in the finished device tree lowest address first
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
         serial_mm_init(get_system_memory(), base, 0,
                        qdev_get_gpio_in(pch_pic, irq),
                        115200, serial_hd(i), DEVICE_LITTLE_ENDIAN);
-        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
     }
 
     /* Network init */
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
     sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
                          qdev_get_gpio_in(pch_pic,
                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
-    fdt_add_rtc_node(lvms, pch_pic_phandle);
-    fdt_add_ged_reset(lvms);
 
     /* acpi ged */
     lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     CPULoongArchState *env;
     CPUState *cpu_state;
     int cpu, pin, i, start, num;
-    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
 
     /*
      * Extended IRQ model.
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
                    sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
 
-    /* Add cpu interrupt-controller */
-    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
-
     for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
         cpu_state = qemu_get_cpu(cpu);
         cpudev = DEVICE(cpu_state);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
         }
     }
 
-    /* Add Extend I/O Interrupt Controller node */
-    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
-
     pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
     num = VIRT_PCH_PIC_IRQ_NUM;
     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
         qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
     }
 
-    /* Add PCH PIC node */
-    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
-
     pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
     start   =  num;
     num = EXTIOI_IRQS - start;
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
                               qdev_get_gpio_in(extioi, i + start));
     }
 
-    /* Add PCH MSI node */
-    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
-
-    virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
+    virt_devices_init(pch_pic, lvms);
 }
 
 static void virt_firmware_init(LoongArchVirtMachineState *lvms)
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
     }
 
-    create_fdt(lvms);
-
     /* Create IOCSR space */
     memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
                           machine, "iocsr", UINT64_MAX);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         lacpu = LOONGARCH_CPU(cpu);
         lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
     }
-    fdt_add_cpu_nodes(lvms);
-    fdt_add_memory_nodes(machine);
     fw_cfg_add_memory(machine);
 
     /* Node0 memory */
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                         memmap_table,
                         sizeof(struct memmap_entry) * (memmap_entries));
     }
-    fdt_add_fw_cfg_node(lvms);
-    fdt_add_flash_node(lvms);
 
     /* Initialize the IO interrupt subsystem */
     virt_irq_init(lvms);
-    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
-                                   VIRT_PLATFORM_BUS_BASEADDRESS,
-                                   VIRT_PLATFORM_BUS_SIZE,
-                                   VIRT_PLATFORM_BUS_IRQ);
     lvms->machine_done.notify = virt_done;
     qemu_add_machine_init_done_notifier(&lvms->machine_done);
      /* connect powerdown request */
     lvms->powerdown_notifier.notify = virt_powerdown_req;
     qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
 
-    /*
-     * Since lowmem region starts from 0 and Linux kernel legacy start address
-     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
-     * access. FDT size limit with 1 MiB.
-     * Put the FDT into the memory map as a ROM image: this will ensure
-     * the FDT is copied again upon reset, even if addr points into RAM.
-     */
-    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
-    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
-                          &address_space_memory);
-    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
-            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
-
     lvms->bootinfo.ram_size = ram_size;
     loongarch_load_kernel(machine, &lvms->bootinfo);
 }
-- 
2.43.5

For CPU object, possible_cpu_arch_ids() function is used rather than
smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus
is not accurate for all possible CPU objects, possible_cpu_arch_ids()
is used here.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/loongarch/virt.c | 39 +++++++++++++++++++++++++--------------
 1 file changed, 25 insertions(+), 14 deletions(-)

Like LBT feature, add type OnOffAuto for LSX feature setting. Also
add LSX feature detection with new VM ioctl command, fallback to old
method if it is not supported.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/cpu.c     | 38 +++++++++++++++------------
 target/loongarch/cpu.h     |  2 ++
 target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 77 insertions(+), 17 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
     CPULoongArchState *env = &cpu->env;
+    uint32_t data = 0;
     int i;
 
     for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
     cpu->dtb_compatible = "loongarch,Loongson-3A5000";
     env->cpucfg[0] = 0x14c010;  /* PRID */
 
-    uint32_t data = 0;
     data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
     CPULoongArchState *env = &cpu->env;
-
+    uint32_t data = 0;
     int i;
 
     for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
     cpu->dtb_compatible = "loongarch,Loongson-1C103";
     env->cpucfg[0] = 0x148042;  /* PRID */
 
-    uint32_t data = 0;
     data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
 
 static bool loongarch_get_lsx(Object *obj, Error **errp)
 {
-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-    bool ret;
-
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
-        ret = true;
-    } else {
-        ret = false;
-    }
-    return ret;
+    return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF;
 }
 
 static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    uint32_t val;
 
-    if (value) {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-    } else {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if (kvm_enabled()) {
+        /* kvm feature detection in function kvm_arch_init_vcpu */
+        return;
     }
+
+    /* LSX feature detection in TCG mode */
+    val = cpu->env.cpucfg[2];
+    if (cpu->lsx == ON_OFF_AUTO_ON) {
+        if (FIELD_EX32(val, CPUCFG2, LSX) == 0) {
+            error_setg(errp, "Failed to enable LSX in TCG mode");
+            return;
+        }
+    }
+
+    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
 }
 
 static bool loongarch_get_lasx(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 
+    cpu->lsx = ON_OFF_AUTO_AUTO;
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                              loongarch_set_lsx);
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
 
     } else {
         cpu->lbt = ON_OFF_AUTO_OFF;
+        cpu->pmu = ON_OFF_AUTO_OFF;
     }
 }
 
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
 #endif
 
 enum loongarch_features {
+    LOONGARCH_FEATURE_LSX,
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
     LOONGARCH_FEATURE_PMU,
 };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     uint32_t  phy_id;
     OnOffAuto lbt;
     OnOffAuto pmu;
+    OnOffAuto lsx;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
 {
     int ret;
     struct kvm_device_attr attr;
+    uint64_t val;
 
     switch (feature) {
+    case LOONGARCH_FEATURE_LSX:
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_LSX;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        if (ret == 0) {
+            return true;
+        }
+
+        /* Fallback to old kernel detect interface */
+        val = 0;
+        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
+        /* Cpucfg2 */
+        attr.attr  = 2;
+        attr.addr = (uint64_t)&val;
+        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
+        if (!ret) {
+            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
+            if (ret) {
+                return false;
+            }
+
+            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX);
+            return (ret != 0);
+        }
+        return false;
+
     case LOONGARCH_FEATURE_LBT:
         /*
          * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
     return false;
 }
 
+static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX);
+    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0);
+    if (cpu->lsx == ON_OFF_AUTO_ON) {
+        if (kvm_supported) {
+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
+        } else {
+            error_setg(errp, "'lsx' feature not supported by KVM on this host");
+            return -ENOTSUP;
+        }
+    } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) {
+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
+    }
+
+    return 0;
+}
+
 static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
 {
     CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
         brk_insn = val;
     }
 
+    ret = kvm_cpu_check_lsx(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+
     ret = kvm_cpu_check_lbt(cs, &local_err);
     if (ret < 0) {
         error_report_err(local_err);
-- 
2.43.5

Like LSX feature, add type OnOffAuto for LASX feature setting.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/cpu.c     | 50 +++++++++++++++++++++++------------
 target/loongarch/cpu.h     |  2 ++
 target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 89 insertions(+), 16 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
     uint32_t val;
 
     cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if (cpu->lsx == ON_OFF_AUTO_OFF) {
+        cpu->lasx = ON_OFF_AUTO_OFF;
+        if (cpu->lasx == ON_OFF_AUTO_ON) {
+            error_setg(errp, "Failed to disable LSX since LASX is enabled");
+            return;
+        }
+    }
+
     if (kvm_enabled()) {
         /* kvm feature detection in function kvm_arch_init_vcpu */
         return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
             error_setg(errp, "Failed to enable LSX in TCG mode");
             return;
         }
+    } else {
+        cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0);
+        val = cpu->env.cpucfg[2];
     }
 
     cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
 
 static bool loongarch_get_lasx(Object *obj, Error **errp)
 {
-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-    bool ret;
-
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
-        ret = true;
-    } else {
-        ret = false;
-    }
-    return ret;
+    return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF;
 }
 
 static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    uint32_t val;
 
-    if (value) {
-	if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
-            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-	}
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
-    } else {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) {
+        error_setg(errp, "Failed to enable LASX since lSX is disabled");
+        return;
+    }
+
+    if (kvm_enabled()) {
+        /* kvm feature detection in function kvm_arch_init_vcpu */
+        return;
     }
+
+    /* LASX feature detection in TCG mode */
+    val = cpu->env.cpucfg[2];
+    if (cpu->lasx == ON_OFF_AUTO_ON) {
+        if (FIELD_EX32(val, CPUCFG2, LASX) == 0) {
+            error_setg(errp, "Failed to enable LASX in TCG mode");
+            return;
+        }
+    }
+
+    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
 }
 
 static bool loongarch_get_lbt(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 
     cpu->lsx = ON_OFF_AUTO_AUTO;
+    cpu->lasx = ON_OFF_AUTO_AUTO;
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                              loongarch_set_lsx);
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
 
 enum loongarch_features {
     LOONGARCH_FEATURE_LSX,
+    LOONGARCH_FEATURE_LASX,
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
     LOONGARCH_FEATURE_PMU,
 };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     OnOffAuto lbt;
     OnOffAuto pmu;
     OnOffAuto lsx;
+    OnOffAuto lasx;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
         }
         return false;
 
+    case LOONGARCH_FEATURE_LASX:
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_LASX;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        if (ret == 0) {
+            return true;
+        }
+
+        /* Fallback to old kernel detect interface */
+        val = 0;
+        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
+        /* Cpucfg2 */
+        attr.attr  = 2;
+        attr.addr = (uint64_t)&val;
+        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
+        if (!ret) {
+            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
+            if (ret) {
+                return false;
+            }
+
+            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX);
+            return (ret != 0);
+        }
+        return false;
+
     case LOONGARCH_FEATURE_LBT:
         /*
          * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
     return 0;
 }
 
+static int kvm_cpu_check_lasx(CPUState *cs, Error **errp)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX);
+    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0);
+    if (cpu->lasx == ON_OFF_AUTO_ON) {
+        if (kvm_supported) {
+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
+        } else {
+            error_setg(errp, "'lasx' feature not supported by KVM on host");
+            return -ENOTSUP;
+        }
+    } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) {
+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
+    }
+
+    return 0;
+}
+
 static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
 {
     CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
         error_report_err(local_err);
     }
 
+    ret = kvm_cpu_check_lasx(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+
     ret = kvm_cpu_check_lbt(cs, &local_err);
     if (ret < 0) {
         error_report_err(local_err);
-- 
2.43.5