[v2] target/riscv: Fix vcompress with rvv_ta_all_1s

[PATCH v2] target/riscv: Fix vcompress with rvv_ta_all_1s

Posted by Anton Blanchard 3 weeks, 3 days ago

vcompress packs vl or less fields into vd, so the tail starts after the
last packed field. This could be more clearly expressed in the ISA,
but for now this thread helps to explain it:

https://github.com/riscv/riscv-v-spec/issues/796

Signed-off-by: Anton Blanchard <antonb@tenstorrent.com>
---
 target/riscv/vector_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 072bd444b1..ccb32e6122 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -5132,7 +5132,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,               \
     }                                                                     \
     env->vstart = 0;                                                      \
     /* set tail elements to 1s */                                         \
-    vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz);              \
+    vext_set_elems_1s(vd, vta, num * esz, total_elems * esz);             \
 }
 
 /* Compress into vd elements of vs2 where vs1 is enabled */
-- 
2.34.1

Re: [PATCH v2] target/riscv: Fix vcompress with rvv_ta_all_1s

Posted by Alistair Francis 3 weeks, 2 days ago

On Wed, Oct 30, 2024 at 2:37 PM Anton Blanchard <antonb@tenstorrent.com> wrote:
>
> vcompress packs vl or less fields into vd, so the tail starts after the
> last packed field. This could be more clearly expressed in the ISA,
> but for now this thread helps to explain it:
>
> https://github.com/riscv/riscv-v-spec/issues/796
>
> Signed-off-by: Anton Blanchard <antonb@tenstorrent.com>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>  target/riscv/vector_helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 072bd444b1..ccb32e6122 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -5132,7 +5132,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,               \
>      }                                                                     \
>      env->vstart = 0;                                                      \
>      /* set tail elements to 1s */                                         \
> -    vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz);              \
> +    vext_set_elems_1s(vd, vta, num * esz, total_elems * esz);             \
>  }
>
>  /* Compress into vd elements of vs2 where vs1 is enabled */
> --
> 2.34.1
>
>

Re: [PATCH v2] target/riscv: Fix vcompress with rvv_ta_all_1s

Posted by Alistair Francis 3 weeks, 2 days ago

On Wed, Oct 30, 2024 at 2:37 PM Anton Blanchard <antonb@tenstorrent.com> wrote:
>
> vcompress packs vl or less fields into vd, so the tail starts after the
> last packed field. This could be more clearly expressed in the ISA,
> but for now this thread helps to explain it:
>
> https://github.com/riscv/riscv-v-spec/issues/796
>
> Signed-off-by: Anton Blanchard <antonb@tenstorrent.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/vector_helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 072bd444b1..ccb32e6122 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -5132,7 +5132,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,               \
>      }                                                                     \
>      env->vstart = 0;                                                      \
>      /* set tail elements to 1s */                                         \
> -    vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz);              \
> +    vext_set_elems_1s(vd, vta, num * esz, total_elems * esz);             \
>  }
>
>  /* Compress into vd elements of vs2 where vs1 is enabled */
> --
> 2.34.1
>
>

Re: [PATCH v2] target/riscv: Fix vcompress with rvv_ta_all_1s

Posted by Daniel Henrique Barboza 3 weeks, 2 days ago


On 10/30/24 1:35 AM, Anton Blanchard wrote:
> vcompress packs vl or less fields into vd, so the tail starts after the
> last packed field. This could be more clearly expressed in the ISA,
> but for now this thread helps to explain it:
> 
> https://github.com/riscv/riscv-v-spec/issues/796
> 
> Signed-off-by: Anton Blanchard <antonb@tenstorrent.com>
> ---

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

>   target/riscv/vector_helper.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 072bd444b1..ccb32e6122 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -5132,7 +5132,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,               \
>       }                                                                     \
>       env->vstart = 0;                                                      \
>       /* set tail elements to 1s */                                         \
> -    vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz);              \
> +    vext_set_elems_1s(vd, vta, num * esz, total_elems * esz);             \
>   }
>   
>   /* Compress into vd elements of vs2 where vs1 is enabled */