On 10/26/24 10:53, Philippe Mathieu-Daudé wrote:
> Extract the decode_64bit_enabled() helper which detects
> whether CPUs can run 64-bit instructions.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/mips/tcg/translate.h | 2 ++
> target/mips/tcg/translate.c | 7 ++++++-
> 2 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h
> index 5d196e69ac4..ae6c25aa0c4 100644
> --- a/target/mips/tcg/translate.h
> +++ b/target/mips/tcg/translate.h
> @@ -217,6 +217,8 @@ void msa_translate_init(void);
> void mxu_translate_init(void);
> bool decode_ase_mxu(DisasContext *ctx, uint32_t insn);
>
> +bool decode_64bit_enabled(DisasContext *ctx);
> +
> /* decodetree generated */
> bool decode_isa_rel6(DisasContext *ctx, uint32_t insn);
> bool decode_ase_msa(DisasContext *ctx, uint32_t insn);
> diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
> index d92fc418edd..6c881af5618 100644
> --- a/target/mips/tcg/translate.c
> +++ b/target/mips/tcg/translate.c
> @@ -1645,13 +1645,18 @@ static inline void check_ps(DisasContext *ctx)
> check_cp1_64bitmode(ctx);
> }
>
> +bool decode_64bit_enabled(DisasContext *ctx)
> +{
> + return ctx->hflags & MIPS_HFLAG_64;
> +}
> +
> /*
> * This code generates a "reserved instruction" exception if cpu is not
> * 64-bit or 64-bit instructions are not enabled.
> */
> void check_mips_64(DisasContext *ctx)
> {
> - if (unlikely((TARGET_LONG_BITS != 64) || !(ctx->hflags & MIPS_HFLAG_64))) {
> + if (unlikely((TARGET_LONG_BITS != 64) || !decode_64bit_enabled(ctx))) {
> gen_reserved_instruction(ctx);
> }
> }
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>