1 | The following changes since commit 6f625ce2f21d6a1243065d236298277c56f972d5: | 1 | The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595: |
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2 | 2 | ||
3 | Merge tag 'pull-request-2024-10-21' of https://gitlab.com/thuth/qemu into staging (2024-10-21 17:12:59 +0100) | 3 | Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500) |
4 | 4 | ||
5 | are available in the Git repository at: | 5 | are available in the Git repository at: |
6 | 6 | ||
7 | https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20241024 | 7 | https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227 |
8 | 8 | ||
9 | for you to fetch changes up to c44e0d6ba280dcc6bdf4ed555020c61d564b526c: | 9 | for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424: |
10 | 10 | ||
11 | target/loongarch: Add steal time support on migration (2024-10-24 17:27:55 +0800) | 11 | target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800) |
12 | 12 | ||
13 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
14 | pull-loongarch-20241024 | 14 | pull-loongarch-20241227 |
15 | v1 ... v2 | ||
16 | 1. Modify patch auther inconsistent with SOB | ||
15 | 17 | ||
16 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
17 | Bibo Mao (6): | 19 | Bibo Mao (5): |
18 | target/loongarch: Add loongson binary translation feature | 20 | target/loongarch: Use actual operand size with vbsrl check |
19 | target/loongarch: Implement lbt registers save/restore function | 21 | hw/loongarch/virt: Create fdt table on machine creation done notification |
20 | target/loongarch/kvm: Implement LoongArch PMU extension | 22 | hw/loongarch/virt: Improve fdt table creation for CPU object |
21 | linux-headers: loongarch: Add kvm_para.h and unistd_64.h | 23 | target/loongarch: Use auto method with LSX feature |
22 | linux-headers: Update to Linux v6.12-rc3 | 24 | target/loongarch: Use auto method with LASX feature |
23 | target/loongarch: Add steal time support on migration | ||
24 | 25 | ||
25 | include/standard-headers/drm/drm_fourcc.h | 43 +++ | 26 | Guo Hongyu (1): |
26 | include/standard-headers/linux/const.h | 17 ++ | 27 | target/loongarch: Fix vldi inst |
27 | include/standard-headers/linux/ethtool.h | 226 +++++++++++++++ | 28 | |
28 | include/standard-headers/linux/fuse.h | 22 +- | 29 | hw/loongarch/virt.c | 142 ++++++++++++++---------- |
29 | include/standard-headers/linux/input-event-codes.h | 2 + | 30 | target/loongarch/cpu.c | 86 ++++++++------ |
30 | include/standard-headers/linux/pci_regs.h | 41 ++- | 31 | target/loongarch/cpu.h | 4 + |
31 | include/standard-headers/linux/virtio_balloon.h | 16 +- | 32 | target/loongarch/kvm/kvm.c | 107 ++++++++++++++++++ |
32 | include/standard-headers/linux/virtio_gpu.h | 1 + | 33 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 4 +- |
33 | linux-headers/asm-arm64/mman.h | 9 + | 34 | 5 files changed, 249 insertions(+), 94 deletions(-) |
34 | linux-headers/asm-arm64/unistd.h | 25 +- | ||
35 | linux-headers/asm-generic/unistd.h | 6 +- | ||
36 | linux-headers/asm-loongarch/kvm.h | 24 ++ | ||
37 | linux-headers/asm-loongarch/kvm_para.h | 21 ++ | ||
38 | linux-headers/asm-loongarch/unistd.h | 4 +- | ||
39 | linux-headers/asm-loongarch/unistd_64.h | 320 +++++++++++++++++++++ | ||
40 | linux-headers/asm-riscv/kvm.h | 7 + | ||
41 | linux-headers/asm-riscv/unistd.h | 41 +-- | ||
42 | linux-headers/asm-x86/kvm.h | 2 + | ||
43 | linux-headers/asm-x86/unistd_64.h | 1 + | ||
44 | linux-headers/asm-x86/unistd_x32.h | 1 + | ||
45 | linux-headers/linux/bits.h | 3 + | ||
46 | linux-headers/linux/const.h | 17 ++ | ||
47 | linux-headers/linux/iommufd.h | 143 +++++++-- | ||
48 | linux-headers/linux/kvm.h | 23 +- | ||
49 | linux-headers/linux/mman.h | 1 + | ||
50 | linux-headers/linux/psp-sev.h | 28 ++ | ||
51 | scripts/update-linux-headers.sh | 4 + | ||
52 | target/loongarch/cpu.c | 43 +++ | ||
53 | target/loongarch/cpu.h | 23 ++ | ||
54 | target/loongarch/kvm/kvm.c | 225 ++++++++++++++- | ||
55 | target/loongarch/loongarch-qmp-cmds.c | 2 +- | ||
56 | target/loongarch/machine.c | 30 +- | ||
57 | 32 files changed, 1274 insertions(+), 97 deletions(-) | ||
58 | create mode 100644 linux-headers/asm-loongarch/kvm_para.h | ||
59 | create mode 100644 linux-headers/asm-loongarch/unistd_64.h | diff view generated by jsdifflib |
1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn> |
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2 | 2 | ||
3 | With pv steal time supported, VM machine needs get physical address | 3 | Refer to the link below for a description of the vldi instructions: |
4 | of each vcpu and notify new host during migration. Here two | 4 | https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88 |
5 | functions kvm_get_stealtime/kvm_set_stealtime, and guest steal time | 5 | Fixed errors in vldi instruction implementation. |
6 | physical address is only updated on KVM_PUT_FULL_STATE stage. | ||
7 | 6 | ||
7 | Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn> | ||
8 | Tested-by: Xianglai Li <lixianglai@loongson.cn> | ||
9 | Signed-off-by: Xianglai Li <lixianglai@loongson.cn> | ||
10 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | ||
8 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 11 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
9 | Reviewed-by: Song Gao <gaosong@loongson.cn> | ||
10 | Message-Id: <20240930064040.753929-1-maobibo@loongson.cn> | ||
11 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
12 | --- | 12 | --- |
13 | target/loongarch/cpu.h | 3 ++ | 13 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +- |
14 | target/loongarch/kvm/kvm.c | 65 ++++++++++++++++++++++++++++++++++++++ | 14 | 1 file changed, 1 insertion(+), 1 deletion(-) |
15 | target/loongarch/machine.c | 6 ++-- | ||
16 | 3 files changed, 72 insertions(+), 2 deletions(-) | ||
17 | 15 | ||
18 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h | 16 | diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
19 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
20 | --- a/target/loongarch/cpu.h | 18 | --- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
21 | +++ b/target/loongarch/cpu.h | 19 | +++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
22 | @@ -XXX,XX +XXX,XX @@ typedef struct CPUArchState { | 20 | @@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm) |
23 | uint64_t CSR_DBG; | 21 | break; |
24 | uint64_t CSR_DERA; | 22 | case 1: |
25 | uint64_t CSR_DSAVE; | 23 | /* data: {2{16'0, imm[7:0], 8'0}} */ |
26 | + struct { | 24 | - data = (t << 24) | (t << 8); |
27 | + uint64_t guest_addr; | 25 | + data = (t << 40) | (t << 8); |
28 | + } stealtime; | 26 | break; |
29 | 27 | case 2: | |
30 | #ifdef CONFIG_TCG | 28 | /* data: {2{8'0, imm[7:0], 16'0}} */ |
31 | float_status fp_status; | ||
32 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | ||
33 | index XXXXXXX..XXXXXXX 100644 | ||
34 | --- a/target/loongarch/kvm/kvm.c | ||
35 | +++ b/target/loongarch/kvm/kvm.c | ||
36 | @@ -XXX,XX +XXX,XX @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = { | ||
37 | KVM_CAP_LAST_INFO | ||
38 | }; | ||
39 | |||
40 | +static int kvm_get_stealtime(CPUState *cs) | ||
41 | +{ | ||
42 | + CPULoongArchState *env = cpu_env(cs); | ||
43 | + int err; | ||
44 | + struct kvm_device_attr attr = { | ||
45 | + .group = KVM_LOONGARCH_VCPU_PVTIME_CTRL, | ||
46 | + .attr = KVM_LOONGARCH_VCPU_PVTIME_GPA, | ||
47 | + .addr = (uint64_t)&env->stealtime.guest_addr, | ||
48 | + }; | ||
49 | + | ||
50 | + err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr); | ||
51 | + if (err) { | ||
52 | + return 0; | ||
53 | + } | ||
54 | + | ||
55 | + err = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, attr); | ||
56 | + if (err) { | ||
57 | + error_report("PVTIME: KVM_GET_DEVICE_ATTR: %s", strerror(errno)); | ||
58 | + return err; | ||
59 | + } | ||
60 | + | ||
61 | + return 0; | ||
62 | +} | ||
63 | + | ||
64 | +static int kvm_set_stealtime(CPUState *cs) | ||
65 | +{ | ||
66 | + CPULoongArchState *env = cpu_env(cs); | ||
67 | + int err; | ||
68 | + struct kvm_device_attr attr = { | ||
69 | + .group = KVM_LOONGARCH_VCPU_PVTIME_CTRL, | ||
70 | + .attr = KVM_LOONGARCH_VCPU_PVTIME_GPA, | ||
71 | + .addr = (uint64_t)&env->stealtime.guest_addr, | ||
72 | + }; | ||
73 | + | ||
74 | + err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr); | ||
75 | + if (err) { | ||
76 | + return 0; | ||
77 | + } | ||
78 | + | ||
79 | + err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, attr); | ||
80 | + if (err) { | ||
81 | + error_report("PVTIME: KVM_SET_DEVICE_ATTR %s with gpa "TARGET_FMT_lx, | ||
82 | + strerror(errno), env->stealtime.guest_addr); | ||
83 | + return err; | ||
84 | + } | ||
85 | + | ||
86 | + return 0; | ||
87 | +} | ||
88 | + | ||
89 | static int kvm_loongarch_get_regs_core(CPUState *cs) | ||
90 | { | ||
91 | int ret = 0; | ||
92 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_get_registers(CPUState *cs, Error **errp) | ||
93 | return ret; | ||
94 | } | ||
95 | |||
96 | + ret = kvm_get_stealtime(cs); | ||
97 | + if (ret) { | ||
98 | + return ret; | ||
99 | + } | ||
100 | + | ||
101 | ret = kvm_loongarch_get_mpstate(cs); | ||
102 | return ret; | ||
103 | } | ||
104 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level, Error **errp) | ||
105 | return ret; | ||
106 | } | ||
107 | |||
108 | + if (level >= KVM_PUT_FULL_STATE) { | ||
109 | + /* | ||
110 | + * only KVM_PUT_FULL_STATE is required, kvm kernel will clear | ||
111 | + * guest_addr for KVM_PUT_RESET_STATE | ||
112 | + */ | ||
113 | + ret = kvm_set_stealtime(cs); | ||
114 | + if (ret) { | ||
115 | + return ret; | ||
116 | + } | ||
117 | + } | ||
118 | + | ||
119 | ret = kvm_loongarch_put_mpstate(cs); | ||
120 | return ret; | ||
121 | } | ||
122 | diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c | ||
123 | index XXXXXXX..XXXXXXX 100644 | ||
124 | --- a/target/loongarch/machine.c | ||
125 | +++ b/target/loongarch/machine.c | ||
126 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_tlb = { | ||
127 | /* LoongArch CPU state */ | ||
128 | const VMStateDescription vmstate_loongarch_cpu = { | ||
129 | .name = "cpu", | ||
130 | - .version_id = 2, | ||
131 | - .minimum_version_id = 2, | ||
132 | + .version_id = 3, | ||
133 | + .minimum_version_id = 3, | ||
134 | .fields = (const VMStateField[]) { | ||
135 | VMSTATE_UINTTL_ARRAY(env.gpr, LoongArchCPU, 32), | ||
136 | VMSTATE_UINTTL(env.pc, LoongArchCPU), | ||
137 | @@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_loongarch_cpu = { | ||
138 | VMSTATE_UINT64(env.CSR_DSAVE, LoongArchCPU), | ||
139 | |||
140 | VMSTATE_UINT64(kvm_state_counter, LoongArchCPU), | ||
141 | + /* PV steal time */ | ||
142 | + VMSTATE_UINT64(env.stealtime.guest_addr, LoongArchCPU), | ||
143 | |||
144 | VMSTATE_END_OF_LIST() | ||
145 | }, | ||
146 | -- | 29 | -- |
147 | 2.34.1 | 30 | 2.43.5 | diff view generated by jsdifflib |
1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | Hardcoded 32 bytes is used for vbsrl emulation check, there is |
---|---|---|---|
2 | problem when options lsx=on,lasx=off is used for vbsrl.v instruction | ||
3 | in TCG mode. It injects LASX exception rather LSX exception. | ||
2 | 4 | ||
3 | This update contains the required header changes for LoongArch | 5 | Here actual operand size is used. |
4 | KVM LBT feature. | ||
5 | 6 | ||
7 | Cc: qemu-stable@nongnu.org | ||
8 | Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve") | ||
6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 9 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
7 | Acked-by: Song Gao <gaosong@loongson.cn> | 10 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
8 | Message-Id: <20241017020708.1728620-3-maobibo@loongson.cn> | 11 | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> |
9 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
10 | --- | 12 | --- |
11 | include/standard-headers/drm/drm_fourcc.h | 43 +++ | 13 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +- |
12 | include/standard-headers/linux/const.h | 17 + | 14 | 1 file changed, 1 insertion(+), 1 deletion(-) |
13 | include/standard-headers/linux/ethtool.h | 226 +++++++++++++ | ||
14 | include/standard-headers/linux/fuse.h | 22 +- | ||
15 | .../linux/input-event-codes.h | 2 + | ||
16 | include/standard-headers/linux/pci_regs.h | 41 ++- | ||
17 | .../standard-headers/linux/virtio_balloon.h | 16 +- | ||
18 | include/standard-headers/linux/virtio_gpu.h | 1 + | ||
19 | linux-headers/asm-arm64/mman.h | 9 + | ||
20 | linux-headers/asm-arm64/unistd.h | 25 +- | ||
21 | linux-headers/asm-generic/unistd.h | 6 +- | ||
22 | linux-headers/asm-loongarch/kvm.h | 24 ++ | ||
23 | linux-headers/asm-loongarch/kvm_para.h | 21 ++ | ||
24 | linux-headers/asm-loongarch/unistd.h | 4 +- | ||
25 | linux-headers/asm-loongarch/unistd_64.h | 320 ++++++++++++++++++ | ||
26 | linux-headers/asm-riscv/kvm.h | 7 + | ||
27 | linux-headers/asm-riscv/unistd.h | 41 +-- | ||
28 | linux-headers/asm-x86/kvm.h | 2 + | ||
29 | linux-headers/asm-x86/unistd_64.h | 1 + | ||
30 | linux-headers/asm-x86/unistd_x32.h | 1 + | ||
31 | linux-headers/linux/bits.h | 3 + | ||
32 | linux-headers/linux/const.h | 17 + | ||
33 | linux-headers/linux/iommufd.h | 143 ++++++-- | ||
34 | linux-headers/linux/kvm.h | 23 +- | ||
35 | linux-headers/linux/mman.h | 1 + | ||
36 | linux-headers/linux/psp-sev.h | 28 ++ | ||
37 | 26 files changed, 951 insertions(+), 93 deletions(-) | ||
38 | create mode 100644 linux-headers/asm-loongarch/kvm_para.h | ||
39 | create mode 100644 linux-headers/asm-loongarch/unistd_64.h | ||
40 | 15 | ||
41 | diff --git a/include/standard-headers/drm/drm_fourcc.h b/include/standard-headers/drm/drm_fourcc.h | 16 | diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
42 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
43 | --- a/include/standard-headers/drm/drm_fourcc.h | 18 | --- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
44 | +++ b/include/standard-headers/drm/drm_fourcc.h | 19 | +++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
45 | @@ -XXX,XX +XXX,XX @@ extern "C" { | 20 | @@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz) |
46 | */ | 21 | { |
47 | #define I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC fourcc_mod_code(INTEL, 15) | 22 | int i, ofs; |
48 | 23 | ||
49 | +/* | 24 | - if (!check_vec(ctx, 32)) { |
50 | + * Intel Color Control Surfaces (CCS) for graphics ver. 20 unified compression | 25 | + if (!check_vec(ctx, oprsz)) { |
51 | + * on integrated graphics | 26 | return true; |
52 | + * | 27 | } |
53 | + * The main surface is Tile 4 and at plane index 0. For semi-planar formats | 28 | |
54 | + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices | ||
55 | + * 0 and 1, respectively. The CCS for all planes are stored outside of the | ||
56 | + * GEM object in a reserved memory area dedicated for the storage of the | ||
57 | + * CCS data for all compressible GEM objects. | ||
58 | + */ | ||
59 | +#define I915_FORMAT_MOD_4_TILED_LNL_CCS fourcc_mod_code(INTEL, 16) | ||
60 | + | ||
61 | +/* | ||
62 | + * Intel Color Control Surfaces (CCS) for graphics ver. 20 unified compression | ||
63 | + * on discrete graphics | ||
64 | + * | ||
65 | + * The main surface is Tile 4 and at plane index 0. For semi-planar formats | ||
66 | + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices | ||
67 | + * 0 and 1, respectively. The CCS for all planes are stored outside of the | ||
68 | + * GEM object in a reserved memory area dedicated for the storage of the | ||
69 | + * CCS data for all compressible GEM objects. The GEM object must be stored in | ||
70 | + * contiguous memory with a size aligned to 64KB | ||
71 | + */ | ||
72 | +#define I915_FORMAT_MOD_4_TILED_BMG_CCS fourcc_mod_code(INTEL, 17) | ||
73 | + | ||
74 | /* | ||
75 | * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks | ||
76 | * | ||
77 | @@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier) | ||
78 | #define AMD_FMT_MOD_TILE_VER_GFX10 2 | ||
79 | #define AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS 3 | ||
80 | #define AMD_FMT_MOD_TILE_VER_GFX11 4 | ||
81 | +#define AMD_FMT_MOD_TILE_VER_GFX12 5 | ||
82 | |||
83 | /* | ||
84 | * 64K_S is the same for GFX9/GFX10/GFX10_RBPLUS and hence has GFX9 as canonical | ||
85 | @@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier) | ||
86 | /* | ||
87 | * 64K_D for non-32 bpp is the same for GFX9/GFX10/GFX10_RBPLUS and hence has | ||
88 | * GFX9 as canonical version. | ||
89 | + * | ||
90 | + * 64K_D_2D on GFX12 is identical to 64K_D on GFX11. | ||
91 | */ | ||
92 | #define AMD_FMT_MOD_TILE_GFX9_64K_D 10 | ||
93 | #define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25 | ||
94 | @@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier) | ||
95 | #define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27 | ||
96 | #define AMD_FMT_MOD_TILE_GFX11_256K_R_X 31 | ||
97 | |||
98 | +/* Gfx12 swizzle modes: | ||
99 | + * 0 - LINEAR | ||
100 | + * 1 - 256B_2D - 2D block dimensions | ||
101 | + * 2 - 4KB_2D | ||
102 | + * 3 - 64KB_2D | ||
103 | + * 4 - 256KB_2D | ||
104 | + * 5 - 4KB_3D - 3D block dimensions | ||
105 | + * 6 - 64KB_3D | ||
106 | + * 7 - 256KB_3D | ||
107 | + */ | ||
108 | +#define AMD_FMT_MOD_TILE_GFX12_256B_2D 1 | ||
109 | +#define AMD_FMT_MOD_TILE_GFX12_4K_2D 2 | ||
110 | +#define AMD_FMT_MOD_TILE_GFX12_64K_2D 3 | ||
111 | +#define AMD_FMT_MOD_TILE_GFX12_256K_2D 4 | ||
112 | + | ||
113 | #define AMD_FMT_MOD_DCC_BLOCK_64B 0 | ||
114 | #define AMD_FMT_MOD_DCC_BLOCK_128B 1 | ||
115 | #define AMD_FMT_MOD_DCC_BLOCK_256B 2 | ||
116 | diff --git a/include/standard-headers/linux/const.h b/include/standard-headers/linux/const.h | ||
117 | index XXXXXXX..XXXXXXX 100644 | ||
118 | --- a/include/standard-headers/linux/const.h | ||
119 | +++ b/include/standard-headers/linux/const.h | ||
120 | @@ -XXX,XX +XXX,XX @@ | ||
121 | #define _BITUL(x) (_UL(1) << (x)) | ||
122 | #define _BITULL(x) (_ULL(1) << (x)) | ||
123 | |||
124 | +#if !defined(__ASSEMBLY__) | ||
125 | +/* | ||
126 | + * Missing __asm__ support | ||
127 | + * | ||
128 | + * __BIT128() would not work in the __asm__ code, as it shifts an | ||
129 | + * 'unsigned __init128' data type as direct representation of | ||
130 | + * 128 bit constants is not supported in the gcc compiler, as | ||
131 | + * they get silently truncated. | ||
132 | + * | ||
133 | + * TODO: Please revisit this implementation when gcc compiler | ||
134 | + * starts representing 128 bit constants directly like long | ||
135 | + * and unsigned long etc. Subsequently drop the comment for | ||
136 | + * GENMASK_U128() which would then start supporting __asm__ code. | ||
137 | + */ | ||
138 | +#define _BIT128(x) ((unsigned __int128)(1) << (x)) | ||
139 | +#endif | ||
140 | + | ||
141 | #define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - 1) | ||
142 | #define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask)) | ||
143 | |||
144 | diff --git a/include/standard-headers/linux/ethtool.h b/include/standard-headers/linux/ethtool.h | ||
145 | index XXXXXXX..XXXXXXX 100644 | ||
146 | --- a/include/standard-headers/linux/ethtool.h | ||
147 | +++ b/include/standard-headers/linux/ethtool.h | ||
148 | @@ -XXX,XX +XXX,XX @@ enum ethtool_module_power_mode { | ||
149 | ETHTOOL_MODULE_POWER_MODE_HIGH, | ||
150 | }; | ||
151 | |||
152 | +/** | ||
153 | + * enum ethtool_c33_pse_ext_state - groups of PSE extended states | ||
154 | + * functions. IEEE 802.3-2022 33.2.4.4 Variables | ||
155 | + * | ||
156 | + * @ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION: Group of error_condition states | ||
157 | + * @ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID: Group of mr_mps_valid states | ||
158 | + * @ETHTOOL_C33_PSE_EXT_STATE_MR_PSE_ENABLE: Group of mr_pse_enable states | ||
159 | + * @ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED: Group of option_detect_ted | ||
160 | + * states | ||
161 | + * @ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM: Group of option_vport_lim states | ||
162 | + * @ETHTOOL_C33_PSE_EXT_STATE_OVLD_DETECTED: Group of ovld_detected states | ||
163 | + * @ETHTOOL_C33_PSE_EXT_STATE_PD_DLL_POWER_TYPE: Group of pd_dll_power_type | ||
164 | + * states | ||
165 | + * @ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE: Group of power_not_available | ||
166 | + * states | ||
167 | + * @ETHTOOL_C33_PSE_EXT_STATE_SHORT_DETECTED: Group of short_detected states | ||
168 | + */ | ||
169 | +enum ethtool_c33_pse_ext_state { | ||
170 | + ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION = 1, | ||
171 | + ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID, | ||
172 | + ETHTOOL_C33_PSE_EXT_STATE_MR_PSE_ENABLE, | ||
173 | + ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED, | ||
174 | + ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM, | ||
175 | + ETHTOOL_C33_PSE_EXT_STATE_OVLD_DETECTED, | ||
176 | + ETHTOOL_C33_PSE_EXT_STATE_PD_DLL_POWER_TYPE, | ||
177 | + ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE, | ||
178 | + ETHTOOL_C33_PSE_EXT_STATE_SHORT_DETECTED, | ||
179 | +}; | ||
180 | + | ||
181 | +/** | ||
182 | + * enum ethtool_c33_pse_ext_substate_mr_mps_valid - mr_mps_valid states | ||
183 | + * functions. IEEE 802.3-2022 33.2.4.4 Variables | ||
184 | + * | ||
185 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_DETECTED_UNDERLOAD: Underload | ||
186 | + * state | ||
187 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_CONNECTION_OPEN: Port is not | ||
188 | + * connected | ||
189 | + * | ||
190 | + * The PSE monitors either the DC or AC Maintain Power Signature | ||
191 | + * (MPS, see 33.2.9.1). This variable indicates the presence or absence of | ||
192 | + * a valid MPS. | ||
193 | + */ | ||
194 | +enum ethtool_c33_pse_ext_substate_mr_mps_valid { | ||
195 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_DETECTED_UNDERLOAD = 1, | ||
196 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_CONNECTION_OPEN, | ||
197 | +}; | ||
198 | + | ||
199 | +/** | ||
200 | + * enum ethtool_c33_pse_ext_substate_error_condition - error_condition states | ||
201 | + * functions. IEEE 802.3-2022 33.2.4.4 Variables | ||
202 | + * | ||
203 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_NON_EXISTING_PORT: Non-existing | ||
204 | + * port number | ||
205 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNDEFINED_PORT: Undefined port | ||
206 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT: Internal | ||
207 | + * hardware fault | ||
208 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_COMM_ERROR_AFTER_FORCE_ON: | ||
209 | + * Communication error after force on | ||
210 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS: Unknown | ||
211 | + * port status | ||
212 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_TURN_OFF: Host | ||
213 | + * crash turn off | ||
214 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_FORCE_SHUTDOWN: | ||
215 | + * Host crash force shutdown | ||
216 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_CONFIG_CHANGE: Configuration | ||
217 | + * change | ||
218 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP: Over | ||
219 | + * temperature detected | ||
220 | + * | ||
221 | + * error_condition is a variable indicating the status of | ||
222 | + * implementation-specific fault conditions or optionally other system faults | ||
223 | + * that prevent the PSE from meeting the specifications in Table 33–11 and that | ||
224 | + * require the PSE not to source power. These error conditions are different | ||
225 | + * from those monitored by the state diagrams in Figure 33–10. | ||
226 | + */ | ||
227 | +enum ethtool_c33_pse_ext_substate_error_condition { | ||
228 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_NON_EXISTING_PORT = 1, | ||
229 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNDEFINED_PORT, | ||
230 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT, | ||
231 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_COMM_ERROR_AFTER_FORCE_ON, | ||
232 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS, | ||
233 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_TURN_OFF, | ||
234 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_FORCE_SHUTDOWN, | ||
235 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_CONFIG_CHANGE, | ||
236 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP, | ||
237 | +}; | ||
238 | + | ||
239 | +/** | ||
240 | + * enum ethtool_c33_pse_ext_substate_mr_pse_enable - mr_pse_enable states | ||
241 | + * functions. IEEE 802.3-2022 33.2.4.4 Variables | ||
242 | + * | ||
243 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_PSE_ENABLE_DISABLE_PIN_ACTIVE: Disable | ||
244 | + * pin active | ||
245 | + * | ||
246 | + * mr_pse_enable is control variable that selects PSE operation and test | ||
247 | + * functions. | ||
248 | + */ | ||
249 | +enum ethtool_c33_pse_ext_substate_mr_pse_enable { | ||
250 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_PSE_ENABLE_DISABLE_PIN_ACTIVE = 1, | ||
251 | +}; | ||
252 | + | ||
253 | +/** | ||
254 | + * enum ethtool_c33_pse_ext_substate_option_detect_ted - option_detect_ted | ||
255 | + * states functions. IEEE 802.3-2022 33.2.4.4 Variables | ||
256 | + * | ||
257 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_DET_IN_PROCESS: Detection | ||
258 | + * in process | ||
259 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_CONNECTION_CHECK_ERROR: | ||
260 | + * Connection check error | ||
261 | + * | ||
262 | + * option_detect_ted is a variable indicating if detection can be performed | ||
263 | + * by the PSE during the ted_timer interval. | ||
264 | + */ | ||
265 | +enum ethtool_c33_pse_ext_substate_option_detect_ted { | ||
266 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_DET_IN_PROCESS = 1, | ||
267 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_CONNECTION_CHECK_ERROR, | ||
268 | +}; | ||
269 | + | ||
270 | +/** | ||
271 | + * enum ethtool_c33_pse_ext_substate_option_vport_lim - option_vport_lim states | ||
272 | + * functions. IEEE 802.3-2022 33.2.4.4 Variables | ||
273 | + * | ||
274 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_HIGH_VOLTAGE: Main supply | ||
275 | + * voltage is high | ||
276 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_LOW_VOLTAGE: Main supply | ||
277 | + * voltage is low | ||
278 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_VOLTAGE_INJECTION: Voltage | ||
279 | + * injection into the port | ||
280 | + * | ||
281 | + * option_vport_lim is an optional variable indicates if VPSE is out of the | ||
282 | + * operating range during normal operating state. | ||
283 | + */ | ||
284 | +enum ethtool_c33_pse_ext_substate_option_vport_lim { | ||
285 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_HIGH_VOLTAGE = 1, | ||
286 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_LOW_VOLTAGE, | ||
287 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_VOLTAGE_INJECTION, | ||
288 | +}; | ||
289 | + | ||
290 | +/** | ||
291 | + * enum ethtool_c33_pse_ext_substate_ovld_detected - ovld_detected states | ||
292 | + * functions. IEEE 802.3-2022 33.2.4.4 Variables | ||
293 | + * | ||
294 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OVLD_DETECTED_OVERLOAD: Overload state | ||
295 | + * | ||
296 | + * ovld_detected is a variable indicating if the PSE output current has been | ||
297 | + * in an overload condition (see 33.2.7.6) for at least TCUT of a one-second | ||
298 | + * sliding time. | ||
299 | + */ | ||
300 | +enum ethtool_c33_pse_ext_substate_ovld_detected { | ||
301 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_OVLD_DETECTED_OVERLOAD = 1, | ||
302 | +}; | ||
303 | + | ||
304 | +/** | ||
305 | + * enum ethtool_c33_pse_ext_substate_power_not_available - power_not_available | ||
306 | + * states functions. IEEE 802.3-2022 33.2.4.4 Variables | ||
307 | + * | ||
308 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_BUDGET_EXCEEDED: Power | ||
309 | + * budget exceeded for the controller | ||
310 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PORT_PW_LIMIT_EXCEEDS_CONTROLLER_BUDGET: | ||
311 | + * Configured port power limit exceeded controller power budget | ||
312 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PD_REQUEST_EXCEEDS_PORT_LIMIT: | ||
313 | + * Power request from PD exceeds port limit | ||
314 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_HW_PW_LIMIT: Power | ||
315 | + * denied due to Hardware power limit | ||
316 | + * | ||
317 | + * power_not_available is a variable that is asserted in an | ||
318 | + * implementation-dependent manner when the PSE is no longer capable of | ||
319 | + * sourcing sufficient power to support the attached PD. Sufficient power | ||
320 | + * is defined by classification; see 33.2.6. | ||
321 | + */ | ||
322 | +enum ethtool_c33_pse_ext_substate_power_not_available { | ||
323 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_BUDGET_EXCEEDED = 1, | ||
324 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PORT_PW_LIMIT_EXCEEDS_CONTROLLER_BUDGET, | ||
325 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PD_REQUEST_EXCEEDS_PORT_LIMIT, | ||
326 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_HW_PW_LIMIT, | ||
327 | +}; | ||
328 | + | ||
329 | +/** | ||
330 | + * enum ethtool_c33_pse_ext_substate_short_detected - short_detected states | ||
331 | + * functions. IEEE 802.3-2022 33.2.4.4 Variables | ||
332 | + * | ||
333 | + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_SHORT_DETECTED_SHORT_CONDITION: Short | ||
334 | + * condition was detected | ||
335 | + * | ||
336 | + * short_detected is a variable indicating if the PSE output current has been | ||
337 | + * in a short circuit condition for TLIM within a sliding window (see 33.2.7.7). | ||
338 | + */ | ||
339 | +enum ethtool_c33_pse_ext_substate_short_detected { | ||
340 | + ETHTOOL_C33_PSE_EXT_SUBSTATE_SHORT_DETECTED_SHORT_CONDITION = 1, | ||
341 | +}; | ||
342 | + | ||
343 | /** | ||
344 | * enum ethtool_pse_types - Types of PSE controller. | ||
345 | * @ETHTOOL_PSE_UNKNOWN: Type of PSE controller is unknown | ||
346 | @@ -XXX,XX +XXX,XX @@ enum ethtool_mm_verify_status { | ||
347 | ETHTOOL_MM_VERIFY_STATUS_DISABLED, | ||
348 | }; | ||
349 | |||
350 | +/** | ||
351 | + * enum ethtool_module_fw_flash_status - plug-in module firmware flashing status | ||
352 | + * @ETHTOOL_MODULE_FW_FLASH_STATUS_STARTED: The firmware flashing process has | ||
353 | + * started. | ||
354 | + * @ETHTOOL_MODULE_FW_FLASH_STATUS_IN_PROGRESS: The firmware flashing process | ||
355 | + * is in progress. | ||
356 | + * @ETHTOOL_MODULE_FW_FLASH_STATUS_COMPLETED: The firmware flashing process was | ||
357 | + * completed successfully. | ||
358 | + * @ETHTOOL_MODULE_FW_FLASH_STATUS_ERROR: The firmware flashing process was | ||
359 | + * stopped due to an error. | ||
360 | + */ | ||
361 | +enum ethtool_module_fw_flash_status { | ||
362 | + ETHTOOL_MODULE_FW_FLASH_STATUS_STARTED = 1, | ||
363 | + ETHTOOL_MODULE_FW_FLASH_STATUS_IN_PROGRESS, | ||
364 | + ETHTOOL_MODULE_FW_FLASH_STATUS_COMPLETED, | ||
365 | + ETHTOOL_MODULE_FW_FLASH_STATUS_ERROR, | ||
366 | +}; | ||
367 | + | ||
368 | /** | ||
369 | * struct ethtool_gstrings - string set for data tagging | ||
370 | * @cmd: Command number = %ETHTOOL_GSTRINGS | ||
371 | @@ -XXX,XX +XXX,XX @@ enum ethtool_link_mode_bit_indices { | ||
372 | ETHTOOL_LINK_MODE_10baseT1S_Full_BIT = 99, | ||
373 | ETHTOOL_LINK_MODE_10baseT1S_Half_BIT = 100, | ||
374 | ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT = 101, | ||
375 | + ETHTOOL_LINK_MODE_10baseT1BRR_Full_BIT = 102, | ||
376 | |||
377 | /* must be last entry */ | ||
378 | __ETHTOOL_LINK_MODE_MASK_NBITS | ||
379 | @@ -XXX,XX +XXX,XX @@ struct ethtool_link_settings { | ||
380 | * uint32_t map_lp_advertising[link_mode_masks_nwords]; | ||
381 | */ | ||
382 | }; | ||
383 | + | ||
384 | +/** | ||
385 | + * enum phy_upstream - Represents the upstream component a given PHY device | ||
386 | + * is connected to, as in what is on the other end of the MII bus. Most PHYs | ||
387 | + * will be attached to an Ethernet MAC controller, but in some cases, there's | ||
388 | + * an intermediate PHY used as a media-converter, which will driver another | ||
389 | + * MII interface as its output. | ||
390 | + * @PHY_UPSTREAM_MAC: Upstream component is a MAC (a switch port, | ||
391 | + * or ethernet controller) | ||
392 | + * @PHY_UPSTREAM_PHY: Upstream component is a PHY (likely a media converter) | ||
393 | + */ | ||
394 | +enum phy_upstream { | ||
395 | + PHY_UPSTREAM_MAC, | ||
396 | + PHY_UPSTREAM_PHY, | ||
397 | +}; | ||
398 | + | ||
399 | #endif /* _LINUX_ETHTOOL_H */ | ||
400 | diff --git a/include/standard-headers/linux/fuse.h b/include/standard-headers/linux/fuse.h | ||
401 | index XXXXXXX..XXXXXXX 100644 | ||
402 | --- a/include/standard-headers/linux/fuse.h | ||
403 | +++ b/include/standard-headers/linux/fuse.h | ||
404 | @@ -XXX,XX +XXX,XX @@ | ||
405 | * - add backing_id to fuse_open_out, add FOPEN_PASSTHROUGH open flag | ||
406 | * - add FUSE_NO_EXPORT_SUPPORT init flag | ||
407 | * - add FUSE_NOTIFY_RESEND, add FUSE_HAS_RESEND init flag | ||
408 | + * | ||
409 | + * 7.41 | ||
410 | + * - add FUSE_ALLOW_IDMAP | ||
411 | */ | ||
412 | |||
413 | #ifndef _LINUX_FUSE_H | ||
414 | @@ -XXX,XX +XXX,XX @@ | ||
415 | #define FUSE_KERNEL_VERSION 7 | ||
416 | |||
417 | /** Minor version number of this interface */ | ||
418 | -#define FUSE_KERNEL_MINOR_VERSION 40 | ||
419 | +#define FUSE_KERNEL_MINOR_VERSION 41 | ||
420 | |||
421 | /** The node ID of the root inode */ | ||
422 | #define FUSE_ROOT_ID 1 | ||
423 | @@ -XXX,XX +XXX,XX @@ struct fuse_file_lock { | ||
424 | * FUSE_NO_EXPORT_SUPPORT: explicitly disable export support | ||
425 | * FUSE_HAS_RESEND: kernel supports resending pending requests, and the high bit | ||
426 | * of the request ID indicates resend requests | ||
427 | + * FUSE_ALLOW_IDMAP: allow creation of idmapped mounts | ||
428 | */ | ||
429 | #define FUSE_ASYNC_READ (1 << 0) | ||
430 | #define FUSE_POSIX_LOCKS (1 << 1) | ||
431 | @@ -XXX,XX +XXX,XX @@ struct fuse_file_lock { | ||
432 | |||
433 | /* Obsolete alias for FUSE_DIRECT_IO_ALLOW_MMAP */ | ||
434 | #define FUSE_DIRECT_IO_RELAX FUSE_DIRECT_IO_ALLOW_MMAP | ||
435 | +#define FUSE_ALLOW_IDMAP (1ULL << 40) | ||
436 | |||
437 | /** | ||
438 | * CUSE INIT request/reply flags | ||
439 | @@ -XXX,XX +XXX,XX @@ struct fuse_fallocate_in { | ||
440 | */ | ||
441 | #define FUSE_UNIQUE_RESEND (1ULL << 63) | ||
442 | |||
443 | +/** | ||
444 | + * This value will be set by the kernel to | ||
445 | + * (struct fuse_in_header).{uid,gid} fields in | ||
446 | + * case when: | ||
447 | + * - fuse daemon enabled FUSE_ALLOW_IDMAP | ||
448 | + * - idmapping information is not available and uid/gid | ||
449 | + * can not be mapped in accordance with an idmapping. | ||
450 | + * | ||
451 | + * Note: an idmapping information always available | ||
452 | + * for inode creation operations like: | ||
453 | + * FUSE_MKNOD, FUSE_SYMLINK, FUSE_MKDIR, FUSE_TMPFILE, | ||
454 | + * FUSE_CREATE and FUSE_RENAME2 (with RENAME_WHITEOUT). | ||
455 | + */ | ||
456 | +#define FUSE_INVALID_UIDGID ((uint32_t)(-1)) | ||
457 | + | ||
458 | struct fuse_in_header { | ||
459 | uint32_t len; | ||
460 | uint32_t opcode; | ||
461 | diff --git a/include/standard-headers/linux/input-event-codes.h b/include/standard-headers/linux/input-event-codes.h | ||
462 | index XXXXXXX..XXXXXXX 100644 | ||
463 | --- a/include/standard-headers/linux/input-event-codes.h | ||
464 | +++ b/include/standard-headers/linux/input-event-codes.h | ||
465 | @@ -XXX,XX +XXX,XX @@ | ||
466 | #define KEY_CAMERA_ACCESS_ENABLE 0x24b /* Enables programmatic access to camera devices. (HUTRR72) */ | ||
467 | #define KEY_CAMERA_ACCESS_DISABLE 0x24c /* Disables programmatic access to camera devices. (HUTRR72) */ | ||
468 | #define KEY_CAMERA_ACCESS_TOGGLE 0x24d /* Toggles the current state of the camera access control. (HUTRR72) */ | ||
469 | +#define KEY_ACCESSIBILITY 0x24e /* Toggles the system bound accessibility UI/command (HUTRR116) */ | ||
470 | +#define KEY_DO_NOT_DISTURB 0x24f /* Toggles the system-wide "Do Not Disturb" control (HUTRR94)*/ | ||
471 | |||
472 | #define KEY_BRIGHTNESS_MIN 0x250 /* Set Brightness to Minimum */ | ||
473 | #define KEY_BRIGHTNESS_MAX 0x251 /* Set Brightness to Maximum */ | ||
474 | diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h | ||
475 | index XXXXXXX..XXXXXXX 100644 | ||
476 | --- a/include/standard-headers/linux/pci_regs.h | ||
477 | +++ b/include/standard-headers/linux/pci_regs.h | ||
478 | @@ -XXX,XX +XXX,XX @@ | ||
479 | #define PCI_EXP_RTCTL_SENFEE 0x0002 /* System Error on Non-Fatal Error */ | ||
480 | #define PCI_EXP_RTCTL_SEFEE 0x0004 /* System Error on Fatal Error */ | ||
481 | #define PCI_EXP_RTCTL_PMEIE 0x0008 /* PME Interrupt Enable */ | ||
482 | -#define PCI_EXP_RTCTL_CRSSVE 0x0010 /* CRS Software Visibility Enable */ | ||
483 | +#define PCI_EXP_RTCTL_RRS_SVE 0x0010 /* Config RRS Software Visibility Enable */ | ||
484 | +#define PCI_EXP_RTCTL_CRSSVE PCI_EXP_RTCTL_RRS_SVE /* compatibility */ | ||
485 | #define PCI_EXP_RTCAP 0x1e /* Root Capabilities */ | ||
486 | -#define PCI_EXP_RTCAP_CRSVIS 0x0001 /* CRS Software Visibility capability */ | ||
487 | +#define PCI_EXP_RTCAP_RRS_SV 0x0001 /* Config RRS Software Visibility */ | ||
488 | +#define PCI_EXP_RTCAP_CRSVIS PCI_EXP_RTCAP_RRS_SV /* compatibility */ | ||
489 | #define PCI_EXP_RTSTA 0x20 /* Root Status */ | ||
490 | #define PCI_EXP_RTSTA_PME_RQ_ID 0x0000ffff /* PME Requester ID */ | ||
491 | #define PCI_EXP_RTSTA_PME 0x00010000 /* PME status */ | ||
492 | @@ -XXX,XX +XXX,XX @@ | ||
493 | #define PCI_EXT_CAP_ID_DVSEC 0x23 /* Designated Vendor-Specific */ | ||
494 | #define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */ | ||
495 | #define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */ | ||
496 | +#define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */ | ||
497 | #define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */ | ||
498 | #define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */ | ||
499 | #define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE | ||
500 | @@ -XXX,XX +XXX,XX @@ | ||
501 | #define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK 0x000000F0 | ||
502 | #define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT 4 | ||
503 | |||
504 | +/* Native PCIe Enclosure Management */ | ||
505 | +#define PCI_NPEM_CAP 0x04 /* NPEM capability register */ | ||
506 | +#define PCI_NPEM_CAP_CAPABLE 0x00000001 /* NPEM Capable */ | ||
507 | + | ||
508 | +#define PCI_NPEM_CTRL 0x08 /* NPEM control register */ | ||
509 | +#define PCI_NPEM_CTRL_ENABLE 0x00000001 /* NPEM Enable */ | ||
510 | + | ||
511 | +/* | ||
512 | + * Native PCIe Enclosure Management indication bits and Reset command bit | ||
513 | + * are corresponding for capability and control registers. | ||
514 | + */ | ||
515 | +#define PCI_NPEM_CMD_RESET 0x00000002 /* Reset Command */ | ||
516 | +#define PCI_NPEM_IND_OK 0x00000004 /* OK */ | ||
517 | +#define PCI_NPEM_IND_LOCATE 0x00000008 /* Locate */ | ||
518 | +#define PCI_NPEM_IND_FAIL 0x00000010 /* Fail */ | ||
519 | +#define PCI_NPEM_IND_REBUILD 0x00000020 /* Rebuild */ | ||
520 | +#define PCI_NPEM_IND_PFA 0x00000040 /* Predicted Failure Analysis */ | ||
521 | +#define PCI_NPEM_IND_HOTSPARE 0x00000080 /* Hot Spare */ | ||
522 | +#define PCI_NPEM_IND_ICA 0x00000100 /* In Critical Array */ | ||
523 | +#define PCI_NPEM_IND_IFA 0x00000200 /* In Failed Array */ | ||
524 | +#define PCI_NPEM_IND_IDT 0x00000400 /* Device Type */ | ||
525 | +#define PCI_NPEM_IND_DISABLED 0x00000800 /* Disabled */ | ||
526 | +#define PCI_NPEM_IND_SPEC_0 0x01000000 | ||
527 | +#define PCI_NPEM_IND_SPEC_1 0x02000000 | ||
528 | +#define PCI_NPEM_IND_SPEC_2 0x04000000 | ||
529 | +#define PCI_NPEM_IND_SPEC_3 0x08000000 | ||
530 | +#define PCI_NPEM_IND_SPEC_4 0x10000000 | ||
531 | +#define PCI_NPEM_IND_SPEC_5 0x20000000 | ||
532 | +#define PCI_NPEM_IND_SPEC_6 0x40000000 | ||
533 | +#define PCI_NPEM_IND_SPEC_7 0x80000000 | ||
534 | + | ||
535 | +#define PCI_NPEM_STATUS 0x0c /* NPEM status register */ | ||
536 | +#define PCI_NPEM_STATUS_CC 0x00000001 /* Command Completed */ | ||
537 | + | ||
538 | /* Data Object Exchange */ | ||
539 | #define PCI_DOE_CAP 0x04 /* DOE Capabilities Register */ | ||
540 | #define PCI_DOE_CAP_INT_SUP 0x00000001 /* Interrupt Support */ | ||
541 | diff --git a/include/standard-headers/linux/virtio_balloon.h b/include/standard-headers/linux/virtio_balloon.h | ||
542 | index XXXXXXX..XXXXXXX 100644 | ||
543 | --- a/include/standard-headers/linux/virtio_balloon.h | ||
544 | +++ b/include/standard-headers/linux/virtio_balloon.h | ||
545 | @@ -XXX,XX +XXX,XX @@ struct virtio_balloon_config { | ||
546 | #define VIRTIO_BALLOON_S_CACHES 7 /* Disk caches */ | ||
547 | #define VIRTIO_BALLOON_S_HTLB_PGALLOC 8 /* Hugetlb page allocations */ | ||
548 | #define VIRTIO_BALLOON_S_HTLB_PGFAIL 9 /* Hugetlb page allocation failures */ | ||
549 | -#define VIRTIO_BALLOON_S_NR 10 | ||
550 | +#define VIRTIO_BALLOON_S_OOM_KILL 10 /* OOM killer invocations */ | ||
551 | +#define VIRTIO_BALLOON_S_ALLOC_STALL 11 /* Stall count of memory allocatoin */ | ||
552 | +#define VIRTIO_BALLOON_S_ASYNC_SCAN 12 /* Amount of memory scanned asynchronously */ | ||
553 | +#define VIRTIO_BALLOON_S_DIRECT_SCAN 13 /* Amount of memory scanned directly */ | ||
554 | +#define VIRTIO_BALLOON_S_ASYNC_RECLAIM 14 /* Amount of memory reclaimed asynchronously */ | ||
555 | +#define VIRTIO_BALLOON_S_DIRECT_RECLAIM 15 /* Amount of memory reclaimed directly */ | ||
556 | +#define VIRTIO_BALLOON_S_NR 16 | ||
557 | |||
558 | #define VIRTIO_BALLOON_S_NAMES_WITH_PREFIX(VIRTIO_BALLOON_S_NAMES_prefix) { \ | ||
559 | VIRTIO_BALLOON_S_NAMES_prefix "swap-in", \ | ||
560 | @@ -XXX,XX +XXX,XX @@ struct virtio_balloon_config { | ||
561 | VIRTIO_BALLOON_S_NAMES_prefix "available-memory", \ | ||
562 | VIRTIO_BALLOON_S_NAMES_prefix "disk-caches", \ | ||
563 | VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-allocations", \ | ||
564 | - VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-failures" \ | ||
565 | + VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-failures", \ | ||
566 | + VIRTIO_BALLOON_S_NAMES_prefix "oom-kills", \ | ||
567 | + VIRTIO_BALLOON_S_NAMES_prefix "alloc-stalls", \ | ||
568 | + VIRTIO_BALLOON_S_NAMES_prefix "async-scans", \ | ||
569 | + VIRTIO_BALLOON_S_NAMES_prefix "direct-scans", \ | ||
570 | + VIRTIO_BALLOON_S_NAMES_prefix "async-reclaims", \ | ||
571 | + VIRTIO_BALLOON_S_NAMES_prefix "direct-reclaims" \ | ||
572 | } | ||
573 | |||
574 | #define VIRTIO_BALLOON_S_NAMES VIRTIO_BALLOON_S_NAMES_WITH_PREFIX("") | ||
575 | diff --git a/include/standard-headers/linux/virtio_gpu.h b/include/standard-headers/linux/virtio_gpu.h | ||
576 | index XXXXXXX..XXXXXXX 100644 | ||
577 | --- a/include/standard-headers/linux/virtio_gpu.h | ||
578 | +++ b/include/standard-headers/linux/virtio_gpu.h | ||
579 | @@ -XXX,XX +XXX,XX @@ struct virtio_gpu_cmd_submit { | ||
580 | #define VIRTIO_GPU_CAPSET_VIRGL2 2 | ||
581 | /* 3 is reserved for gfxstream */ | ||
582 | #define VIRTIO_GPU_CAPSET_VENUS 4 | ||
583 | +#define VIRTIO_GPU_CAPSET_DRM 6 | ||
584 | |||
585 | /* VIRTIO_GPU_CMD_GET_CAPSET_INFO */ | ||
586 | struct virtio_gpu_get_capset_info { | ||
587 | diff --git a/linux-headers/asm-arm64/mman.h b/linux-headers/asm-arm64/mman.h | ||
588 | index XXXXXXX..XXXXXXX 100644 | ||
589 | --- a/linux-headers/asm-arm64/mman.h | ||
590 | +++ b/linux-headers/asm-arm64/mman.h | ||
591 | @@ -XXX,XX +XXX,XX @@ | ||
592 | #define PROT_BTI 0x10 /* BTI guarded page */ | ||
593 | #define PROT_MTE 0x20 /* Normal Tagged mapping */ | ||
594 | |||
595 | +/* Override any generic PKEY permission defines */ | ||
596 | +#define PKEY_DISABLE_EXECUTE 0x4 | ||
597 | +#define PKEY_DISABLE_READ 0x8 | ||
598 | +#undef PKEY_ACCESS_MASK | ||
599 | +#define PKEY_ACCESS_MASK (PKEY_DISABLE_ACCESS |\ | ||
600 | + PKEY_DISABLE_WRITE |\ | ||
601 | + PKEY_DISABLE_READ |\ | ||
602 | + PKEY_DISABLE_EXECUTE) | ||
603 | + | ||
604 | #endif /* ! _UAPI__ASM_MMAN_H */ | ||
605 | diff --git a/linux-headers/asm-arm64/unistd.h b/linux-headers/asm-arm64/unistd.h | ||
606 | index XXXXXXX..XXXXXXX 100644 | ||
607 | --- a/linux-headers/asm-arm64/unistd.h | ||
608 | +++ b/linux-headers/asm-arm64/unistd.h | ||
609 | @@ -XXX,XX +XXX,XX @@ | ||
610 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
611 | -/* | ||
612 | - * Copyright (C) 2012 ARM Ltd. | ||
613 | - * | ||
614 | - * This program is free software; you can redistribute it and/or modify | ||
615 | - * it under the terms of the GNU General Public License version 2 as | ||
616 | - * published by the Free Software Foundation. | ||
617 | - * | ||
618 | - * This program is distributed in the hope that it will be useful, | ||
619 | - * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
620 | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
621 | - * GNU General Public License for more details. | ||
622 | - * | ||
623 | - * You should have received a copy of the GNU General Public License | ||
624 | - * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
625 | - */ | ||
626 | - | ||
627 | -#define __ARCH_WANT_RENAMEAT | ||
628 | -#define __ARCH_WANT_NEW_STAT | ||
629 | -#define __ARCH_WANT_SET_GET_RLIMIT | ||
630 | -#define __ARCH_WANT_TIME32_SYSCALLS | ||
631 | -#define __ARCH_WANT_SYS_CLONE3 | ||
632 | -#define __ARCH_WANT_MEMFD_SECRET | ||
633 | - | ||
634 | -#include <asm-generic/unistd.h> | ||
635 | +#include <asm/unistd_64.h> | ||
636 | diff --git a/linux-headers/asm-generic/unistd.h b/linux-headers/asm-generic/unistd.h | ||
637 | index XXXXXXX..XXXXXXX 100644 | ||
638 | --- a/linux-headers/asm-generic/unistd.h | ||
639 | +++ b/linux-headers/asm-generic/unistd.h | ||
640 | @@ -XXX,XX +XXX,XX @@ __SC_COMP(__NR_pselect6_time64, sys_pselect6, compat_sys_pselect6_time64) | ||
641 | #define __NR_ppoll_time64 414 | ||
642 | __SC_COMP(__NR_ppoll_time64, sys_ppoll, compat_sys_ppoll_time64) | ||
643 | #define __NR_io_pgetevents_time64 416 | ||
644 | -__SYSCALL(__NR_io_pgetevents_time64, sys_io_pgetevents) | ||
645 | +__SC_COMP(__NR_io_pgetevents_time64, sys_io_pgetevents, compat_sys_io_pgetevents_time64) | ||
646 | #define __NR_recvmmsg_time64 417 | ||
647 | __SC_COMP(__NR_recvmmsg_time64, sys_recvmmsg, compat_sys_recvmmsg_time64) | ||
648 | #define __NR_mq_timedsend_time64 418 | ||
649 | @@ -XXX,XX +XXX,XX @@ __SYSCALL(__NR_fsmount, sys_fsmount) | ||
650 | __SYSCALL(__NR_fspick, sys_fspick) | ||
651 | #define __NR_pidfd_open 434 | ||
652 | __SYSCALL(__NR_pidfd_open, sys_pidfd_open) | ||
653 | - | ||
654 | -#ifdef __ARCH_WANT_SYS_CLONE3 | ||
655 | #define __NR_clone3 435 | ||
656 | __SYSCALL(__NR_clone3, sys_clone3) | ||
657 | -#endif | ||
658 | - | ||
659 | #define __NR_close_range 436 | ||
660 | __SYSCALL(__NR_close_range, sys_close_range) | ||
661 | #define __NR_openat2 437 | ||
662 | diff --git a/linux-headers/asm-loongarch/kvm.h b/linux-headers/asm-loongarch/kvm.h | ||
663 | index XXXXXXX..XXXXXXX 100644 | ||
664 | --- a/linux-headers/asm-loongarch/kvm.h | ||
665 | +++ b/linux-headers/asm-loongarch/kvm.h | ||
666 | @@ -XXX,XX +XXX,XX @@ struct kvm_fpu { | ||
667 | #define KVM_REG_LOONGARCH_KVM (KVM_REG_LOONGARCH | 0x20000ULL) | ||
668 | #define KVM_REG_LOONGARCH_FPSIMD (KVM_REG_LOONGARCH | 0x30000ULL) | ||
669 | #define KVM_REG_LOONGARCH_CPUCFG (KVM_REG_LOONGARCH | 0x40000ULL) | ||
670 | +#define KVM_REG_LOONGARCH_LBT (KVM_REG_LOONGARCH | 0x50000ULL) | ||
671 | #define KVM_REG_LOONGARCH_MASK (KVM_REG_LOONGARCH | 0x70000ULL) | ||
672 | #define KVM_CSR_IDX_MASK 0x7fff | ||
673 | #define KVM_CPUCFG_IDX_MASK 0x7fff | ||
674 | @@ -XXX,XX +XXX,XX @@ struct kvm_fpu { | ||
675 | /* Debugging: Special instruction for software breakpoint */ | ||
676 | #define KVM_REG_LOONGARCH_DEBUG_INST (KVM_REG_LOONGARCH_KVM | KVM_REG_SIZE_U64 | 3) | ||
677 | |||
678 | +/* LBT registers */ | ||
679 | +#define KVM_REG_LOONGARCH_LBT_SCR0 (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 1) | ||
680 | +#define KVM_REG_LOONGARCH_LBT_SCR1 (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 2) | ||
681 | +#define KVM_REG_LOONGARCH_LBT_SCR2 (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 3) | ||
682 | +#define KVM_REG_LOONGARCH_LBT_SCR3 (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 4) | ||
683 | +#define KVM_REG_LOONGARCH_LBT_EFLAGS (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 5) | ||
684 | +#define KVM_REG_LOONGARCH_LBT_FTOP (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 6) | ||
685 | + | ||
686 | #define LOONGARCH_REG_SHIFT 3 | ||
687 | #define LOONGARCH_REG_64(TYPE, REG) (TYPE | KVM_REG_SIZE_U64 | (REG << LOONGARCH_REG_SHIFT)) | ||
688 | #define KVM_IOC_CSRID(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CSR, REG) | ||
689 | #define KVM_IOC_CPUCFG(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CPUCFG, REG) | ||
690 | + | ||
691 | +/* Device Control API on vm fd */ | ||
692 | +#define KVM_LOONGARCH_VM_FEAT_CTRL 0 | ||
693 | +#define KVM_LOONGARCH_VM_FEAT_LSX 0 | ||
694 | +#define KVM_LOONGARCH_VM_FEAT_LASX 1 | ||
695 | +#define KVM_LOONGARCH_VM_FEAT_X86BT 2 | ||
696 | +#define KVM_LOONGARCH_VM_FEAT_ARMBT 3 | ||
697 | +#define KVM_LOONGARCH_VM_FEAT_MIPSBT 4 | ||
698 | +#define KVM_LOONGARCH_VM_FEAT_PMU 5 | ||
699 | +#define KVM_LOONGARCH_VM_FEAT_PV_IPI 6 | ||
700 | +#define KVM_LOONGARCH_VM_FEAT_PV_STEALTIME 7 | ||
701 | + | ||
702 | +/* Device Control API on vcpu fd */ | ||
703 | #define KVM_LOONGARCH_VCPU_CPUCFG 0 | ||
704 | +#define KVM_LOONGARCH_VCPU_PVTIME_CTRL 1 | ||
705 | +#define KVM_LOONGARCH_VCPU_PVTIME_GPA 0 | ||
706 | |||
707 | struct kvm_debug_exit_arch { | ||
708 | }; | ||
709 | diff --git a/linux-headers/asm-loongarch/kvm_para.h b/linux-headers/asm-loongarch/kvm_para.h | ||
710 | new file mode 100644 | ||
711 | index XXXXXXX..XXXXXXX | ||
712 | --- /dev/null | ||
713 | +++ b/linux-headers/asm-loongarch/kvm_para.h | ||
714 | @@ -XXX,XX +XXX,XX @@ | ||
715 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
716 | +#ifndef _ASM_KVM_PARA_H | ||
717 | +#define _ASM_KVM_PARA_H | ||
718 | + | ||
719 | +#include <linux/types.h> | ||
720 | + | ||
721 | +/* | ||
722 | + * CPUCFG index area: 0x40000000 -- 0x400000ff | ||
723 | + * SW emulation for KVM hypervirsor | ||
724 | + */ | ||
725 | +#define CPUCFG_KVM_BASE 0x40000000 | ||
726 | +#define CPUCFG_KVM_SIZE 0x100 | ||
727 | +#define CPUCFG_KVM_SIG (CPUCFG_KVM_BASE + 0) | ||
728 | +#define KVM_SIGNATURE "KVM\0" | ||
729 | +#define CPUCFG_KVM_FEATURE (CPUCFG_KVM_BASE + 4) | ||
730 | +#define KVM_FEATURE_IPI 1 | ||
731 | +#define KVM_FEATURE_STEAL_TIME 2 | ||
732 | +/* BIT 24 - 31 are features configurable by user space vmm */ | ||
733 | +#define KVM_FEATURE_VIRT_EXTIOI 24 | ||
734 | + | ||
735 | +#endif /* _ASM_KVM_PARA_H */ | ||
736 | diff --git a/linux-headers/asm-loongarch/unistd.h b/linux-headers/asm-loongarch/unistd.h | ||
737 | index XXXXXXX..XXXXXXX 100644 | ||
738 | --- a/linux-headers/asm-loongarch/unistd.h | ||
739 | +++ b/linux-headers/asm-loongarch/unistd.h | ||
740 | @@ -XXX,XX +XXX,XX @@ | ||
741 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
742 | -#define __ARCH_WANT_SYS_CLONE | ||
743 | -#define __ARCH_WANT_SYS_CLONE3 | ||
744 | |||
745 | -#include <asm-generic/unistd.h> | ||
746 | +#include <asm/unistd_64.h> | ||
747 | diff --git a/linux-headers/asm-loongarch/unistd_64.h b/linux-headers/asm-loongarch/unistd_64.h | ||
748 | new file mode 100644 | ||
749 | index XXXXXXX..XXXXXXX | ||
750 | --- /dev/null | ||
751 | +++ b/linux-headers/asm-loongarch/unistd_64.h | ||
752 | @@ -XXX,XX +XXX,XX @@ | ||
753 | +#ifndef _ASM_UNISTD_64_H | ||
754 | +#define _ASM_UNISTD_64_H | ||
755 | + | ||
756 | +#define __NR_io_setup 0 | ||
757 | +#define __NR_io_destroy 1 | ||
758 | +#define __NR_io_submit 2 | ||
759 | +#define __NR_io_cancel 3 | ||
760 | +#define __NR_io_getevents 4 | ||
761 | +#define __NR_setxattr 5 | ||
762 | +#define __NR_lsetxattr 6 | ||
763 | +#define __NR_fsetxattr 7 | ||
764 | +#define __NR_getxattr 8 | ||
765 | +#define __NR_lgetxattr 9 | ||
766 | +#define __NR_fgetxattr 10 | ||
767 | +#define __NR_listxattr 11 | ||
768 | +#define __NR_llistxattr 12 | ||
769 | +#define __NR_flistxattr 13 | ||
770 | +#define __NR_removexattr 14 | ||
771 | +#define __NR_lremovexattr 15 | ||
772 | +#define __NR_fremovexattr 16 | ||
773 | +#define __NR_getcwd 17 | ||
774 | +#define __NR_lookup_dcookie 18 | ||
775 | +#define __NR_eventfd2 19 | ||
776 | +#define __NR_epoll_create1 20 | ||
777 | +#define __NR_epoll_ctl 21 | ||
778 | +#define __NR_epoll_pwait 22 | ||
779 | +#define __NR_dup 23 | ||
780 | +#define __NR_dup3 24 | ||
781 | +#define __NR_fcntl 25 | ||
782 | +#define __NR_inotify_init1 26 | ||
783 | +#define __NR_inotify_add_watch 27 | ||
784 | +#define __NR_inotify_rm_watch 28 | ||
785 | +#define __NR_ioctl 29 | ||
786 | +#define __NR_ioprio_set 30 | ||
787 | +#define __NR_ioprio_get 31 | ||
788 | +#define __NR_flock 32 | ||
789 | +#define __NR_mknodat 33 | ||
790 | +#define __NR_mkdirat 34 | ||
791 | +#define __NR_unlinkat 35 | ||
792 | +#define __NR_symlinkat 36 | ||
793 | +#define __NR_linkat 37 | ||
794 | +#define __NR_umount2 39 | ||
795 | +#define __NR_mount 40 | ||
796 | +#define __NR_pivot_root 41 | ||
797 | +#define __NR_nfsservctl 42 | ||
798 | +#define __NR_statfs 43 | ||
799 | +#define __NR_fstatfs 44 | ||
800 | +#define __NR_truncate 45 | ||
801 | +#define __NR_ftruncate 46 | ||
802 | +#define __NR_fallocate 47 | ||
803 | +#define __NR_faccessat 48 | ||
804 | +#define __NR_chdir 49 | ||
805 | +#define __NR_fchdir 50 | ||
806 | +#define __NR_chroot 51 | ||
807 | +#define __NR_fchmod 52 | ||
808 | +#define __NR_fchmodat 53 | ||
809 | +#define __NR_fchownat 54 | ||
810 | +#define __NR_fchown 55 | ||
811 | +#define __NR_openat 56 | ||
812 | +#define __NR_close 57 | ||
813 | +#define __NR_vhangup 58 | ||
814 | +#define __NR_pipe2 59 | ||
815 | +#define __NR_quotactl 60 | ||
816 | +#define __NR_getdents64 61 | ||
817 | +#define __NR_lseek 62 | ||
818 | +#define __NR_read 63 | ||
819 | +#define __NR_write 64 | ||
820 | +#define __NR_readv 65 | ||
821 | +#define __NR_writev 66 | ||
822 | +#define __NR_pread64 67 | ||
823 | +#define __NR_pwrite64 68 | ||
824 | +#define __NR_preadv 69 | ||
825 | +#define __NR_pwritev 70 | ||
826 | +#define __NR_sendfile 71 | ||
827 | +#define __NR_pselect6 72 | ||
828 | +#define __NR_ppoll 73 | ||
829 | +#define __NR_signalfd4 74 | ||
830 | +#define __NR_vmsplice 75 | ||
831 | +#define __NR_splice 76 | ||
832 | +#define __NR_tee 77 | ||
833 | +#define __NR_readlinkat 78 | ||
834 | +#define __NR_newfstatat 79 | ||
835 | +#define __NR_fstat 80 | ||
836 | +#define __NR_sync 81 | ||
837 | +#define __NR_fsync 82 | ||
838 | +#define __NR_fdatasync 83 | ||
839 | +#define __NR_sync_file_range 84 | ||
840 | +#define __NR_timerfd_create 85 | ||
841 | +#define __NR_timerfd_settime 86 | ||
842 | +#define __NR_timerfd_gettime 87 | ||
843 | +#define __NR_utimensat 88 | ||
844 | +#define __NR_acct 89 | ||
845 | +#define __NR_capget 90 | ||
846 | +#define __NR_capset 91 | ||
847 | +#define __NR_personality 92 | ||
848 | +#define __NR_exit 93 | ||
849 | +#define __NR_exit_group 94 | ||
850 | +#define __NR_waitid 95 | ||
851 | +#define __NR_set_tid_address 96 | ||
852 | +#define __NR_unshare 97 | ||
853 | +#define __NR_futex 98 | ||
854 | +#define __NR_set_robust_list 99 | ||
855 | +#define __NR_get_robust_list 100 | ||
856 | +#define __NR_nanosleep 101 | ||
857 | +#define __NR_getitimer 102 | ||
858 | +#define __NR_setitimer 103 | ||
859 | +#define __NR_kexec_load 104 | ||
860 | +#define __NR_init_module 105 | ||
861 | +#define __NR_delete_module 106 | ||
862 | +#define __NR_timer_create 107 | ||
863 | +#define __NR_timer_gettime 108 | ||
864 | +#define __NR_timer_getoverrun 109 | ||
865 | +#define __NR_timer_settime 110 | ||
866 | +#define __NR_timer_delete 111 | ||
867 | +#define __NR_clock_settime 112 | ||
868 | +#define __NR_clock_gettime 113 | ||
869 | +#define __NR_clock_getres 114 | ||
870 | +#define __NR_clock_nanosleep 115 | ||
871 | +#define __NR_syslog 116 | ||
872 | +#define __NR_ptrace 117 | ||
873 | +#define __NR_sched_setparam 118 | ||
874 | +#define __NR_sched_setscheduler 119 | ||
875 | +#define __NR_sched_getscheduler 120 | ||
876 | +#define __NR_sched_getparam 121 | ||
877 | +#define __NR_sched_setaffinity 122 | ||
878 | +#define __NR_sched_getaffinity 123 | ||
879 | +#define __NR_sched_yield 124 | ||
880 | +#define __NR_sched_get_priority_max 125 | ||
881 | +#define __NR_sched_get_priority_min 126 | ||
882 | +#define __NR_sched_rr_get_interval 127 | ||
883 | +#define __NR_restart_syscall 128 | ||
884 | +#define __NR_kill 129 | ||
885 | +#define __NR_tkill 130 | ||
886 | +#define __NR_tgkill 131 | ||
887 | +#define __NR_sigaltstack 132 | ||
888 | +#define __NR_rt_sigsuspend 133 | ||
889 | +#define __NR_rt_sigaction 134 | ||
890 | +#define __NR_rt_sigprocmask 135 | ||
891 | +#define __NR_rt_sigpending 136 | ||
892 | +#define __NR_rt_sigtimedwait 137 | ||
893 | +#define __NR_rt_sigqueueinfo 138 | ||
894 | +#define __NR_rt_sigreturn 139 | ||
895 | +#define __NR_setpriority 140 | ||
896 | +#define __NR_getpriority 141 | ||
897 | +#define __NR_reboot 142 | ||
898 | +#define __NR_setregid 143 | ||
899 | +#define __NR_setgid 144 | ||
900 | +#define __NR_setreuid 145 | ||
901 | +#define __NR_setuid 146 | ||
902 | +#define __NR_setresuid 147 | ||
903 | +#define __NR_getresuid 148 | ||
904 | +#define __NR_setresgid 149 | ||
905 | +#define __NR_getresgid 150 | ||
906 | +#define __NR_setfsuid 151 | ||
907 | +#define __NR_setfsgid 152 | ||
908 | +#define __NR_times 153 | ||
909 | +#define __NR_setpgid 154 | ||
910 | +#define __NR_getpgid 155 | ||
911 | +#define __NR_getsid 156 | ||
912 | +#define __NR_setsid 157 | ||
913 | +#define __NR_getgroups 158 | ||
914 | +#define __NR_setgroups 159 | ||
915 | +#define __NR_uname 160 | ||
916 | +#define __NR_sethostname 161 | ||
917 | +#define __NR_setdomainname 162 | ||
918 | +#define __NR_getrusage 165 | ||
919 | +#define __NR_umask 166 | ||
920 | +#define __NR_prctl 167 | ||
921 | +#define __NR_getcpu 168 | ||
922 | +#define __NR_gettimeofday 169 | ||
923 | +#define __NR_settimeofday 170 | ||
924 | +#define __NR_adjtimex 171 | ||
925 | +#define __NR_getpid 172 | ||
926 | +#define __NR_getppid 173 | ||
927 | +#define __NR_getuid 174 | ||
928 | +#define __NR_geteuid 175 | ||
929 | +#define __NR_getgid 176 | ||
930 | +#define __NR_getegid 177 | ||
931 | +#define __NR_gettid 178 | ||
932 | +#define __NR_sysinfo 179 | ||
933 | +#define __NR_mq_open 180 | ||
934 | +#define __NR_mq_unlink 181 | ||
935 | +#define __NR_mq_timedsend 182 | ||
936 | +#define __NR_mq_timedreceive 183 | ||
937 | +#define __NR_mq_notify 184 | ||
938 | +#define __NR_mq_getsetattr 185 | ||
939 | +#define __NR_msgget 186 | ||
940 | +#define __NR_msgctl 187 | ||
941 | +#define __NR_msgrcv 188 | ||
942 | +#define __NR_msgsnd 189 | ||
943 | +#define __NR_semget 190 | ||
944 | +#define __NR_semctl 191 | ||
945 | +#define __NR_semtimedop 192 | ||
946 | +#define __NR_semop 193 | ||
947 | +#define __NR_shmget 194 | ||
948 | +#define __NR_shmctl 195 | ||
949 | +#define __NR_shmat 196 | ||
950 | +#define __NR_shmdt 197 | ||
951 | +#define __NR_socket 198 | ||
952 | +#define __NR_socketpair 199 | ||
953 | +#define __NR_bind 200 | ||
954 | +#define __NR_listen 201 | ||
955 | +#define __NR_accept 202 | ||
956 | +#define __NR_connect 203 | ||
957 | +#define __NR_getsockname 204 | ||
958 | +#define __NR_getpeername 205 | ||
959 | +#define __NR_sendto 206 | ||
960 | +#define __NR_recvfrom 207 | ||
961 | +#define __NR_setsockopt 208 | ||
962 | +#define __NR_getsockopt 209 | ||
963 | +#define __NR_shutdown 210 | ||
964 | +#define __NR_sendmsg 211 | ||
965 | +#define __NR_recvmsg 212 | ||
966 | +#define __NR_readahead 213 | ||
967 | +#define __NR_brk 214 | ||
968 | +#define __NR_munmap 215 | ||
969 | +#define __NR_mremap 216 | ||
970 | +#define __NR_add_key 217 | ||
971 | +#define __NR_request_key 218 | ||
972 | +#define __NR_keyctl 219 | ||
973 | +#define __NR_clone 220 | ||
974 | +#define __NR_execve 221 | ||
975 | +#define __NR_mmap 222 | ||
976 | +#define __NR_fadvise64 223 | ||
977 | +#define __NR_swapon 224 | ||
978 | +#define __NR_swapoff 225 | ||
979 | +#define __NR_mprotect 226 | ||
980 | +#define __NR_msync 227 | ||
981 | +#define __NR_mlock 228 | ||
982 | +#define __NR_munlock 229 | ||
983 | +#define __NR_mlockall 230 | ||
984 | +#define __NR_munlockall 231 | ||
985 | +#define __NR_mincore 232 | ||
986 | +#define __NR_madvise 233 | ||
987 | +#define __NR_remap_file_pages 234 | ||
988 | +#define __NR_mbind 235 | ||
989 | +#define __NR_get_mempolicy 236 | ||
990 | +#define __NR_set_mempolicy 237 | ||
991 | +#define __NR_migrate_pages 238 | ||
992 | +#define __NR_move_pages 239 | ||
993 | +#define __NR_rt_tgsigqueueinfo 240 | ||
994 | +#define __NR_perf_event_open 241 | ||
995 | +#define __NR_accept4 242 | ||
996 | +#define __NR_recvmmsg 243 | ||
997 | +#define __NR_wait4 260 | ||
998 | +#define __NR_prlimit64 261 | ||
999 | +#define __NR_fanotify_init 262 | ||
1000 | +#define __NR_fanotify_mark 263 | ||
1001 | +#define __NR_name_to_handle_at 264 | ||
1002 | +#define __NR_open_by_handle_at 265 | ||
1003 | +#define __NR_clock_adjtime 266 | ||
1004 | +#define __NR_syncfs 267 | ||
1005 | +#define __NR_setns 268 | ||
1006 | +#define __NR_sendmmsg 269 | ||
1007 | +#define __NR_process_vm_readv 270 | ||
1008 | +#define __NR_process_vm_writev 271 | ||
1009 | +#define __NR_kcmp 272 | ||
1010 | +#define __NR_finit_module 273 | ||
1011 | +#define __NR_sched_setattr 274 | ||
1012 | +#define __NR_sched_getattr 275 | ||
1013 | +#define __NR_renameat2 276 | ||
1014 | +#define __NR_seccomp 277 | ||
1015 | +#define __NR_getrandom 278 | ||
1016 | +#define __NR_memfd_create 279 | ||
1017 | +#define __NR_bpf 280 | ||
1018 | +#define __NR_execveat 281 | ||
1019 | +#define __NR_userfaultfd 282 | ||
1020 | +#define __NR_membarrier 283 | ||
1021 | +#define __NR_mlock2 284 | ||
1022 | +#define __NR_copy_file_range 285 | ||
1023 | +#define __NR_preadv2 286 | ||
1024 | +#define __NR_pwritev2 287 | ||
1025 | +#define __NR_pkey_mprotect 288 | ||
1026 | +#define __NR_pkey_alloc 289 | ||
1027 | +#define __NR_pkey_free 290 | ||
1028 | +#define __NR_statx 291 | ||
1029 | +#define __NR_io_pgetevents 292 | ||
1030 | +#define __NR_rseq 293 | ||
1031 | +#define __NR_kexec_file_load 294 | ||
1032 | +#define __NR_pidfd_send_signal 424 | ||
1033 | +#define __NR_io_uring_setup 425 | ||
1034 | +#define __NR_io_uring_enter 426 | ||
1035 | +#define __NR_io_uring_register 427 | ||
1036 | +#define __NR_open_tree 428 | ||
1037 | +#define __NR_move_mount 429 | ||
1038 | +#define __NR_fsopen 430 | ||
1039 | +#define __NR_fsconfig 431 | ||
1040 | +#define __NR_fsmount 432 | ||
1041 | +#define __NR_fspick 433 | ||
1042 | +#define __NR_pidfd_open 434 | ||
1043 | +#define __NR_clone3 435 | ||
1044 | +#define __NR_close_range 436 | ||
1045 | +#define __NR_openat2 437 | ||
1046 | +#define __NR_pidfd_getfd 438 | ||
1047 | +#define __NR_faccessat2 439 | ||
1048 | +#define __NR_process_madvise 440 | ||
1049 | +#define __NR_epoll_pwait2 441 | ||
1050 | +#define __NR_mount_setattr 442 | ||
1051 | +#define __NR_quotactl_fd 443 | ||
1052 | +#define __NR_landlock_create_ruleset 444 | ||
1053 | +#define __NR_landlock_add_rule 445 | ||
1054 | +#define __NR_landlock_restrict_self 446 | ||
1055 | +#define __NR_process_mrelease 448 | ||
1056 | +#define __NR_futex_waitv 449 | ||
1057 | +#define __NR_set_mempolicy_home_node 450 | ||
1058 | +#define __NR_cachestat 451 | ||
1059 | +#define __NR_fchmodat2 452 | ||
1060 | +#define __NR_map_shadow_stack 453 | ||
1061 | +#define __NR_futex_wake 454 | ||
1062 | +#define __NR_futex_wait 455 | ||
1063 | +#define __NR_futex_requeue 456 | ||
1064 | +#define __NR_statmount 457 | ||
1065 | +#define __NR_listmount 458 | ||
1066 | +#define __NR_lsm_get_self_attr 459 | ||
1067 | +#define __NR_lsm_set_self_attr 460 | ||
1068 | +#define __NR_lsm_list_modules 461 | ||
1069 | +#define __NR_mseal 462 | ||
1070 | + | ||
1071 | + | ||
1072 | +#endif /* _ASM_UNISTD_64_H */ | ||
1073 | diff --git a/linux-headers/asm-riscv/kvm.h b/linux-headers/asm-riscv/kvm.h | ||
1074 | index XXXXXXX..XXXXXXX 100644 | ||
1075 | --- a/linux-headers/asm-riscv/kvm.h | ||
1076 | +++ b/linux-headers/asm-riscv/kvm.h | ||
1077 | @@ -XXX,XX +XXX,XX @@ enum KVM_RISCV_ISA_EXT_ID { | ||
1078 | KVM_RISCV_ISA_EXT_ZTSO, | ||
1079 | KVM_RISCV_ISA_EXT_ZACAS, | ||
1080 | KVM_RISCV_ISA_EXT_SSCOFPMF, | ||
1081 | + KVM_RISCV_ISA_EXT_ZIMOP, | ||
1082 | + KVM_RISCV_ISA_EXT_ZCA, | ||
1083 | + KVM_RISCV_ISA_EXT_ZCB, | ||
1084 | + KVM_RISCV_ISA_EXT_ZCD, | ||
1085 | + KVM_RISCV_ISA_EXT_ZCF, | ||
1086 | + KVM_RISCV_ISA_EXT_ZCMOP, | ||
1087 | + KVM_RISCV_ISA_EXT_ZAWRS, | ||
1088 | KVM_RISCV_ISA_EXT_MAX, | ||
1089 | }; | ||
1090 | |||
1091 | diff --git a/linux-headers/asm-riscv/unistd.h b/linux-headers/asm-riscv/unistd.h | ||
1092 | index XXXXXXX..XXXXXXX 100644 | ||
1093 | --- a/linux-headers/asm-riscv/unistd.h | ||
1094 | +++ b/linux-headers/asm-riscv/unistd.h | ||
1095 | @@ -XXX,XX +XXX,XX @@ | ||
1096 | * You should have received a copy of the GNU General Public License | ||
1097 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | ||
1098 | */ | ||
1099 | +#include <asm/bitsperlong.h> | ||
1100 | |||
1101 | -#if defined(__LP64__) && !defined(__SYSCALL_COMPAT) | ||
1102 | -#define __ARCH_WANT_NEW_STAT | ||
1103 | -#define __ARCH_WANT_SET_GET_RLIMIT | ||
1104 | -#endif /* __LP64__ */ | ||
1105 | - | ||
1106 | -#define __ARCH_WANT_SYS_CLONE3 | ||
1107 | -#define __ARCH_WANT_MEMFD_SECRET | ||
1108 | - | ||
1109 | -#include <asm-generic/unistd.h> | ||
1110 | - | ||
1111 | -/* | ||
1112 | - * Allows the instruction cache to be flushed from userspace. Despite RISC-V | ||
1113 | - * having a direct 'fence.i' instruction available to userspace (which we | ||
1114 | - * can't trap!), that's not actually viable when running on Linux because the | ||
1115 | - * kernel might schedule a process on another hart. There is no way for | ||
1116 | - * userspace to handle this without invoking the kernel (as it doesn't know the | ||
1117 | - * thread->hart mappings), so we've defined a RISC-V specific system call to | ||
1118 | - * flush the instruction cache. | ||
1119 | - * | ||
1120 | - * __NR_riscv_flush_icache is defined to flush the instruction cache over an | ||
1121 | - * address range, with the flush applying to either all threads or just the | ||
1122 | - * caller. We don't currently do anything with the address range, that's just | ||
1123 | - * in there for forwards compatibility. | ||
1124 | - */ | ||
1125 | -#ifndef __NR_riscv_flush_icache | ||
1126 | -#define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15) | ||
1127 | -#endif | ||
1128 | -__SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache) | ||
1129 | - | ||
1130 | -/* | ||
1131 | - * Allows userspace to query the kernel for CPU architecture and | ||
1132 | - * microarchitecture details across a given set of CPUs. | ||
1133 | - */ | ||
1134 | -#ifndef __NR_riscv_hwprobe | ||
1135 | -#define __NR_riscv_hwprobe (__NR_arch_specific_syscall + 14) | ||
1136 | +#if __BITS_PER_LONG == 64 | ||
1137 | +#include <asm/unistd_64.h> | ||
1138 | +#else | ||
1139 | +#include <asm/unistd_32.h> | ||
1140 | #endif | ||
1141 | -__SYSCALL(__NR_riscv_hwprobe, sys_riscv_hwprobe) | ||
1142 | diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h | ||
1143 | index XXXXXXX..XXXXXXX 100644 | ||
1144 | --- a/linux-headers/asm-x86/kvm.h | ||
1145 | +++ b/linux-headers/asm-x86/kvm.h | ||
1146 | @@ -XXX,XX +XXX,XX @@ struct kvm_ioapic_state { | ||
1147 | |||
1148 | #define KVM_RUN_X86_SMM (1 << 0) | ||
1149 | #define KVM_RUN_X86_BUS_LOCK (1 << 1) | ||
1150 | +#define KVM_RUN_X86_GUEST_MODE (1 << 2) | ||
1151 | |||
1152 | /* for KVM_GET_REGS and KVM_SET_REGS */ | ||
1153 | struct kvm_regs { | ||
1154 | @@ -XXX,XX +XXX,XX @@ struct kvm_sync_regs { | ||
1155 | #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4) | ||
1156 | #define KVM_X86_QUIRK_FIX_HYPERCALL_INSN (1 << 5) | ||
1157 | #define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS (1 << 6) | ||
1158 | +#define KVM_X86_QUIRK_SLOT_ZAP_ALL (1 << 7) | ||
1159 | |||
1160 | #define KVM_STATE_NESTED_FORMAT_VMX 0 | ||
1161 | #define KVM_STATE_NESTED_FORMAT_SVM 1 | ||
1162 | diff --git a/linux-headers/asm-x86/unistd_64.h b/linux-headers/asm-x86/unistd_64.h | ||
1163 | index XXXXXXX..XXXXXXX 100644 | ||
1164 | --- a/linux-headers/asm-x86/unistd_64.h | ||
1165 | +++ b/linux-headers/asm-x86/unistd_64.h | ||
1166 | @@ -XXX,XX +XXX,XX @@ | ||
1167 | #define __NR_statx 332 | ||
1168 | #define __NR_io_pgetevents 333 | ||
1169 | #define __NR_rseq 334 | ||
1170 | +#define __NR_uretprobe 335 | ||
1171 | #define __NR_pidfd_send_signal 424 | ||
1172 | #define __NR_io_uring_setup 425 | ||
1173 | #define __NR_io_uring_enter 426 | ||
1174 | diff --git a/linux-headers/asm-x86/unistd_x32.h b/linux-headers/asm-x86/unistd_x32.h | ||
1175 | index XXXXXXX..XXXXXXX 100644 | ||
1176 | --- a/linux-headers/asm-x86/unistd_x32.h | ||
1177 | +++ b/linux-headers/asm-x86/unistd_x32.h | ||
1178 | @@ -XXX,XX +XXX,XX @@ | ||
1179 | #define __NR_statx (__X32_SYSCALL_BIT + 332) | ||
1180 | #define __NR_io_pgetevents (__X32_SYSCALL_BIT + 333) | ||
1181 | #define __NR_rseq (__X32_SYSCALL_BIT + 334) | ||
1182 | +#define __NR_uretprobe (__X32_SYSCALL_BIT + 335) | ||
1183 | #define __NR_pidfd_send_signal (__X32_SYSCALL_BIT + 424) | ||
1184 | #define __NR_io_uring_setup (__X32_SYSCALL_BIT + 425) | ||
1185 | #define __NR_io_uring_enter (__X32_SYSCALL_BIT + 426) | ||
1186 | diff --git a/linux-headers/linux/bits.h b/linux-headers/linux/bits.h | ||
1187 | index XXXXXXX..XXXXXXX 100644 | ||
1188 | --- a/linux-headers/linux/bits.h | ||
1189 | +++ b/linux-headers/linux/bits.h | ||
1190 | @@ -XXX,XX +XXX,XX @@ | ||
1191 | (((~_ULL(0)) - (_ULL(1) << (l)) + 1) & \ | ||
1192 | (~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h)))) | ||
1193 | |||
1194 | +#define __GENMASK_U128(h, l) \ | ||
1195 | + ((_BIT128((h)) << 1) - (_BIT128(l))) | ||
1196 | + | ||
1197 | #endif /* _LINUX_BITS_H */ | ||
1198 | diff --git a/linux-headers/linux/const.h b/linux-headers/linux/const.h | ||
1199 | index XXXXXXX..XXXXXXX 100644 | ||
1200 | --- a/linux-headers/linux/const.h | ||
1201 | +++ b/linux-headers/linux/const.h | ||
1202 | @@ -XXX,XX +XXX,XX @@ | ||
1203 | #define _BITUL(x) (_UL(1) << (x)) | ||
1204 | #define _BITULL(x) (_ULL(1) << (x)) | ||
1205 | |||
1206 | +#if !defined(__ASSEMBLY__) | ||
1207 | +/* | ||
1208 | + * Missing __asm__ support | ||
1209 | + * | ||
1210 | + * __BIT128() would not work in the __asm__ code, as it shifts an | ||
1211 | + * 'unsigned __init128' data type as direct representation of | ||
1212 | + * 128 bit constants is not supported in the gcc compiler, as | ||
1213 | + * they get silently truncated. | ||
1214 | + * | ||
1215 | + * TODO: Please revisit this implementation when gcc compiler | ||
1216 | + * starts representing 128 bit constants directly like long | ||
1217 | + * and unsigned long etc. Subsequently drop the comment for | ||
1218 | + * GENMASK_U128() which would then start supporting __asm__ code. | ||
1219 | + */ | ||
1220 | +#define _BIT128(x) ((unsigned __int128)(1) << (x)) | ||
1221 | +#endif | ||
1222 | + | ||
1223 | #define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - 1) | ||
1224 | #define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask)) | ||
1225 | |||
1226 | diff --git a/linux-headers/linux/iommufd.h b/linux-headers/linux/iommufd.h | ||
1227 | index XXXXXXX..XXXXXXX 100644 | ||
1228 | --- a/linux-headers/linux/iommufd.h | ||
1229 | +++ b/linux-headers/linux/iommufd.h | ||
1230 | @@ -XXX,XX +XXX,XX @@ | ||
1231 | #ifndef _IOMMUFD_H | ||
1232 | #define _IOMMUFD_H | ||
1233 | |||
1234 | -#include <linux/types.h> | ||
1235 | #include <linux/ioctl.h> | ||
1236 | +#include <linux/types.h> | ||
1237 | |||
1238 | #define IOMMUFD_TYPE (';') | ||
1239 | |||
1240 | @@ -XXX,XX +XXX,XX @@ | ||
1241 | enum { | ||
1242 | IOMMUFD_CMD_BASE = 0x80, | ||
1243 | IOMMUFD_CMD_DESTROY = IOMMUFD_CMD_BASE, | ||
1244 | - IOMMUFD_CMD_IOAS_ALLOC, | ||
1245 | - IOMMUFD_CMD_IOAS_ALLOW_IOVAS, | ||
1246 | - IOMMUFD_CMD_IOAS_COPY, | ||
1247 | - IOMMUFD_CMD_IOAS_IOVA_RANGES, | ||
1248 | - IOMMUFD_CMD_IOAS_MAP, | ||
1249 | - IOMMUFD_CMD_IOAS_UNMAP, | ||
1250 | - IOMMUFD_CMD_OPTION, | ||
1251 | - IOMMUFD_CMD_VFIO_IOAS, | ||
1252 | - IOMMUFD_CMD_HWPT_ALLOC, | ||
1253 | - IOMMUFD_CMD_GET_HW_INFO, | ||
1254 | - IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING, | ||
1255 | - IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP, | ||
1256 | - IOMMUFD_CMD_HWPT_INVALIDATE, | ||
1257 | + IOMMUFD_CMD_IOAS_ALLOC = 0x81, | ||
1258 | + IOMMUFD_CMD_IOAS_ALLOW_IOVAS = 0x82, | ||
1259 | + IOMMUFD_CMD_IOAS_COPY = 0x83, | ||
1260 | + IOMMUFD_CMD_IOAS_IOVA_RANGES = 0x84, | ||
1261 | + IOMMUFD_CMD_IOAS_MAP = 0x85, | ||
1262 | + IOMMUFD_CMD_IOAS_UNMAP = 0x86, | ||
1263 | + IOMMUFD_CMD_OPTION = 0x87, | ||
1264 | + IOMMUFD_CMD_VFIO_IOAS = 0x88, | ||
1265 | + IOMMUFD_CMD_HWPT_ALLOC = 0x89, | ||
1266 | + IOMMUFD_CMD_GET_HW_INFO = 0x8a, | ||
1267 | + IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING = 0x8b, | ||
1268 | + IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP = 0x8c, | ||
1269 | + IOMMUFD_CMD_HWPT_INVALIDATE = 0x8d, | ||
1270 | + IOMMUFD_CMD_FAULT_QUEUE_ALLOC = 0x8e, | ||
1271 | }; | ||
1272 | |||
1273 | /** | ||
1274 | @@ -XXX,XX +XXX,XX @@ struct iommu_vfio_ioas { | ||
1275 | * the parent HWPT in a nesting configuration. | ||
1276 | * @IOMMU_HWPT_ALLOC_DIRTY_TRACKING: Dirty tracking support for device IOMMU is | ||
1277 | * enforced on device attachment | ||
1278 | + * @IOMMU_HWPT_FAULT_ID_VALID: The fault_id field of hwpt allocation data is | ||
1279 | + * valid. | ||
1280 | */ | ||
1281 | enum iommufd_hwpt_alloc_flags { | ||
1282 | IOMMU_HWPT_ALLOC_NEST_PARENT = 1 << 0, | ||
1283 | IOMMU_HWPT_ALLOC_DIRTY_TRACKING = 1 << 1, | ||
1284 | + IOMMU_HWPT_FAULT_ID_VALID = 1 << 2, | ||
1285 | }; | ||
1286 | |||
1287 | /** | ||
1288 | @@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_vtd_s1 { | ||
1289 | * @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table | ||
1290 | */ | ||
1291 | enum iommu_hwpt_data_type { | ||
1292 | - IOMMU_HWPT_DATA_NONE, | ||
1293 | - IOMMU_HWPT_DATA_VTD_S1, | ||
1294 | + IOMMU_HWPT_DATA_NONE = 0, | ||
1295 | + IOMMU_HWPT_DATA_VTD_S1 = 1, | ||
1296 | }; | ||
1297 | |||
1298 | /** | ||
1299 | @@ -XXX,XX +XXX,XX @@ enum iommu_hwpt_data_type { | ||
1300 | * @data_type: One of enum iommu_hwpt_data_type | ||
1301 | * @data_len: Length of the type specific data | ||
1302 | * @data_uptr: User pointer to the type specific data | ||
1303 | + * @fault_id: The ID of IOMMUFD_FAULT object. Valid only if flags field of | ||
1304 | + * IOMMU_HWPT_FAULT_ID_VALID is set. | ||
1305 | + * @__reserved2: Padding to 64-bit alignment. Must be 0. | ||
1306 | * | ||
1307 | * Explicitly allocate a hardware page table object. This is the same object | ||
1308 | * type that is returned by iommufd_device_attach() and represents the | ||
1309 | @@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_alloc { | ||
1310 | __u32 data_type; | ||
1311 | __u32 data_len; | ||
1312 | __aligned_u64 data_uptr; | ||
1313 | + __u32 fault_id; | ||
1314 | + __u32 __reserved2; | ||
1315 | }; | ||
1316 | #define IOMMU_HWPT_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_ALLOC) | ||
1317 | |||
1318 | @@ -XXX,XX +XXX,XX @@ struct iommu_hw_info_vtd { | ||
1319 | * @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type | ||
1320 | */ | ||
1321 | enum iommu_hw_info_type { | ||
1322 | - IOMMU_HW_INFO_TYPE_NONE, | ||
1323 | - IOMMU_HW_INFO_TYPE_INTEL_VTD, | ||
1324 | + IOMMU_HW_INFO_TYPE_NONE = 0, | ||
1325 | + IOMMU_HW_INFO_TYPE_INTEL_VTD = 1, | ||
1326 | }; | ||
1327 | |||
1328 | /** | ||
1329 | @@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_get_dirty_bitmap { | ||
1330 | * @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1 | ||
1331 | */ | ||
1332 | enum iommu_hwpt_invalidate_data_type { | ||
1333 | - IOMMU_HWPT_INVALIDATE_DATA_VTD_S1, | ||
1334 | + IOMMU_HWPT_INVALIDATE_DATA_VTD_S1 = 0, | ||
1335 | }; | ||
1336 | |||
1337 | /** | ||
1338 | @@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_invalidate { | ||
1339 | __u32 __reserved; | ||
1340 | }; | ||
1341 | #define IOMMU_HWPT_INVALIDATE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_INVALIDATE) | ||
1342 | + | ||
1343 | +/** | ||
1344 | + * enum iommu_hwpt_pgfault_flags - flags for struct iommu_hwpt_pgfault | ||
1345 | + * @IOMMU_PGFAULT_FLAGS_PASID_VALID: The pasid field of the fault data is | ||
1346 | + * valid. | ||
1347 | + * @IOMMU_PGFAULT_FLAGS_LAST_PAGE: It's the last fault of a fault group. | ||
1348 | + */ | ||
1349 | +enum iommu_hwpt_pgfault_flags { | ||
1350 | + IOMMU_PGFAULT_FLAGS_PASID_VALID = (1 << 0), | ||
1351 | + IOMMU_PGFAULT_FLAGS_LAST_PAGE = (1 << 1), | ||
1352 | +}; | ||
1353 | + | ||
1354 | +/** | ||
1355 | + * enum iommu_hwpt_pgfault_perm - perm bits for struct iommu_hwpt_pgfault | ||
1356 | + * @IOMMU_PGFAULT_PERM_READ: request for read permission | ||
1357 | + * @IOMMU_PGFAULT_PERM_WRITE: request for write permission | ||
1358 | + * @IOMMU_PGFAULT_PERM_EXEC: (PCIE 10.4.1) request with a PASID that has the | ||
1359 | + * Execute Requested bit set in PASID TLP Prefix. | ||
1360 | + * @IOMMU_PGFAULT_PERM_PRIV: (PCIE 10.4.1) request with a PASID that has the | ||
1361 | + * Privileged Mode Requested bit set in PASID TLP | ||
1362 | + * Prefix. | ||
1363 | + */ | ||
1364 | +enum iommu_hwpt_pgfault_perm { | ||
1365 | + IOMMU_PGFAULT_PERM_READ = (1 << 0), | ||
1366 | + IOMMU_PGFAULT_PERM_WRITE = (1 << 1), | ||
1367 | + IOMMU_PGFAULT_PERM_EXEC = (1 << 2), | ||
1368 | + IOMMU_PGFAULT_PERM_PRIV = (1 << 3), | ||
1369 | +}; | ||
1370 | + | ||
1371 | +/** | ||
1372 | + * struct iommu_hwpt_pgfault - iommu page fault data | ||
1373 | + * @flags: Combination of enum iommu_hwpt_pgfault_flags | ||
1374 | + * @dev_id: id of the originated device | ||
1375 | + * @pasid: Process Address Space ID | ||
1376 | + * @grpid: Page Request Group Index | ||
1377 | + * @perm: Combination of enum iommu_hwpt_pgfault_perm | ||
1378 | + * @addr: Fault address | ||
1379 | + * @length: a hint of how much data the requestor is expecting to fetch. For | ||
1380 | + * example, if the PRI initiator knows it is going to do a 10MB | ||
1381 | + * transfer, it could fill in 10MB and the OS could pre-fault in | ||
1382 | + * 10MB of IOVA. It's default to 0 if there's no such hint. | ||
1383 | + * @cookie: kernel-managed cookie identifying a group of fault messages. The | ||
1384 | + * cookie number encoded in the last page fault of the group should | ||
1385 | + * be echoed back in the response message. | ||
1386 | + */ | ||
1387 | +struct iommu_hwpt_pgfault { | ||
1388 | + __u32 flags; | ||
1389 | + __u32 dev_id; | ||
1390 | + __u32 pasid; | ||
1391 | + __u32 grpid; | ||
1392 | + __u32 perm; | ||
1393 | + __u64 addr; | ||
1394 | + __u32 length; | ||
1395 | + __u32 cookie; | ||
1396 | +}; | ||
1397 | + | ||
1398 | +/** | ||
1399 | + * enum iommufd_page_response_code - Return status of fault handlers | ||
1400 | + * @IOMMUFD_PAGE_RESP_SUCCESS: Fault has been handled and the page tables | ||
1401 | + * populated, retry the access. This is the | ||
1402 | + * "Success" defined in PCI 10.4.2.1. | ||
1403 | + * @IOMMUFD_PAGE_RESP_INVALID: Could not handle this fault, don't retry the | ||
1404 | + * access. This is the "Invalid Request" in PCI | ||
1405 | + * 10.4.2.1. | ||
1406 | + */ | ||
1407 | +enum iommufd_page_response_code { | ||
1408 | + IOMMUFD_PAGE_RESP_SUCCESS = 0, | ||
1409 | + IOMMUFD_PAGE_RESP_INVALID = 1, | ||
1410 | +}; | ||
1411 | + | ||
1412 | +/** | ||
1413 | + * struct iommu_hwpt_page_response - IOMMU page fault response | ||
1414 | + * @cookie: The kernel-managed cookie reported in the fault message. | ||
1415 | + * @code: One of response code in enum iommufd_page_response_code. | ||
1416 | + */ | ||
1417 | +struct iommu_hwpt_page_response { | ||
1418 | + __u32 cookie; | ||
1419 | + __u32 code; | ||
1420 | +}; | ||
1421 | + | ||
1422 | +/** | ||
1423 | + * struct iommu_fault_alloc - ioctl(IOMMU_FAULT_QUEUE_ALLOC) | ||
1424 | + * @size: sizeof(struct iommu_fault_alloc) | ||
1425 | + * @flags: Must be 0 | ||
1426 | + * @out_fault_id: The ID of the new FAULT | ||
1427 | + * @out_fault_fd: The fd of the new FAULT | ||
1428 | + * | ||
1429 | + * Explicitly allocate a fault handling object. | ||
1430 | + */ | ||
1431 | +struct iommu_fault_alloc { | ||
1432 | + __u32 size; | ||
1433 | + __u32 flags; | ||
1434 | + __u32 out_fault_id; | ||
1435 | + __u32 out_fault_fd; | ||
1436 | +}; | ||
1437 | +#define IOMMU_FAULT_QUEUE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_FAULT_QUEUE_ALLOC) | ||
1438 | #endif | ||
1439 | diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h | ||
1440 | index XXXXXXX..XXXXXXX 100644 | ||
1441 | --- a/linux-headers/linux/kvm.h | ||
1442 | +++ b/linux-headers/linux/kvm.h | ||
1443 | @@ -XXX,XX +XXX,XX @@ struct kvm_xen_exit { | ||
1444 | /* Flags that describe what fields in emulation_failure hold valid data. */ | ||
1445 | #define KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES (1ULL << 0) | ||
1446 | |||
1447 | +/* | ||
1448 | + * struct kvm_run can be modified by userspace at any time, so KVM must be | ||
1449 | + * careful to avoid TOCTOU bugs. In order to protect KVM, HINT_UNSAFE_IN_KVM() | ||
1450 | + * renames fields in struct kvm_run from <symbol> to <symbol>__unsafe when | ||
1451 | + * compiled into the kernel, ensuring that any use within KVM is obvious and | ||
1452 | + * gets extra scrutiny. | ||
1453 | + */ | ||
1454 | +#define HINT_UNSAFE_IN_KVM(_symbol) _symbol | ||
1455 | + | ||
1456 | /* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */ | ||
1457 | struct kvm_run { | ||
1458 | /* in */ | ||
1459 | __u8 request_interrupt_window; | ||
1460 | - __u8 immediate_exit; | ||
1461 | + __u8 HINT_UNSAFE_IN_KVM(immediate_exit); | ||
1462 | __u8 padding1[6]; | ||
1463 | |||
1464 | /* out */ | ||
1465 | @@ -XXX,XX +XXX,XX @@ struct kvm_enable_cap { | ||
1466 | #define KVM_CAP_MEMORY_ATTRIBUTES 233 | ||
1467 | #define KVM_CAP_GUEST_MEMFD 234 | ||
1468 | #define KVM_CAP_VM_TYPES 235 | ||
1469 | +#define KVM_CAP_PRE_FAULT_MEMORY 236 | ||
1470 | +#define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237 | ||
1471 | +#define KVM_CAP_X86_GUEST_MODE 238 | ||
1472 | |||
1473 | struct kvm_irq_routing_irqchip { | ||
1474 | __u32 irqchip; | ||
1475 | @@ -XXX,XX +XXX,XX @@ struct kvm_create_guest_memfd { | ||
1476 | __u64 reserved[6]; | ||
1477 | }; | ||
1478 | |||
1479 | +#define KVM_PRE_FAULT_MEMORY _IOWR(KVMIO, 0xd5, struct kvm_pre_fault_memory) | ||
1480 | + | ||
1481 | +struct kvm_pre_fault_memory { | ||
1482 | + __u64 gpa; | ||
1483 | + __u64 size; | ||
1484 | + __u64 flags; | ||
1485 | + __u64 padding[5]; | ||
1486 | +}; | ||
1487 | + | ||
1488 | #endif /* __LINUX_KVM_H */ | ||
1489 | diff --git a/linux-headers/linux/mman.h b/linux-headers/linux/mman.h | ||
1490 | index XXXXXXX..XXXXXXX 100644 | ||
1491 | --- a/linux-headers/linux/mman.h | ||
1492 | +++ b/linux-headers/linux/mman.h | ||
1493 | @@ -XXX,XX +XXX,XX @@ | ||
1494 | #define MAP_SHARED 0x01 /* Share changes */ | ||
1495 | #define MAP_PRIVATE 0x02 /* Changes are private */ | ||
1496 | #define MAP_SHARED_VALIDATE 0x03 /* share + validate extension flags */ | ||
1497 | +#define MAP_DROPPABLE 0x08 /* Zero memory under memory pressure. */ | ||
1498 | |||
1499 | /* | ||
1500 | * Huge page size encoding when MAP_HUGETLB is specified, and a huge page | ||
1501 | diff --git a/linux-headers/linux/psp-sev.h b/linux-headers/linux/psp-sev.h | ||
1502 | index XXXXXXX..XXXXXXX 100644 | ||
1503 | --- a/linux-headers/linux/psp-sev.h | ||
1504 | +++ b/linux-headers/linux/psp-sev.h | ||
1505 | @@ -XXX,XX +XXX,XX @@ enum { | ||
1506 | SNP_PLATFORM_STATUS, | ||
1507 | SNP_COMMIT, | ||
1508 | SNP_SET_CONFIG, | ||
1509 | + SNP_VLEK_LOAD, | ||
1510 | |||
1511 | SEV_MAX, | ||
1512 | }; | ||
1513 | @@ -XXX,XX +XXX,XX @@ typedef enum { | ||
1514 | SEV_RET_INVALID_PLATFORM_STATE, | ||
1515 | SEV_RET_INVALID_GUEST_STATE, | ||
1516 | SEV_RET_INAVLID_CONFIG, | ||
1517 | + SEV_RET_INVALID_CONFIG = SEV_RET_INAVLID_CONFIG, | ||
1518 | SEV_RET_INVALID_LEN, | ||
1519 | SEV_RET_ALREADY_OWNED, | ||
1520 | SEV_RET_INVALID_CERTIFICATE, | ||
1521 | @@ -XXX,XX +XXX,XX @@ struct sev_user_data_snp_config { | ||
1522 | __u8 rsvd1[52]; | ||
1523 | } __attribute__((packed)); | ||
1524 | |||
1525 | +/** | ||
1526 | + * struct sev_data_snp_vlek_load - SNP_VLEK_LOAD structure | ||
1527 | + * | ||
1528 | + * @len: length of the command buffer read by the PSP | ||
1529 | + * @vlek_wrapped_version: version of wrapped VLEK hashstick (Must be 0h) | ||
1530 | + * @rsvd: reserved | ||
1531 | + * @vlek_wrapped_address: address of a wrapped VLEK hashstick | ||
1532 | + * (struct sev_user_data_snp_wrapped_vlek_hashstick) | ||
1533 | + */ | ||
1534 | +struct sev_user_data_snp_vlek_load { | ||
1535 | + __u32 len; /* In */ | ||
1536 | + __u8 vlek_wrapped_version; /* In */ | ||
1537 | + __u8 rsvd[3]; /* In */ | ||
1538 | + __u64 vlek_wrapped_address; /* In */ | ||
1539 | +} __attribute__((packed)); | ||
1540 | + | ||
1541 | +/** | ||
1542 | + * struct sev_user_data_snp_vlek_wrapped_vlek_hashstick - Wrapped VLEK data | ||
1543 | + * | ||
1544 | + * @data: Opaque data provided by AMD KDS (as described in SEV-SNP Firmware ABI | ||
1545 | + * 1.54, SNP_VLEK_LOAD) | ||
1546 | + */ | ||
1547 | +struct sev_user_data_snp_wrapped_vlek_hashstick { | ||
1548 | + __u8 data[432]; /* In */ | ||
1549 | +} __attribute__((packed)); | ||
1550 | + | ||
1551 | /** | ||
1552 | * struct sev_issue_cmd - SEV ioctl parameters | ||
1553 | * | ||
1554 | -- | 29 | -- |
1555 | 2.34.1 | 30 | 2.43.5 |
1556 | 31 | ||
1557 | 32 | diff view generated by jsdifflib |
1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | The same with ACPI table, fdt table is created on machine done |
---|---|---|---|
2 | 2 | notification. Some objects like CPU objects can be created with cold-plug | |
3 | Six registers scr0 - scr3, eflags and ftop are added in percpu vmstate. | 3 | method with command such as -smp x, -device la464-loongarch-cpu, so all |
4 | And two functions kvm_loongarch_get_lbt/kvm_loongarch_put_lbt are added | 4 | objects finish to create when machine is done. |
5 | to save/restore lbt registers. | ||
6 | 5 | ||
7 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
8 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 7 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
9 | Message-Id: <20240929070405.235200-3-maobibo@loongson.cn> | ||
10 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
11 | --- | 8 | --- |
12 | target/loongarch/cpu.h | 12 ++++++++ | 9 | hw/loongarch/virt.c | 103 ++++++++++++++++++++++++-------------------- |
13 | target/loongarch/kvm/kvm.c | 62 ++++++++++++++++++++++++++++++++++++++ | 10 | 1 file changed, 57 insertions(+), 46 deletions(-) |
14 | target/loongarch/machine.c | 24 +++++++++++++++ | ||
15 | 3 files changed, 98 insertions(+) | ||
16 | 11 | ||
17 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h | 12 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c |
18 | index XXXXXXX..XXXXXXX 100644 | 13 | index XXXXXXX..XXXXXXX 100644 |
19 | --- a/target/loongarch/cpu.h | 14 | --- a/hw/loongarch/virt.c |
20 | +++ b/target/loongarch/cpu.h | 15 | +++ b/hw/loongarch/virt.c |
21 | @@ -XXX,XX +XXX,XX @@ enum loongarch_features { | 16 | @@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms) |
22 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ | 17 | } |
23 | }; | 18 | } |
24 | 19 | ||
25 | +typedef struct LoongArchBT { | 20 | +static void virt_fdt_setup(LoongArchVirtMachineState *lvms) |
26 | + /* scratch registers */ | ||
27 | + uint64_t scr0; | ||
28 | + uint64_t scr1; | ||
29 | + uint64_t scr2; | ||
30 | + uint64_t scr3; | ||
31 | + /* loongarch eflags */ | ||
32 | + uint32_t eflags; | ||
33 | + uint32_t ftop; | ||
34 | +} lbt_t; | ||
35 | + | ||
36 | typedef struct CPUArchState { | ||
37 | uint64_t gpr[32]; | ||
38 | uint64_t pc; | ||
39 | @@ -XXX,XX +XXX,XX @@ typedef struct CPUArchState { | ||
40 | fpr_t fpr[32]; | ||
41 | bool cf[8]; | ||
42 | uint32_t fcsr0; | ||
43 | + lbt_t lbt; | ||
44 | |||
45 | uint32_t cpucfg[21]; | ||
46 | |||
47 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | ||
48 | index XXXXXXX..XXXXXXX 100644 | ||
49 | --- a/target/loongarch/kvm/kvm.c | ||
50 | +++ b/target/loongarch/kvm/kvm.c | ||
51 | @@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_put_regs_fp(CPUState *cs) | ||
52 | return ret; | ||
53 | } | ||
54 | |||
55 | +static int kvm_loongarch_put_lbt(CPUState *cs) | ||
56 | +{ | 21 | +{ |
57 | + CPULoongArchState *env = cpu_env(cs); | 22 | + MachineState *machine = MACHINE(lvms); |
58 | + uint64_t val; | 23 | + uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle; |
59 | + int ret; | 24 | + int i; |
60 | + | 25 | + |
61 | + /* check whether vm support LBT firstly */ | 26 | + create_fdt(lvms); |
62 | + if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) { | 27 | + fdt_add_cpu_nodes(lvms); |
63 | + return 0; | 28 | + fdt_add_memory_nodes(machine); |
29 | + fdt_add_fw_cfg_node(lvms); | ||
30 | + fdt_add_flash_node(lvms); | ||
31 | + | ||
32 | + /* Add cpu interrupt-controller */ | ||
33 | + fdt_add_cpuic_node(lvms, &cpuintc_phandle); | ||
34 | + /* Add Extend I/O Interrupt Controller node */ | ||
35 | + fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); | ||
36 | + /* Add PCH PIC node */ | ||
37 | + fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle); | ||
38 | + /* Add PCH MSI node */ | ||
39 | + fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle); | ||
40 | + /* Add pcie node */ | ||
41 | + fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle); | ||
42 | + | ||
43 | + /* | ||
44 | + * Create uart fdt node in reverse order so that they appear | ||
45 | + * in the finished device tree lowest address first | ||
46 | + */ | ||
47 | + for (i = VIRT_UART_COUNT; i-- > 0;) { | ||
48 | + hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE; | ||
49 | + int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE; | ||
50 | + fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0); | ||
64 | + } | 51 | + } |
65 | + | 52 | + |
66 | + /* set six LBT registers including scr0-scr3, eflags, ftop */ | 53 | + fdt_add_rtc_node(lvms, &pch_pic_phandle); |
67 | + ret = kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0); | 54 | + fdt_add_ged_reset(lvms); |
68 | + ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1); | 55 | + platform_bus_add_all_fdt_nodes(machine->fdt, "/platic", |
69 | + ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2); | 56 | + VIRT_PLATFORM_BUS_BASEADDRESS, |
70 | + ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3); | 57 | + VIRT_PLATFORM_BUS_SIZE, |
58 | + VIRT_PLATFORM_BUS_IRQ); | ||
59 | + | ||
71 | + /* | 60 | + /* |
72 | + * Be cautious, KVM_REG_LOONGARCH_LBT_FTOP is defined as 64-bit however | 61 | + * Since lowmem region starts from 0 and Linux kernel legacy start address |
73 | + * lbt.ftop is 32-bit; the same with KVM_REG_LOONGARCH_LBT_EFLAGS register | 62 | + * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer |
63 | + * access. FDT size limit with 1 MiB. | ||
64 | + * Put the FDT into the memory map as a ROM image: this will ensure | ||
65 | + * the FDT is copied again upon reset, even if addr points into RAM. | ||
74 | + */ | 66 | + */ |
75 | + val = env->lbt.eflags; | 67 | + qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size); |
76 | + ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val); | 68 | + rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE, |
77 | + val = env->lbt.ftop; | 69 | + &address_space_memory); |
78 | + ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val); | 70 | + qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds, |
79 | + | 71 | + rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size)); |
80 | + return ret; | ||
81 | +} | 72 | +} |
82 | + | 73 | + |
83 | +static int kvm_loongarch_get_lbt(CPUState *cs) | 74 | static void virt_done(Notifier *notifier, void *data) |
84 | +{ | ||
85 | + CPULoongArchState *env = cpu_env(cs); | ||
86 | + uint64_t val; | ||
87 | + int ret; | ||
88 | + | ||
89 | + /* check whether vm support LBT firstly */ | ||
90 | + if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) { | ||
91 | + return 0; | ||
92 | + } | ||
93 | + | ||
94 | + /* get six LBT registers including scr0-scr3, eflags, ftop */ | ||
95 | + ret = kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0); | ||
96 | + ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1); | ||
97 | + ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2); | ||
98 | + ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3); | ||
99 | + ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val); | ||
100 | + env->lbt.eflags = (uint32_t)val; | ||
101 | + ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val); | ||
102 | + env->lbt.ftop = (uint32_t)val; | ||
103 | + | ||
104 | + return ret; | ||
105 | +} | ||
106 | + | ||
107 | void kvm_arch_reset_vcpu(CPUState *cs) | ||
108 | { | 75 | { |
109 | CPULoongArchState *env = cpu_env(cs); | 76 | LoongArchVirtMachineState *lvms = container_of(notifier, |
110 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_get_registers(CPUState *cs, Error **errp) | 77 | LoongArchVirtMachineState, machine_done); |
111 | return ret; | 78 | virt_build_smbios(lvms); |
112 | } | 79 | loongarch_acpi_setup(lvms); |
113 | 80 | + virt_fdt_setup(lvms); | |
114 | + ret = kvm_loongarch_get_lbt(cs); | 81 | } |
115 | + if (ret) { | 82 | |
116 | + return ret; | 83 | static void virt_powerdown_req(Notifier *notifier, void *opaque) |
117 | + } | 84 | @@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic) |
118 | + | 85 | } |
119 | ret = kvm_loongarch_get_mpstate(cs); | 86 | |
120 | return ret; | 87 | static void virt_devices_init(DeviceState *pch_pic, |
121 | } | 88 | - LoongArchVirtMachineState *lvms, |
122 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_put_registers(CPUState *cs, int level, Error **errp) | 89 | - uint32_t *pch_pic_phandle, |
123 | return ret; | 90 | - uint32_t *pch_msi_phandle) |
124 | } | 91 | + LoongArchVirtMachineState *lvms) |
125 | |||
126 | + ret = kvm_loongarch_put_lbt(cs); | ||
127 | + if (ret) { | ||
128 | + return ret; | ||
129 | + } | ||
130 | + | ||
131 | ret = kvm_loongarch_put_mpstate(cs); | ||
132 | return ret; | ||
133 | } | ||
134 | diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c | ||
135 | index XXXXXXX..XXXXXXX 100644 | ||
136 | --- a/target/loongarch/machine.c | ||
137 | +++ b/target/loongarch/machine.c | ||
138 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_lasx = { | ||
139 | }, | ||
140 | }; | ||
141 | |||
142 | +static bool lbt_needed(void *opaque) | ||
143 | +{ | ||
144 | + LoongArchCPU *cpu = opaque; | ||
145 | + | ||
146 | + return !!FIELD_EX64(cpu->env.cpucfg[2], CPUCFG2, LBT_ALL); | ||
147 | +} | ||
148 | + | ||
149 | +static const VMStateDescription vmstate_lbt = { | ||
150 | + .name = "cpu/lbt", | ||
151 | + .version_id = 0, | ||
152 | + .minimum_version_id = 0, | ||
153 | + .needed = lbt_needed, | ||
154 | + .fields = (const VMStateField[]) { | ||
155 | + VMSTATE_UINT64(env.lbt.scr0, LoongArchCPU), | ||
156 | + VMSTATE_UINT64(env.lbt.scr1, LoongArchCPU), | ||
157 | + VMSTATE_UINT64(env.lbt.scr2, LoongArchCPU), | ||
158 | + VMSTATE_UINT64(env.lbt.scr3, LoongArchCPU), | ||
159 | + VMSTATE_UINT32(env.lbt.eflags, LoongArchCPU), | ||
160 | + VMSTATE_UINT32(env.lbt.ftop, LoongArchCPU), | ||
161 | + VMSTATE_END_OF_LIST() | ||
162 | + }, | ||
163 | +}; | ||
164 | + | ||
165 | #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) | ||
166 | static bool tlb_needed(void *opaque) | ||
167 | { | 92 | { |
168 | @@ -XXX,XX +XXX,XX @@ const VMStateDescription vmstate_loongarch_cpu = { | 93 | MachineClass *mc = MACHINE_GET_CLASS(lvms); |
169 | #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) | 94 | DeviceState *gpex_dev; |
170 | &vmstate_tlb, | 95 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, |
171 | #endif | 96 | gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); |
172 | + &vmstate_lbt, | 97 | } |
173 | NULL | 98 | |
174 | } | 99 | - /* Add pcie node */ |
175 | }; | 100 | - fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle); |
101 | - | ||
102 | /* | ||
103 | * Create uart fdt node in reverse order so that they appear | ||
104 | * in the finished device tree lowest address first | ||
105 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, | ||
106 | serial_mm_init(get_system_memory(), base, 0, | ||
107 | qdev_get_gpio_in(pch_pic, irq), | ||
108 | 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); | ||
109 | - fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0); | ||
110 | } | ||
111 | |||
112 | /* Network init */ | ||
113 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, | ||
114 | sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE, | ||
115 | qdev_get_gpio_in(pch_pic, | ||
116 | VIRT_RTC_IRQ - VIRT_GSI_BASE)); | ||
117 | - fdt_add_rtc_node(lvms, pch_pic_phandle); | ||
118 | - fdt_add_ged_reset(lvms); | ||
119 | |||
120 | /* acpi ged */ | ||
121 | lvms->acpi_ged = create_acpi_ged(pch_pic, lvms); | ||
122 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
123 | CPULoongArchState *env; | ||
124 | CPUState *cpu_state; | ||
125 | int cpu, pin, i, start, num; | ||
126 | - uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle; | ||
127 | |||
128 | /* | ||
129 | * Extended IRQ model. | ||
130 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
131 | memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR, | ||
132 | sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); | ||
133 | |||
134 | - /* Add cpu interrupt-controller */ | ||
135 | - fdt_add_cpuic_node(lvms, &cpuintc_phandle); | ||
136 | - | ||
137 | for (cpu = 0; cpu < ms->smp.cpus; cpu++) { | ||
138 | cpu_state = qemu_get_cpu(cpu); | ||
139 | cpudev = DEVICE(cpu_state); | ||
140 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
141 | } | ||
142 | } | ||
143 | |||
144 | - /* Add Extend I/O Interrupt Controller node */ | ||
145 | - fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); | ||
146 | - | ||
147 | pch_pic = qdev_new(TYPE_LOONGARCH_PIC); | ||
148 | num = VIRT_PCH_PIC_IRQ_NUM; | ||
149 | qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); | ||
150 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
151 | qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); | ||
152 | } | ||
153 | |||
154 | - /* Add PCH PIC node */ | ||
155 | - fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle); | ||
156 | - | ||
157 | pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); | ||
158 | start = num; | ||
159 | num = EXTIOI_IRQS - start; | ||
160 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
161 | qdev_get_gpio_in(extioi, i + start)); | ||
162 | } | ||
163 | |||
164 | - /* Add PCH MSI node */ | ||
165 | - fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle); | ||
166 | - | ||
167 | - virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle); | ||
168 | + virt_devices_init(pch_pic, lvms); | ||
169 | } | ||
170 | |||
171 | static void virt_firmware_init(LoongArchVirtMachineState *lvms) | ||
172 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
173 | cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); | ||
174 | } | ||
175 | |||
176 | - create_fdt(lvms); | ||
177 | - | ||
178 | /* Create IOCSR space */ | ||
179 | memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL, | ||
180 | machine, "iocsr", UINT64_MAX); | ||
181 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
182 | lacpu = LOONGARCH_CPU(cpu); | ||
183 | lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id; | ||
184 | } | ||
185 | - fdt_add_cpu_nodes(lvms); | ||
186 | - fdt_add_memory_nodes(machine); | ||
187 | fw_cfg_add_memory(machine); | ||
188 | |||
189 | /* Node0 memory */ | ||
190 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
191 | memmap_table, | ||
192 | sizeof(struct memmap_entry) * (memmap_entries)); | ||
193 | } | ||
194 | - fdt_add_fw_cfg_node(lvms); | ||
195 | - fdt_add_flash_node(lvms); | ||
196 | |||
197 | /* Initialize the IO interrupt subsystem */ | ||
198 | virt_irq_init(lvms); | ||
199 | - platform_bus_add_all_fdt_nodes(machine->fdt, "/platic", | ||
200 | - VIRT_PLATFORM_BUS_BASEADDRESS, | ||
201 | - VIRT_PLATFORM_BUS_SIZE, | ||
202 | - VIRT_PLATFORM_BUS_IRQ); | ||
203 | lvms->machine_done.notify = virt_done; | ||
204 | qemu_add_machine_init_done_notifier(&lvms->machine_done); | ||
205 | /* connect powerdown request */ | ||
206 | lvms->powerdown_notifier.notify = virt_powerdown_req; | ||
207 | qemu_register_powerdown_notifier(&lvms->powerdown_notifier); | ||
208 | |||
209 | - /* | ||
210 | - * Since lowmem region starts from 0 and Linux kernel legacy start address | ||
211 | - * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer | ||
212 | - * access. FDT size limit with 1 MiB. | ||
213 | - * Put the FDT into the memory map as a ROM image: this will ensure | ||
214 | - * the FDT is copied again upon reset, even if addr points into RAM. | ||
215 | - */ | ||
216 | - qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size); | ||
217 | - rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE, | ||
218 | - &address_space_memory); | ||
219 | - qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds, | ||
220 | - rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size)); | ||
221 | - | ||
222 | lvms->bootinfo.ram_size = ram_size; | ||
223 | loongarch_load_kernel(machine, &lvms->bootinfo); | ||
224 | } | ||
176 | -- | 225 | -- |
177 | 2.34.1 | 226 | 2.43.5 | diff view generated by jsdifflib |
1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | For CPU object, possible_cpu_arch_ids() function is used rather than |
---|---|---|---|
2 | 2 | smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus | |
3 | KVM LBT supports on LoongArch depends on the linux-header file | 3 | is not accurate for all possible CPU objects, possible_cpu_arch_ids() |
4 | kvm_para.h, also unistd_64.h is required by unistd.h on LoongArch | 4 | is used here. |
5 | since 6.11, otherwise there will be compiling error such as: | ||
6 | |||
7 | linux-headers/asm/unistd.h:3:10: fatal error: asm/unistd_64.h: No such file or directory | ||
8 | #include <asm/unistd_64.h> | ||
9 | 5 | ||
10 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
11 | Acked-by: Song Gao <gaosong@loongson.cn> | 7 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
12 | Message-Id: <20241017020708.1728620-2-maobibo@loongson.cn> | ||
13 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
14 | --- | 8 | --- |
15 | scripts/update-linux-headers.sh | 4 ++++ | 9 | hw/loongarch/virt.c | 39 +++++++++++++++++++++++++-------------- |
16 | 1 file changed, 4 insertions(+) | 10 | 1 file changed, 25 insertions(+), 14 deletions(-) |
17 | 11 | ||
18 | diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh | 12 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c |
19 | index XXXXXXX..XXXXXXX 100755 | 13 | index XXXXXXX..XXXXXXX 100644 |
20 | --- a/scripts/update-linux-headers.sh | 14 | --- a/hw/loongarch/virt.c |
21 | +++ b/scripts/update-linux-headers.sh | 15 | +++ b/hw/loongarch/virt.c |
22 | @@ -XXX,XX +XXX,XX @@ EOF | 16 | @@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms) |
23 | if [ $arch = riscv ]; then | 17 | static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) |
24 | cp "$hdrdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv/" | 18 | { |
25 | fi | 19 | int num; |
26 | + if [ $arch = loongarch ]; then | 20 | - const MachineState *ms = MACHINE(lvms); |
27 | + cp "$hdrdir/include/asm/kvm_para.h" "$output/linux-headers/asm-loongarch/" | 21 | - int smp_cpus = ms->smp.cpus; |
28 | + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-loongarch/" | 22 | + MachineState *ms = MACHINE(lvms); |
29 | + fi | 23 | + MachineClass *mc = MACHINE_GET_CLASS(ms); |
30 | done | 24 | + const CPUArchIdList *possible_cpus; |
31 | arch= | 25 | + LoongArchCPU *cpu; |
26 | + CPUState *cs; | ||
27 | + char *nodename, *map_path; | ||
28 | |||
29 | qemu_fdt_add_subnode(ms->fdt, "/cpus"); | ||
30 | qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1); | ||
31 | qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); | ||
32 | |||
33 | /* cpu nodes */ | ||
34 | - for (num = smp_cpus - 1; num >= 0; num--) { | ||
35 | - char *nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
36 | - LoongArchCPU *cpu = LOONGARCH_CPU(qemu_get_cpu(num)); | ||
37 | - CPUState *cs = CPU(cpu); | ||
38 | + possible_cpus = mc->possible_cpu_arch_ids(ms); | ||
39 | + for (num = 0; num < possible_cpus->len; num++) { | ||
40 | + cs = possible_cpus->cpus[num].cpu; | ||
41 | + if (cs == NULL) { | ||
42 | + continue; | ||
43 | + } | ||
44 | + | ||
45 | + nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
46 | + cpu = LOONGARCH_CPU(cs); | ||
47 | |||
48 | qemu_fdt_add_subnode(ms->fdt, nodename); | ||
49 | qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu"); | ||
50 | qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", | ||
51 | cpu->dtb_compatible); | ||
52 | - if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) { | ||
53 | + if (possible_cpus->cpus[num].props.has_node_id) { | ||
54 | qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id", | ||
55 | - ms->possible_cpus->cpus[cs->cpu_index].props.node_id); | ||
56 | + possible_cpus->cpus[num].props.node_id); | ||
57 | } | ||
58 | qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num); | ||
59 | qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", | ||
60 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) | ||
61 | |||
62 | /*cpu map */ | ||
63 | qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map"); | ||
64 | + for (num = 0; num < possible_cpus->len; num++) { | ||
65 | + cs = possible_cpus->cpus[num].cpu; | ||
66 | + if (cs == NULL) { | ||
67 | + continue; | ||
68 | + } | ||
69 | |||
70 | - for (num = smp_cpus - 1; num >= 0; num--) { | ||
71 | - char *cpu_path = g_strdup_printf("/cpus/cpu@%d", num); | ||
72 | - char *map_path; | ||
73 | - | ||
74 | + nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
75 | if (ms->smp.threads > 1) { | ||
76 | map_path = g_strdup_printf( | ||
77 | "/cpus/cpu-map/socket%d/core%d/thread%d", | ||
78 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) | ||
79 | num % ms->smp.cores); | ||
80 | } | ||
81 | qemu_fdt_add_path(ms->fdt, map_path); | ||
82 | - qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path); | ||
83 | + qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", nodename); | ||
84 | |||
85 | g_free(map_path); | ||
86 | - g_free(cpu_path); | ||
87 | + g_free(nodename); | ||
88 | } | ||
89 | } | ||
32 | 90 | ||
33 | -- | 91 | -- |
34 | 2.34.1 | 92 | 2.43.5 | diff view generated by jsdifflib |
1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | Like LBT feature, add type OnOffAuto for LSX feature setting. Also |
---|---|---|---|
2 | 2 | add LSX feature detection with new VM ioctl command, fallback to old | |
3 | Loongson Binary Translation (LBT) is used to accelerate binary | 3 | method if it is not supported. |
4 | translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM | ||
5 | eflags (eflags) and x87 fpu stack pointer (ftop). | ||
6 | |||
7 | Now LBT feature is added in kvm mode, not supported in TCG mode since | ||
8 | it is not emulated. Feature variable lbt is added with OnOffAuto type, | ||
9 | If lbt feature is not supported with KVM host, it reports error if there | ||
10 | is lbt=on command line. | ||
11 | |||
12 | If there is no any command line about lbt parameter, it checks whether | ||
13 | KVM host supports lbt feature and set the corresponding value in cpucfg. | ||
14 | 4 | ||
15 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
16 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 6 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
17 | Message-Id: <20240929070405.235200-2-maobibo@loongson.cn> | ||
18 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
19 | --- | 7 | --- |
20 | target/loongarch/cpu.c | 24 +++++++++++ | 8 | target/loongarch/cpu.c | 38 +++++++++++++++------------ |
21 | target/loongarch/cpu.h | 6 +++ | 9 | target/loongarch/cpu.h | 2 ++ |
22 | target/loongarch/kvm/kvm.c | 57 ++++++++++++++++++++++++++- | 10 | target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++ |
23 | target/loongarch/loongarch-qmp-cmds.c | 2 +- | 11 | 3 files changed, 77 insertions(+), 17 deletions(-) |
24 | 4 files changed, 87 insertions(+), 2 deletions(-) | ||
25 | 12 | ||
26 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c | 13 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c |
27 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
28 | --- a/target/loongarch/cpu.c | 15 | --- a/target/loongarch/cpu.c |
29 | +++ b/target/loongarch/cpu.c | 16 | +++ b/target/loongarch/cpu.c |
30 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lasx(Object *obj, bool value, Error **errp) | 17 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj) |
18 | { | ||
19 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
20 | CPULoongArchState *env = &cpu->env; | ||
21 | + uint32_t data = 0; | ||
22 | int i; | ||
23 | |||
24 | for (i = 0; i < 21; i++) { | ||
25 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj) | ||
26 | cpu->dtb_compatible = "loongarch,Loongson-3A5000"; | ||
27 | env->cpucfg[0] = 0x14c010; /* PRID */ | ||
28 | |||
29 | - uint32_t data = 0; | ||
30 | data = FIELD_DP32(data, CPUCFG1, ARCH, 2); | ||
31 | data = FIELD_DP32(data, CPUCFG1, PGMMU, 1); | ||
32 | data = FIELD_DP32(data, CPUCFG1, IOCSR, 1); | ||
33 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj) | ||
34 | { | ||
35 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
36 | CPULoongArchState *env = &cpu->env; | ||
37 | - | ||
38 | + uint32_t data = 0; | ||
39 | int i; | ||
40 | |||
41 | for (i = 0; i < 21; i++) { | ||
42 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj) | ||
43 | cpu->dtb_compatible = "loongarch,Loongson-1C103"; | ||
44 | env->cpucfg[0] = 0x148042; /* PRID */ | ||
45 | |||
46 | - uint32_t data = 0; | ||
47 | data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */ | ||
48 | data = FIELD_DP32(data, CPUCFG1, PGMMU, 1); | ||
49 | data = FIELD_DP32(data, CPUCFG1, IOCSR, 1); | ||
50 | @@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) | ||
51 | |||
52 | static bool loongarch_get_lsx(Object *obj, Error **errp) | ||
53 | { | ||
54 | - LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
55 | - bool ret; | ||
56 | - | ||
57 | - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { | ||
58 | - ret = true; | ||
59 | - } else { | ||
60 | - ret = false; | ||
61 | - } | ||
62 | - return ret; | ||
63 | + return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF; | ||
64 | } | ||
65 | |||
66 | static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | ||
67 | { | ||
68 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
69 | + uint32_t val; | ||
70 | |||
71 | - if (value) { | ||
72 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1); | ||
73 | - } else { | ||
74 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0); | ||
75 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0); | ||
76 | + cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
77 | + if (kvm_enabled()) { | ||
78 | + /* kvm feature detection in function kvm_arch_init_vcpu */ | ||
79 | + return; | ||
31 | } | 80 | } |
32 | } | 81 | + |
33 | 82 | + /* LSX feature detection in TCG mode */ | |
34 | +static bool loongarch_get_lbt(Object *obj, Error **errp) | 83 | + val = cpu->env.cpucfg[2]; |
35 | +{ | 84 | + if (cpu->lsx == ON_OFF_AUTO_ON) { |
36 | + return LOONGARCH_CPU(obj)->lbt != ON_OFF_AUTO_OFF; | 85 | + if (FIELD_EX32(val, CPUCFG2, LSX) == 0) { |
37 | +} | 86 | + error_setg(errp, "Failed to enable LSX in TCG mode"); |
38 | + | 87 | + return; |
39 | +static void loongarch_set_lbt(Object *obj, bool value, Error **errp) | 88 | + } |
40 | +{ | 89 | + } |
41 | + LoongArchCPU *cpu = LOONGARCH_CPU(obj); | 90 | + |
42 | + | 91 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value); |
43 | + cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | 92 | } |
44 | +} | 93 | |
45 | + | 94 | static bool loongarch_get_lasx(Object *obj, Error **errp) |
46 | void loongarch_cpu_post_init(Object *obj) | 95 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) |
47 | { | 96 | { |
48 | + LoongArchCPU *cpu = LOONGARCH_CPU(obj); | 97 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
49 | + | 98 | |
99 | + cpu->lsx = ON_OFF_AUTO_AUTO; | ||
50 | object_property_add_bool(obj, "lsx", loongarch_get_lsx, | 100 | object_property_add_bool(obj, "lsx", loongarch_get_lsx, |
51 | loongarch_set_lsx); | 101 | loongarch_set_lsx); |
52 | object_property_add_bool(obj, "lasx", loongarch_get_lasx, | 102 | object_property_add_bool(obj, "lasx", loongarch_get_lasx, |
53 | loongarch_set_lasx); | 103 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) |
54 | + /* lbt is enabled only in kvm mode, not supported in tcg mode */ | 104 | |
55 | + if (kvm_enabled()) { | 105 | } else { |
56 | + cpu->lbt = ON_OFF_AUTO_AUTO; | 106 | cpu->lbt = ON_OFF_AUTO_OFF; |
57 | + object_property_add_bool(obj, "lbt", loongarch_get_lbt, | 107 | + cpu->pmu = ON_OFF_AUTO_OFF; |
58 | + loongarch_set_lbt); | 108 | } |
59 | + object_property_set_description(obj, "lbt", | 109 | } |
60 | + "Set off to disable Binary Tranlation."); | 110 | |
61 | + } else { | ||
62 | + cpu->lbt = ON_OFF_AUTO_OFF; | ||
63 | + } | ||
64 | } | ||
65 | |||
66 | static void loongarch_cpu_init(Object *obj) | ||
67 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h | 111 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h |
68 | index XXXXXXX..XXXXXXX 100644 | 112 | index XXXXXXX..XXXXXXX 100644 |
69 | --- a/target/loongarch/cpu.h | 113 | --- a/target/loongarch/cpu.h |
70 | +++ b/target/loongarch/cpu.h | 114 | +++ b/target/loongarch/cpu.h |
71 | @@ -XXX,XX +XXX,XX @@ FIELD(CPUCFG2, LLFTP_VER, 15, 3) | 115 | @@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB; |
72 | FIELD(CPUCFG2, LBT_X86, 18, 1) | ||
73 | FIELD(CPUCFG2, LBT_ARM, 19, 1) | ||
74 | FIELD(CPUCFG2, LBT_MIPS, 20, 1) | ||
75 | +FIELD(CPUCFG2, LBT_ALL, 18, 3) | ||
76 | FIELD(CPUCFG2, LSPW, 21, 1) | ||
77 | FIELD(CPUCFG2, LAM, 22, 1) | ||
78 | |||
79 | @@ -XXX,XX +XXX,XX @@ struct LoongArchTLB { | ||
80 | typedef struct LoongArchTLB LoongArchTLB; | ||
81 | #endif | 116 | #endif |
82 | 117 | ||
83 | +enum loongarch_features { | 118 | enum loongarch_features { |
84 | + LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ | 119 | + LOONGARCH_FEATURE_LSX, |
85 | +}; | 120 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ |
86 | + | 121 | LOONGARCH_FEATURE_PMU, |
87 | typedef struct CPUArchState { | 122 | }; |
88 | uint64_t gpr[32]; | ||
89 | uint64_t pc; | ||
90 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { | 123 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { |
91 | CPULoongArchState env; | ||
92 | QEMUTimer timer; | ||
93 | uint32_t phy_id; | 124 | uint32_t phy_id; |
94 | + OnOffAuto lbt; | 125 | OnOffAuto lbt; |
126 | OnOffAuto pmu; | ||
127 | + OnOffAuto lsx; | ||
95 | 128 | ||
96 | /* 'compatible' string for this CPU for Linux device trees */ | 129 | /* 'compatible' string for this CPU for Linux device trees */ |
97 | const char *dtb_compatible; | 130 | const char *dtb_compatible; |
98 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | 131 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c |
99 | index XXXXXXX..XXXXXXX 100644 | 132 | index XXXXXXX..XXXXXXX 100644 |
100 | --- a/target/loongarch/kvm/kvm.c | 133 | --- a/target/loongarch/kvm/kvm.c |
101 | +++ b/target/loongarch/kvm/kvm.c | 134 | +++ b/target/loongarch/kvm/kvm.c |
102 | @@ -XXX,XX +XXX,XX @@ | 135 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) |
103 | #include <sys/ioctl.h> | 136 | { |
104 | #include <linux/kvm.h> | 137 | int ret; |
105 | 138 | struct kvm_device_attr attr; | |
106 | +#include "qapi/error.h" | 139 | + uint64_t val; |
107 | #include "qemu/timer.h" | 140 | |
108 | #include "qemu/error-report.h" | 141 | switch (feature) { |
109 | #include "qemu/main-loop.h" | 142 | + case LOONGARCH_FEATURE_LSX: |
110 | @@ -XXX,XX +XXX,XX @@ static void kvm_loongarch_vm_stage_change(void *opaque, bool running, | ||
111 | } | ||
112 | } | ||
113 | |||
114 | +static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | ||
115 | +{ | ||
116 | + int ret; | ||
117 | + struct kvm_device_attr attr; | ||
118 | + | ||
119 | + switch (feature) { | ||
120 | + case LOONGARCH_FEATURE_LBT: | ||
121 | + /* | ||
122 | + * Return all if all the LBT features are supported such as: | ||
123 | + * KVM_LOONGARCH_VM_FEAT_X86BT | ||
124 | + * KVM_LOONGARCH_VM_FEAT_ARMBT | ||
125 | + * KVM_LOONGARCH_VM_FEAT_MIPSBT | ||
126 | + */ | ||
127 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; | 143 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; |
128 | + attr.attr = KVM_LOONGARCH_VM_FEAT_X86BT; | 144 | + attr.attr = KVM_LOONGARCH_VM_FEAT_LSX; |
129 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | 145 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
130 | + attr.attr = KVM_LOONGARCH_VM_FEAT_ARMBT; | 146 | + if (ret == 0) { |
131 | + ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | 147 | + return true; |
132 | + attr.attr = KVM_LOONGARCH_VM_FEAT_MIPSBT; | 148 | + } |
133 | + ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | 149 | + |
134 | + return (ret == 0); | 150 | + /* Fallback to old kernel detect interface */ |
135 | + default: | 151 | + val = 0; |
152 | + attr.group = KVM_LOONGARCH_VCPU_CPUCFG; | ||
153 | + /* Cpucfg2 */ | ||
154 | + attr.attr = 2; | ||
155 | + attr.addr = (uint64_t)&val; | ||
156 | + ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); | ||
157 | + if (!ret) { | ||
158 | + ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); | ||
159 | + if (ret) { | ||
160 | + return false; | ||
161 | + } | ||
162 | + | ||
163 | + ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX); | ||
164 | + return (ret != 0); | ||
165 | + } | ||
136 | + return false; | 166 | + return false; |
137 | + } | 167 | + |
138 | +} | 168 | case LOONGARCH_FEATURE_LBT: |
139 | + | 169 | /* |
140 | +static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) | 170 | * Return all if all the LBT features are supported such as: |
171 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | ||
172 | return false; | ||
173 | } | ||
174 | |||
175 | +static int kvm_cpu_check_lsx(CPUState *cs, Error **errp) | ||
141 | +{ | 176 | +{ |
142 | + CPULoongArchState *env = cpu_env(cs); | 177 | + CPULoongArchState *env = cpu_env(cs); |
143 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); | 178 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
144 | + bool kvm_supported; | 179 | + bool kvm_supported; |
145 | + | 180 | + |
146 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LBT); | 181 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX); |
147 | + if (cpu->lbt == ON_OFF_AUTO_ON) { | 182 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0); |
183 | + if (cpu->lsx == ON_OFF_AUTO_ON) { | ||
148 | + if (kvm_supported) { | 184 | + if (kvm_supported) { |
149 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7); | 185 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); |
150 | + } else { | 186 | + } else { |
151 | + error_setg(errp, "'lbt' feature not supported by KVM on this host"); | 187 | + error_setg(errp, "'lsx' feature not supported by KVM on this host"); |
152 | + return -ENOTSUP; | 188 | + return -ENOTSUP; |
153 | + } | 189 | + } |
154 | + } else if ((cpu->lbt == ON_OFF_AUTO_AUTO) && kvm_supported) { | 190 | + } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) { |
155 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7); | 191 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); |
156 | + } | 192 | + } |
157 | + | 193 | + |
158 | + return 0; | 194 | + return 0; |
159 | +} | 195 | +} |
160 | + | 196 | + |
161 | int kvm_arch_init_vcpu(CPUState *cs) | 197 | static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) |
162 | { | 198 | { |
163 | uint64_t val; | 199 | CPULoongArchState *env = cpu_env(cs); |
164 | + int ret; | 200 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs) |
165 | + Error *local_err = NULL; | ||
166 | |||
167 | + ret = 0; | ||
168 | qemu_add_vm_change_state_handler(kvm_loongarch_vm_stage_change, cs); | ||
169 | |||
170 | if (!kvm_get_one_reg(cs, KVM_REG_LOONGARCH_DEBUG_INST, &val)) { | ||
171 | brk_insn = val; | 201 | brk_insn = val; |
172 | } | 202 | } |
173 | 203 | ||
174 | - return 0; | 204 | + ret = kvm_cpu_check_lsx(cs, &local_err); |
175 | + ret = kvm_cpu_check_lbt(cs, &local_err); | ||
176 | + if (ret < 0) { | 205 | + if (ret < 0) { |
177 | + error_report_err(local_err); | 206 | + error_report_err(local_err); |
178 | + } | 207 | + } |
179 | + return ret; | 208 | + |
180 | } | 209 | ret = kvm_cpu_check_lbt(cs, &local_err); |
181 | 210 | if (ret < 0) { | |
182 | int kvm_arch_destroy_vcpu(CPUState *cs) | 211 | error_report_err(local_err); |
183 | diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c | ||
184 | index XXXXXXX..XXXXXXX 100644 | ||
185 | --- a/target/loongarch/loongarch-qmp-cmds.c | ||
186 | +++ b/target/loongarch/loongarch-qmp-cmds.c | ||
187 | @@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) | ||
188 | } | ||
189 | |||
190 | static const char *cpu_model_advertised_features[] = { | ||
191 | - "lsx", "lasx", NULL | ||
192 | + "lsx", "lasx", "lbt", NULL | ||
193 | }; | ||
194 | |||
195 | CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, | ||
196 | -- | 212 | -- |
197 | 2.34.1 | 213 | 2.43.5 | diff view generated by jsdifflib |
1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | Like LSX feature, add type OnOffAuto for LASX feature setting. |
---|---|---|---|
2 | 2 | ||
3 | Implement PMU extension for LoongArch kvm mode. Use OnOffAuto type | ||
4 | variable pmu to check the PMU feature. If the PMU Feature is not supported | ||
5 | with KVM host, it reports error if there is pmu=on command line. | ||
6 | |||
7 | If there is no any command line about pmu parameter, it checks whether | ||
8 | KVM host supports the PMU Feature and set the corresponding value in cpucfg. | ||
9 | |||
10 | This patch is based on lbt patch located at | ||
11 | https://lore.kernel.org/qemu-devel/20240904061859.86615-1-maobibo@loongson.cn | ||
12 | |||
13 | Co-developed-by: Song Gao <gaosong@loongson.cn> | ||
14 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 3 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
15 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 4 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
16 | Message-Id: <20240918082315.2345034-1-maobibo@loongson.cn> | ||
17 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
18 | --- | 5 | --- |
19 | target/loongarch/cpu.c | 19 +++++++++++++ | 6 | target/loongarch/cpu.c | 50 +++++++++++++++++++++++------------ |
20 | target/loongarch/cpu.h | 2 ++ | 7 | target/loongarch/cpu.h | 2 ++ |
21 | target/loongarch/kvm/kvm.c | 41 +++++++++++++++++++++++++++ | 8 | target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++ |
22 | target/loongarch/loongarch-qmp-cmds.c | 2 +- | 9 | 3 files changed, 89 insertions(+), 16 deletions(-) |
23 | 4 files changed, 63 insertions(+), 1 deletion(-) | ||
24 | 10 | ||
25 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c | 11 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c |
26 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
27 | --- a/target/loongarch/cpu.c | 13 | --- a/target/loongarch/cpu.c |
28 | +++ b/target/loongarch/cpu.c | 14 | +++ b/target/loongarch/cpu.c |
29 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lbt(Object *obj, bool value, Error **errp) | 15 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) |
30 | cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | 16 | uint32_t val; |
17 | |||
18 | cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
19 | + if (cpu->lsx == ON_OFF_AUTO_OFF) { | ||
20 | + cpu->lasx = ON_OFF_AUTO_OFF; | ||
21 | + if (cpu->lasx == ON_OFF_AUTO_ON) { | ||
22 | + error_setg(errp, "Failed to disable LSX since LASX is enabled"); | ||
23 | + return; | ||
24 | + } | ||
25 | + } | ||
26 | + | ||
27 | if (kvm_enabled()) { | ||
28 | /* kvm feature detection in function kvm_arch_init_vcpu */ | ||
29 | return; | ||
30 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | ||
31 | error_setg(errp, "Failed to enable LSX in TCG mode"); | ||
32 | return; | ||
33 | } | ||
34 | + } else { | ||
35 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0); | ||
36 | + val = cpu->env.cpucfg[2]; | ||
37 | } | ||
38 | |||
39 | cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value); | ||
40 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | ||
41 | |||
42 | static bool loongarch_get_lasx(Object *obj, Error **errp) | ||
43 | { | ||
44 | - LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
45 | - bool ret; | ||
46 | - | ||
47 | - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) { | ||
48 | - ret = true; | ||
49 | - } else { | ||
50 | - ret = false; | ||
51 | - } | ||
52 | - return ret; | ||
53 | + return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF; | ||
31 | } | 54 | } |
32 | 55 | ||
33 | +static bool loongarch_get_pmu(Object *obj, Error **errp) | 56 | static void loongarch_set_lasx(Object *obj, bool value, Error **errp) |
34 | +{ | ||
35 | + return LOONGARCH_CPU(obj)->pmu != ON_OFF_AUTO_OFF; | ||
36 | +} | ||
37 | + | ||
38 | +static void loongarch_set_pmu(Object *obj, bool value, Error **errp) | ||
39 | +{ | ||
40 | + LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
41 | + | ||
42 | + cpu->pmu = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
43 | +} | ||
44 | + | ||
45 | void loongarch_cpu_post_init(Object *obj) | ||
46 | { | 57 | { |
47 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | 58 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
59 | + uint32_t val; | ||
60 | |||
61 | - if (value) { | ||
62 | - if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { | ||
63 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1); | ||
64 | - } | ||
65 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1); | ||
66 | - } else { | ||
67 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0); | ||
68 | + cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
69 | + if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) { | ||
70 | + error_setg(errp, "Failed to enable LASX since lSX is disabled"); | ||
71 | + return; | ||
72 | + } | ||
73 | + | ||
74 | + if (kvm_enabled()) { | ||
75 | + /* kvm feature detection in function kvm_arch_init_vcpu */ | ||
76 | + return; | ||
77 | } | ||
78 | + | ||
79 | + /* LASX feature detection in TCG mode */ | ||
80 | + val = cpu->env.cpucfg[2]; | ||
81 | + if (cpu->lasx == ON_OFF_AUTO_ON) { | ||
82 | + if (FIELD_EX32(val, CPUCFG2, LASX) == 0) { | ||
83 | + error_setg(errp, "Failed to enable LASX in TCG mode"); | ||
84 | + return; | ||
85 | + } | ||
86 | + } | ||
87 | + | ||
88 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value); | ||
89 | } | ||
90 | |||
91 | static bool loongarch_get_lbt(Object *obj, Error **errp) | ||
48 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) | 92 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) |
49 | loongarch_set_lbt); | 93 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
50 | object_property_set_description(obj, "lbt", | 94 | |
51 | "Set off to disable Binary Tranlation."); | 95 | cpu->lsx = ON_OFF_AUTO_AUTO; |
52 | + | 96 | + cpu->lasx = ON_OFF_AUTO_AUTO; |
53 | + cpu->pmu = ON_OFF_AUTO_AUTO; | 97 | object_property_add_bool(obj, "lsx", loongarch_get_lsx, |
54 | + object_property_add_bool(obj, "pmu", loongarch_get_pmu, | 98 | loongarch_set_lsx); |
55 | + loongarch_set_pmu); | 99 | object_property_add_bool(obj, "lasx", loongarch_get_lasx, |
56 | + object_property_set_description(obj, "pmu", | ||
57 | + "Set off to performance monitor unit."); | ||
58 | + | ||
59 | } else { | ||
60 | cpu->lbt = ON_OFF_AUTO_OFF; | ||
61 | } | ||
62 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h | 100 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h |
63 | index XXXXXXX..XXXXXXX 100644 | 101 | index XXXXXXX..XXXXXXX 100644 |
64 | --- a/target/loongarch/cpu.h | 102 | --- a/target/loongarch/cpu.h |
65 | +++ b/target/loongarch/cpu.h | 103 | +++ b/target/loongarch/cpu.h |
66 | @@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB; | 104 | @@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB; |
67 | 105 | ||
68 | enum loongarch_features { | 106 | enum loongarch_features { |
107 | LOONGARCH_FEATURE_LSX, | ||
108 | + LOONGARCH_FEATURE_LASX, | ||
69 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ | 109 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ |
70 | + LOONGARCH_FEATURE_PMU, | 110 | LOONGARCH_FEATURE_PMU, |
71 | }; | 111 | }; |
72 | |||
73 | typedef struct LoongArchBT { | ||
74 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { | 112 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { |
75 | QEMUTimer timer; | ||
76 | uint32_t phy_id; | ||
77 | OnOffAuto lbt; | 113 | OnOffAuto lbt; |
78 | + OnOffAuto pmu; | 114 | OnOffAuto pmu; |
115 | OnOffAuto lsx; | ||
116 | + OnOffAuto lasx; | ||
79 | 117 | ||
80 | /* 'compatible' string for this CPU for Linux device trees */ | 118 | /* 'compatible' string for this CPU for Linux device trees */ |
81 | const char *dtb_compatible; | 119 | const char *dtb_compatible; |
82 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | 120 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c |
83 | index XXXXXXX..XXXXXXX 100644 | 121 | index XXXXXXX..XXXXXXX 100644 |
84 | --- a/target/loongarch/kvm/kvm.c | 122 | --- a/target/loongarch/kvm/kvm.c |
85 | +++ b/target/loongarch/kvm/kvm.c | 123 | +++ b/target/loongarch/kvm/kvm.c |
86 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | 124 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) |
87 | attr.attr = KVM_LOONGARCH_VM_FEAT_MIPSBT; | 125 | } |
88 | ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | 126 | return false; |
89 | return (ret == 0); | 127 | |
128 | + case LOONGARCH_FEATURE_LASX: | ||
129 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; | ||
130 | + attr.attr = KVM_LOONGARCH_VM_FEAT_LASX; | ||
131 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | ||
132 | + if (ret == 0) { | ||
133 | + return true; | ||
134 | + } | ||
90 | + | 135 | + |
91 | + case LOONGARCH_FEATURE_PMU: | 136 | + /* Fallback to old kernel detect interface */ |
92 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; | 137 | + val = 0; |
93 | + attr.attr = KVM_LOONGARCH_VM_FEAT_PMU; | 138 | + attr.group = KVM_LOONGARCH_VCPU_CPUCFG; |
94 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | 139 | + /* Cpucfg2 */ |
95 | + return (ret == 0); | 140 | + attr.attr = 2; |
141 | + attr.addr = (uint64_t)&val; | ||
142 | + ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); | ||
143 | + if (!ret) { | ||
144 | + ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); | ||
145 | + if (ret) { | ||
146 | + return false; | ||
147 | + } | ||
96 | + | 148 | + |
97 | default: | 149 | + ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX); |
98 | return false; | 150 | + return (ret != 0); |
99 | } | 151 | + } |
152 | + return false; | ||
100 | + | 153 | + |
101 | + return false; | 154 | case LOONGARCH_FEATURE_LBT: |
102 | } | 155 | /* |
103 | 156 | * Return all if all the LBT features are supported such as: | |
104 | static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) | 157 | @@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp) |
105 | @@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) | ||
106 | return 0; | 158 | return 0; |
107 | } | 159 | } |
108 | 160 | ||
109 | +static int kvm_cpu_check_pmu(CPUState *cs, Error **errp) | 161 | +static int kvm_cpu_check_lasx(CPUState *cs, Error **errp) |
110 | +{ | 162 | +{ |
163 | + CPULoongArchState *env = cpu_env(cs); | ||
111 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); | 164 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
112 | + CPULoongArchState *env = cpu_env(cs); | ||
113 | + bool kvm_supported; | 165 | + bool kvm_supported; |
114 | + | 166 | + |
115 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_PMU); | 167 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX); |
116 | + if (cpu->pmu == ON_OFF_AUTO_ON) { | 168 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0); |
117 | + if (!kvm_supported) { | 169 | + if (cpu->lasx == ON_OFF_AUTO_ON) { |
118 | + error_setg(errp, "'pmu' feature not supported by KVM on the host"); | 170 | + if (kvm_supported) { |
171 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1); | ||
172 | + } else { | ||
173 | + error_setg(errp, "'lasx' feature not supported by KVM on host"); | ||
119 | + return -ENOTSUP; | 174 | + return -ENOTSUP; |
120 | + } | 175 | + } |
121 | + } else if (cpu->pmu != ON_OFF_AUTO_AUTO) { | 176 | + } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) { |
122 | + /* disable pmu if ON_OFF_AUTO_OFF is set */ | 177 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1); |
123 | + kvm_supported = false; | ||
124 | + } | 178 | + } |
125 | + | 179 | + |
126 | + if (kvm_supported) { | ||
127 | + env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMP, 1); | ||
128 | + env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMNUM, 3); | ||
129 | + env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMBITS, 63); | ||
130 | + env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, UPM, 1); | ||
131 | + } | ||
132 | + return 0; | 180 | + return 0; |
133 | +} | 181 | +} |
134 | + | 182 | + |
135 | int kvm_arch_init_vcpu(CPUState *cs) | 183 | static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) |
136 | { | 184 | { |
137 | uint64_t val; | 185 | CPULoongArchState *env = cpu_env(cs); |
138 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs) | 186 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs) |
139 | if (ret < 0) { | ||
140 | error_report_err(local_err); | 187 | error_report_err(local_err); |
141 | } | 188 | } |
142 | + | 189 | |
143 | + ret = kvm_cpu_check_pmu(cs, &local_err); | 190 | + ret = kvm_cpu_check_lasx(cs, &local_err); |
144 | + if (ret < 0) { | 191 | + if (ret < 0) { |
145 | + error_report_err(local_err); | 192 | + error_report_err(local_err); |
146 | + } | 193 | + } |
147 | + | 194 | + |
148 | return ret; | 195 | ret = kvm_cpu_check_lbt(cs, &local_err); |
149 | } | 196 | if (ret < 0) { |
150 | 197 | error_report_err(local_err); | |
151 | diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c | ||
152 | index XXXXXXX..XXXXXXX 100644 | ||
153 | --- a/target/loongarch/loongarch-qmp-cmds.c | ||
154 | +++ b/target/loongarch/loongarch-qmp-cmds.c | ||
155 | @@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) | ||
156 | } | ||
157 | |||
158 | static const char *cpu_model_advertised_features[] = { | ||
159 | - "lsx", "lasx", "lbt", NULL | ||
160 | + "lsx", "lasx", "lbt", "pmu", NULL | ||
161 | }; | ||
162 | |||
163 | CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, | ||
164 | -- | 198 | -- |
165 | 2.34.1 | 199 | 2.43.5 | diff view generated by jsdifflib |