The following changes since commit 6f625ce2f21d6a1243065d236298277c56f972d5:

Merge tag 'pull-request-2024-10-21' of https://gitlab.com/thuth/qemu into staging (2024-10-21 17:12:59 +0100)

https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20241024

for you to fetch changes up to c44e0d6ba280dcc6bdf4ed555020c61d564b526c:

target/loongarch: Add steal time support on migration (2024-10-24 17:27:55 +0800)

pull-loongarch-20241024

Bibo Mao (6):

target/loongarch: Add loongson binary translation feature

target/loongarch: Implement lbt registers save/restore function

target/loongarch/kvm: Implement LoongArch PMU extension

linux-headers: loongarch: Add kvm_para.h and unistd_64.h

linux-headers: Update to Linux v6.12-rc3

target/loongarch: Add steal time support on migration

include/standard-headers/drm/drm_fourcc.h | 43 +++

include/standard-headers/linux/const.h | 17 ++

include/standard-headers/linux/ethtool.h | 226 +++++++++++++++

include/standard-headers/linux/fuse.h | 22 +-

include/standard-headers/linux/input-event-codes.h | 2 +

include/standard-headers/linux/pci_regs.h | 41 ++-

include/standard-headers/linux/virtio_balloon.h | 16 +-

include/standard-headers/linux/virtio_gpu.h | 1 +

linux-headers/asm-arm64/mman.h | 9 +

linux-headers/asm-arm64/unistd.h | 25 +-

linux-headers/asm-generic/unistd.h | 6 +-

linux-headers/asm-loongarch/kvm.h | 24 ++

linux-headers/asm-loongarch/kvm_para.h | 21 ++

linux-headers/asm-loongarch/unistd.h | 4 +-

linux-headers/asm-loongarch/unistd_64.h | 320 +++++++++++++++++++++

linux-headers/asm-riscv/kvm.h | 7 +

linux-headers/asm-riscv/unistd.h | 41 +--

linux-headers/asm-x86/kvm.h | 2 +

linux-headers/asm-x86/unistd_64.h | 1 +

linux-headers/asm-x86/unistd_x32.h | 1 +

linux-headers/linux/bits.h | 3 +

linux-headers/linux/const.h | 17 ++

linux-headers/linux/iommufd.h | 143 +++++++--

linux-headers/linux/kvm.h | 23 +-

linux-headers/linux/mman.h | 1 +

linux-headers/linux/psp-sev.h | 28 ++

scripts/update-linux-headers.sh | 4 +

target/loongarch/cpu.c | 43 +++

target/loongarch/cpu.h | 23 ++

target/loongarch/kvm/kvm.c | 225 ++++++++++++++-

target/loongarch/loongarch-qmp-cmds.c | 2 +-

target/loongarch/machine.c | 30 +-

32 files changed, 1274 insertions(+), 97 deletions(-)

create mode 100644 linux-headers/asm-loongarch/kvm_para.h

create mode 100644 linux-headers/asm-loongarch/unistd_64.h

From: Bibo Mao <maobibo@loongson.cn>

KVM LBT supports on LoongArch depends on the linux-header file

kvm_para.h, also unistd_64.h is required by unistd.h on LoongArch

since 6.11, otherwise there will be compiling error such as:

linux-headers/asm/unistd.h:3:10: fatal error: asm/unistd_64.h: No such file or directory

#include <asm/unistd_64.h>

Acked-by: Song Gao <gaosong@loongson.cn>

Message-Id: <20241017020708.1728620-2-maobibo@loongson.cn>

Signed-off-by: Song Gao <gaosong@loongson.cn>

scripts/update-linux-headers.sh | 4 ++++

1 file changed, 4 insertions(+)

diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh

index XXXXXXX..XXXXXXX 100755

--- a/scripts/update-linux-headers.sh

+++ b/scripts/update-linux-headers.sh

@@ -XXX,XX +XXX,XX @@ EOF

if [ $arch = riscv ]; then

cp "$hdrdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv/"

fi

+ if [ $arch = loongarch ]; then

+ cp "$hdrdir/include/asm/kvm_para.h" "$output/linux-headers/asm-loongarch/"

+ cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-loongarch/"

+ fi

done

arch=

2.34.1

From: Bibo Mao <maobibo@loongson.cn>

Loongson Binary Translation (LBT) is used to accelerate binary

translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM

eflags (eflags) and x87 fpu stack pointer (ftop).

Now LBT feature is added in kvm mode, not supported in TCG mode since

it is not emulated. Feature variable lbt is added with OnOffAuto type,

If lbt feature is not supported with KVM host, it reports error if there

is lbt=on command line.

If there is no any command line about lbt parameter, it checks whether

KVM host supports lbt feature and set the corresponding value in cpucfg.

target/loongarch/cpu.c | 24 +++++++++++

target/loongarch/cpu.h | 6 +++

target/loongarch/kvm/kvm.c | 57 ++++++++++++++++++++++++++-

target/loongarch/loongarch-qmp-cmds.c | 2 +-

4 files changed, 87 insertions(+), 2 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c

--- a/target/loongarch/cpu.c

+++ b/target/loongarch/cpu.c

@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lasx(Object *obj, bool value, Error **errp)

}

+static bool loongarch_get_lbt(Object *obj, Error **errp)

+ return LOONGARCH_CPU(obj)->lbt != ON_OFF_AUTO_OFF;

+}

+static void loongarch_set_lbt(Object *obj, bool value, Error **errp)

+{

+ LoongArchCPU *cpu = LOONGARCH_CPU(obj);

+

+ cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;

+}

+

void loongarch_cpu_post_init(Object *obj)

{

+ LoongArchCPU *cpu = LOONGARCH_CPU(obj);

+

object_property_add_bool(obj, "lsx", loongarch_get_lsx,

loongarch_set_lsx);

object_property_add_bool(obj, "lasx", loongarch_get_lasx,

loongarch_set_lasx);

+ /* lbt is enabled only in kvm mode, not supported in tcg mode */

+ if (kvm_enabled()) {

+ cpu->lbt = ON_OFF_AUTO_AUTO;

+ object_property_add_bool(obj, "lbt", loongarch_get_lbt,

+ loongarch_set_lbt);

+ object_property_set_description(obj, "lbt",

+ "Set off to disable Binary Tranlation.");

+ } else {

+ cpu->lbt = ON_OFF_AUTO_OFF;

+ }

}

static void loongarch_cpu_init(Object *obj)

diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/cpu.h

+++ b/target/loongarch/cpu.h

@@ -XXX,XX +XXX,XX @@ FIELD(CPUCFG2, LLFTP_VER, 15, 3)

FIELD(CPUCFG2, LBT_X86, 18, 1)

FIELD(CPUCFG2, LBT_ARM, 19, 1)

FIELD(CPUCFG2, LBT_MIPS, 20, 1)

+FIELD(CPUCFG2, LBT_ALL, 18, 3)

FIELD(CPUCFG2, LSPW, 21, 1)

FIELD(CPUCFG2, LAM, 22, 1)

@@ -XXX,XX +XXX,XX @@ struct LoongArchTLB {

typedef struct LoongArchTLB LoongArchTLB;

#endif

+enum loongarch_features {

+ LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */

+};

+

typedef struct CPUArchState {

uint64_t gpr[32];

uint64_t pc;

@@ -XXX,XX +XXX,XX @@ struct ArchCPU {

CPULoongArchState env;

QEMUTimer timer;

uint32_t phy_id;

+ OnOffAuto lbt;

/* 'compatible' string for this CPU for Linux device trees */

const char *dtb_compatible;

diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/kvm/kvm.c

+++ b/target/loongarch/kvm/kvm.c

@@ -XXX,XX +XXX,XX @@

#include <sys/ioctl.h>

#include <linux/kvm.h>

+#include "qapi/error.h"

#include "qemu/timer.h"

#include "qemu/error-report.h"

#include "qemu/main-loop.h"

@@ -XXX,XX +XXX,XX @@ static void kvm_loongarch_vm_stage_change(void *opaque, bool running,

}

}

+static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)

+{

+ int ret;

+ struct kvm_device_attr attr;

+

+ switch (feature) {

+ case LOONGARCH_FEATURE_LBT:

+ /*

+ * Return all if all the LBT features are supported such as:

+ * KVM_LOONGARCH_VM_FEAT_X86BT

+ * KVM_LOONGARCH_VM_FEAT_ARMBT

+ * KVM_LOONGARCH_VM_FEAT_MIPSBT

+ */

+ attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;

+ attr.attr = KVM_LOONGARCH_VM_FEAT_X86BT;

+ ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);

+ attr.attr = KVM_LOONGARCH_VM_FEAT_ARMBT;

+ ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);

+ attr.attr = KVM_LOONGARCH_VM_FEAT_MIPSBT;

+ ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);

+ return (ret == 0);

+ default:

+ return false;

+static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)

+{

+ CPULoongArchState *env = cpu_env(cs);

+ LoongArchCPU *cpu = LOONGARCH_CPU(cs);

+ bool kvm_supported;

+

+ kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LBT);

+ if (cpu->lbt == ON_OFF_AUTO_ON) {

+ if (kvm_supported) {

+ env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7);

+ } else {

+ error_setg(errp, "'lbt' feature not supported by KVM on this host");

+ return -ENOTSUP;

+ }

+ } else if ((cpu->lbt == ON_OFF_AUTO_AUTO) && kvm_supported) {

+ env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7);

+ }

+

+ return 0;

+}

+

int kvm_arch_init_vcpu(CPUState *cs)

uint64_t val;

+ int ret;

+ ret = 0;

qemu_add_vm_change_state_handler(kvm_loongarch_vm_stage_change, cs);

if (!kvm_get_one_reg(cs, KVM_REG_LOONGARCH_DEBUG_INST, &val)) {

brk_insn = val;

- return 0;

+ ret = kvm_cpu_check_lbt(cs, &local_err);

+ if (ret < 0) {

+ error_report_err(local_err);

+ }

+ return ret;

int kvm_arch_destroy_vcpu(CPUState *cs)

diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c

index XXXXXXX..XXXXXXX 100644

--- a/target/loongarch/loongarch-qmp-cmds.c

+++ b/target/loongarch/loongarch-qmp-cmds.c

@@ -XXX,XX +XXX,XX @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)

static const char *cpu_model_advertised_features[] = {

- "lsx", "lasx", NULL

+ "lsx", "lasx", "lbt", NULL

};

CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,

2.34.1

From: Bibo Mao <maobibo@loongson.cn>

This update contains the required header changes for LoongArch

KVM LBT feature.

Acked-by: Song Gao <gaosong@loongson.cn>

Message-Id: <20241017020708.1728620-3-maobibo@loongson.cn>

Signed-off-by: Song Gao <gaosong@loongson.cn>

include/standard-headers/drm/drm_fourcc.h | 43 +++

include/standard-headers/linux/const.h | 17 +

include/standard-headers/linux/ethtool.h | 226 +++++++++++++

include/standard-headers/linux/fuse.h | 22 +-

.../linux/input-event-codes.h | 2 +

include/standard-headers/linux/pci_regs.h | 41 ++-

.../standard-headers/linux/virtio_balloon.h | 16 +-

include/standard-headers/linux/virtio_gpu.h | 1 +

linux-headers/asm-arm64/mman.h | 9 +

linux-headers/asm-arm64/unistd.h | 25 +-

linux-headers/asm-generic/unistd.h | 6 +-

linux-headers/asm-loongarch/kvm.h | 24 ++

linux-headers/asm-loongarch/kvm_para.h | 21 ++

linux-headers/asm-loongarch/unistd.h | 4 +-

linux-headers/asm-loongarch/unistd_64.h | 320 ++++++++++++++++++

linux-headers/asm-riscv/kvm.h | 7 +

linux-headers/asm-riscv/unistd.h | 41 +--

linux-headers/asm-x86/kvm.h | 2 +

linux-headers/asm-x86/unistd_64.h | 1 +

linux-headers/asm-x86/unistd_x32.h | 1 +

linux-headers/linux/bits.h | 3 +

linux-headers/linux/const.h | 17 +

linux-headers/linux/iommufd.h | 143 ++++++--

linux-headers/linux/kvm.h | 23 +-

linux-headers/linux/mman.h | 1 +

linux-headers/linux/psp-sev.h | 28 ++

26 files changed, 951 insertions(+), 93 deletions(-)

create mode 100644 linux-headers/asm-loongarch/kvm_para.h

create mode 100644 linux-headers/asm-loongarch/unistd_64.h

diff --git a/include/standard-headers/drm/drm_fourcc.h b/include/standard-headers/drm/drm_fourcc.h

--- a/include/standard-headers/drm/drm_fourcc.h

+++ b/include/standard-headers/drm/drm_fourcc.h

@@ -XXX,XX +XXX,XX @@ extern "C" {

*/

#define I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC fourcc_mod_code(INTEL, 15)

+/*

+ * Intel Color Control Surfaces (CCS) for graphics ver. 20 unified compression

+ * on integrated graphics

+ *

+ * The main surface is Tile 4 and at plane index 0. For semi-planar formats

+ * like NV12, the Y and UV planes are Tile 4 and are located at plane indices

+ * 0 and 1, respectively. The CCS for all planes are stored outside of the

+ * GEM object in a reserved memory area dedicated for the storage of the

+ * CCS data for all compressible GEM objects.

+ */

+#define I915_FORMAT_MOD_4_TILED_LNL_CCS fourcc_mod_code(INTEL, 16)

+

+/*

+ * Intel Color Control Surfaces (CCS) for graphics ver. 20 unified compression

+ * on discrete graphics

+ *

+ * The main surface is Tile 4 and at plane index 0. For semi-planar formats

+ * like NV12, the Y and UV planes are Tile 4 and are located at plane indices

+ * 0 and 1, respectively. The CCS for all planes are stored outside of the

+ * GEM object in a reserved memory area dedicated for the storage of the

+ * CCS data for all compressible GEM objects. The GEM object must be stored in

+ * contiguous memory with a size aligned to 64KB

+ */

+#define I915_FORMAT_MOD_4_TILED_BMG_CCS fourcc_mod_code(INTEL, 17)

+

/*

* Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks

*

@@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)

#define AMD_FMT_MOD_TILE_VER_GFX10 2

#define AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS 3

#define AMD_FMT_MOD_TILE_VER_GFX11 4

+#define AMD_FMT_MOD_TILE_VER_GFX12 5

/*

* 64K_S is the same for GFX9/GFX10/GFX10_RBPLUS and hence has GFX9 as canonical

@@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)

/*

* 64K_D for non-32 bpp is the same for GFX9/GFX10/GFX10_RBPLUS and hence has

* GFX9 as canonical version.

+ *

+ * 64K_D_2D on GFX12 is identical to 64K_D on GFX11.

*/

#define AMD_FMT_MOD_TILE_GFX9_64K_D 10

#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25

@@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)

#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27

#define AMD_FMT_MOD_TILE_GFX11_256K_R_X 31

+/* Gfx12 swizzle modes:

+ * 0 - LINEAR

+ * 1 - 256B_2D - 2D block dimensions

+ * 2 - 4KB_2D

+ * 3 - 64KB_2D

+ * 4 - 256KB_2D

+ * 5 - 4KB_3D - 3D block dimensions

+ * 6 - 64KB_3D

+ * 7 - 256KB_3D

+ */

+#define AMD_FMT_MOD_TILE_GFX12_256B_2D 1

+#define AMD_FMT_MOD_TILE_GFX12_4K_2D 2

+#define AMD_FMT_MOD_TILE_GFX12_64K_2D 3

+#define AMD_FMT_MOD_TILE_GFX12_256K_2D 4

+

#define AMD_FMT_MOD_DCC_BLOCK_64B 0

#define AMD_FMT_MOD_DCC_BLOCK_128B 1

#define AMD_FMT_MOD_DCC_BLOCK_256B 2

diff --git a/include/standard-headers/linux/const.h b/include/standard-headers/linux/const.h

index XXXXXXX..XXXXXXX 100644

--- a/include/standard-headers/linux/const.h

+++ b/include/standard-headers/linux/const.h

@@ -XXX,XX +XXX,XX @@

#define _BITUL(x)    (_UL(1) << (x))

#define _BITULL(x)    (_ULL(1) << (x))

+#if !defined(__ASSEMBLY__)

+/*

+ * Missing __asm__ support

+ *

+ * __BIT128() would not work in the __asm__ code, as it shifts an

+ * 'unsigned __init128' data type as direct representation of

+ * 128 bit constants is not supported in the gcc compiler, as

+ * they get silently truncated.

+ *

+ * TODO: Please revisit this implementation when gcc compiler

+ * starts representing 128 bit constants directly like long

+ * and unsigned long etc. Subsequently drop the comment for

+ * GENMASK_U128() which would then start supporting __asm__ code.

+ */

+#define _BIT128(x)    ((unsigned __int128)(1) << (x))

+#endif

+

#define __ALIGN_KERNEL(x, a)        __ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - 1)

#define __ALIGN_KERNEL_MASK(x, mask)    (((x) + (mask)) & ~(mask))

diff --git a/include/standard-headers/linux/ethtool.h b/include/standard-headers/linux/ethtool.h

index XXXXXXX..XXXXXXX 100644

--- a/include/standard-headers/linux/ethtool.h

+++ b/include/standard-headers/linux/ethtool.h

@@ -XXX,XX +XXX,XX @@ enum ethtool_module_power_mode {

    ETHTOOL_MODULE_POWER_MODE_HIGH,

};

+/**

+ * enum ethtool_c33_pse_ext_state - groups of PSE extended states

+ * functions. IEEE 802.3-2022 33.2.4.4 Variables

+ *

+ * @ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION: Group of error_condition states

+ * @ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID: Group of mr_mps_valid states

+ * @ETHTOOL_C33_PSE_EXT_STATE_MR_PSE_ENABLE: Group of mr_pse_enable states

+ * @ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED: Group of option_detect_ted

+ *    states

+ * @ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM: Group of option_vport_lim states

+ * @ETHTOOL_C33_PSE_EXT_STATE_OVLD_DETECTED: Group of ovld_detected states

+ * @ETHTOOL_C33_PSE_EXT_STATE_PD_DLL_POWER_TYPE: Group of pd_dll_power_type

+ *    states

+ * @ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE: Group of power_not_available

+ *    states

+ * @ETHTOOL_C33_PSE_EXT_STATE_SHORT_DETECTED: Group of short_detected states

+ */

+enum ethtool_c33_pse_ext_state {

+    ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION = 1,

+    ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID,

+    ETHTOOL_C33_PSE_EXT_STATE_MR_PSE_ENABLE,

+    ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED,

+    ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM,

+    ETHTOOL_C33_PSE_EXT_STATE_OVLD_DETECTED,

+    ETHTOOL_C33_PSE_EXT_STATE_PD_DLL_POWER_TYPE,

+    ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE,

+    ETHTOOL_C33_PSE_EXT_STATE_SHORT_DETECTED,

+};

+

+/**

+ * enum ethtool_c33_pse_ext_substate_mr_mps_valid - mr_mps_valid states

+ * functions. IEEE 802.3-2022 33.2.4.4 Variables

+ *

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_DETECTED_UNDERLOAD: Underload

+ *    state

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_CONNECTION_OPEN: Port is not

+ *    connected

+ *

+ * The PSE monitors either the DC or AC Maintain Power Signature

+ * (MPS, see 33.2.9.1). This variable indicates the presence or absence of

+ * a valid MPS.

+ */

+enum ethtool_c33_pse_ext_substate_mr_mps_valid {

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_DETECTED_UNDERLOAD = 1,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_CONNECTION_OPEN,

+};

+

+/**

+ * enum ethtool_c33_pse_ext_substate_error_condition - error_condition states

+ * functions. IEEE 802.3-2022 33.2.4.4 Variables

+ *

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_NON_EXISTING_PORT: Non-existing

+ *    port number

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNDEFINED_PORT: Undefined port

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT: Internal

+ *    hardware fault

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_COMM_ERROR_AFTER_FORCE_ON:

+ *    Communication error after force on

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS: Unknown

+ *    port status

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_TURN_OFF: Host

+ *    crash turn off

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_FORCE_SHUTDOWN:

+ *    Host crash force shutdown

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_CONFIG_CHANGE: Configuration

+ *    change

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP: Over

+ *    temperature detected

+ *

+ * error_condition is a variable indicating the status of

+ * implementation-specific fault conditions or optionally other system faults

+ * that prevent the PSE from meeting the specifications in Table 33–11 and that

+ * require the PSE not to source power. These error conditions are different

+ * from those monitored by the state diagrams in Figure 33–10.

+ */

+enum ethtool_c33_pse_ext_substate_error_condition {

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_NON_EXISTING_PORT = 1,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNDEFINED_PORT,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_COMM_ERROR_AFTER_FORCE_ON,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_TURN_OFF,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_FORCE_SHUTDOWN,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_CONFIG_CHANGE,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP,

+};

+

+/**

+ * enum ethtool_c33_pse_ext_substate_mr_pse_enable - mr_pse_enable states

+ * functions. IEEE 802.3-2022 33.2.4.4 Variables

+ *

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_PSE_ENABLE_DISABLE_PIN_ACTIVE: Disable

+ *    pin active

+ *

+ * mr_pse_enable is control variable that selects PSE operation and test

+ * functions.

+ */

+enum ethtool_c33_pse_ext_substate_mr_pse_enable {

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_PSE_ENABLE_DISABLE_PIN_ACTIVE = 1,

+};

+

+/**

+ * enum ethtool_c33_pse_ext_substate_option_detect_ted - option_detect_ted

+ *    states functions. IEEE 802.3-2022 33.2.4.4 Variables

+ *

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_DET_IN_PROCESS: Detection

+ *    in process

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_CONNECTION_CHECK_ERROR:

+ *    Connection check error

+ *

+ * option_detect_ted is a variable indicating if detection can be performed

+ * by the PSE during the ted_timer interval.

+ */

+enum ethtool_c33_pse_ext_substate_option_detect_ted {

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_DET_IN_PROCESS = 1,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_CONNECTION_CHECK_ERROR,

+};

+

+/**

+ * enum ethtool_c33_pse_ext_substate_option_vport_lim - option_vport_lim states

+ * functions. IEEE 802.3-2022 33.2.4.4 Variables

+ *

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_HIGH_VOLTAGE: Main supply

+ *    voltage is high

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_LOW_VOLTAGE: Main supply

+ *    voltage is low

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_VOLTAGE_INJECTION: Voltage

+ *    injection into the port

+ *

+ * option_vport_lim is an optional variable indicates if VPSE is out of the

+ * operating range during normal operating state.

+ */

+enum ethtool_c33_pse_ext_substate_option_vport_lim {

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_HIGH_VOLTAGE = 1,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_LOW_VOLTAGE,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_VOLTAGE_INJECTION,

+};

+

+/**

+ * enum ethtool_c33_pse_ext_substate_ovld_detected - ovld_detected states

+ * functions. IEEE 802.3-2022 33.2.4.4 Variables

+ *

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OVLD_DETECTED_OVERLOAD: Overload state

+ *

+ * ovld_detected is a variable indicating if the PSE output current has been

+ * in an overload condition (see 33.2.7.6) for at least TCUT of a one-second

+ * sliding time.

+ */

+enum ethtool_c33_pse_ext_substate_ovld_detected {

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_OVLD_DETECTED_OVERLOAD = 1,

+};

+

+/**

+ * enum ethtool_c33_pse_ext_substate_power_not_available - power_not_available

+ *    states functions. IEEE 802.3-2022 33.2.4.4 Variables

+ *

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_BUDGET_EXCEEDED: Power

+ *    budget exceeded for the controller

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PORT_PW_LIMIT_EXCEEDS_CONTROLLER_BUDGET:

+ *    Configured port power limit exceeded controller power budget

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PD_REQUEST_EXCEEDS_PORT_LIMIT:

+ *    Power request from PD exceeds port limit

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_HW_PW_LIMIT: Power

+ *    denied due to Hardware power limit

+ *

+ * power_not_available is a variable that is asserted in an

+ * implementation-dependent manner when the PSE is no longer capable of

+ * sourcing sufficient power to support the attached PD. Sufficient power

+ * is defined by classification; see 33.2.6.

+ */

+enum ethtool_c33_pse_ext_substate_power_not_available {

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_BUDGET_EXCEEDED = 1,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PORT_PW_LIMIT_EXCEEDS_CONTROLLER_BUDGET,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PD_REQUEST_EXCEEDS_PORT_LIMIT,

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_HW_PW_LIMIT,

+};

+

+/**

+ * enum ethtool_c33_pse_ext_substate_short_detected - short_detected states

+ * functions. IEEE 802.3-2022 33.2.4.4 Variables

+ *

+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_SHORT_DETECTED_SHORT_CONDITION: Short

+ *    condition was detected

+ *

+ * short_detected is a variable indicating if the PSE output current has been

+ * in a short circuit condition for TLIM within a sliding window (see 33.2.7.7).

+ */

+enum ethtool_c33_pse_ext_substate_short_detected {

+    ETHTOOL_C33_PSE_EXT_SUBSTATE_SHORT_DETECTED_SHORT_CONDITION = 1,

+};

+

/**

* enum ethtool_pse_types - Types of PSE controller.

* @ETHTOOL_PSE_UNKNOWN: Type of PSE controller is unknown

@@ -XXX,XX +XXX,XX @@ enum ethtool_mm_verify_status {

    ETHTOOL_MM_VERIFY_STATUS_DISABLED,

};

+/**

+ * enum ethtool_module_fw_flash_status - plug-in module firmware flashing status

+ * @ETHTOOL_MODULE_FW_FLASH_STATUS_STARTED: The firmware flashing process has

+ *    started.

+ * @ETHTOOL_MODULE_FW_FLASH_STATUS_IN_PROGRESS: The firmware flashing process

+ *    is in progress.

+ * @ETHTOOL_MODULE_FW_FLASH_STATUS_COMPLETED: The firmware flashing process was

+ *    completed successfully.

+ * @ETHTOOL_MODULE_FW_FLASH_STATUS_ERROR: The firmware flashing process was

+ *    stopped due to an error.

+ */

+enum ethtool_module_fw_flash_status {

+    ETHTOOL_MODULE_FW_FLASH_STATUS_STARTED = 1,

+    ETHTOOL_MODULE_FW_FLASH_STATUS_IN_PROGRESS,

+    ETHTOOL_MODULE_FW_FLASH_STATUS_COMPLETED,

+    ETHTOOL_MODULE_FW_FLASH_STATUS_ERROR,

+};

+

/**

* struct ethtool_gstrings - string set for data tagging

* @cmd: Command number = %ETHTOOL_GSTRINGS

@@ -XXX,XX +XXX,XX @@ enum ethtool_link_mode_bit_indices {

    ETHTOOL_LINK_MODE_10baseT1S_Full_BIT         = 99,

    ETHTOOL_LINK_MODE_10baseT1S_Half_BIT         = 100,

    ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT     = 101,

+    ETHTOOL_LINK_MODE_10baseT1BRR_Full_BIT         = 102,

    /* must be last entry */

    __ETHTOOL_LINK_MODE_MASK_NBITS

@@ -XXX,XX +XXX,XX @@ struct ethtool_link_settings {

     * uint32_t map_lp_advertising[link_mode_masks_nwords];

     */

};

+

+/**

+ * enum phy_upstream - Represents the upstream component a given PHY device

+ * is connected to, as in what is on the other end of the MII bus. Most PHYs

+ * will be attached to an Ethernet MAC controller, but in some cases, there's

+ * an intermediate PHY used as a media-converter, which will driver another

+ * MII interface as its output.

+ * @PHY_UPSTREAM_MAC: Upstream component is a MAC (a switch port,

+ *         or ethernet controller)

+ * @PHY_UPSTREAM_PHY: Upstream component is a PHY (likely a media converter)

+ */

+enum phy_upstream {

+    PHY_UPSTREAM_MAC,

+    PHY_UPSTREAM_PHY,

+};

+

#endif /* _LINUX_ETHTOOL_H */

diff --git a/include/standard-headers/linux/fuse.h b/include/standard-headers/linux/fuse.h

index XXXXXXX..XXXXXXX 100644

--- a/include/standard-headers/linux/fuse.h

+++ b/include/standard-headers/linux/fuse.h

@@ -XXX,XX +XXX,XX @@

* - add backing_id to fuse_open_out, add FOPEN_PASSTHROUGH open flag

* - add FUSE_NO_EXPORT_SUPPORT init flag

* - add FUSE_NOTIFY_RESEND, add FUSE_HAS_RESEND init flag

+ *

+ * 7.41

+ * - add FUSE_ALLOW_IDMAP

*/

#ifndef _LINUX_FUSE_H

@@ -XXX,XX +XXX,XX @@

#define FUSE_KERNEL_VERSION 7

/** Minor version number of this interface */

-#define FUSE_KERNEL_MINOR_VERSION 40

+#define FUSE_KERNEL_MINOR_VERSION 41

/** The node ID of the root inode */

#define FUSE_ROOT_ID 1

@@ -XXX,XX +XXX,XX @@ struct fuse_file_lock {

* FUSE_NO_EXPORT_SUPPORT: explicitly disable export support

* FUSE_HAS_RESEND: kernel supports resending pending requests, and the high bit

*         of the request ID indicates resend requests

+ * FUSE_ALLOW_IDMAP: allow creation of idmapped mounts

*/

#define FUSE_ASYNC_READ        (1 << 0)

#define FUSE_POSIX_LOCKS    (1 << 1)

@@ -XXX,XX +XXX,XX @@ struct fuse_file_lock {

/* Obsolete alias for FUSE_DIRECT_IO_ALLOW_MMAP */

#define FUSE_DIRECT_IO_RELAX    FUSE_DIRECT_IO_ALLOW_MMAP

+#define FUSE_ALLOW_IDMAP    (1ULL << 40)

/**

* CUSE INIT request/reply flags

@@ -XXX,XX +XXX,XX @@ struct fuse_fallocate_in {

*/

#define FUSE_UNIQUE_RESEND (1ULL << 63)

+/**

+ * This value will be set by the kernel to

+ * (struct fuse_in_header).{uid,gid} fields in

+ * case when:

+ * - fuse daemon enabled FUSE_ALLOW_IDMAP

+ * - idmapping information is not available and uid/gid

+ * can not be mapped in accordance with an idmapping.

+ *

+ * Note: an idmapping information always available

+ * for inode creation operations like:

+ * FUSE_MKNOD, FUSE_SYMLINK, FUSE_MKDIR, FUSE_TMPFILE,

+ * FUSE_CREATE and FUSE_RENAME2 (with RENAME_WHITEOUT).

+ */

+#define FUSE_INVALID_UIDGID ((uint32_t)(-1))

+

struct fuse_in_header {

    uint32_t    len;

    uint32_t    opcode;

diff --git a/include/standard-headers/linux/input-event-codes.h b/include/standard-headers/linux/input-event-codes.h

index XXXXXXX..XXXXXXX 100644

--- a/include/standard-headers/linux/input-event-codes.h

+++ b/include/standard-headers/linux/input-event-codes.h

@@ -XXX,XX +XXX,XX @@

#define KEY_CAMERA_ACCESS_ENABLE    0x24b    /* Enables programmatic access to camera devices. (HUTRR72) */

#define KEY_CAMERA_ACCESS_DISABLE    0x24c    /* Disables programmatic access to camera devices. (HUTRR72) */

#define KEY_CAMERA_ACCESS_TOGGLE    0x24d    /* Toggles the current state of the camera access control. (HUTRR72) */

+#define KEY_ACCESSIBILITY        0x24e    /* Toggles the system bound accessibility UI/command (HUTRR116) */

+#define KEY_DO_NOT_DISTURB        0x24f    /* Toggles the system-wide "Do Not Disturb" control (HUTRR94)*/

#define KEY_BRIGHTNESS_MIN        0x250    /* Set Brightness to Minimum */

#define KEY_BRIGHTNESS_MAX        0x251    /* Set Brightness to Maximum */

diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h

index XXXXXXX..XXXXXXX 100644

--- a/include/standard-headers/linux/pci_regs.h

+++ b/include/standard-headers/linux/pci_regs.h

@@ -XXX,XX +XXX,XX @@

#define PCI_EXP_RTCTL_SENFEE    0x0002    /* System Error on Non-Fatal Error */

#define PCI_EXP_RTCTL_SEFEE    0x0004    /* System Error on Fatal Error */

#define PCI_EXP_RTCTL_PMEIE    0x0008    /* PME Interrupt Enable */

-#define PCI_EXP_RTCTL_CRSSVE    0x0010    /* CRS Software Visibility Enable */

+#define PCI_EXP_RTCTL_RRS_SVE    0x0010    /* Config RRS Software Visibility Enable */

+#define PCI_EXP_RTCTL_CRSSVE PCI_EXP_RTCTL_RRS_SVE /* compatibility */

#define PCI_EXP_RTCAP        0x1e    /* Root Capabilities */

-#define PCI_EXP_RTCAP_CRSVIS    0x0001    /* CRS Software Visibility capability */

+#define PCI_EXP_RTCAP_RRS_SV    0x0001    /* Config RRS Software Visibility */

+#define PCI_EXP_RTCAP_CRSVIS PCI_EXP_RTCAP_RRS_SV /* compatibility */

#define PCI_EXP_RTSTA        0x20    /* Root Status */

#define PCI_EXP_RTSTA_PME_RQ_ID 0x0000ffff /* PME Requester ID */

#define PCI_EXP_RTSTA_PME    0x00010000 /* PME status */

@@ -XXX,XX +XXX,XX @@

#define PCI_EXT_CAP_ID_DVSEC    0x23    /* Designated Vendor-Specific */

#define PCI_EXT_CAP_ID_DLF    0x25    /* Data Link Feature */

#define PCI_EXT_CAP_ID_PL_16GT    0x26    /* Physical Layer 16.0 GT/s */

+#define PCI_EXT_CAP_ID_NPEM    0x29    /* Native PCIe Enclosure Management */

#define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */

#define PCI_EXT_CAP_ID_DOE    0x2E    /* Data Object Exchange */

#define PCI_EXT_CAP_ID_MAX    PCI_EXT_CAP_ID_DOE

@@ -XXX,XX +XXX,XX @@

#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK        0x000000F0

#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT    4

+/* Native PCIe Enclosure Management */

+#define PCI_NPEM_CAP 0x04 /* NPEM capability register */

+#define PCI_NPEM_CAP_CAPABLE 0x00000001 /* NPEM Capable */

+

+#define PCI_NPEM_CTRL 0x08 /* NPEM control register */

+#define PCI_NPEM_CTRL_ENABLE 0x00000001 /* NPEM Enable */

+

+/*

+ * Native PCIe Enclosure Management indication bits and Reset command bit

+ * are corresponding for capability and control registers.

+ */

+#define PCI_NPEM_CMD_RESET 0x00000002 /* Reset Command */

+#define PCI_NPEM_IND_OK 0x00000004 /* OK */

+#define PCI_NPEM_IND_LOCATE 0x00000008 /* Locate */

+#define PCI_NPEM_IND_FAIL 0x00000010 /* Fail */

+#define PCI_NPEM_IND_REBUILD 0x00000020 /* Rebuild */

+#define PCI_NPEM_IND_PFA 0x00000040 /* Predicted Failure Analysis */

+#define PCI_NPEM_IND_HOTSPARE 0x00000080 /* Hot Spare */

+#define PCI_NPEM_IND_ICA 0x00000100 /* In Critical Array */

+#define PCI_NPEM_IND_IFA 0x00000200 /* In Failed Array */

+#define PCI_NPEM_IND_IDT 0x00000400 /* Device Type */

+#define PCI_NPEM_IND_DISABLED 0x00000800 /* Disabled */

+#define PCI_NPEM_IND_SPEC_0 0x01000000

+#define PCI_NPEM_IND_SPEC_1 0x02000000

+#define PCI_NPEM_IND_SPEC_2 0x04000000

+#define PCI_NPEM_IND_SPEC_3 0x08000000

+#define PCI_NPEM_IND_SPEC_4 0x10000000

+#define PCI_NPEM_IND_SPEC_5 0x20000000

+#define PCI_NPEM_IND_SPEC_6 0x40000000

+#define PCI_NPEM_IND_SPEC_7 0x80000000

+

+#define PCI_NPEM_STATUS 0x0c /* NPEM status register */

+#define PCI_NPEM_STATUS_CC 0x00000001 /* Command Completed */

+

/* Data Object Exchange */

#define PCI_DOE_CAP        0x04 /* DOE Capabilities Register */

#define PCI_DOE_CAP_INT_SUP            0x00000001 /* Interrupt Support */

diff --git a/include/standard-headers/linux/virtio_balloon.h b/include/standard-headers/linux/virtio_balloon.h

index XXXXXXX..XXXXXXX 100644

--- a/include/standard-headers/linux/virtio_balloon.h

+++ b/include/standard-headers/linux/virtio_balloon.h

@@ -XXX,XX +XXX,XX @@ struct virtio_balloon_config {

#define VIRTIO_BALLOON_S_CACHES 7 /* Disk caches */

#define VIRTIO_BALLOON_S_HTLB_PGALLOC 8 /* Hugetlb page allocations */

#define VIRTIO_BALLOON_S_HTLB_PGFAIL 9 /* Hugetlb page allocation failures */

-#define VIRTIO_BALLOON_S_NR 10

+#define VIRTIO_BALLOON_S_OOM_KILL 10 /* OOM killer invocations */

+#define VIRTIO_BALLOON_S_ALLOC_STALL 11 /* Stall count of memory allocatoin */

+#define VIRTIO_BALLOON_S_ASYNC_SCAN 12 /* Amount of memory scanned asynchronously */

+#define VIRTIO_BALLOON_S_DIRECT_SCAN 13 /* Amount of memory scanned directly */

+#define VIRTIO_BALLOON_S_ASYNC_RECLAIM 14 /* Amount of memory reclaimed asynchronously */

+#define VIRTIO_BALLOON_S_DIRECT_RECLAIM 15 /* Amount of memory reclaimed directly */

+#define VIRTIO_BALLOON_S_NR 16

#define VIRTIO_BALLOON_S_NAMES_WITH_PREFIX(VIRTIO_BALLOON_S_NAMES_prefix) { \

    VIRTIO_BALLOON_S_NAMES_prefix "swap-in", \

@@ -XXX,XX +XXX,XX @@ struct virtio_balloon_config {

    VIRTIO_BALLOON_S_NAMES_prefix "available-memory", \

    VIRTIO_BALLOON_S_NAMES_prefix "disk-caches", \

    VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-allocations", \

-    VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-failures" \

+    VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-failures", \

+    VIRTIO_BALLOON_S_NAMES_prefix "oom-kills", \

+    VIRTIO_BALLOON_S_NAMES_prefix "alloc-stalls", \

+    VIRTIO_BALLOON_S_NAMES_prefix "async-scans", \

+    VIRTIO_BALLOON_S_NAMES_prefix "direct-scans", \

+    VIRTIO_BALLOON_S_NAMES_prefix "async-reclaims", \

+    VIRTIO_BALLOON_S_NAMES_prefix "direct-reclaims" \

#define VIRTIO_BALLOON_S_NAMES VIRTIO_BALLOON_S_NAMES_WITH_PREFIX("")

diff --git a/include/standard-headers/linux/virtio_gpu.h b/include/standard-headers/linux/virtio_gpu.h

index XXXXXXX..XXXXXXX 100644

--- a/include/standard-headers/linux/virtio_gpu.h

+++ b/include/standard-headers/linux/virtio_gpu.h

@@ -XXX,XX +XXX,XX @@ struct virtio_gpu_cmd_submit {

#define VIRTIO_GPU_CAPSET_VIRGL2 2

/* 3 is reserved for gfxstream */

#define VIRTIO_GPU_CAPSET_VENUS 4

+#define VIRTIO_GPU_CAPSET_DRM 6

/* VIRTIO_GPU_CMD_GET_CAPSET_INFO */

struct virtio_gpu_get_capset_info {

diff --git a/linux-headers/asm-arm64/mman.h b/linux-headers/asm-arm64/mman.h

index XXXXXXX..XXXXXXX 100644

--- a/linux-headers/asm-arm64/mman.h

+++ b/linux-headers/asm-arm64/mman.h

@@ -XXX,XX +XXX,XX @@

#define PROT_BTI    0x10        /* BTI guarded page */

#define PROT_MTE    0x20        /* Normal Tagged mapping */

+/* Override any generic PKEY permission defines */

+#define PKEY_DISABLE_EXECUTE    0x4

+#define PKEY_DISABLE_READ    0x8

+#undef PKEY_ACCESS_MASK

+#define PKEY_ACCESS_MASK (PKEY_DISABLE_ACCESS |\

+                PKEY_DISABLE_WRITE |\

+                PKEY_DISABLE_READ |\

+                PKEY_DISABLE_EXECUTE)

+

#endif /* ! _UAPI__ASM_MMAN_H */

diff --git a/linux-headers/asm-arm64/unistd.h b/linux-headers/asm-arm64/unistd.h

index XXXXXXX..XXXXXXX 100644

--- a/linux-headers/asm-arm64/unistd.h

+++ b/linux-headers/asm-arm64/unistd.h

@@ -XXX,XX +XXX,XX @@

/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */

-/*

- * Copyright (C) 2012 ARM Ltd.

- *

- * This program is free software; you can redistribute it and/or modify

- * it under the terms of the GNU General Public License version 2 as

- * published by the Free Software Foundation.

- *

- * This program is distributed in the hope that it will be useful,

- * but WITHOUT ANY WARRANTY; without even the implied warranty of

- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

- * GNU General Public License for more details.

- *

- * You should have received a copy of the GNU General Public License

- * along with this program. If not, see <http://www.gnu.org/licenses/>.

- */

-#define __ARCH_WANT_RENAMEAT

-#define __ARCH_WANT_NEW_STAT

-#define __ARCH_WANT_SET_GET_RLIMIT

-#define __ARCH_WANT_TIME32_SYSCALLS

-#define __ARCH_WANT_SYS_CLONE3

-#define __ARCH_WANT_MEMFD_SECRET

-#include <asm-generic/unistd.h>

+#include <asm/unistd_64.h>

diff --git a/linux-headers/asm-generic/unistd.h b/linux-headers/asm-generic/unistd.h

index XXXXXXX..XXXXXXX 100644

--- a/linux-headers/asm-generic/unistd.h

+++ b/linux-headers/asm-generic/unistd.h

@@ -XXX,XX +XXX,XX @@ __SC_COMP(__NR_pselect6_time64, sys_pselect6, compat_sys_pselect6_time64)

#define __NR_ppoll_time64 414

__SC_COMP(__NR_ppoll_time64, sys_ppoll, compat_sys_ppoll_time64)

#define __NR_io_pgetevents_time64 416

-__SYSCALL(__NR_io_pgetevents_time64, sys_io_pgetevents)

+__SC_COMP(__NR_io_pgetevents_time64, sys_io_pgetevents, compat_sys_io_pgetevents_time64)

#define __NR_recvmmsg_time64 417

__SC_COMP(__NR_recvmmsg_time64, sys_recvmmsg, compat_sys_recvmmsg_time64)

#define __NR_mq_timedsend_time64 418

@@ -XXX,XX +XXX,XX @@ __SYSCALL(__NR_fsmount, sys_fsmount)

__SYSCALL(__NR_fspick, sys_fspick)

#define __NR_pidfd_open 434

__SYSCALL(__NR_pidfd_open, sys_pidfd_open)

-#ifdef __ARCH_WANT_SYS_CLONE3

#define __NR_clone3 435

__SYSCALL(__NR_clone3, sys_clone3)

-#endif

#define __NR_close_range 436

__SYSCALL(__NR_close_range, sys_close_range)

#define __NR_openat2 437

diff --git a/linux-headers/asm-loongarch/kvm.h b/linux-headers/asm-loongarch/kvm.h

index XXXXXXX..XXXXXXX 100644

--- a/linux-headers/asm-loongarch/kvm.h

+++ b/linux-headers/asm-loongarch/kvm.h

@@ -XXX,XX +XXX,XX @@ struct kvm_fpu {

#define KVM_REG_LOONGARCH_KVM        (KVM_REG_LOONGARCH | 0x20000ULL)

#define KVM_REG_LOONGARCH_FPSIMD    (KVM_REG_LOONGARCH | 0x30000ULL)

#define KVM_REG_LOONGARCH_CPUCFG    (KVM_REG_LOONGARCH | 0x40000ULL)

+#define KVM_REG_LOONGARCH_LBT        (KVM_REG_LOONGARCH | 0x50000ULL)

#define KVM_REG_LOONGARCH_MASK        (KVM_REG_LOONGARCH | 0x70000ULL)

#define KVM_CSR_IDX_MASK        0x7fff

#define KVM_CPUCFG_IDX_MASK        0x7fff

@@ -XXX,XX +XXX,XX @@ struct kvm_fpu {

/* Debugging: Special instruction for software breakpoint */

#define KVM_REG_LOONGARCH_DEBUG_INST    (KVM_REG_LOONGARCH_KVM | KVM_REG_SIZE_U64 | 3)

+/* LBT registers */

+#define KVM_REG_LOONGARCH_LBT_SCR0    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 1)

+#define KVM_REG_LOONGARCH_LBT_SCR1    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 2)

+#define KVM_REG_LOONGARCH_LBT_SCR2    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 3)

+#define KVM_REG_LOONGARCH_LBT_SCR3    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 4)

+#define KVM_REG_LOONGARCH_LBT_EFLAGS    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 5)

+#define KVM_REG_LOONGARCH_LBT_FTOP    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 6)

+

#define LOONGARCH_REG_SHIFT        3

#define LOONGARCH_REG_64(TYPE, REG)    (TYPE | KVM_REG_SIZE_U64 | (REG << LOONGARCH_REG_SHIFT))

#define KVM_IOC_CSRID(REG)        LOONGARCH_REG_64(KVM_REG_LOONGARCH_CSR, REG)

#define KVM_IOC_CPUCFG(REG)        LOONGARCH_REG_64(KVM_REG_LOONGARCH_CPUCFG, REG)

+

+/* Device Control API on vm fd */

+#define KVM_LOONGARCH_VM_FEAT_CTRL        0

+#define KVM_LOONGARCH_VM_FEAT_LSX        0

+#define KVM_LOONGARCH_VM_FEAT_LASX        1

+#define KVM_LOONGARCH_VM_FEAT_X86BT        2

+#define KVM_LOONGARCH_VM_FEAT_ARMBT        3

+#define KVM_LOONGARCH_VM_FEAT_MIPSBT        4

+#define KVM_LOONGARCH_VM_FEAT_PMU        5

+#define KVM_LOONGARCH_VM_FEAT_PV_IPI        6

+#define KVM_LOONGARCH_VM_FEAT_PV_STEALTIME    7