On Fri, Oct 18, 2024 at 12:54 AM Clément Léger <cleger@rivosinc.com> wrote:
>
> Add `ext_smdbltrp`in RISCVCPUConfig and implement MSTATUS.MDT behavior.
> Also set MDT to 1 at reset according to the specification.
>
> Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu.c | 3 +++
> target/riscv/cpu_bits.h | 1 +
> target/riscv/cpu_cfg.h | 1 +
> target/riscv/csr.c | 13 +++++++++++++
> 4 files changed, 18 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 39555364bf..15b21e4f7d 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -959,6 +959,9 @@ static void riscv_cpu_reset_hold(Object *obj, ResetType type)
> env->mstatus_hs = set_field(env->mstatus_hs,
> MSTATUS64_UXL, env->misa_mxl);
> }
> + if (riscv_cpu_cfg(env)->ext_smdbltrp) {
> + env->mstatus = set_field(env->mstatus, MSTATUS_MDT, 1);
> + }
> }
> env->mcause = 0;
> env->miclaim = MIP_SGEIP;
> diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
> index 0d0f253fcb..b368e27ca0 100644
> --- a/target/riscv/cpu_bits.h
> +++ b/target/riscv/cpu_bits.h
> @@ -561,6 +561,7 @@
> #define MSTATUS_SDT 0x01000000
> #define MSTATUS_GVA 0x4000000000ULL
> #define MSTATUS_MPV 0x8000000000ULL
> +#define MSTATUS_MDT 0x40000000000ULL /* Smdbltrp extension */
>
> #define MSTATUS64_UXL 0x0000000300000000ULL
> #define MSTATUS64_SXL 0x0000000C00000000ULL
> diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
> index 518102d748..8ac1e7fce3 100644
> --- a/target/riscv/cpu_cfg.h
> +++ b/target/riscv/cpu_cfg.h
> @@ -78,6 +78,7 @@ struct RISCVCPUConfig {
> bool ext_sstc;
> bool ext_smcntrpmf;
> bool ext_ssdbltrp;
> + bool ext_smdbltrp;
> bool ext_svadu;
> bool ext_svinval;
> bool ext_svnapot;
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 9aa33611f7..9d2caf34ba 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -1616,6 +1616,13 @@ static RISCVException write_mstatus(CPURISCVState *env, int csrno,
> }
> }
>
> + if (riscv_cpu_cfg(env)->ext_smdbltrp) {
> + mask |= MSTATUS_MDT;
> + if ((val & MSTATUS_MDT) != 0) {
> + val &= ~MSTATUS_MIE;
> + }
> + }
> +
> if (xl != MXL_RV32 || env->debugger) {
> if (riscv_has_ext(env, RVH)) {
> mask |= MSTATUS_MPV | MSTATUS_GVA;
> @@ -1654,6 +1661,12 @@ static RISCVException write_mstatush(CPURISCVState *env, int csrno,
> uint64_t valh = (uint64_t)val << 32;
> uint64_t mask = riscv_has_ext(env, RVH) ? MSTATUS_MPV | MSTATUS_GVA : 0;
>
> + if (riscv_cpu_cfg(env)->ext_smdbltrp) {
> + mask |= MSTATUS_MDT;
> + if ((valh & MSTATUS_MDT) != 0) {
> + mask |= MSTATUS_MIE;
> + }
> + }
> env->mstatus = (env->mstatus & ~mask) | (valh & mask);
>
> return RISCV_EXCP_NONE;
> --
> 2.45.2
>
>