Add system test to make sure FEAT_XS is enabled for max cpu emulation
and that QEMU doesn't crash when encountering an NXS instruction
variant.
Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
---
tests/tcg/aarch64/system/feat-xs.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/tests/tcg/aarch64/system/feat-xs.c b/tests/tcg/aarch64/system/feat-xs.c
new file mode 100644
index 0000000000000000000000000000000000000000..52a481c577f9420fa2f6d6a794c1f26772cb4bff
--- /dev/null
+++ b/tests/tcg/aarch64/system/feat-xs.c
@@ -0,0 +1,27 @@
+/*
+ * FEAT_XS Test
+ *
+ * Copyright (c) 2024 Linaro Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include <minilib.h>
+#include <stdint.h>
+
+int main(void)
+{
+ uint64_t isar1;
+
+ asm volatile ("mrs %0, id_aa64isar1_el1" : "=r"(isar1));
+ if (((isar1 >> 56) & (0xff)) != 1) {
+ ml_printf("FEAT_XS not supported by CPU");
+ return 1;
+ }
+ /* VMALLE1NXS */
+ asm volatile (".inst 0xd508971f");
+ /* VMALLE1OSNXS */
+ asm volatile (".inst 0xd508911f");
+
+ return 0;
+}
--
2.45.2
Hi Manos,
On 10/14/24 07:48, Manos Pitsidianakis wrote:
> Add system test to make sure FEAT_XS is enabled for max cpu emulation
> and that QEMU doesn't crash when encountering an NXS instruction
> variant.
>
> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
> ---
> tests/tcg/aarch64/system/feat-xs.c | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/tests/tcg/aarch64/system/feat-xs.c b/tests/tcg/aarch64/system/feat-xs.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..52a481c577f9420fa2f6d6a794c1f26772cb4bff
> --- /dev/null
> +++ b/tests/tcg/aarch64/system/feat-xs.c
> @@ -0,0 +1,27 @@
> +/*
> + * FEAT_XS Test
> + *
> + * Copyright (c) 2024 Linaro Ltd
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include <minilib.h>
> +#include <stdint.h>
> +
> +int main(void)
> +{
> + uint64_t isar1;
> +
> + asm volatile ("mrs %0, id_aa64isar1_el1" : "=r"(isar1));
> + if (((isar1 >> 56) & (0xff)) != 1) {
XS field is 4 bits, so & against 0xF instead of 0xFF?
Cheers,
Gustavo
> + ml_printf("FEAT_XS not supported by CPU");
> + return 1;
> + }
> + /* VMALLE1NXS */
> + asm volatile (".inst 0xd508971f");
> + /* VMALLE1OSNXS */
> + asm volatile (".inst 0xd508911f");
> +
> + return 0;
> +}
>
On 10/14/24 03:48, Manos Pitsidianakis wrote: > Add system test to make sure FEAT_XS is enabled for max cpu emulation > and that QEMU doesn't crash when encountering an NXS instruction > variant. > > Signed-off-by: Manos Pitsidianakis<manos.pitsidianakis@linaro.org> > --- > tests/tcg/aarch64/system/feat-xs.c | 27 +++++++++++++++++++++++++++ > 1 file changed, 27 insertions(+) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
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