Series comparison

-[PATCH v1 0/6] Support virtio-gpu DRM native context
+[PATCH v11 00/10] Support virtio-gpu DRM native context
 This patchset adds DRM native context support to VirtIO-GPU on Qemu.
-It's based on the pending Venus v17 patches [1] that bring host blobs
-support to virtio-gpu-gl device.
+Contarary to Virgl and Venus contexts that mediates high level GFX APIs,
+DRM native context [1] mediates lower level kernel driver UAPI, which
 [1] https://lore.kernel.org/qemu-devel/20240822185110.1757429-1-dmitry.osipenko@collabora.com/
 Contarary to Virgl and Venus contexts which mediate high level GFX APIs,
 DRM native context [2] mediates lower level kernel driver UAPI, which
 reflects in a less CPU overhead and less/simpler code needed to support it.
 DRM context consists of a host and guest parts that have to be implemented
 for each GPU driver. On a guest side, DRM context presents a virtual GPU as
 a real/native host GPU device for GL/VK applications.
-[2] https://www.youtube.com/watch?v=9sFP_yddLLQ
+[1] https://www.youtube.com/watch?v=9sFP_yddLLQ
-Today there are four known DRM native context drivers existing in a wild:
+Today there are four DRM native context drivers existing in a wild:
   - Freedreno (Qualcomm SoC GPUs), completely upstreamed
-  - AMDGPU, mostly merged into upstreams
+  - AMDGPU, completely upstreamed
   - Intel (i915), merge requests are opened
-  - Asahi (Apple SoC GPUs), WIP status
+  - Asahi (Apple SoC GPUs), partially merged upstream
 # How to try out DRM context:
-. Like Venus and Virgl context, DRM context requires applying WIP
+. DRM context uses host blobs and on host requires latest 6.13 version
-KVM patches [3] to host kernel, otherwise mapping of GPU memory blobs
+of Linux kernel that contains necessary KVM fixes.
-will likely fail.
+. Use latest Mesa (both guest and host) and libvirglrenderer versions.
-[3] https://lore.kernel.org/all/20240726235234.228822-1-seanjc@google.com/
+ Use build flags documented in tha patch #10 of this series.
-. Use latest libvirglrenderer from upstream git/main for Freedreno
+. On guest, use latest Linux kernel v6.14-rc or newer.
 and AMDGPU native contexts. For Intel use patches [4].
 [4] https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1384
 . On guest, use latest Mesa version for Freedreno. For AMDGPU use
 Mesa patches [5], for Intel [6].
 [5] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21658
 [6] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29870
 . On guest, use latest Linux kernel v6.6+.
 Example Qemu cmdline that enables DRM context:
-  qemu-system-x86_64 -device virtio-vga-gl,hostmem=4G,blob=true,drm=true \
+  qemu-system-x86_64 -device virtio-vga-gl,hostmem=4G,blob=on,drm_native_context=on \
       -machine q35,accel=kvm,memory-backend=mem1 \
       -object memory-backend-memfd,id=mem1,size=8G -m 8G
 # Note about known performance problem in Qemu:
 DRM contexts are mapping host blobs extensively and these mapping
-operations work slowly in Qemu. Exact reason is unkown. Mappings work
+operations work slowly in Qemu. We will need to optimize hostmem
-fast on Crosvm For DRM contexts this problem is more visible than for
+unmapping that currently happens in a deffered RCU work, blocking
-Venus/Virgl.
+GPU for a substantial time [2].
-Dmitry Osipenko (5):
+[2] https://lore.kernel.org/qemu-devel/f58d250d-3831-4ff1-a018-f62f9aeb2527@collabora.com/T/#m17ac72336d28a64c793d4e4e0c87fc7dff9aa847
 Changelog:
 v11:- Added column for libvirglrenderer host requrements versions and
       corrected Asahi kernel link. Suggested by Akihiko Odaki.
 v10:- Added links to Asahi and i915 virglrenderer MRs, link to Asahi host
       kernel. Suggested by Akihiko Odaki.
     - Renamed gfxstream guest requrements table's colum to match the host
       requirements table. Suggested by Akihiko Odaki.
 v9: - Updated doc patch by addresing review comments from Akihiko Odaki.
       Made kernel requirements section specific to guest kernel and
       removed reference to host requirements. Removed examples of
       external projects' build flags.
     - Added guest kernel minimum versions to the guest requirements table.
 v8: - Addressed review comments from Akihiko Odaki on the doc patch.
     - Added r-bs from Akihiko Odaki on the doc patches.
     - Extended vrend doc with info about hostmem requirement for GL 4.6
 v7: - Added r-b from Alex Bennée to the async fencing patch.
     - Updated virtio-gpu doc patch with addressed review comments
       from Akihiko Odaki.
 v6: - Fixed compilation warning using older version of virglrenderer,
       which wasn't fixed properly in v5.
     - Added t-bs from Alex Bennée.
     - Added patches to improve virgl/venus doc by adding links
       to the Mesa doc as was suggested by Akihiko Odaki.
     - Updated patch that documents guest/host requirements. Added
       links to Asahi nctx and reworked the doc structure by adding
       requirements to each context-type section instead of having
       one big blob or requirements, which was objected by Akihiko Odaki.
 v5: - Added r-bs from Akihiko Odaki.
     - Added acks from Michael Tsirkin.
     - Fixed compilation warning using older version of virglrenderer that
       was reported by Alex Bennée. Noticed that I need to keep old
       virgl_write_fence() code around for the older virglrenderer in
       "Support  asynchronous fencing" patch, so added it back and verified
       that old virglrenderer works properly.
     - Added new patch from Alex Bennée that adds more virtio-gpu
       documentation with a couple corrections and additions to it from me.
     - Rebased patches on top of latest staging tree.
 v4: - Improved SDL2/dmabuf patch by reusing existing Meson X11 config
       option, better handling EGL error and extending comment telling
       that it's safe to enable SDL2 EGL preference hint. As was suggested
       by Akihiko Odaki.
     - Replaced another QSLIST_FOREACH_SAFE with QSLIST_EMPTY+FIRST in
       the async-fencing patch for more consistency of the code. As was
       suggested by Akihiko Odaki.
     - Added missing braces around if-statement that was spotted by
       Alex Bennée.
     - Renamed 'drm=on' option of virtio-gpu-gl device to
       'drm_native_context=on' for more clarity as was suggested by
       Alex Bennée. Haven't added added new context-type option that
       was also proposed by Alex, might do it with a separate patch.
       This context-type option will duplicate and depecate existing
       options, but in a longer run likely will be worthwhile adding
       it.
     - Dropped Linux headers-update patch as headers has been updated
       in the staging tree.
 v3: - Improved EGL presence-check code on X11 systems for the SDL2
       hint that prefers EGL over GLX by using better ifdefs and checking
       Xlib presence at a build time to avoid build failure if lib SDL2
       and system are configured with a disabled X11 support. Also added
       clarifying comment telling that X11 hint doesn't affect Wayland
       systems. Suggested by Akihiko Odaki.
     - Corrected strerror(err) that used negative error where it should
       be positive and vice versa that was caught by Akihiko Odaki. Added
       clarifying comment for the case where we get positive error code
       from virglrenderer that differs from other virglrenderer API functions.
     - Improved QSLIST usage by dropping mutex protecting the async fence
       list and using atomic variant of QSLIST helpers instead. Switched away
       from using FOREACH helper to improve readability of the code, showing
       that we don't precess list in unoptimal way. Like was suggested by
       Akihiko Odaki.
     - Updated patchset base to Venus v18.
 v2: - Updated SDL2-dmabuf patch by making use of error_report() and
       checking presense of X11+EGL in the system before making SDL2
       to prefer EGL backend over GLX, suggested by Akihiko Odaki.
     - Improved SDL2's dmabuf-presence check that wasn't done properly
       in v1, where EGL was set up only after first console was fully
       inited, and thus, SDL's display .has_dmabuf callback didn't work
       for the first console. Now dmabuf support status is pre-checked
       before console is registered.
     - Updated commit description of the patch that fixes SDL2's context
       switching logic with a more detailed explanation of the problem.
       Suggested by Akihiko Odaki.
     - Corrected rebase typo in the async-fencing patch and switched
       async-fencing to use a sigle-linked list instead of the double,
       as was suggested by Akihiko Odaki.
     - Replaced "=true" with "=on" in the DRM native context documentation
       example and made virtio_gpu_virgl_init() to fail with a error message
       if DRM context can't be initialized instead of giving a warning
       message, as was suggested by Akihiko Odaki.
     - Added patchew's dependecy tag to the cover letter as was suggested by
       Akihiko Odaki.
 Alex Bennée (1):
   docs/system: virtio-gpu: Document host/guest requirements
 Dmitry Osipenko (8):
   ui/sdl2: Restore original context after new context creation
-  linux-headers: Update to Linux v6.12-rc1
   virtio-gpu: Handle virgl fence creation errors
   virtio-gpu: Support asynchronous fencing
   virtio-gpu: Support DRM native context
+  ui/sdl2: Don't disable scanout when display is refreshed
+  ui/gtk: Don't disable scanout when display is refreshed
+  docs/system: virtio-gpu: Add link to Mesa VirGL doc
+  docs/system: virtio-gpu: Update Venus link
 Pierre-Eric Pelloux-Prayer (1):
   ui/sdl2: Implement dpy dmabuf functions
- docs/system/devices/virtio-gpu.rst            |  11 +
+ docs/system/devices/virtio-gpu.rst | 117 +++++++++++++++++++-
- hw/display/virtio-gpu-gl.c                    |   5 +
+ hw/display/virtio-gpu-gl.c         |   5 +
- hw/display/virtio-gpu-virgl.c                 | 153 ++++++++++--
+ hw/display/virtio-gpu-virgl.c      | 164 ++++++++++++++++++++++++++++-
- hw/display/virtio-gpu.c                       |  15 ++
+ hw/display/virtio-gpu.c            |  15 +++
- include/hw/virtio/virtio-gpu.h                |  17 ++
+ include/hw/virtio/virtio-gpu.h     |  16 +++
- include/standard-headers/drm/drm_fourcc.h     |  43 ++++
+ include/ui/sdl2.h                  |   7 ++
- include/standard-headers/linux/const.h        |  17 ++
+ meson.build                        |   6 +-
- include/standard-headers/linux/ethtool.h      | 226 ++++++++++++++++++
+ ui/gtk-egl.c                       |   1 -
- include/standard-headers/linux/fuse.h         |  22 +-
+ ui/gtk-gl-area.c                   |   1 -
- .../linux/input-event-codes.h                 |   2 +
+ ui/sdl2-gl.c                       |  68 +++++++++++-
- include/standard-headers/linux/pci_regs.h     |  41 +++-
+ ui/sdl2.c                          |  42 ++++++++
- .../standard-headers/linux/virtio_balloon.h   |  16 +-
+files changed, 429 insertions(+), 13 deletions(-)
  include/standard-headers/linux/virtio_gpu.h   |   1 +
  include/ui/sdl2.h                             |   5 +
  linux-headers/asm-arm64/mman.h                |   9 +
  linux-headers/asm-arm64/unistd.h              |  25 +-
  linux-headers/asm-generic/unistd.h            |   6 +-
  linux-headers/asm-loongarch/kvm.h             |  24 ++
  linux-headers/asm-loongarch/unistd.h          |   4 +-
  linux-headers/asm-riscv/kvm.h                 |   7 +
  linux-headers/asm-riscv/unistd.h              |  41 +---
  linux-headers/asm-x86/kvm.h                   |   2 +
  linux-headers/asm-x86/unistd_64.h             |   1 +
  linux-headers/asm-x86/unistd_x32.h            |   1 +
  linux-headers/linux/bits.h                    |   3 +
  linux-headers/linux/const.h                   |  17 ++
  linux-headers/linux/iommufd.h                 | 143 +++++++++--
  linux-headers/linux/kvm.h                     |  23 +-
  linux-headers/linux/mman.h                    |   1 +
  linux-headers/linux/psp-sev.h                 |  28 +++
  ui/sdl2-gl.c                                  |  42 ++++
  ui/sdl2.c                                     |   8 +
 files changed, 851 insertions(+), 108 deletions(-)
 --
-.46.0
+.48.1

-[PATCH v1 1/6] ui/sdl2: Restore original context after new context creation
+[PATCH v11 01/10] ui/sdl2: Restore original context after new context creation
 SDL API changes GL context to a newly created GL context, which differs
 from other GL providers that don't switch context. Change SDL backend to
 restore the original GL context. This allows Qemu's virtio-gpu to support
-new virglrenderer async-fencing feature for Virgl context, otherwise it's
+new virglrenderer async-fencing feature for Virgl contexts, otherwise
-impossible for virglrenderer to switch GL context from a thread that waits
+virglrenderer's vrend creates a fence-sync context on the Qemu's
-for async-fences.
+main-loop thread that erroneously stays in-use by the main-loop after
 creation, not allowing vrend's fence-sync thread switch to this new
 context that belongs to it.
+Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
+Acked-by: Michael S. Tsirkin <mst@redhat.com>
+Tested-by: Alex Bennée <alex.bennee@linaro.org>
 Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
 ---
  ui/sdl2-gl.c | 3 +++
 file changed, 3 insertions(+)
 ...
 +
      return (QEMUGLContext)ctx;
  }
 --
-.46.0
+.48.1

-[PATCH v1 2/6] ui/sdl2: Implement dpy dmabuf functions
+[PATCH v11 02/10] ui/sdl2: Implement dpy dmabuf functions
 ...
 doing copies.
 To get this working on X11, we use the existing SDL hint:
 SDL_HINT_VIDEO_X11_FORCE_EGL (because dmabuf can't be used with GLX).
+Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
+Acked-by: Michael S. Tsirkin <mst@redhat.com>
+Tested-by: Alex Bennée <alex.bennee@linaro.org>
 Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
 ---
- include/ui/sdl2.h |  5 +++++
+ include/ui/sdl2.h |  7 ++++++
- ui/sdl2-gl.c      | 39 +++++++++++++++++++++++++++++++++++++++
+ meson.build       |  6 ++---
- ui/sdl2.c         |  8 ++++++++
+ ui/sdl2-gl.c      | 64 +++++++++++++++++++++++++++++++++++++++++++++++
-files changed, 52 insertions(+)
+ ui/sdl2.c         | 42 +++++++++++++++++++++++++++++++
 files changed, 115 insertions(+), 4 deletions(-)
 diff --git a/include/ui/sdl2.h b/include/ui/sdl2.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/ui/sdl2.h
 +++ b/include/ui/sdl2.h
+@@ -XXX,XX +XXX,XX @@ struct sdl2_console {
+     bool gui_keysym;
+     SDL_GLContext winctx;
+     QKbdState *kbd;
++    bool has_dmabuf;
+ #ifdef CONFIG_OPENGL
+     QemuGLShader *gls;
+     egl_fb guest_fb;
 @@ -XXX,XX +XXX,XX @@ void sdl2_gl_scanout_texture(DisplayChangeListener *dcl,
                               void *d3d_tex2d);
  void sdl2_gl_scanout_flush(DisplayChangeListener *dcl,
                             uint32_t x, uint32_t y, uint32_t w, uint32_t h);
 +void sdl2_gl_scanout_dmabuf(DisplayChangeListener *dcl,
 +                            QemuDmaBuf *dmabuf);
 +void sdl2_gl_release_dmabuf(DisplayChangeListener *dcl,
 +                            QemuDmaBuf *dmabuf);
 +bool sdl2_gl_has_dmabuf(DisplayChangeListener *dcl);
++void sdl2_gl_console_init(struct sdl2_console *scon);
  #endif /* SDL2_H */
+diff --git a/meson.build b/meson.build
+index XXXXXXX..XXXXXXX 100644
+--- a/meson.build
++++ b/meson.build
+@@ -XXX,XX +XXX,XX @@ if get_option('gtk') \
+   endif
+ endif
+-x11 = not_found
+-if gtkx11.found()
+-  x11 = dependency('x11', method: 'pkg-config', required: gtkx11.found())
+-endif
++x11 = dependency('x11', method: 'pkg-config', required: gtkx11.found())
++
+ png = not_found
+ if get_option('png').allowed() and have_system
+    png = dependency('libpng', version: '>=1.6.34', required: get_option('png'),
 diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c
 index XXXXXXX..XXXXXXX 100644
 --- a/ui/sdl2-gl.c
 +++ b/ui/sdl2-gl.c
 @@ -XXX,XX +XXX,XX @@
   */
  #include "qemu/osdep.h"
 +#include "qemu/main-loop.h"
++#include "qemu/error-report.h"
  #include "ui/console.h"
  #include "ui/input.h"
  #include "ui/sdl2.h"
-@@ -XXX,XX +XXX,XX @@ void sdl2_gl_scanout_texture(DisplayChangeListener *dcl,
+@@ -XXX,XX +XXX,XX @@ void sdl2_gl_scanout_flush(DisplayChangeListener *dcl,
-                          backing_id, false);
      SDL_GL_SwapWindow(scon->real_window);
  }
++
 +void sdl2_gl_scanout_dmabuf(DisplayChangeListener *dcl,
 +                            QemuDmaBuf *dmabuf)
 +{
 +    struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl);
 +
 +    assert(scon->opengl);
 +    SDL_GL_MakeCurrent(scon->real_window, scon->winctx);
 +
 +    egl_dmabuf_import_texture(dmabuf);
 +    if (!qemu_dmabuf_get_texture(dmabuf)) {
-+        fprintf(stderr, "sdl2_gl_scanout_dmabuf failed fd=%d\n",
++        error_report("%s: failed fd=%d", __func__, qemu_dmabuf_get_fd(dmabuf));
-+                qemu_dmabuf_get_fd(dmabuf));
++        return;
 +    }
 +
 +    sdl2_gl_scanout_texture(dcl, qemu_dmabuf_get_texture(dmabuf), false,
 +                            qemu_dmabuf_get_width(dmabuf),
 +                            qemu_dmabuf_get_height(dmabuf),
 ...
 +    egl_dmabuf_release_texture(dmabuf);
 +}
 +
 +bool sdl2_gl_has_dmabuf(DisplayChangeListener *dcl)
 +{
-+    return qemu_egl_has_dmabuf();
++    struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl);
-+}
++
-+
++    return scon->has_dmabuf;
- void sdl2_gl_scanout_flush(DisplayChangeListener *dcl,
++}
-                            uint32_t x, uint32_t y, uint32_t w, uint32_t h)
++
- {
++void sdl2_gl_console_init(struct sdl2_console *scon)
 +{
 +    bool hidden = scon->hidden;
 +
 +    scon->hidden = true;
 +    scon->surface = qemu_create_displaysurface(1, 1);
 +    sdl2_window_create(scon);
 +
 +    /*
 +     * QEMU checks whether console supports dma-buf before switching
 +     * to the console.  To break this chicken-egg problem we pre-check
 +     * dma-buf availability beforehand using a dummy SDL window.
 +     */
 +    scon->has_dmabuf = qemu_egl_has_dmabuf();
 +
 +    sdl2_window_destroy(scon);
 +    qemu_free_displaysurface(scon->surface);
 +
 +    scon->surface = NULL;
 +    scon->hidden = hidden;
 +}
 diff --git a/ui/sdl2.c b/ui/sdl2.c
 index XXXXXXX..XXXXXXX 100644
 --- a/ui/sdl2.c
 +++ b/ui/sdl2.c
+@@ -XXX,XX +XXX,XX @@
+ #include "qemu/log.h"
+ #include "qemu-main.h"
++#ifdef CONFIG_X11
++#include <X11/Xlib.h>
++#endif
++
+ static int sdl2_num_outputs;
+ static struct sdl2_console *sdl2_console;
 @@ -XXX,XX +XXX,XX @@ void sdl2_window_create(struct sdl2_console *scon)
          /* The SDL renderer is only used by sdl2-2D, when OpenGL is disabled */
          scon->real_renderer = SDL_CreateRenderer(scon->real_window, -1, 0);
      }
 +
 ...
 +    .dpy_gl_release_dmabuf   = sdl2_gl_release_dmabuf,
 +    .dpy_has_dmabuf          = sdl2_gl_has_dmabuf,
  };
  static bool
+@@ -XXX,XX +XXX,XX @@ static void sdl2_display_early_init(DisplayOptions *o)
+     }
+ }
++static void sdl2_set_hint_x11_force_egl(void)
++{
++#if defined(SDL_HINT_VIDEO_X11_FORCE_EGL) && defined(CONFIG_OPENGL) && \
++    defined(CONFIG_X11)
++    Display *x_disp = XOpenDisplay(NULL);
++    EGLDisplay egl_display;
++
++    if (!x_disp) {
++        return;
++    }
++
++    /* Prefer EGL over GLX to get dma-buf support. */
++    egl_display = eglGetDisplay((EGLNativeDisplayType)x_disp);
++
++    if (egl_display != EGL_NO_DISPLAY) {
++        /*
++         * Setting X11_FORCE_EGL hint doesn't make SDL to prefer X11 over
++         * Wayland. SDL will use Wayland driver even if XWayland presents.
++         * It's always safe to set the hint even if X11 is not used by SDL.
++         * SDL will work regardless of the hint.
++         */
++        SDL_SetHint(SDL_HINT_VIDEO_X11_FORCE_EGL, "1");
++        eglTerminate(egl_display);
++    }
++
++    XCloseDisplay(x_disp);
++#endif
++}
++
+ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o)
+ {
+     uint8_t data = 0;
 @@ -XXX,XX +XXX,XX @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o)
      SDL_SetHint(SDL_HINT_ALLOW_ALT_TAB_WHILE_GRABBED, "0");
  #endif
      SDL_SetHint(SDL_HINT_WINDOWS_NO_CLOSE_ON_ALT_F4, "1");
-+    SDL_SetHint(SDL_HINT_VIDEO_X11_FORCE_EGL, "1");
++    sdl2_set_hint_x11_force_egl();
      SDL_EnableScreenSaver();
      memset(&info, 0, sizeof(info));
      SDL_VERSION(&info.version);
+@@ -XXX,XX +XXX,XX @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o)
+         sdl2_console[i].kbd = qkbd_state_init(con);
+         if (display_opengl) {
+             qemu_console_set_display_gl_ctx(con, &sdl2_console[i].dgc);
++            sdl2_gl_console_init(&sdl2_console[i]);
+         }
+         register_displaychangelistener(&sdl2_console[i].dcl);
 --
-.46.0
+.48.1

-[PATCH v1 4/6] virtio-gpu: Handle virgl fence creation errors
+[PATCH v11 03/10] virtio-gpu: Handle virgl fence creation errors
 Print out error messages when virgl fence creation fails to aid debugging
 of the fence-related bugs.
+Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
+Acked-by: Michael S. Tsirkin <mst@redhat.com>
+Tested-by: Alex Bennée <alex.bennee@linaro.org>
 Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
 ---
- hw/display/virtio-gpu-virgl.c | 8 +++++++-
+ hw/display/virtio-gpu-virgl.c | 13 ++++++++++++-
-file changed, 7 insertions(+), 1 deletion(-)
+file changed, 12 insertions(+), 1 deletion(-)
 diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/display/virtio-gpu-virgl.c
 +++ b/hw/display/virtio-gpu-virgl.c
 ...
      }
      trace_virtio_gpu_fence_ctrl(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type);
 -    virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type);
 +
++    /*
++     * Unlike other virglrenderer functions, this one returns a positive
++     * error code.
++     */
 +    ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0);
-+    if (ret)
++    if (ret) {
 +        qemu_log_mask(LOG_GUEST_ERROR,
 +                      "%s: virgl_renderer_create_fence error: %s",
-+                      __func__, strerror(-ret));
++                      __func__, strerror(ret));
 +    }
  }
  static void virgl_write_fence(void *opaque, uint32_t fence)
 --
-.46.0
+.48.1

-[PATCH v1 5/6] virtio-gpu: Support asynchronous fencing
+[PATCH v11 04/10] virtio-gpu: Support asynchronous fencing
 Support asynchronous fencing feature of virglrenderer. It allows Qemu to
 handle fence as soon as it's signalled instead of periodically polling
 the fence status. This feature is required for enabling DRM context
 support in Qemu because legacy fencing mode isn't supported for DRM
 contexts in virglrenderer.
+Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
+Acked-by: Michael S. Tsirkin <mst@redhat.com>
+Tested-by: Alex Bennée <alex.bennee@linaro.org>
+Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
 Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
 ---
  hw/display/virtio-gpu-gl.c     |   3 +
- hw/display/virtio-gpu-virgl.c  | 143 ++++++++++++++++++++++++++++-----
+ hw/display/virtio-gpu-virgl.c  | 147 +++++++++++++++++++++++++++++++--
- include/hw/virtio/virtio-gpu.h |  14 ++++
+ include/hw/virtio/virtio-gpu.h |  13 +++
-files changed, 141 insertions(+), 19 deletions(-)
+files changed, 154 insertions(+), 9 deletions(-)
 diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/display/virtio-gpu-gl.c
 +++ b/hw/display/virtio-gpu-gl.c
 ...
 @@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
      trace_virtio_gpu_fence_ctrl(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type);
+-    /*
+-     * Unlike other virglrenderer functions, this one returns a positive
+-     * error code.
+-     */
 -    ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0);
--    if (ret)
+-    if (ret) {
 -        qemu_log_mask(LOG_GUEST_ERROR,
 -                      "%s: virgl_renderer_create_fence error: %s",
--                      __func__, strerror(-ret));
+-                      __func__, strerror(ret));
 +    if (gl->context_fence_enabled &&
 +        (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_INFO_RING_IDX)) {
++#if VIRGL_VERSION_MAJOR >= 1
 +        uint32_t flags = 0;
 +
 +        ret = virgl_renderer_context_create_fence(cmd->cmd_hdr.ctx_id, flags,
 +                                                  cmd->cmd_hdr.ring_idx,
 +                                                  cmd->cmd_hdr.fence_id);
-+        if (ret)
++        if (ret) {
 +            qemu_log_mask(LOG_GUEST_ERROR,
 +                          "%s: virgl_renderer_context_create_fence error: %s",
-+                          __func__, strerror(ret));
++                          __func__, strerror(-ret));
 +        }
 +#else
 +        /* gl->context_fence_enabled cannot be set with older virglrenderer */
 +        g_assert_not_reached();
 +#endif
 +    } else {
++        /*
++         * Unlike other virglrenderer functions, this one returns a positive
++         * error code.
++         */
 +        ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0);
-+        if (ret)
++        if (ret) {
 +            qemu_log_mask(LOG_GUEST_ERROR,
 +                          "%s: virgl_renderer_create_fence error: %s",
-+                          __func__, strerror(-ret));
++                          __func__, strerror(ret));
 +        }
      }
  }
@@ -XXX,XX +XXX,XX @@ static void virgl_write_fence(void *opaque, uint32_t fence)
      }
  }
 +void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g)
 +{
 +    struct virtio_gpu_virgl_context_fence *f;
 +    VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);
 +
 +    while (!QSLIST_EMPTY(&gl->async_fenceq)) {
 +        f = QSLIST_FIRST(&gl->async_fenceq);
 +
 +        QSLIST_REMOVE_HEAD(&gl->async_fenceq, next);
 +
 +        g_free(f);
 +    }
- }
++}
++
--static void virgl_write_fence(void *opaque, uint32_t fence)
++#if VIRGL_VERSION_MAJOR >= 1
 +static void virtio_gpu_virgl_async_fence_bh(void *opaque)
- {
++{
--    VirtIOGPU *g = opaque;
++    QSLIST_HEAD(, virtio_gpu_virgl_context_fence) async_fenceq;
-+    struct virtio_gpu_virgl_context_fence *f, *f_tmp;
++    struct virtio_gpu_ctrl_command *cmd, *tmp;
-     struct virtio_gpu_ctrl_command *cmd, *tmp;
++    struct virtio_gpu_virgl_context_fence *f;
 +    VirtIOGPU *g = opaque;
 +    VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);
++
--    QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) {
++    QSLIST_MOVE_ATOMIC(&async_fenceq, &gl->async_fenceq);
--        /*
++
--         * the guest can end up emitting fences out of order
++    while (!QSLIST_EMPTY(&async_fenceq)) {
--         * so we should check all fenced cmds not just the first one.
++        f = QSLIST_FIRST(&async_fenceq);
--         */
++
--        if (cmd->cmd_hdr.fence_id > fence) {
++        QSLIST_REMOVE_HEAD(&async_fenceq, next);
--            continue;
++
 +    qemu_mutex_lock(&gl->async_fence_lock);
 +
 +    QTAILQ_FOREACH_SAFE(f, &gl->async_fenceq, next, f_tmp) {
 +        QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) {
 +            /*
 +             * the guest can end up emitting fences out of order
 +             * so we should check all fenced cmds not just the first one.
 +             */
 ...
 +                continue;
 +            }
 +            virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA);
 +            QTAILQ_REMOVE(&g->fenceq, cmd, next);
 +            g_free(cmd);
-         }
++        }
 -        trace_virtio_gpu_fence_resp(cmd->cmd_hdr.fence_id);
 -        virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA);
 -        QTAILQ_REMOVE(&g->fenceq, cmd, next);
 -        g_free(cmd);
 +
 +        trace_virtio_gpu_fence_resp(f->fence_id);
-+        QTAILQ_REMOVE(&gl->async_fenceq, f, next);
 +        g_free(f);
-         g->inflight--;
++        g->inflight--;
-         if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {
++        if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {
--            trace_virtio_gpu_dec_inflight_fences(g->inflight);
++            trace_virtio_gpu_dec_inflight_fences(g->inflight);
-+            fprintf(stderr, "inflight: %3d (-)\r", g->inflight);
++        }
          }
      }
 +
 +    qemu_mutex_unlock(&gl->async_fence_lock);
 +}
 +
 +void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g)
 +{
 +    struct virtio_gpu_virgl_context_fence *f, *f_tmp;
 +    VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);
 +
 +    QTAILQ_FOREACH_SAFE(f, &gl->async_fenceq, next, f_tmp) {
 +        QTAILQ_REMOVE(&gl->async_fenceq, f, next);
 +        g_free(f);
 +    }
 +}
 +
 +static void
 +virtio_gpu_virgl_push_async_fence(VirtIOGPU *g, uint32_t ctx_id,
 ...
 +    f = g_new(struct virtio_gpu_virgl_context_fence, 1);
 +    f->ctx_id = ctx_id;
 +    f->ring_idx = ring_idx;
 +    f->fence_id = fence_id;
 +
-+    qemu_mutex_lock(&gl->async_fence_lock);
++    QSLIST_INSERT_HEAD_ATOMIC(&gl->async_fenceq, f, next);
 +    QTAILQ_INSERT_TAIL(&gl->async_fenceq, f, next);
 +    qemu_mutex_unlock(&gl->async_fence_lock);
 +
 +    qemu_bh_schedule(gl->async_fence_bh);
 +}
 +
-+static void virgl_write_fence(void *opaque, uint32_t fence)
++static void virgl_write_async_fence(void *opaque, uint32_t fence)
 +{
 +    VirtIOGPU *g = opaque;
 +
 +    virtio_gpu_virgl_push_async_fence(g, 0, -1, fence);
 +}
 +
-+static void virgl_write_context_fence(void *opaque, uint32_t ctx_id,
++static void virgl_write_async_context_fence(void *opaque, uint32_t ctx_id,
-+                                      uint32_t ring_idx, uint64_t fence)
++                                            uint32_t ring_idx, uint64_t fence)
 +{
 +    VirtIOGPU *g = opaque;
 +
 +    virtio_gpu_virgl_push_async_fence(g, ctx_id, ring_idx, fence);
- }
++}
++#endif
 +
  static virgl_renderer_gl_context
+ virgl_create_context(void *opaque, int scanout_idx,
+                      struct virgl_renderer_gl_ctx_param *params)
 @@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g)
          dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL);
          dpy_gl_scanout_disable(g->parent_obj.scanout[i].con);
      }
 +
 ...
 @@ -XXX,XX +XXX,XX @@ int virtio_gpu_virgl_init(VirtIOGPU *g)
      if (qemu_egl_display) {
          virtio_gpu_3d_cbs.version = 4;
          virtio_gpu_3d_cbs.get_egl_display = virgl_get_egl_display;
 +#if VIRGL_VERSION_MAJOR >= 1
-+        virtio_gpu_3d_cbs.write_context_fence = virgl_write_context_fence;
++        virtio_gpu_3d_cbs.write_fence         = virgl_write_async_fence;
 +        virtio_gpu_3d_cbs.write_context_fence = virgl_write_async_context_fence;
 +        flags |= VIRGL_RENDERER_ASYNC_FENCE_CB;
 +        flags |= VIRGL_RENDERER_THREAD_SYNC;
 +        gl->context_fence_enabled = true;
 +#endif
      }
 ...
                                      g);
 +
 +    gl->async_fence_bh = aio_bh_new(qemu_get_aio_context(),
 +                                    virtio_gpu_virgl_async_fence_bh,
 +                                    g);
-+
+ #endif
 +    qemu_mutex_init(&gl->async_fence_lock);
 +    QTAILQ_INIT(&gl->async_fenceq);
  #endif
      return 0;
-@@ -XXX,XX +XXX,XX @@ GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g)
-         }
-     }
-+    if (virtio_gpu_drm_enabled(g->parent_obj.conf)) {
-+        virgl_renderer_get_cap_set(VIRTIO_GPU_CAPSET_DRM,
-+                                   &capset_max_ver,
-+                                   &capset_max_size);
-+        if (capset_max_size) {
-+            virtio_gpu_virgl_add_capset(capset_ids, VIRTIO_GPU_CAPSET_DRM);
-+        }
-+    }
-+
-     return capset_ids;
- }
 diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/virtio/virtio-gpu.h
 +++ b/include/hw/virtio/virtio-gpu.h
 @@ -XXX,XX +XXX,XX @@ struct VirtIOGPUClass {
 ...
 +struct virtio_gpu_virgl_context_fence {
 +    uint32_t ctx_id;
 +    int64_t ring_idx;
 +    uint64_t fence_id;
-+    QTAILQ_ENTRY(virtio_gpu_virgl_context_fence) next;
++    QSLIST_ENTRY(virtio_gpu_virgl_context_fence) next;
 +};
 +
  /* VirtIOGPUGL renderer states */
  typedef enum {
      RS_START,       /* starting state */
 @@ -XXX,XX +XXX,XX @@ struct VirtIOGPUGL {
      QEMUTimer *print_stats;
      QEMUBH *cmdq_resume_bh;
 +
 +    QEMUBH *async_fence_bh;
-+    QemuMutex async_fence_lock;
++    QSLIST_HEAD(, virtio_gpu_virgl_context_fence) async_fenceq;
 +    QTAILQ_HEAD(, virtio_gpu_virgl_context_fence) async_fenceq;
 +
 +    bool context_fence_enabled;
  };
  struct VhostUserGPU {
 ...
  GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g);
 +void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g);
  #endif
 --
-.46.0
+.48.1

-[PATCH v1 6/6] virtio-gpu: Support DRM native context
+[PATCH v11 05/10] virtio-gpu: Support DRM native context
 Add support for DRM native contexts to VirtIO-GPU. DRM context is enabled
-using a new virtio-gpu-gl device option "drm=true".
+using a new virtio-gpu-gl device option "drm_native_context=on".
 Unlike Virgl and Venus contexts that operate on application API level,
 DRM native contexts work on a kernel UAPI level. This lower level results
 in a lightweight context implementations that yield better performance.
+Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
+Acked-by: Michael S. Tsirkin <mst@redhat.com>
+Tested-by: Alex Bennée <alex.bennee@linaro.org>
 Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
 ---
  docs/system/devices/virtio-gpu.rst | 11 +++++++++++
  hw/display/virtio-gpu-gl.c         |  2 ++
- hw/display/virtio-gpu-virgl.c      | 12 ++++++++++++
+ hw/display/virtio-gpu-virgl.c      | 22 ++++++++++++++++++++++
  hw/display/virtio-gpu.c            | 15 +++++++++++++++
  include/hw/virtio/virtio-gpu.h     |  3 +++
-files changed, 43 insertions(+)
+files changed, 53 insertions(+)
 diff --git a/docs/system/devices/virtio-gpu.rst b/docs/system/devices/virtio-gpu.rst
 index XXXXXXX..XXXXXXX 100644
 --- a/docs/system/devices/virtio-gpu.rst
 +++ b/docs/system/devices/virtio-gpu.rst
 @@ -XXX,XX +XXX,XX @@ of virtio-gpu host memory window. This is typically between 256M and 8G.
  .. _venus: https://gitlab.freedesktop.org/virgl/venus-protocol/
 +DRM native context is supported since release of `virglrenderer`_ v1.0.0
-+using `drm`_ protocol. ``DRM`` virtio-gpu capability set ("capset") requires
++using `drm`_ protocol.  ``DRM`` virtio-gpu capability set ("capset") requires
 +host blob support (``hostmem`` and ``blob`` fields) and should be enabled
-+using ``drm`` field. The ``hostmem`` field specifies the size of virtio-gpu
++using ``drm_native_context`` field.  The ``hostmem`` field specifies the size
-+host memory window. This is typically between 256M and 8G.
++of virtio-gpu host memory window. This is typically between 256M and 8G.
 +
 +.. parsed-literal::
-+    -device virtio-gpu-gl,hostmem=8G,blob=true,drm=true
++    -device virtio-gpu-gl,hostmem=8G,blob=on,drm_native_context=on
 +
 +.. _drm: https://gitlab.freedesktop.org/virgl/virglrenderer/-/tree/main/src/drm
 +
  virtio-gpu rutabaga
  -------------------
 diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/display/virtio-gpu-gl.c
 +++ b/hw/display/virtio-gpu-gl.c
-@@ -XXX,XX +XXX,XX @@ static Property virtio_gpu_gl_properties[] = {
+@@ -XXX,XX +XXX,XX @@ static const Property virtio_gpu_gl_properties[] = {
                      VIRTIO_GPU_FLAG_STATS_ENABLED, false),
      DEFINE_PROP_BIT("venus", VirtIOGPU, parent_obj.conf.flags,
                      VIRTIO_GPU_FLAG_VENUS_ENABLED, false),
-+    DEFINE_PROP_BIT("drm", VirtIOGPU, parent_obj.conf.flags,
++    DEFINE_PROP_BIT("drm_native_context", VirtIOGPU, parent_obj.conf.flags,
 +                    VIRTIO_GPU_FLAG_DRM_ENABLED, false),
-     DEFINE_PROP_END_OF_LIST(),
  };
+ static void virtio_gpu_gl_device_unrealize(DeviceState *qdev)
 diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/display/virtio-gpu-virgl.c
 +++ b/hw/display/virtio-gpu-virgl.c
 @@ -XXX,XX +XXX,XX @@ int virtio_gpu_virgl_init(VirtIOGPU *g)
 ...
 +            /*
 +             * Virglrenderer skips enabling DRM context support without
 +             * enabled async-fence feature. VirtIO-GPU will initialize
 +             * successfully, but DRM context won't be available in guest.
 +             */
-+            warn_report("DRM native context requires EGL display");
++            error_report("DRM native context requires EGL display");
 +            return -EINVAL;
 +        }
 +    }
  #endif
      ret = virgl_renderer_init(g, flags, &virtio_gpu_3d_cbs);
+@@ -XXX,XX +XXX,XX @@ GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g)
+         }
+     }
++    if (virtio_gpu_drm_enabled(g->parent_obj.conf)) {
++        virgl_renderer_get_cap_set(VIRTIO_GPU_CAPSET_DRM,
++                                   &capset_max_ver,
++                                   &capset_max_size);
++        if (capset_max_size) {
++            virtio_gpu_virgl_add_capset(capset_ids, VIRTIO_GPU_CAPSET_DRM);
++        }
++    }
++
+     return capset_ids;
+ }
 diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/display/virtio-gpu.c
 +++ b/hw/display/virtio-gpu.c
 @@ -XXX,XX +XXX,XX @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
 ...
 diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/virtio/virtio-gpu.h
 +++ b/include/hw/virtio/virtio-gpu.h
 @@ -XXX,XX +XXX,XX @@ enum virtio_gpu_base_conf_flags {
-     VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED,
      VIRTIO_GPU_FLAG_RUTABAGA_ENABLED,
      VIRTIO_GPU_FLAG_VENUS_ENABLED,
+     VIRTIO_GPU_FLAG_RESOURCE_UUID_ENABLED,
 +    VIRTIO_GPU_FLAG_DRM_ENABLED,
  };
  #define virtio_gpu_virgl_enabled(_cfg) \
 @@ -XXX,XX +XXX,XX @@ enum virtio_gpu_base_conf_flags {
 ...
 +    (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DRM_ENABLED))
  struct virtio_gpu_base_conf {
      uint32_t max_outputs;
 --
-.46.0
+.48.1

-New patch
+[PATCH v11 06/10] ui/sdl2: Don't disable scanout when display is refreshed
+Display refreshment is invoked by a timer and it erroneously disables
+the active scanout if it happens to be invoked after scanout has been
+enabled. This offending scanout-disable race condition with a timer
+can be easily hit when Qemu runs with a disabled vsync by using SDL or
+GTK displays (with vblank_mode=0 for GTK). Refreshment of display's
+content shouldn't disable the active display. Fix it by keeping the
+scanout's state unchanged when display is redrawn.
+Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
+Acked-by: Michael S. Tsirkin <mst@redhat.com>
+Tested-by: Alex Bennée <alex.bennee@linaro.org>
+Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
+---
+ ui/sdl2-gl.c | 1 -
+file changed, 1 deletion(-)
+diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c
+index XXXXXXX..XXXXXXX 100644
+--- a/ui/sdl2-gl.c
++++ b/ui/sdl2-gl.c
+@@ -XXX,XX +XXX,XX @@ static void sdl2_gl_render_surface(struct sdl2_console *scon)
+     int ww, wh;
+     SDL_GL_MakeCurrent(scon->real_window, scon->winctx);
+-    sdl2_set_scanout_mode(scon, false);
+     SDL_GetWindowSize(scon->real_window, &ww, &wh);
+     surface_gl_setup_viewport(scon->gls, scon->surface, ww, wh);
+--
+.48.1

-[PATCH v1 3/6] linux-headers: Update to Linux v6.12-rc1
+[PATCH v11 07/10] ui/gtk: Don't disable scanout when display is refreshed
-Update kernel headers to bring new VirtIO-GPU DRM capset.
+Display refreshment is invoked by a timer and it erroneously disables
 the active scanout if it happens to be invoked after scanout has been
 enabled. This offending scanout-disable race condition with a timer
 can be easily hit when Qemu runs with a disabled vsync by using SDL or
 GTK displays (with vblank_mode=0 for GTK). Refreshment of display's
 content shouldn't disable the active display. Fix it by keeping the
 scanout's state unchanged when display is redrawn.
+Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
+Acked-by: Michael S. Tsirkin <mst@redhat.com>
+Tested-by: Alex Bennée <alex.bennee@linaro.org>
 Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
 ---
- include/standard-headers/drm/drm_fourcc.h     |  43 ++++
+ ui/gtk-egl.c     | 1 -
- include/standard-headers/linux/const.h        |  17 ++
+ ui/gtk-gl-area.c | 1 -
- include/standard-headers/linux/ethtool.h      | 226 ++++++++++++++++++
+files changed, 2 deletions(-)
  include/standard-headers/linux/fuse.h         |  22 +-
  .../linux/input-event-codes.h                 |   2 +
  include/standard-headers/linux/pci_regs.h     |  41 +++-
  .../standard-headers/linux/virtio_balloon.h   |  16 +-
  include/standard-headers/linux/virtio_gpu.h   |   1 +
  linux-headers/asm-arm64/mman.h                |   9 +
  linux-headers/asm-arm64/unistd.h              |  25 +-
  linux-headers/asm-generic/unistd.h            |   6 +-
  linux-headers/asm-loongarch/kvm.h             |  24 ++
  linux-headers/asm-loongarch/unistd.h          |   4 +-
  linux-headers/asm-riscv/kvm.h                 |   7 +
  linux-headers/asm-riscv/unistd.h              |  41 +---
  linux-headers/asm-x86/kvm.h                   |   2 +
  linux-headers/asm-x86/unistd_64.h             |   1 +
  linux-headers/asm-x86/unistd_x32.h            |   1 +
  linux-headers/linux/bits.h                    |   3 +
  linux-headers/linux/const.h                   |  17 ++
  linux-headers/linux/iommufd.h                 | 143 +++++++++--
  linux-headers/linux/kvm.h                     |  23 +-
  linux-headers/linux/mman.h                    |   1 +
  linux-headers/linux/psp-sev.h                 |  28 +++
 files changed, 610 insertions(+), 93 deletions(-)
-diff --git a/include/standard-headers/drm/drm_fourcc.h b/include/standard-headers/drm/drm_fourcc.h
+diff --git a/ui/gtk-egl.c b/ui/gtk-egl.c
 index XXXXXXX..XXXXXXX 100644
---- a/include/standard-headers/drm/drm_fourcc.h
+--- a/ui/gtk-egl.c
-+++ b/include/standard-headers/drm/drm_fourcc.h
++++ b/ui/gtk-egl.c
-@@ -XXX,XX +XXX,XX @@ extern "C" {
+@@ -XXX,XX +XXX,XX @@ void gd_egl_refresh(DisplayChangeListener *dcl)
-  */
- #define I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC fourcc_mod_code(INTEL, 15)
+     if (vc->gfx.glupdates) {
+         vc->gfx.glupdates = 0;
-+/*
+-        gtk_egl_set_scanout_mode(vc, false);
-+ * Intel Color Control Surfaces (CCS) for graphics ver. 20 unified compression
+         gd_egl_draw(vc);
-+ * on integrated graphics
+     }
-+ *
+ }
-+ * The main surface is Tile 4 and at plane index 0. For semi-planar formats
+diff --git a/ui/gtk-gl-area.c b/ui/gtk-gl-area.c
 + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices
 + * 0 and 1, respectively. The CCS for all planes are stored outside of the
 + * GEM object in a reserved memory area dedicated for the storage of the
 + * CCS data for all compressible GEM objects.
 + */
 +#define I915_FORMAT_MOD_4_TILED_LNL_CCS fourcc_mod_code(INTEL, 16)
 +
 +/*
 + * Intel Color Control Surfaces (CCS) for graphics ver. 20 unified compression
 + * on discrete graphics
 + *
 + * The main surface is Tile 4 and at plane index 0. For semi-planar formats
 + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices
 + * 0 and 1, respectively. The CCS for all planes are stored outside of the
 + * GEM object in a reserved memory area dedicated for the storage of the
 + * CCS data for all compressible GEM objects. The GEM object must be stored in
 + * contiguous memory with a size aligned to 64KB
 + */
 +#define I915_FORMAT_MOD_4_TILED_BMG_CCS fourcc_mod_code(INTEL, 17)
 +
  /*
   * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
   *
@@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
  #define AMD_FMT_MOD_TILE_VER_GFX10 2
  #define AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS 3
  #define AMD_FMT_MOD_TILE_VER_GFX11 4
 +#define AMD_FMT_MOD_TILE_VER_GFX12 5
  /*
   * 64K_S is the same for GFX9/GFX10/GFX10_RBPLUS and hence has GFX9 as canonical
@@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
  /*
   * 64K_D for non-32 bpp is the same for GFX9/GFX10/GFX10_RBPLUS and hence has
   * GFX9 as canonical version.
 + *
 + * 64K_D_2D on GFX12 is identical to 64K_D on GFX11.
   */
  #define AMD_FMT_MOD_TILE_GFX9_64K_D 10
  #define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
@@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
  #define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
  #define AMD_FMT_MOD_TILE_GFX11_256K_R_X 31
 +/* Gfx12 swizzle modes:
 + *    0 - LINEAR
 + *    1 - 256B_2D  - 2D block dimensions
 + *    2 - 4KB_2D
 + *    3 - 64KB_2D
 + *    4 - 256KB_2D
 + *    5 - 4KB_3D   - 3D block dimensions
 + *    6 - 64KB_3D
 + *    7 - 256KB_3D
 + */
 +#define AMD_FMT_MOD_TILE_GFX12_256B_2D 1
 +#define AMD_FMT_MOD_TILE_GFX12_4K_2D 2
 +#define AMD_FMT_MOD_TILE_GFX12_64K_2D 3
 +#define AMD_FMT_MOD_TILE_GFX12_256K_2D 4
 +
  #define AMD_FMT_MOD_DCC_BLOCK_64B 0
  #define AMD_FMT_MOD_DCC_BLOCK_128B 1
  #define AMD_FMT_MOD_DCC_BLOCK_256B 2
 diff --git a/include/standard-headers/linux/const.h b/include/standard-headers/linux/const.h
 index XXXXXXX..XXXXXXX 100644
---- a/include/standard-headers/linux/const.h
+--- a/ui/gtk-gl-area.c
-+++ b/include/standard-headers/linux/const.h
++++ b/ui/gtk-gl-area.c
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ void gd_gl_area_refresh(DisplayChangeListener *dcl)
- #define _BITUL(x)    (_UL(1) << (x))
- #define _BITULL(x)    (_ULL(1) << (x))
+     if (vc->gfx.glupdates) {
+         vc->gfx.glupdates = 0;
-+#if !defined(__ASSEMBLY__)
+-        gtk_gl_area_set_scanout_mode(vc, false);
-+/*
+         gtk_gl_area_queue_render(GTK_GL_AREA(vc->gfx.drawing_area));
-+ * Missing __asm__ support
+     }
 + *
 + * __BIT128() would not work in the __asm__ code, as it shifts an
 + * 'unsigned __init128' data type as direct representation of
 + * 128 bit constants is not supported in the gcc compiler, as
 + * they get silently truncated.
 + *
 + * TODO: Please revisit this implementation when gcc compiler
 + * starts representing 128 bit constants directly like long
 + * and unsigned long etc. Subsequently drop the comment for
 + * GENMASK_U128() which would then start supporting __asm__ code.
 + */
 +#define _BIT128(x)    ((unsigned __int128)(1) << (x))
 +#endif
 +
  #define __ALIGN_KERNEL(x, a)        __ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - 1)
  #define __ALIGN_KERNEL_MASK(x, mask)    (((x) + (mask)) & ~(mask))
 diff --git a/include/standard-headers/linux/ethtool.h b/include/standard-headers/linux/ethtool.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/standard-headers/linux/ethtool.h
 +++ b/include/standard-headers/linux/ethtool.h
@@ -XXX,XX +XXX,XX @@ enum ethtool_module_power_mode {
      ETHTOOL_MODULE_POWER_MODE_HIGH,
  };
 +/**
 + * enum ethtool_c33_pse_ext_state - groups of PSE extended states
 + *      functions. IEEE 802.3-2022 33.2.4.4 Variables
 + *
 + * @ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION: Group of error_condition states
 + * @ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID: Group of mr_mps_valid states
 + * @ETHTOOL_C33_PSE_EXT_STATE_MR_PSE_ENABLE: Group of mr_pse_enable states
 + * @ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED: Group of option_detect_ted
 + *    states
 + * @ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM: Group of option_vport_lim states
 + * @ETHTOOL_C33_PSE_EXT_STATE_OVLD_DETECTED: Group of ovld_detected states
 + * @ETHTOOL_C33_PSE_EXT_STATE_PD_DLL_POWER_TYPE: Group of pd_dll_power_type
 + *    states
 + * @ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE: Group of power_not_available
 + *    states
 + * @ETHTOOL_C33_PSE_EXT_STATE_SHORT_DETECTED: Group of short_detected states
 + */
 +enum ethtool_c33_pse_ext_state {
 +    ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION = 1,
 +    ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID,
 +    ETHTOOL_C33_PSE_EXT_STATE_MR_PSE_ENABLE,
 +    ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED,
 +    ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM,
 +    ETHTOOL_C33_PSE_EXT_STATE_OVLD_DETECTED,
 +    ETHTOOL_C33_PSE_EXT_STATE_PD_DLL_POWER_TYPE,
 +    ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE,
 +    ETHTOOL_C33_PSE_EXT_STATE_SHORT_DETECTED,
 +};
 +
 +/**
 + * enum ethtool_c33_pse_ext_substate_mr_mps_valid - mr_mps_valid states
 + *      functions. IEEE 802.3-2022 33.2.4.4 Variables
 + *
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_DETECTED_UNDERLOAD: Underload
 + *    state
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_CONNECTION_OPEN: Port is not
 + *    connected
 + *
 + * The PSE monitors either the DC or AC Maintain Power Signature
 + * (MPS, see 33.2.9.1). This variable indicates the presence or absence of
 + * a valid MPS.
 + */
 +enum ethtool_c33_pse_ext_substate_mr_mps_valid {
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_DETECTED_UNDERLOAD = 1,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_CONNECTION_OPEN,
 +};
 +
 +/**
 + * enum ethtool_c33_pse_ext_substate_error_condition - error_condition states
 + *      functions. IEEE 802.3-2022 33.2.4.4 Variables
 + *
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_NON_EXISTING_PORT: Non-existing
 + *    port number
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNDEFINED_PORT: Undefined port
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT: Internal
 + *    hardware fault
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_COMM_ERROR_AFTER_FORCE_ON:
 + *    Communication error after force on
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS: Unknown
 + *    port status
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_TURN_OFF: Host
 + *    crash turn off
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_FORCE_SHUTDOWN:
 + *    Host crash force shutdown
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_CONFIG_CHANGE: Configuration
 + *    change
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP: Over
 + *    temperature detected
 + *
 + * error_condition is a variable indicating the status of
 + * implementation-specific fault conditions or optionally other system faults
 + * that prevent the PSE from meeting the specifications in Table 33–11 and that
 + * require the PSE not to source power. These error conditions are different
 + * from those monitored by the state diagrams in Figure 33–10.
 + */
 +enum ethtool_c33_pse_ext_substate_error_condition {
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_NON_EXISTING_PORT = 1,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNDEFINED_PORT,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_COMM_ERROR_AFTER_FORCE_ON,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_TURN_OFF,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_FORCE_SHUTDOWN,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_CONFIG_CHANGE,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP,
 +};
 +
 +/**
 + * enum ethtool_c33_pse_ext_substate_mr_pse_enable - mr_pse_enable states
 + *      functions. IEEE 802.3-2022 33.2.4.4 Variables
 + *
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_PSE_ENABLE_DISABLE_PIN_ACTIVE: Disable
 + *    pin active
 + *
 + * mr_pse_enable is control variable that selects PSE operation and test
 + * functions.
 + */
 +enum ethtool_c33_pse_ext_substate_mr_pse_enable {
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_PSE_ENABLE_DISABLE_PIN_ACTIVE = 1,
 +};
 +
 +/**
 + * enum ethtool_c33_pse_ext_substate_option_detect_ted - option_detect_ted
 + *    states functions. IEEE 802.3-2022 33.2.4.4 Variables
 + *
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_DET_IN_PROCESS: Detection
 + *    in process
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_CONNECTION_CHECK_ERROR:
 + *    Connection check error
 + *
 + * option_detect_ted is a variable indicating if detection can be performed
 + * by the PSE during the ted_timer interval.
 + */
 +enum ethtool_c33_pse_ext_substate_option_detect_ted {
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_DET_IN_PROCESS = 1,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_CONNECTION_CHECK_ERROR,
 +};
 +
 +/**
 + * enum ethtool_c33_pse_ext_substate_option_vport_lim - option_vport_lim states
 + *      functions. IEEE 802.3-2022 33.2.4.4 Variables
 + *
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_HIGH_VOLTAGE: Main supply
 + *    voltage is high
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_LOW_VOLTAGE: Main supply
 + *    voltage is low
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_VOLTAGE_INJECTION: Voltage
 + *    injection into the port
 + *
 + * option_vport_lim is an optional variable indicates if VPSE is out of the
 + * operating range during normal operating state.
 + */
 +enum ethtool_c33_pse_ext_substate_option_vport_lim {
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_HIGH_VOLTAGE = 1,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_LOW_VOLTAGE,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_VOLTAGE_INJECTION,
 +};
 +
 +/**
 + * enum ethtool_c33_pse_ext_substate_ovld_detected - ovld_detected states
 + *      functions. IEEE 802.3-2022 33.2.4.4 Variables
 + *
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OVLD_DETECTED_OVERLOAD: Overload state
 + *
 + * ovld_detected is a variable indicating if the PSE output current has been
 + * in an overload condition (see 33.2.7.6) for at least TCUT of a one-second
 + * sliding time.
 + */
 +enum ethtool_c33_pse_ext_substate_ovld_detected {
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_OVLD_DETECTED_OVERLOAD = 1,
 +};
 +
 +/**
 + * enum ethtool_c33_pse_ext_substate_power_not_available - power_not_available
 + *    states functions. IEEE 802.3-2022 33.2.4.4 Variables
 + *
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_BUDGET_EXCEEDED: Power
 + *    budget exceeded for the controller
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PORT_PW_LIMIT_EXCEEDS_CONTROLLER_BUDGET:
 + *    Configured port power limit exceeded controller power budget
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PD_REQUEST_EXCEEDS_PORT_LIMIT:
 + *    Power request from PD exceeds port limit
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_HW_PW_LIMIT: Power
 + *    denied due to Hardware power limit
 + *
 + * power_not_available is a variable that is asserted in an
 + * implementation-dependent manner when the PSE is no longer capable of
 + * sourcing sufficient power to support the attached PD. Sufficient power
 + * is defined by classification; see 33.2.6.
 + */
 +enum ethtool_c33_pse_ext_substate_power_not_available {
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_BUDGET_EXCEEDED =  1,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PORT_PW_LIMIT_EXCEEDS_CONTROLLER_BUDGET,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PD_REQUEST_EXCEEDS_PORT_LIMIT,
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_HW_PW_LIMIT,
 +};
 +
 +/**
 + * enum ethtool_c33_pse_ext_substate_short_detected - short_detected states
 + *      functions. IEEE 802.3-2022 33.2.4.4 Variables
 + *
 + * @ETHTOOL_C33_PSE_EXT_SUBSTATE_SHORT_DETECTED_SHORT_CONDITION: Short
 + *    condition was detected
 + *
 + * short_detected is a variable indicating if the PSE output current has been
 + * in a short circuit condition for TLIM within a sliding window (see 33.2.7.7).
 + */
 +enum ethtool_c33_pse_ext_substate_short_detected {
 +    ETHTOOL_C33_PSE_EXT_SUBSTATE_SHORT_DETECTED_SHORT_CONDITION = 1,
 +};
 +
  /**
   * enum ethtool_pse_types - Types of PSE controller.
   * @ETHTOOL_PSE_UNKNOWN: Type of PSE controller is unknown
@@ -XXX,XX +XXX,XX @@ enum ethtool_mm_verify_status {
      ETHTOOL_MM_VERIFY_STATUS_DISABLED,
  };
 +/**
 + * enum ethtool_module_fw_flash_status - plug-in module firmware flashing status
 + * @ETHTOOL_MODULE_FW_FLASH_STATUS_STARTED: The firmware flashing process has
 + *    started.
 + * @ETHTOOL_MODULE_FW_FLASH_STATUS_IN_PROGRESS: The firmware flashing process
 + *    is in progress.
 + * @ETHTOOL_MODULE_FW_FLASH_STATUS_COMPLETED: The firmware flashing process was
 + *    completed successfully.
 + * @ETHTOOL_MODULE_FW_FLASH_STATUS_ERROR: The firmware flashing process was
 + *    stopped due to an error.
 + */
 +enum ethtool_module_fw_flash_status {
 +    ETHTOOL_MODULE_FW_FLASH_STATUS_STARTED = 1,
 +    ETHTOOL_MODULE_FW_FLASH_STATUS_IN_PROGRESS,
 +    ETHTOOL_MODULE_FW_FLASH_STATUS_COMPLETED,
 +    ETHTOOL_MODULE_FW_FLASH_STATUS_ERROR,
 +};
 +
  /**
   * struct ethtool_gstrings - string set for data tagging
   * @cmd: Command number = %ETHTOOL_GSTRINGS
@@ -XXX,XX +XXX,XX @@ enum ethtool_link_mode_bit_indices {
      ETHTOOL_LINK_MODE_10baseT1S_Full_BIT         = 99,
      ETHTOOL_LINK_MODE_10baseT1S_Half_BIT         = 100,
      ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT     = 101,
 +    ETHTOOL_LINK_MODE_10baseT1BRR_Full_BIT         = 102,
      /* must be last entry */
      __ETHTOOL_LINK_MODE_MASK_NBITS
@@ -XXX,XX +XXX,XX @@ struct ethtool_link_settings {
       * uint32_t map_lp_advertising[link_mode_masks_nwords];
       */
  };
 +
 +/**
 + * enum phy_upstream - Represents the upstream component a given PHY device
 + * is connected to, as in what is on the other end of the MII bus. Most PHYs
 + * will be attached to an Ethernet MAC controller, but in some cases, there's
 + * an intermediate PHY used as a media-converter, which will driver another
 + * MII interface as its output.
 + * @PHY_UPSTREAM_MAC: Upstream component is a MAC (a switch port,
 + *              or ethernet controller)
 + * @PHY_UPSTREAM_PHY: Upstream component is a PHY (likely a media converter)
 + */
 +enum phy_upstream {
 +    PHY_UPSTREAM_MAC,
 +    PHY_UPSTREAM_PHY,
 +};
 +
  #endif /* _LINUX_ETHTOOL_H */
 diff --git a/include/standard-headers/linux/fuse.h b/include/standard-headers/linux/fuse.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/standard-headers/linux/fuse.h
 +++ b/include/standard-headers/linux/fuse.h
@@ -XXX,XX +XXX,XX @@
   *  - add backing_id to fuse_open_out, add FOPEN_PASSTHROUGH open flag
   *  - add FUSE_NO_EXPORT_SUPPORT init flag
   *  - add FUSE_NOTIFY_RESEND, add FUSE_HAS_RESEND init flag
 + *
 + *  7.41
 + *  - add FUSE_ALLOW_IDMAP
   */
  #ifndef _LINUX_FUSE_H
@@ -XXX,XX +XXX,XX @@
  #define FUSE_KERNEL_VERSION 7
  /** Minor version number of this interface */
 -#define FUSE_KERNEL_MINOR_VERSION 40
 +#define FUSE_KERNEL_MINOR_VERSION 41
  /** The node ID of the root inode */
  #define FUSE_ROOT_ID 1
@@ -XXX,XX +XXX,XX @@ struct fuse_file_lock {
   * FUSE_NO_EXPORT_SUPPORT: explicitly disable export support
   * FUSE_HAS_RESEND: kernel supports resending pending requests, and the high bit
   *            of the request ID indicates resend requests
 + * FUSE_ALLOW_IDMAP: allow creation of idmapped mounts
   */
  #define FUSE_ASYNC_READ        (1 << 0)
  #define FUSE_POSIX_LOCKS    (1 << 1)
@@ -XXX,XX +XXX,XX @@ struct fuse_file_lock {
  /* Obsolete alias for FUSE_DIRECT_IO_ALLOW_MMAP */
  #define FUSE_DIRECT_IO_RELAX    FUSE_DIRECT_IO_ALLOW_MMAP
 +#define FUSE_ALLOW_IDMAP    (1ULL << 40)
  /**
   * CUSE INIT request/reply flags
@@ -XXX,XX +XXX,XX @@ struct fuse_fallocate_in {
   */
  #define FUSE_UNIQUE_RESEND (1ULL << 63)
 +/**
 + * This value will be set by the kernel to
 + * (struct fuse_in_header).{uid,gid} fields in
 + * case when:
 + * - fuse daemon enabled FUSE_ALLOW_IDMAP
 + * - idmapping information is not available and uid/gid
 + *   can not be mapped in accordance with an idmapping.
 + *
 + * Note: an idmapping information always available
 + * for inode creation operations like:
 + * FUSE_MKNOD, FUSE_SYMLINK, FUSE_MKDIR, FUSE_TMPFILE,
 + * FUSE_CREATE and FUSE_RENAME2 (with RENAME_WHITEOUT).
 + */
 +#define FUSE_INVALID_UIDGID ((uint32_t)(-1))
 +
  struct fuse_in_header {
      uint32_t    len;
      uint32_t    opcode;
 diff --git a/include/standard-headers/linux/input-event-codes.h b/include/standard-headers/linux/input-event-codes.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/standard-headers/linux/input-event-codes.h
 +++ b/include/standard-headers/linux/input-event-codes.h
@@ -XXX,XX +XXX,XX @@
  #define KEY_CAMERA_ACCESS_ENABLE    0x24b    /* Enables programmatic access to camera devices. (HUTRR72) */
  #define KEY_CAMERA_ACCESS_DISABLE    0x24c    /* Disables programmatic access to camera devices. (HUTRR72) */
  #define KEY_CAMERA_ACCESS_TOGGLE    0x24d    /* Toggles the current state of the camera access control. (HUTRR72) */
 +#define KEY_ACCESSIBILITY        0x24e    /* Toggles the system bound accessibility UI/command (HUTRR116) */
 +#define KEY_DO_NOT_DISTURB        0x24f    /* Toggles the system-wide "Do Not Disturb" control (HUTRR94)*/
  #define KEY_BRIGHTNESS_MIN        0x250    /* Set Brightness to Minimum */
  #define KEY_BRIGHTNESS_MAX        0x251    /* Set Brightness to Maximum */
 diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/standard-headers/linux/pci_regs.h
 +++ b/include/standard-headers/linux/pci_regs.h
@@ -XXX,XX +XXX,XX @@
  #define  PCI_EXP_RTCTL_SENFEE    0x0002    /* System Error on Non-Fatal Error */
  #define  PCI_EXP_RTCTL_SEFEE    0x0004    /* System Error on Fatal Error */
  #define  PCI_EXP_RTCTL_PMEIE    0x0008    /* PME Interrupt Enable */
 -#define  PCI_EXP_RTCTL_CRSSVE    0x0010    /* CRS Software Visibility Enable */
 +#define  PCI_EXP_RTCTL_RRS_SVE    0x0010    /* Config RRS Software Visibility Enable */
 +#define  PCI_EXP_RTCTL_CRSSVE PCI_EXP_RTCTL_RRS_SVE /* compatibility */
  #define PCI_EXP_RTCAP        0x1e    /* Root Capabilities */
 -#define  PCI_EXP_RTCAP_CRSVIS    0x0001    /* CRS Software Visibility capability */
 +#define  PCI_EXP_RTCAP_RRS_SV    0x0001    /* Config RRS Software Visibility */
 +#define  PCI_EXP_RTCAP_CRSVIS PCI_EXP_RTCAP_RRS_SV /* compatibility */
  #define PCI_EXP_RTSTA        0x20    /* Root Status */
  #define  PCI_EXP_RTSTA_PME_RQ_ID 0x0000ffff /* PME Requester ID */
  #define  PCI_EXP_RTSTA_PME    0x00010000 /* PME status */
@@ -XXX,XX +XXX,XX @@
  #define PCI_EXT_CAP_ID_DVSEC    0x23    /* Designated Vendor-Specific */
  #define PCI_EXT_CAP_ID_DLF    0x25    /* Data Link Feature */
  #define PCI_EXT_CAP_ID_PL_16GT    0x26    /* Physical Layer 16.0 GT/s */
 +#define PCI_EXT_CAP_ID_NPEM    0x29    /* Native PCIe Enclosure Management */
  #define PCI_EXT_CAP_ID_PL_32GT  0x2A    /* Physical Layer 32.0 GT/s */
  #define PCI_EXT_CAP_ID_DOE    0x2E    /* Data Object Exchange */
  #define PCI_EXT_CAP_ID_MAX    PCI_EXT_CAP_ID_DOE
@@ -XXX,XX +XXX,XX @@
  #define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK        0x000000F0
  #define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT    4
 +/* Native PCIe Enclosure Management */
 +#define PCI_NPEM_CAP     0x04 /* NPEM capability register */
 +#define  PCI_NPEM_CAP_CAPABLE     0x00000001 /* NPEM Capable */
 +
 +#define PCI_NPEM_CTRL    0x08 /* NPEM control register */
 +#define  PCI_NPEM_CTRL_ENABLE     0x00000001 /* NPEM Enable */
 +
 +/*
 + * Native PCIe Enclosure Management indication bits and Reset command bit
 + * are corresponding for capability and control registers.
 + */
 +#define  PCI_NPEM_CMD_RESET       0x00000002 /* Reset Command */
 +#define  PCI_NPEM_IND_OK          0x00000004 /* OK */
 +#define  PCI_NPEM_IND_LOCATE      0x00000008 /* Locate */
 +#define  PCI_NPEM_IND_FAIL        0x00000010 /* Fail */
 +#define  PCI_NPEM_IND_REBUILD     0x00000020 /* Rebuild */
 +#define  PCI_NPEM_IND_PFA         0x00000040 /* Predicted Failure Analysis */
 +#define  PCI_NPEM_IND_HOTSPARE    0x00000080 /* Hot Spare */
 +#define  PCI_NPEM_IND_ICA         0x00000100 /* In Critical Array */
 +#define  PCI_NPEM_IND_IFA         0x00000200 /* In Failed Array */
 +#define  PCI_NPEM_IND_IDT         0x00000400 /* Device Type */
 +#define  PCI_NPEM_IND_DISABLED    0x00000800 /* Disabled */
 +#define  PCI_NPEM_IND_SPEC_0      0x01000000
 +#define  PCI_NPEM_IND_SPEC_1      0x02000000
 +#define  PCI_NPEM_IND_SPEC_2      0x04000000
 +#define  PCI_NPEM_IND_SPEC_3      0x08000000
 +#define  PCI_NPEM_IND_SPEC_4      0x10000000
 +#define  PCI_NPEM_IND_SPEC_5      0x20000000
 +#define  PCI_NPEM_IND_SPEC_6      0x40000000
 +#define  PCI_NPEM_IND_SPEC_7      0x80000000
 +
 +#define PCI_NPEM_STATUS  0x0c /* NPEM status register */
 +#define  PCI_NPEM_STATUS_CC       0x00000001 /* Command Completed */
 +
  /* Data Object Exchange */
  #define PCI_DOE_CAP        0x04    /* DOE Capabilities Register */
  #define  PCI_DOE_CAP_INT_SUP            0x00000001  /* Interrupt Support */
 diff --git a/include/standard-headers/linux/virtio_balloon.h b/include/standard-headers/linux/virtio_balloon.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/standard-headers/linux/virtio_balloon.h
 +++ b/include/standard-headers/linux/virtio_balloon.h
@@ -XXX,XX +XXX,XX @@ struct virtio_balloon_config {
  #define VIRTIO_BALLOON_S_CACHES   7   /* Disk caches */
  #define VIRTIO_BALLOON_S_HTLB_PGALLOC  8  /* Hugetlb page allocations */
  #define VIRTIO_BALLOON_S_HTLB_PGFAIL   9  /* Hugetlb page allocation failures */
 -#define VIRTIO_BALLOON_S_NR       10
 +#define VIRTIO_BALLOON_S_OOM_KILL      10 /* OOM killer invocations */
 +#define VIRTIO_BALLOON_S_ALLOC_STALL   11 /* Stall count of memory allocatoin */
 +#define VIRTIO_BALLOON_S_ASYNC_SCAN    12 /* Amount of memory scanned asynchronously */
 +#define VIRTIO_BALLOON_S_DIRECT_SCAN   13 /* Amount of memory scanned directly */
 +#define VIRTIO_BALLOON_S_ASYNC_RECLAIM 14 /* Amount of memory reclaimed asynchronously */
 +#define VIRTIO_BALLOON_S_DIRECT_RECLAIM 15 /* Amount of memory reclaimed directly */
 +#define VIRTIO_BALLOON_S_NR       16
  #define VIRTIO_BALLOON_S_NAMES_WITH_PREFIX(VIRTIO_BALLOON_S_NAMES_prefix) { \
      VIRTIO_BALLOON_S_NAMES_prefix "swap-in", \
@@ -XXX,XX +XXX,XX @@ struct virtio_balloon_config {
      VIRTIO_BALLOON_S_NAMES_prefix "available-memory", \
      VIRTIO_BALLOON_S_NAMES_prefix "disk-caches", \
      VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-allocations", \
 -    VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-failures" \
 +    VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-failures", \
 +    VIRTIO_BALLOON_S_NAMES_prefix "oom-kills", \
 +    VIRTIO_BALLOON_S_NAMES_prefix "alloc-stalls", \
 +    VIRTIO_BALLOON_S_NAMES_prefix "async-scans", \
 +    VIRTIO_BALLOON_S_NAMES_prefix "direct-scans", \
 +    VIRTIO_BALLOON_S_NAMES_prefix "async-reclaims", \
 +    VIRTIO_BALLOON_S_NAMES_prefix "direct-reclaims" \
  }
- #define VIRTIO_BALLOON_S_NAMES VIRTIO_BALLOON_S_NAMES_WITH_PREFIX("")
-diff --git a/include/standard-headers/linux/virtio_gpu.h b/include/standard-headers/linux/virtio_gpu.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/standard-headers/linux/virtio_gpu.h
-+++ b/include/standard-headers/linux/virtio_gpu.h
-@@ -XXX,XX +XXX,XX @@ struct virtio_gpu_cmd_submit {
- #define VIRTIO_GPU_CAPSET_VIRGL2 2
- /* 3 is reserved for gfxstream */
- #define VIRTIO_GPU_CAPSET_VENUS 4
-+#define VIRTIO_GPU_CAPSET_DRM 6
- /* VIRTIO_GPU_CMD_GET_CAPSET_INFO */
- struct virtio_gpu_get_capset_info {
-diff --git a/linux-headers/asm-arm64/mman.h b/linux-headers/asm-arm64/mman.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/asm-arm64/mman.h
-+++ b/linux-headers/asm-arm64/mman.h
-@@ -XXX,XX +XXX,XX @@
- #define PROT_BTI    0x10        /* BTI guarded page */
- #define PROT_MTE    0x20        /* Normal Tagged mapping */
-+/* Override any generic PKEY permission defines */
-+#define PKEY_DISABLE_EXECUTE    0x4
-+#define PKEY_DISABLE_READ    0x8
-+#undef PKEY_ACCESS_MASK
-+#define PKEY_ACCESS_MASK       (PKEY_DISABLE_ACCESS |\
-+                PKEY_DISABLE_WRITE  |\
-+                PKEY_DISABLE_READ   |\
-+                PKEY_DISABLE_EXECUTE)
-+
- #endif /* ! _UAPI__ASM_MMAN_H */
-diff --git a/linux-headers/asm-arm64/unistd.h b/linux-headers/asm-arm64/unistd.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/asm-arm64/unistd.h
-+++ b/linux-headers/asm-arm64/unistd.h
-@@ -XXX,XX +XXX,XX @@
- /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
--/*
-- * Copyright (C) 2012 ARM Ltd.
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License version 2 as
-- * published by the Free Software Foundation.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- *
-- * You should have received a copy of the GNU General Public License
-- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-- */
--
--#define __ARCH_WANT_RENAMEAT
--#define __ARCH_WANT_NEW_STAT
--#define __ARCH_WANT_SET_GET_RLIMIT
--#define __ARCH_WANT_TIME32_SYSCALLS
--#define __ARCH_WANT_SYS_CLONE3
--#define __ARCH_WANT_MEMFD_SECRET
--
--#include <asm-generic/unistd.h>
-+#include <asm/unistd_64.h>
-diff --git a/linux-headers/asm-generic/unistd.h b/linux-headers/asm-generic/unistd.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/asm-generic/unistd.h
-+++ b/linux-headers/asm-generic/unistd.h
-@@ -XXX,XX +XXX,XX @@ __SC_COMP(__NR_pselect6_time64, sys_pselect6, compat_sys_pselect6_time64)
- #define __NR_ppoll_time64 414
- __SC_COMP(__NR_ppoll_time64, sys_ppoll, compat_sys_ppoll_time64)
- #define __NR_io_pgetevents_time64 416
--__SYSCALL(__NR_io_pgetevents_time64, sys_io_pgetevents)
-+__SC_COMP(__NR_io_pgetevents_time64, sys_io_pgetevents, compat_sys_io_pgetevents_time64)
- #define __NR_recvmmsg_time64 417
- __SC_COMP(__NR_recvmmsg_time64, sys_recvmmsg, compat_sys_recvmmsg_time64)
- #define __NR_mq_timedsend_time64 418
-@@ -XXX,XX +XXX,XX @@ __SYSCALL(__NR_fsmount, sys_fsmount)
- __SYSCALL(__NR_fspick, sys_fspick)
- #define __NR_pidfd_open 434
- __SYSCALL(__NR_pidfd_open, sys_pidfd_open)
--
--#ifdef __ARCH_WANT_SYS_CLONE3
- #define __NR_clone3 435
- __SYSCALL(__NR_clone3, sys_clone3)
--#endif
--
- #define __NR_close_range 436
- __SYSCALL(__NR_close_range, sys_close_range)
- #define __NR_openat2 437
-diff --git a/linux-headers/asm-loongarch/kvm.h b/linux-headers/asm-loongarch/kvm.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/asm-loongarch/kvm.h
-+++ b/linux-headers/asm-loongarch/kvm.h
-@@ -XXX,XX +XXX,XX @@ struct kvm_fpu {
- #define KVM_REG_LOONGARCH_KVM        (KVM_REG_LOONGARCH | 0x20000ULL)
- #define KVM_REG_LOONGARCH_FPSIMD    (KVM_REG_LOONGARCH | 0x30000ULL)
- #define KVM_REG_LOONGARCH_CPUCFG    (KVM_REG_LOONGARCH | 0x40000ULL)
-+#define KVM_REG_LOONGARCH_LBT        (KVM_REG_LOONGARCH | 0x50000ULL)
- #define KVM_REG_LOONGARCH_MASK        (KVM_REG_LOONGARCH | 0x70000ULL)
- #define KVM_CSR_IDX_MASK        0x7fff
- #define KVM_CPUCFG_IDX_MASK        0x7fff
-@@ -XXX,XX +XXX,XX @@ struct kvm_fpu {
- /* Debugging: Special instruction for software breakpoint */
- #define KVM_REG_LOONGARCH_DEBUG_INST    (KVM_REG_LOONGARCH_KVM | KVM_REG_SIZE_U64 | 3)
-+/* LBT registers */
-+#define KVM_REG_LOONGARCH_LBT_SCR0    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 1)
-+#define KVM_REG_LOONGARCH_LBT_SCR1    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 2)
-+#define KVM_REG_LOONGARCH_LBT_SCR2    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 3)
-+#define KVM_REG_LOONGARCH_LBT_SCR3    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 4)
-+#define KVM_REG_LOONGARCH_LBT_EFLAGS    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 5)
-+#define KVM_REG_LOONGARCH_LBT_FTOP    (KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 6)
-+
- #define LOONGARCH_REG_SHIFT        3
- #define LOONGARCH_REG_64(TYPE, REG)    (TYPE | KVM_REG_SIZE_U64 | (REG << LOONGARCH_REG_SHIFT))
- #define KVM_IOC_CSRID(REG)        LOONGARCH_REG_64(KVM_REG_LOONGARCH_CSR, REG)
- #define KVM_IOC_CPUCFG(REG)        LOONGARCH_REG_64(KVM_REG_LOONGARCH_CPUCFG, REG)
-+
-+/* Device Control API on vm fd */
-+#define KVM_LOONGARCH_VM_FEAT_CTRL        0
-+#define  KVM_LOONGARCH_VM_FEAT_LSX        0
-+#define  KVM_LOONGARCH_VM_FEAT_LASX        1
-+#define  KVM_LOONGARCH_VM_FEAT_X86BT        2
-+#define  KVM_LOONGARCH_VM_FEAT_ARMBT        3
-+#define  KVM_LOONGARCH_VM_FEAT_MIPSBT        4
-+#define  KVM_LOONGARCH_VM_FEAT_PMU        5
-+#define  KVM_LOONGARCH_VM_FEAT_PV_IPI        6
-+#define  KVM_LOONGARCH_VM_FEAT_PV_STEALTIME    7
-+
-+/* Device Control API on vcpu fd */
- #define KVM_LOONGARCH_VCPU_CPUCFG    0
-+#define KVM_LOONGARCH_VCPU_PVTIME_CTRL    1
-+#define  KVM_LOONGARCH_VCPU_PVTIME_GPA    0
- struct kvm_debug_exit_arch {
- };
-diff --git a/linux-headers/asm-loongarch/unistd.h b/linux-headers/asm-loongarch/unistd.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/asm-loongarch/unistd.h
-+++ b/linux-headers/asm-loongarch/unistd.h
-@@ -XXX,XX +XXX,XX @@
- /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
--#define __ARCH_WANT_SYS_CLONE
--#define __ARCH_WANT_SYS_CLONE3
--#include <asm-generic/unistd.h>
-+#include <asm/unistd_64.h>
-diff --git a/linux-headers/asm-riscv/kvm.h b/linux-headers/asm-riscv/kvm.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/asm-riscv/kvm.h
-+++ b/linux-headers/asm-riscv/kvm.h
-@@ -XXX,XX +XXX,XX @@ enum KVM_RISCV_ISA_EXT_ID {
-     KVM_RISCV_ISA_EXT_ZTSO,
-     KVM_RISCV_ISA_EXT_ZACAS,
-     KVM_RISCV_ISA_EXT_SSCOFPMF,
-+    KVM_RISCV_ISA_EXT_ZIMOP,
-+    KVM_RISCV_ISA_EXT_ZCA,
-+    KVM_RISCV_ISA_EXT_ZCB,
-+    KVM_RISCV_ISA_EXT_ZCD,
-+    KVM_RISCV_ISA_EXT_ZCF,
-+    KVM_RISCV_ISA_EXT_ZCMOP,
-+    KVM_RISCV_ISA_EXT_ZAWRS,
-     KVM_RISCV_ISA_EXT_MAX,
- };
-diff --git a/linux-headers/asm-riscv/unistd.h b/linux-headers/asm-riscv/unistd.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/asm-riscv/unistd.h
-+++ b/linux-headers/asm-riscv/unistd.h
-@@ -XXX,XX +XXX,XX @@
-  * You should have received a copy of the GNU General Public License
-  * along with this program.  If not, see <https://www.gnu.org/licenses/>.
-  */
-+#include <asm/bitsperlong.h>
--#if defined(__LP64__) && !defined(__SYSCALL_COMPAT)
--#define __ARCH_WANT_NEW_STAT
--#define __ARCH_WANT_SET_GET_RLIMIT
--#endif /* __LP64__ */
--
--#define __ARCH_WANT_SYS_CLONE3
--#define __ARCH_WANT_MEMFD_SECRET
--
--#include <asm-generic/unistd.h>
--
--/*
-- * Allows the instruction cache to be flushed from userspace.  Despite RISC-V
-- * having a direct 'fence.i' instruction available to userspace (which we
-- * can't trap!), that's not actually viable when running on Linux because the
-- * kernel might schedule a process on another hart.  There is no way for
-- * userspace to handle this without invoking the kernel (as it doesn't know the
-- * thread->hart mappings), so we've defined a RISC-V specific system call to
-- * flush the instruction cache.
-- *
-- * __NR_riscv_flush_icache is defined to flush the instruction cache over an
-- * address range, with the flush applying to either all threads or just the
-- * caller.  We don't currently do anything with the address range, that's just
-- * in there for forwards compatibility.
-- */
--#ifndef __NR_riscv_flush_icache
--#define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15)
--#endif
--__SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache)
--
--/*
-- * Allows userspace to query the kernel for CPU architecture and
-- * microarchitecture details across a given set of CPUs.
-- */
--#ifndef __NR_riscv_hwprobe
--#define __NR_riscv_hwprobe (__NR_arch_specific_syscall + 14)
-+#if __BITS_PER_LONG == 64
-+#include <asm/unistd_64.h>
-+#else
-+#include <asm/unistd_32.h>
- #endif
--__SYSCALL(__NR_riscv_hwprobe, sys_riscv_hwprobe)
-diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/asm-x86/kvm.h
-+++ b/linux-headers/asm-x86/kvm.h
-@@ -XXX,XX +XXX,XX @@ struct kvm_ioapic_state {
- #define KVM_RUN_X86_SMM         (1 << 0)
- #define KVM_RUN_X86_BUS_LOCK     (1 << 1)
-+#define KVM_RUN_X86_GUEST_MODE   (1 << 2)
- /* for KVM_GET_REGS and KVM_SET_REGS */
- struct kvm_regs {
-@@ -XXX,XX +XXX,XX @@ struct kvm_sync_regs {
- #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT    (1 << 4)
- #define KVM_X86_QUIRK_FIX_HYPERCALL_INSN    (1 << 5)
- #define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS    (1 << 6)
-+#define KVM_X86_QUIRK_SLOT_ZAP_ALL        (1 << 7)
- #define KVM_STATE_NESTED_FORMAT_VMX    0
- #define KVM_STATE_NESTED_FORMAT_SVM    1
-diff --git a/linux-headers/asm-x86/unistd_64.h b/linux-headers/asm-x86/unistd_64.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/asm-x86/unistd_64.h
-+++ b/linux-headers/asm-x86/unistd_64.h
-@@ -XXX,XX +XXX,XX @@
- #define __NR_statx 332
- #define __NR_io_pgetevents 333
- #define __NR_rseq 334
-+#define __NR_uretprobe 335
- #define __NR_pidfd_send_signal 424
- #define __NR_io_uring_setup 425
- #define __NR_io_uring_enter 426
-diff --git a/linux-headers/asm-x86/unistd_x32.h b/linux-headers/asm-x86/unistd_x32.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/asm-x86/unistd_x32.h
-+++ b/linux-headers/asm-x86/unistd_x32.h
-@@ -XXX,XX +XXX,XX @@
- #define __NR_statx (__X32_SYSCALL_BIT + 332)
- #define __NR_io_pgetevents (__X32_SYSCALL_BIT + 333)
- #define __NR_rseq (__X32_SYSCALL_BIT + 334)
-+#define __NR_uretprobe (__X32_SYSCALL_BIT + 335)
- #define __NR_pidfd_send_signal (__X32_SYSCALL_BIT + 424)
- #define __NR_io_uring_setup (__X32_SYSCALL_BIT + 425)
- #define __NR_io_uring_enter (__X32_SYSCALL_BIT + 426)
-diff --git a/linux-headers/linux/bits.h b/linux-headers/linux/bits.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/linux/bits.h
-+++ b/linux-headers/linux/bits.h
-@@ -XXX,XX +XXX,XX @@
-         (((~_ULL(0)) - (_ULL(1) << (l)) + 1) & \
-          (~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h))))
-+#define __GENMASK_U128(h, l) \
-+    ((_BIT128((h)) << 1) - (_BIT128(l)))
-+
- #endif /* _LINUX_BITS_H */
-diff --git a/linux-headers/linux/const.h b/linux-headers/linux/const.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/linux/const.h
-+++ b/linux-headers/linux/const.h
-@@ -XXX,XX +XXX,XX @@
- #define _BITUL(x)    (_UL(1) << (x))
- #define _BITULL(x)    (_ULL(1) << (x))
-+#if !defined(__ASSEMBLY__)
-+/*
-+ * Missing __asm__ support
-+ *
-+ * __BIT128() would not work in the __asm__ code, as it shifts an
-+ * 'unsigned __init128' data type as direct representation of
-+ * 128 bit constants is not supported in the gcc compiler, as
-+ * they get silently truncated.
-+ *
-+ * TODO: Please revisit this implementation when gcc compiler
-+ * starts representing 128 bit constants directly like long
-+ * and unsigned long etc. Subsequently drop the comment for
-+ * GENMASK_U128() which would then start supporting __asm__ code.
-+ */
-+#define _BIT128(x)    ((unsigned __int128)(1) << (x))
-+#endif
-+
- #define __ALIGN_KERNEL(x, a)        __ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - 1)
- #define __ALIGN_KERNEL_MASK(x, mask)    (((x) + (mask)) & ~(mask))
-diff --git a/linux-headers/linux/iommufd.h b/linux-headers/linux/iommufd.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/linux/iommufd.h
-+++ b/linux-headers/linux/iommufd.h
-@@ -XXX,XX +XXX,XX @@
- #ifndef _IOMMUFD_H
- #define _IOMMUFD_H
--#include <linux/types.h>
- #include <linux/ioctl.h>
-+#include <linux/types.h>
- #define IOMMUFD_TYPE (';')
-@@ -XXX,XX +XXX,XX @@
- enum {
-     IOMMUFD_CMD_BASE = 0x80,
-     IOMMUFD_CMD_DESTROY = IOMMUFD_CMD_BASE,
--    IOMMUFD_CMD_IOAS_ALLOC,
--    IOMMUFD_CMD_IOAS_ALLOW_IOVAS,
--    IOMMUFD_CMD_IOAS_COPY,
--    IOMMUFD_CMD_IOAS_IOVA_RANGES,
--    IOMMUFD_CMD_IOAS_MAP,
--    IOMMUFD_CMD_IOAS_UNMAP,
--    IOMMUFD_CMD_OPTION,
--    IOMMUFD_CMD_VFIO_IOAS,
--    IOMMUFD_CMD_HWPT_ALLOC,
--    IOMMUFD_CMD_GET_HW_INFO,
--    IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING,
--    IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP,
--    IOMMUFD_CMD_HWPT_INVALIDATE,
-+    IOMMUFD_CMD_IOAS_ALLOC = 0x81,
-+    IOMMUFD_CMD_IOAS_ALLOW_IOVAS = 0x82,
-+    IOMMUFD_CMD_IOAS_COPY = 0x83,
-+    IOMMUFD_CMD_IOAS_IOVA_RANGES = 0x84,
-+    IOMMUFD_CMD_IOAS_MAP = 0x85,
-+    IOMMUFD_CMD_IOAS_UNMAP = 0x86,
-+    IOMMUFD_CMD_OPTION = 0x87,
-+    IOMMUFD_CMD_VFIO_IOAS = 0x88,
-+    IOMMUFD_CMD_HWPT_ALLOC = 0x89,
-+    IOMMUFD_CMD_GET_HW_INFO = 0x8a,
-+    IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING = 0x8b,
-+    IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP = 0x8c,
-+    IOMMUFD_CMD_HWPT_INVALIDATE = 0x8d,
-+    IOMMUFD_CMD_FAULT_QUEUE_ALLOC = 0x8e,
- };
- /**
-@@ -XXX,XX +XXX,XX @@ struct iommu_vfio_ioas {
-  *                                the parent HWPT in a nesting configuration.
-  * @IOMMU_HWPT_ALLOC_DIRTY_TRACKING: Dirty tracking support for device IOMMU is
-  *                                   enforced on device attachment
-+ * @IOMMU_HWPT_FAULT_ID_VALID: The fault_id field of hwpt allocation data is
-+ *                             valid.
-  */
- enum iommufd_hwpt_alloc_flags {
-     IOMMU_HWPT_ALLOC_NEST_PARENT = 1 << 0,
-     IOMMU_HWPT_ALLOC_DIRTY_TRACKING = 1 << 1,
-+    IOMMU_HWPT_FAULT_ID_VALID = 1 << 2,
- };
- /**
-@@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_vtd_s1 {
-  * @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table
-  */
- enum iommu_hwpt_data_type {
--    IOMMU_HWPT_DATA_NONE,
--    IOMMU_HWPT_DATA_VTD_S1,
-+    IOMMU_HWPT_DATA_NONE = 0,
-+    IOMMU_HWPT_DATA_VTD_S1 = 1,
- };
- /**
-@@ -XXX,XX +XXX,XX @@ enum iommu_hwpt_data_type {
-  * @data_type: One of enum iommu_hwpt_data_type
-  * @data_len: Length of the type specific data
-  * @data_uptr: User pointer to the type specific data
-+ * @fault_id: The ID of IOMMUFD_FAULT object. Valid only if flags field of
-+ *            IOMMU_HWPT_FAULT_ID_VALID is set.
-+ * @__reserved2: Padding to 64-bit alignment. Must be 0.
-  *
-  * Explicitly allocate a hardware page table object. This is the same object
-  * type that is returned by iommufd_device_attach() and represents the
-@@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_alloc {
-     __u32 data_type;
-     __u32 data_len;
-     __aligned_u64 data_uptr;
-+    __u32 fault_id;
-+    __u32 __reserved2;
- };
- #define IOMMU_HWPT_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_ALLOC)
-@@ -XXX,XX +XXX,XX @@ struct iommu_hw_info_vtd {
-  * @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
-  */
- enum iommu_hw_info_type {
--    IOMMU_HW_INFO_TYPE_NONE,
--    IOMMU_HW_INFO_TYPE_INTEL_VTD,
-+    IOMMU_HW_INFO_TYPE_NONE = 0,
-+    IOMMU_HW_INFO_TYPE_INTEL_VTD = 1,
- };
- /**
-@@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_get_dirty_bitmap {
-  * @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1
-  */
- enum iommu_hwpt_invalidate_data_type {
--    IOMMU_HWPT_INVALIDATE_DATA_VTD_S1,
-+    IOMMU_HWPT_INVALIDATE_DATA_VTD_S1 = 0,
- };
- /**
-@@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_invalidate {
-     __u32 __reserved;
- };
- #define IOMMU_HWPT_INVALIDATE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_INVALIDATE)
-+
-+/**
-+ * enum iommu_hwpt_pgfault_flags - flags for struct iommu_hwpt_pgfault
-+ * @IOMMU_PGFAULT_FLAGS_PASID_VALID: The pasid field of the fault data is
-+ *                                   valid.
-+ * @IOMMU_PGFAULT_FLAGS_LAST_PAGE: It's the last fault of a fault group.
-+ */
-+enum iommu_hwpt_pgfault_flags {
-+    IOMMU_PGFAULT_FLAGS_PASID_VALID        = (1 << 0),
-+    IOMMU_PGFAULT_FLAGS_LAST_PAGE        = (1 << 1),
-+};
-+
-+/**
-+ * enum iommu_hwpt_pgfault_perm - perm bits for struct iommu_hwpt_pgfault
-+ * @IOMMU_PGFAULT_PERM_READ: request for read permission
-+ * @IOMMU_PGFAULT_PERM_WRITE: request for write permission
-+ * @IOMMU_PGFAULT_PERM_EXEC: (PCIE 10.4.1) request with a PASID that has the
-+ *                           Execute Requested bit set in PASID TLP Prefix.
-+ * @IOMMU_PGFAULT_PERM_PRIV: (PCIE 10.4.1) request with a PASID that has the
-+ *                           Privileged Mode Requested bit set in PASID TLP
-+ *                           Prefix.
-+ */
-+enum iommu_hwpt_pgfault_perm {
-+    IOMMU_PGFAULT_PERM_READ            = (1 << 0),
-+    IOMMU_PGFAULT_PERM_WRITE        = (1 << 1),
-+    IOMMU_PGFAULT_PERM_EXEC            = (1 << 2),
-+    IOMMU_PGFAULT_PERM_PRIV            = (1 << 3),
-+};
-+
-+/**
-+ * struct iommu_hwpt_pgfault - iommu page fault data
-+ * @flags: Combination of enum iommu_hwpt_pgfault_flags
-+ * @dev_id: id of the originated device
-+ * @pasid: Process Address Space ID
-+ * @grpid: Page Request Group Index
-+ * @perm: Combination of enum iommu_hwpt_pgfault_perm
-+ * @addr: Fault address
-+ * @length: a hint of how much data the requestor is expecting to fetch. For
-+ *          example, if the PRI initiator knows it is going to do a 10MB
-+ *          transfer, it could fill in 10MB and the OS could pre-fault in
-+ *          10MB of IOVA. It's default to 0 if there's no such hint.
-+ * @cookie: kernel-managed cookie identifying a group of fault messages. The
-+ *          cookie number encoded in the last page fault of the group should
-+ *          be echoed back in the response message.
-+ */
-+struct iommu_hwpt_pgfault {
-+    __u32 flags;
-+    __u32 dev_id;
-+    __u32 pasid;
-+    __u32 grpid;
-+    __u32 perm;
-+    __u64 addr;
-+    __u32 length;
-+    __u32 cookie;
-+};
-+
-+/**
-+ * enum iommufd_page_response_code - Return status of fault handlers
-+ * @IOMMUFD_PAGE_RESP_SUCCESS: Fault has been handled and the page tables
-+ *                             populated, retry the access. This is the
-+ *                             "Success" defined in PCI 10.4.2.1.
-+ * @IOMMUFD_PAGE_RESP_INVALID: Could not handle this fault, don't retry the
-+ *                             access. This is the "Invalid Request" in PCI
-+ *                             10.4.2.1.
-+ */
-+enum iommufd_page_response_code {
-+    IOMMUFD_PAGE_RESP_SUCCESS = 0,
-+    IOMMUFD_PAGE_RESP_INVALID = 1,
-+};
-+
-+/**
-+ * struct iommu_hwpt_page_response - IOMMU page fault response
-+ * @cookie: The kernel-managed cookie reported in the fault message.
-+ * @code: One of response code in enum iommufd_page_response_code.
-+ */
-+struct iommu_hwpt_page_response {
-+    __u32 cookie;
-+    __u32 code;
-+};
-+
-+/**
-+ * struct iommu_fault_alloc - ioctl(IOMMU_FAULT_QUEUE_ALLOC)
-+ * @size: sizeof(struct iommu_fault_alloc)
-+ * @flags: Must be 0
-+ * @out_fault_id: The ID of the new FAULT
-+ * @out_fault_fd: The fd of the new FAULT
-+ *
-+ * Explicitly allocate a fault handling object.
-+ */
-+struct iommu_fault_alloc {
-+    __u32 size;
-+    __u32 flags;
-+    __u32 out_fault_id;
-+    __u32 out_fault_fd;
-+};
-+#define IOMMU_FAULT_QUEUE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_FAULT_QUEUE_ALLOC)
- #endif
-diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/linux/kvm.h
-+++ b/linux-headers/linux/kvm.h
-@@ -XXX,XX +XXX,XX @@ struct kvm_xen_exit {
- /* Flags that describe what fields in emulation_failure hold valid data. */
- #define KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES (1ULL << 0)
-+/*
-+ * struct kvm_run can be modified by userspace at any time, so KVM must be
-+ * careful to avoid TOCTOU bugs. In order to protect KVM, HINT_UNSAFE_IN_KVM()
-+ * renames fields in struct kvm_run from <symbol> to <symbol>__unsafe when
-+ * compiled into the kernel, ensuring that any use within KVM is obvious and
-+ * gets extra scrutiny.
-+ */
-+#define HINT_UNSAFE_IN_KVM(_symbol) _symbol
-+
- /* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */
- struct kvm_run {
-     /* in */
-     __u8 request_interrupt_window;
--    __u8 immediate_exit;
-+    __u8 HINT_UNSAFE_IN_KVM(immediate_exit);
-     __u8 padding1[6];
-     /* out */
-@@ -XXX,XX +XXX,XX @@ struct kvm_enable_cap {
- #define KVM_CAP_MEMORY_ATTRIBUTES 233
- #define KVM_CAP_GUEST_MEMFD 234
- #define KVM_CAP_VM_TYPES 235
-+#define KVM_CAP_PRE_FAULT_MEMORY 236
-+#define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237
-+#define KVM_CAP_X86_GUEST_MODE 238
- struct kvm_irq_routing_irqchip {
-     __u32 irqchip;
-@@ -XXX,XX +XXX,XX @@ struct kvm_create_guest_memfd {
-     __u64 reserved[6];
- };
-+#define KVM_PRE_FAULT_MEMORY    _IOWR(KVMIO, 0xd5, struct kvm_pre_fault_memory)
-+
-+struct kvm_pre_fault_memory {
-+    __u64 gpa;
-+    __u64 size;
-+    __u64 flags;
-+    __u64 padding[5];
-+};
-+
- #endif /* __LINUX_KVM_H */
-diff --git a/linux-headers/linux/mman.h b/linux-headers/linux/mman.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/linux/mman.h
-+++ b/linux-headers/linux/mman.h
-@@ -XXX,XX +XXX,XX @@
- #define MAP_SHARED    0x01        /* Share changes */
- #define MAP_PRIVATE    0x02        /* Changes are private */
- #define MAP_SHARED_VALIDATE 0x03    /* share + validate extension flags */
-+#define MAP_DROPPABLE    0x08        /* Zero memory under memory pressure. */
- /*
-  * Huge page size encoding when MAP_HUGETLB is specified, and a huge page
-diff --git a/linux-headers/linux/psp-sev.h b/linux-headers/linux/psp-sev.h
-index XXXXXXX..XXXXXXX 100644
---- a/linux-headers/linux/psp-sev.h
-+++ b/linux-headers/linux/psp-sev.h
-@@ -XXX,XX +XXX,XX @@ enum {
-     SNP_PLATFORM_STATUS,
-     SNP_COMMIT,
-     SNP_SET_CONFIG,
-+    SNP_VLEK_LOAD,
-     SEV_MAX,
- };
-@@ -XXX,XX +XXX,XX @@ typedef enum {
-     SEV_RET_INVALID_PLATFORM_STATE,
-     SEV_RET_INVALID_GUEST_STATE,
-     SEV_RET_INAVLID_CONFIG,
-+    SEV_RET_INVALID_CONFIG = SEV_RET_INAVLID_CONFIG,
-     SEV_RET_INVALID_LEN,
-     SEV_RET_ALREADY_OWNED,
-     SEV_RET_INVALID_CERTIFICATE,
-@@ -XXX,XX +XXX,XX @@ struct sev_user_data_snp_config {
-     __u8 rsvd1[52];
- } __attribute__((packed));
-+/**
-+ * struct sev_data_snp_vlek_load - SNP_VLEK_LOAD structure
-+ *
-+ * @len: length of the command buffer read by the PSP
-+ * @vlek_wrapped_version: version of wrapped VLEK hashstick (Must be 0h)
-+ * @rsvd: reserved
-+ * @vlek_wrapped_address: address of a wrapped VLEK hashstick
-+ *                        (struct sev_user_data_snp_wrapped_vlek_hashstick)
-+ */
-+struct sev_user_data_snp_vlek_load {
-+    __u32 len;                /* In */
-+    __u8 vlek_wrapped_version;        /* In */
-+    __u8 rsvd[3];                /* In */
-+    __u64 vlek_wrapped_address;        /* In */
-+} __attribute__((packed));
-+
-+/**
-+ * struct sev_user_data_snp_vlek_wrapped_vlek_hashstick - Wrapped VLEK data
-+ *
-+ * @data: Opaque data provided by AMD KDS (as described in SEV-SNP Firmware ABI
-+ *        1.54, SNP_VLEK_LOAD)
-+ */
-+struct sev_user_data_snp_wrapped_vlek_hashstick {
-+    __u8 data[432];                /* In */
-+} __attribute__((packed));
-+
- /**
-  * struct sev_issue_cmd - SEV ioctl parameters
-  *
 --
-.46.0
+.48.1

-New patch
+[PATCH v11 08/10] docs/system: virtio-gpu: Add link to Mesa VirGL doc
+Extend virtio-gpu documentation with a link to the Mesa VirGL
+documentation.
+Suggested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
+Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
+Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
+---
+ docs/system/devices/virtio-gpu.rst | 3 ++-
+file changed, 2 insertions(+), 1 deletion(-)
+diff --git a/docs/system/devices/virtio-gpu.rst b/docs/system/devices/virtio-gpu.rst
+index XXXXXXX..XXXXXXX 100644
+--- a/docs/system/devices/virtio-gpu.rst
++++ b/docs/system/devices/virtio-gpu.rst
+@@ -XXX,XX +XXX,XX @@ on typical modern Linux distributions.
+ virtio-gpu virglrenderer
+ ------------------------
+-When using virgl accelerated graphics mode in the guest, OpenGL API calls
++When using `virgl`_ accelerated graphics mode in the guest, OpenGL API calls
+ are translated into an intermediate representation (see `Gallium3D`_). The
+ intermediate representation is communicated to the host and the
+ `virglrenderer`_ library on the host translates the intermediate
+@@ -XXX,XX +XXX,XX @@ representation back to OpenGL API calls.
+ .. parsed-literal::
+     -device virtio-gpu-gl
++.. _virgl: https://docs.mesa3d.org/drivers/virgl.html
+ .. _Gallium3D: https://www.freedesktop.org/wiki/Software/gallium/
+ .. _virglrenderer: https://gitlab.freedesktop.org/virgl/virglrenderer/
+--
+.48.1

-New patch
+[PATCH v11 09/10] docs/system: virtio-gpu: Update Venus link
+Change virtio-gpu Venus link, pointing it at the Mesa Venus
+documentation instead of the protocol. The Mesa doc provides more
+information and also has a link to the protocol.
+Suggested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
+Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
+Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
+---
+ docs/system/devices/virtio-gpu.rst | 2 +-
+file changed, 1 insertion(+), 1 deletion(-)
+diff --git a/docs/system/devices/virtio-gpu.rst b/docs/system/devices/virtio-gpu.rst
+index XXXXXXX..XXXXXXX 100644
+--- a/docs/system/devices/virtio-gpu.rst
++++ b/docs/system/devices/virtio-gpu.rst
+@@ -XXX,XX +XXX,XX @@ of virtio-gpu host memory window. This is typically between 256M and 8G.
+ .. parsed-literal::
+     -device virtio-gpu-gl,hostmem=8G,blob=true,venus=true
+-.. _venus: https://gitlab.freedesktop.org/virgl/venus-protocol/
++.. _venus: https://docs.mesa3d.org/drivers/venus.html
+ DRM native context is supported since release of `virglrenderer`_ v1.0.0
+ using `drm`_ protocol.  ``DRM`` virtio-gpu capability set ("capset") requires
+--
+.48.1

-New patch
+[PATCH v11 10/10] docs/system: virtio-gpu: Document host/guest requirements
+From: Alex Bennée <alex.bennee@linaro.org>
+This attempts to tidy up the VirtIO GPU documentation to make the list
+of requirements clearer. There are still a lot of moving parts and the
+distros have some catching up to do before this is all handled
+automatically.
+Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
+Cc: Sergio Lopez Pascual <slp@redhat.com>
+Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
+[dmitry.osipenko@collabora.com: Extended and corrected doc]
+---
+ docs/system/devices/virtio-gpu.rst | 101 ++++++++++++++++++++++++++++-
+file changed, 98 insertions(+), 3 deletions(-)
+diff --git a/docs/system/devices/virtio-gpu.rst b/docs/system/devices/virtio-gpu.rst
+index XXXXXXX..XXXXXXX 100644
+--- a/docs/system/devices/virtio-gpu.rst
++++ b/docs/system/devices/virtio-gpu.rst
+@@ -XXX,XX +XXX,XX @@ virtio-gpu
+ ==========
+ This document explains the setup and usage of the virtio-gpu device.
+-The virtio-gpu device paravirtualizes the GPU and display controller.
++The virtio-gpu device provides a GPU and display controller
++paravirtualized using VirtIO. It supports a number of different modes
++from simple 2D displays to fully accelerated 3D graphics.
+-Linux kernel support
+---------------------
++Linux guest kernel support
++--------------------------
+ virtio-gpu requires a guest Linux kernel built with the
+ ``CONFIG_DRM_VIRTIO_GPU`` option.
++3D acceleration
++---------------
++
++3D acceleration of a virtualized GPU is still an evolving field.
++Depending on the 3D mode you are running you may need to override
++distribution supplied libraries with more recent versions or enable
++build options. There are a number of requirements the host must meet
++to be able to be able to support guests. QEMU must be able to access the
++host's GPU and for the best performance be able to reliably share GPU
++memory with the guest. Details of 3D acceleration requirements are
++described in a further sections.
++
+ QEMU virtio-gpu variants
+ ------------------------
+@@ -XXX,XX +XXX,XX @@ intermediate representation is communicated to the host and the
+ `virglrenderer`_ library on the host translates the intermediate
+ representation back to OpenGL API calls.
++By default OpenGL version on guest is limited to 4.3. In order to enable
++OpenGL 4.6 support, virtio-gpu  host blobs feature (``hostmem`` and ``blob``
++fields) should be enabled.  The ``hostmem`` field specifies the size of
++virtio-gpu host memory window. This is typically between 256M and 8G.
++
+ .. parsed-literal::
+     -device virtio-gpu-gl
++    -device virtio-gpu-gl,hostmem=8G,blob=true
+ .. _virgl: https://docs.mesa3d.org/drivers/virgl.html
+ .. _Gallium3D: https://www.freedesktop.org/wiki/Software/gallium/
+@@ -XXX,XX +XXX,XX @@ of virtio-gpu host memory window. This is typically between 256M and 8G.
+ .. _drm: https://gitlab.freedesktop.org/virgl/virglrenderer/-/tree/main/src/drm
++.. list-table:: Linux Host Requirements
++  :header-rows: 1
++
++  * - Capability
++    - Kernel Version
++    - Libvirglrenderer Version
++  * - OpenGL pass-through
++    - Any Linux version compatible with QEMU if not using host blobs feature,
++      Linux 6.13+ otherwise
++    - 0.8.2+
++  * - Vulkan pass-through
++    - Linux 6.13+
++    - 1.0.0+
++  * - AMDGPU DRM native context
++    - Linux 6.13+
++    - 1.1.0+
++  * - Freedreno DRM native context
++    - Linux 6.4+
++    - 1.0.0+
++  * - Intel i915 DRM native context
++    - Linux 6.13+
++    - `mr1384`_
++  * - Asahi DRM native context
++    - `Downstream version`_ of Asahi Linux kernel
++    - `mr1274`_
++
++.. _mr1384: https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1384
++.. _mr1274: https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1274
++.. _Downstream version: https://github.com/AsahiLinux/linux
++
++.. list-table:: Linux Guest Requirements
++  :header-rows: 1
++
++  * - Capability
++    - Kernel Version
++    - Mesa Version
++  * - OpenGL pass-through
++    - Any Linux version supporting virtio-gpu
++    - 16.0.0+
++  * - Vulkan pass-through
++    - Linux 5.16+
++    - 24.2.0+
++  * - AMDGPU DRM native context
++    - Linux 6.14+
++    - 25.0.0+
++  * - Freedreno DRM native context
++    - Linux 6.14+
++    - 23.1.0+
++  * - Intel i915 DRM native context
++    - Linux 6.14+
++    - `mr29870`_
++  * - Asahi DRM native context
++    - Linux 6.14+
++    - 24.2.0+
++
++.. _mr29870: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29870
++
+ virtio-gpu rutabaga
+ -------------------
+@@ -XXX,XX +XXX,XX @@ Surfaceless is the default if ``wsi`` is not specified.
+ .. _Wayland display passthrough: https://www.youtube.com/watch?v=OZJiHMtIQ2M
+ .. _gfxstream-enabled rutabaga: https://crosvm.dev/book/appendix/rutabaga_gfx.html
+ .. _guest Wayland proxy: https://crosvm.dev/book/devices/wayland.html
++
++.. list-table:: Linux Host Requirements
++  :header-rows: 1
++
++  * - Capability
++    - Kernel Version
++  * - Vulkan+Wayland pass-through
++    - Linux 6.13+
++
++.. list-table:: Linux Guest Requirements
++  :header-rows: 1
++
++  * - Capability
++    - Kernel Version
++    - Mesa Version
++  * - Vulkan+Wayland pass-through
++    - Linux 5.16+
++    - 24.3.0+
+--
+.48.1

This patchset adds DRM native context support to VirtIO-GPU on Qemu.
It's based on the pending Venus v17 patches [1] that bring host blobs
support to virtio-gpu-gl device.

[1] https://lore.kernel.org/qemu-devel/20240822185110.1757429-1-dmitry.osipenko@collabora.com/

Contarary to Virgl and Venus contexts which mediate high level GFX APIs,
DRM native context [2] mediates lower level kernel driver UAPI, which
reflects in a less CPU overhead and less/simpler code needed to support it.
DRM context consists of a host and guest parts that have to be implemented
for each GPU driver. On a guest side, DRM context presents a virtual GPU as
a real/native host GPU device for GL/VK applications.

[2] https://www.youtube.com/watch?v=9sFP_yddLLQ

Today there are four known DRM native context drivers existing in a wild:

- Freedreno (Qualcomm SoC GPUs), completely upstreamed
  - AMDGPU, mostly merged into upstreams
  - Intel (i915), merge requests are opened
  - Asahi (Apple SoC GPUs), WIP status

# How to try out DRM context:

1. Like Venus and Virgl context, DRM context requires applying WIP
KVM patches [3] to host kernel, otherwise mapping of GPU memory blobs
will likely fail.

[3] https://lore.kernel.org/all/20240726235234.228822-1-seanjc@google.com/

2. Use latest libvirglrenderer from upstream git/main for Freedreno
and AMDGPU native contexts. For Intel use patches [4].

[4] https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1384

3. On guest, use latest Mesa version for Freedreno. For AMDGPU use
Mesa patches [5], for Intel [6].

[5] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21658
[6] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29870

4. On guest, use latest Linux kernel v6.6+.

Example Qemu cmdline that enables DRM context:

qemu-system-x86_64 -device virtio-vga-gl,hostmem=4G,blob=true,drm=true \
      -machine q35,accel=kvm,memory-backend=mem1 \
      -object memory-backend-memfd,id=mem1,size=8G -m 8G

# Note about known performance problem in Qemu:

DRM contexts are mapping host blobs extensively and these mapping
operations work slowly in Qemu. Exact reason is unkown. Mappings work
fast on Crosvm For DRM contexts this problem is more visible than for
Venus/Virgl.

Dmitry Osipenko (5):
  ui/sdl2: Restore original context after new context creation
  linux-headers: Update to Linux v6.12-rc1
  virtio-gpu: Handle virgl fence creation errors
  virtio-gpu: Support asynchronous fencing
  virtio-gpu: Support DRM native context

Pierre-Eric Pelloux-Prayer (1):
  ui/sdl2: Implement dpy dmabuf functions

-- 
2.46.0

From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

If EGL is used, we can rely on dmabuf to import textures without
doing copies.

To get this working on X11, we use the existing SDL hint:
SDL_HINT_VIDEO_X11_FORCE_EGL (because dmabuf can't be used with GLX).

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
 include/ui/sdl2.h |  5 +++++
 ui/sdl2-gl.c      | 39 +++++++++++++++++++++++++++++++++++++++
 ui/sdl2.c         |  8 ++++++++
 3 files changed, 52 insertions(+)

diff --git a/include/ui/sdl2.h b/include/ui/sdl2.h
index XXXXXXX..XXXXXXX 100644
--- a/include/ui/sdl2.h
+++ b/include/ui/sdl2.h
@@ -XXX,XX +XXX,XX @@ void sdl2_gl_scanout_texture(DisplayChangeListener *dcl,
                              void *d3d_tex2d);
 void sdl2_gl_scanout_flush(DisplayChangeListener *dcl,
                            uint32_t x, uint32_t y, uint32_t w, uint32_t h);
+void sdl2_gl_scanout_dmabuf(DisplayChangeListener *dcl,
+                            QemuDmaBuf *dmabuf);
+void sdl2_gl_release_dmabuf(DisplayChangeListener *dcl,
+                            QemuDmaBuf *dmabuf);
+bool sdl2_gl_has_dmabuf(DisplayChangeListener *dcl);
 
 #endif /* SDL2_H */
diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c
index XXXXXXX..XXXXXXX 100644
--- a/ui/sdl2-gl.c
+++ b/ui/sdl2-gl.c
@@ -XXX,XX +XXX,XX @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/main-loop.h"
 #include "ui/console.h"
 #include "ui/input.h"
 #include "ui/sdl2.h"
@@ -XXX,XX +XXX,XX @@ void sdl2_gl_scanout_texture(DisplayChangeListener *dcl,
                          backing_id, false);
 }
 
+void sdl2_gl_scanout_dmabuf(DisplayChangeListener *dcl,
+                            QemuDmaBuf *dmabuf)
+{
+    struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl);
+
+    assert(scon->opengl);
+    SDL_GL_MakeCurrent(scon->real_window, scon->winctx);
+
+    egl_dmabuf_import_texture(dmabuf);
+    if (!qemu_dmabuf_get_texture(dmabuf)) {
+        fprintf(stderr, "sdl2_gl_scanout_dmabuf failed fd=%d\n",
+                qemu_dmabuf_get_fd(dmabuf));
+    }
+
+    sdl2_gl_scanout_texture(dcl, qemu_dmabuf_get_texture(dmabuf), false,
+                            qemu_dmabuf_get_width(dmabuf),
+                            qemu_dmabuf_get_height(dmabuf),
+                            0, 0,
+                            qemu_dmabuf_get_width(dmabuf),
+                            qemu_dmabuf_get_height(dmabuf),
+                            NULL);
+
+    if (qemu_dmabuf_get_allow_fences(dmabuf)) {
+        scon->guest_fb.dmabuf = dmabuf;
+    }
+}
+
+void sdl2_gl_release_dmabuf(DisplayChangeListener *dcl,
+                            QemuDmaBuf *dmabuf)
+{
+    egl_dmabuf_release_texture(dmabuf);
+}
+
+bool sdl2_gl_has_dmabuf(DisplayChangeListener *dcl)
+{
+    return qemu_egl_has_dmabuf();
+}
+
 void sdl2_gl_scanout_flush(DisplayChangeListener *dcl,
                            uint32_t x, uint32_t y, uint32_t w, uint32_t h)
 {
diff --git a/ui/sdl2.c b/ui/sdl2.c
index XXXXXXX..XXXXXXX 100644
--- a/ui/sdl2.c
+++ b/ui/sdl2.c
@@ -XXX,XX +XXX,XX @@ void sdl2_window_create(struct sdl2_console *scon)
         /* The SDL renderer is only used by sdl2-2D, when OpenGL is disabled */
         scon->real_renderer = SDL_CreateRenderer(scon->real_window, -1, 0);
     }
+
+    qemu_egl_display = eglGetCurrentDisplay();
+
     sdl_update_caption(scon);
 }
 
@@ -XXX,XX +XXX,XX @@ static const DisplayChangeListenerOps dcl_gl_ops = {
     .dpy_gl_scanout_disable  = sdl2_gl_scanout_disable,
     .dpy_gl_scanout_texture  = sdl2_gl_scanout_texture,
     .dpy_gl_update           = sdl2_gl_scanout_flush,
+
+    .dpy_gl_scanout_dmabuf   = sdl2_gl_scanout_dmabuf,
+    .dpy_gl_release_dmabuf   = sdl2_gl_release_dmabuf,
+    .dpy_has_dmabuf          = sdl2_gl_has_dmabuf,
 };
 
 static bool
@@ -XXX,XX +XXX,XX @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o)
     SDL_SetHint(SDL_HINT_ALLOW_ALT_TAB_WHILE_GRABBED, "0");
 #endif
     SDL_SetHint(SDL_HINT_WINDOWS_NO_CLOSE_ON_ALT_F4, "1");
+    SDL_SetHint(SDL_HINT_VIDEO_X11_FORCE_EGL, "1");
     SDL_EnableScreenSaver();
     memset(&info, 0, sizeof(info));
     SDL_VERSION(&info.version);
-- 
2.46.0

Update kernel headers to bring new VirtIO-GPU DRM capset.

Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
 include/standard-headers/drm/drm_fourcc.h     |  43 ++++
 include/standard-headers/linux/const.h        |  17 ++
 include/standard-headers/linux/ethtool.h      | 226 ++++++++++++++++++
 include/standard-headers/linux/fuse.h         |  22 +-
 .../linux/input-event-codes.h                 |   2 +
 include/standard-headers/linux/pci_regs.h     |  41 +++-
 .../standard-headers/linux/virtio_balloon.h   |  16 +-
 include/standard-headers/linux/virtio_gpu.h   |   1 +
 linux-headers/asm-arm64/mman.h                |   9 +
 linux-headers/asm-arm64/unistd.h              |  25 +-
 linux-headers/asm-generic/unistd.h            |   6 +-
 linux-headers/asm-loongarch/kvm.h             |  24 ++
 linux-headers/asm-loongarch/unistd.h          |   4 +-
 linux-headers/asm-riscv/kvm.h                 |   7 +
 linux-headers/asm-riscv/unistd.h              |  41 +---
 linux-headers/asm-x86/kvm.h                   |   2 +
 linux-headers/asm-x86/unistd_64.h             |   1 +
 linux-headers/asm-x86/unistd_x32.h            |   1 +
 linux-headers/linux/bits.h                    |   3 +
 linux-headers/linux/const.h                   |  17 ++
 linux-headers/linux/iommufd.h                 | 143 +++++++++--
 linux-headers/linux/kvm.h                     |  23 +-
 linux-headers/linux/mman.h                    |   1 +
 linux-headers/linux/psp-sev.h                 |  28 +++
 24 files changed, 610 insertions(+), 93 deletions(-)

diff --git a/include/standard-headers/drm/drm_fourcc.h b/include/standard-headers/drm/drm_fourcc.h
index XXXXXXX..XXXXXXX 100644
--- a/include/standard-headers/drm/drm_fourcc.h
+++ b/include/standard-headers/drm/drm_fourcc.h
@@ -XXX,XX +XXX,XX @@ extern "C" {
  */
 #define I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC fourcc_mod_code(INTEL, 15)
 
+/*
+ * Intel Color Control Surfaces (CCS) for graphics ver. 20 unified compression
+ * on integrated graphics
+ *
+ * The main surface is Tile 4 and at plane index 0. For semi-planar formats
+ * like NV12, the Y and UV planes are Tile 4 and are located at plane indices
+ * 0 and 1, respectively. The CCS for all planes are stored outside of the
+ * GEM object in a reserved memory area dedicated for the storage of the
+ * CCS data for all compressible GEM objects.
+ */
+#define I915_FORMAT_MOD_4_TILED_LNL_CCS fourcc_mod_code(INTEL, 16)
+
+/*
+ * Intel Color Control Surfaces (CCS) for graphics ver. 20 unified compression
+ * on discrete graphics
+ *
+ * The main surface is Tile 4 and at plane index 0. For semi-planar formats
+ * like NV12, the Y and UV planes are Tile 4 and are located at plane indices
+ * 0 and 1, respectively. The CCS for all planes are stored outside of the
+ * GEM object in a reserved memory area dedicated for the storage of the
+ * CCS data for all compressible GEM objects. The GEM object must be stored in
+ * contiguous memory with a size aligned to 64KB
+ */
+#define I915_FORMAT_MOD_4_TILED_BMG_CCS fourcc_mod_code(INTEL, 17)
+
 /*
  * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
  *
@@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
 #define AMD_FMT_MOD_TILE_VER_GFX10 2
 #define AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS 3
 #define AMD_FMT_MOD_TILE_VER_GFX11 4
+#define AMD_FMT_MOD_TILE_VER_GFX12 5
 
 /*
  * 64K_S is the same for GFX9/GFX10/GFX10_RBPLUS and hence has GFX9 as canonical
@@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
 /*
  * 64K_D for non-32 bpp is the same for GFX9/GFX10/GFX10_RBPLUS and hence has
  * GFX9 as canonical version.
+ *
+ * 64K_D_2D on GFX12 is identical to 64K_D on GFX11.
  */
 #define AMD_FMT_MOD_TILE_GFX9_64K_D 10
 #define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
@@ -XXX,XX +XXX,XX @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
 #define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
 #define AMD_FMT_MOD_TILE_GFX11_256K_R_X 31
 
+/* Gfx12 swizzle modes:
+ *    0 - LINEAR
+ *    1 - 256B_2D  - 2D block dimensions
+ *    2 - 4KB_2D
+ *    3 - 64KB_2D
+ *    4 - 256KB_2D
+ *    5 - 4KB_3D   - 3D block dimensions
+ *    6 - 64KB_3D
+ *    7 - 256KB_3D
+ */
+#define AMD_FMT_MOD_TILE_GFX12_256B_2D 1
+#define AMD_FMT_MOD_TILE_GFX12_4K_2D 2
+#define AMD_FMT_MOD_TILE_GFX12_64K_2D 3
+#define AMD_FMT_MOD_TILE_GFX12_256K_2D 4
+
 #define AMD_FMT_MOD_DCC_BLOCK_64B 0
 #define AMD_FMT_MOD_DCC_BLOCK_128B 1
 #define AMD_FMT_MOD_DCC_BLOCK_256B 2
diff --git a/include/standard-headers/linux/const.h b/include/standard-headers/linux/const.h
index XXXXXXX..XXXXXXX 100644
--- a/include/standard-headers/linux/const.h
+++ b/include/standard-headers/linux/const.h
@@ -XXX,XX +XXX,XX @@
 #define _BITUL(x)	(_UL(1) << (x))
 #define _BITULL(x)	(_ULL(1) << (x))
 
+#if !defined(__ASSEMBLY__)
+/*
+ * Missing __asm__ support
+ *
+ * __BIT128() would not work in the __asm__ code, as it shifts an
+ * 'unsigned __init128' data type as direct representation of
+ * 128 bit constants is not supported in the gcc compiler, as
+ * they get silently truncated.
+ *
+ * TODO: Please revisit this implementation when gcc compiler
+ * starts representing 128 bit constants directly like long
+ * and unsigned long etc. Subsequently drop the comment for
+ * GENMASK_U128() which would then start supporting __asm__ code.
+ */
+#define _BIT128(x)	((unsigned __int128)(1) << (x))
+#endif
+
 #define __ALIGN_KERNEL(x, a)		__ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - 1)
 #define __ALIGN_KERNEL_MASK(x, mask)	(((x) + (mask)) & ~(mask))
 
diff --git a/include/standard-headers/linux/ethtool.h b/include/standard-headers/linux/ethtool.h
index XXXXXXX..XXXXXXX 100644
--- a/include/standard-headers/linux/ethtool.h
+++ b/include/standard-headers/linux/ethtool.h
@@ -XXX,XX +XXX,XX @@ enum ethtool_module_power_mode {
 	ETHTOOL_MODULE_POWER_MODE_HIGH,
 };
 
+/**
+ * enum ethtool_c33_pse_ext_state - groups of PSE extended states
+ *      functions. IEEE 802.3-2022 33.2.4.4 Variables
+ *
+ * @ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION: Group of error_condition states
+ * @ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID: Group of mr_mps_valid states
+ * @ETHTOOL_C33_PSE_EXT_STATE_MR_PSE_ENABLE: Group of mr_pse_enable states
+ * @ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED: Group of option_detect_ted
+ *	states
+ * @ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM: Group of option_vport_lim states
+ * @ETHTOOL_C33_PSE_EXT_STATE_OVLD_DETECTED: Group of ovld_detected states
+ * @ETHTOOL_C33_PSE_EXT_STATE_PD_DLL_POWER_TYPE: Group of pd_dll_power_type
+ *	states
+ * @ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE: Group of power_not_available
+ *	states
+ * @ETHTOOL_C33_PSE_EXT_STATE_SHORT_DETECTED: Group of short_detected states
+ */
+enum ethtool_c33_pse_ext_state {
+	ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION = 1,
+	ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID,
+	ETHTOOL_C33_PSE_EXT_STATE_MR_PSE_ENABLE,
+	ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED,
+	ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM,
+	ETHTOOL_C33_PSE_EXT_STATE_OVLD_DETECTED,
+	ETHTOOL_C33_PSE_EXT_STATE_PD_DLL_POWER_TYPE,
+	ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE,
+	ETHTOOL_C33_PSE_EXT_STATE_SHORT_DETECTED,
+};
+
+/**
+ * enum ethtool_c33_pse_ext_substate_mr_mps_valid - mr_mps_valid states
+ *      functions. IEEE 802.3-2022 33.2.4.4 Variables
+ *
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_DETECTED_UNDERLOAD: Underload
+ *	state
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_CONNECTION_OPEN: Port is not
+ *	connected
+ *
+ * The PSE monitors either the DC or AC Maintain Power Signature
+ * (MPS, see 33.2.9.1). This variable indicates the presence or absence of
+ * a valid MPS.
+ */
+enum ethtool_c33_pse_ext_substate_mr_mps_valid {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_DETECTED_UNDERLOAD = 1,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_CONNECTION_OPEN,
+};
+
+/**
+ * enum ethtool_c33_pse_ext_substate_error_condition - error_condition states
+ *      functions. IEEE 802.3-2022 33.2.4.4 Variables
+ *
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_NON_EXISTING_PORT: Non-existing
+ *	port number
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNDEFINED_PORT: Undefined port
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT: Internal
+ *	hardware fault
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_COMM_ERROR_AFTER_FORCE_ON:
+ *	Communication error after force on
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS: Unknown
+ *	port status
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_TURN_OFF: Host
+ *	crash turn off
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_FORCE_SHUTDOWN:
+ *	Host crash force shutdown
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_CONFIG_CHANGE: Configuration
+ *	change
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP: Over
+ *	temperature detected
+ *
+ * error_condition is a variable indicating the status of
+ * implementation-specific fault conditions or optionally other system faults
+ * that prevent the PSE from meeting the specifications in Table 33–11 and that
+ * require the PSE not to source power. These error conditions are different
+ * from those monitored by the state diagrams in Figure 33–10.
+ */
+enum ethtool_c33_pse_ext_substate_error_condition {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_NON_EXISTING_PORT = 1,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNDEFINED_PORT,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_COMM_ERROR_AFTER_FORCE_ON,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_TURN_OFF,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_HOST_CRASH_FORCE_SHUTDOWN,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_CONFIG_CHANGE,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP,
+};
+
+/**
+ * enum ethtool_c33_pse_ext_substate_mr_pse_enable - mr_pse_enable states
+ *      functions. IEEE 802.3-2022 33.2.4.4 Variables
+ *
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_PSE_ENABLE_DISABLE_PIN_ACTIVE: Disable
+ *	pin active
+ *
+ * mr_pse_enable is control variable that selects PSE operation and test
+ * functions.
+ */
+enum ethtool_c33_pse_ext_substate_mr_pse_enable {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_PSE_ENABLE_DISABLE_PIN_ACTIVE = 1,
+};
+
+/**
+ * enum ethtool_c33_pse_ext_substate_option_detect_ted - option_detect_ted
+ *	states functions. IEEE 802.3-2022 33.2.4.4 Variables
+ *
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_DET_IN_PROCESS: Detection
+ *	in process
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_CONNECTION_CHECK_ERROR:
+ *	Connection check error
+ *
+ * option_detect_ted is a variable indicating if detection can be performed
+ * by the PSE during the ted_timer interval.
+ */
+enum ethtool_c33_pse_ext_substate_option_detect_ted {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_DET_IN_PROCESS = 1,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_CONNECTION_CHECK_ERROR,
+};
+
+/**
+ * enum ethtool_c33_pse_ext_substate_option_vport_lim - option_vport_lim states
+ *      functions. IEEE 802.3-2022 33.2.4.4 Variables
+ *
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_HIGH_VOLTAGE: Main supply
+ *	voltage is high
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_LOW_VOLTAGE: Main supply
+ *	voltage is low
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_VOLTAGE_INJECTION: Voltage
+ *	injection into the port
+ *
+ * option_vport_lim is an optional variable indicates if VPSE is out of the
+ * operating range during normal operating state.
+ */
+enum ethtool_c33_pse_ext_substate_option_vport_lim {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_HIGH_VOLTAGE = 1,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_LOW_VOLTAGE,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_VOLTAGE_INJECTION,
+};
+
+/**
+ * enum ethtool_c33_pse_ext_substate_ovld_detected - ovld_detected states
+ *      functions. IEEE 802.3-2022 33.2.4.4 Variables
+ *
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_OVLD_DETECTED_OVERLOAD: Overload state
+ *
+ * ovld_detected is a variable indicating if the PSE output current has been
+ * in an overload condition (see 33.2.7.6) for at least TCUT of a one-second
+ * sliding time.
+ */
+enum ethtool_c33_pse_ext_substate_ovld_detected {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_OVLD_DETECTED_OVERLOAD = 1,
+};
+
+/**
+ * enum ethtool_c33_pse_ext_substate_power_not_available - power_not_available
+ *	states functions. IEEE 802.3-2022 33.2.4.4 Variables
+ *
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_BUDGET_EXCEEDED: Power
+ *	budget exceeded for the controller
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PORT_PW_LIMIT_EXCEEDS_CONTROLLER_BUDGET:
+ *	Configured port power limit exceeded controller power budget
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PD_REQUEST_EXCEEDS_PORT_LIMIT:
+ *	Power request from PD exceeds port limit
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_HW_PW_LIMIT: Power
+ *	denied due to Hardware power limit
+ *
+ * power_not_available is a variable that is asserted in an
+ * implementation-dependent manner when the PSE is no longer capable of
+ * sourcing sufficient power to support the attached PD. Sufficient power
+ * is defined by classification; see 33.2.6.
+ */
+enum ethtool_c33_pse_ext_substate_power_not_available {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_BUDGET_EXCEEDED =  1,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PORT_PW_LIMIT_EXCEEDS_CONTROLLER_BUDGET,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PD_REQUEST_EXCEEDS_PORT_LIMIT,
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_HW_PW_LIMIT,
+};
+
+/**
+ * enum ethtool_c33_pse_ext_substate_short_detected - short_detected states
+ *      functions. IEEE 802.3-2022 33.2.4.4 Variables
+ *
+ * @ETHTOOL_C33_PSE_EXT_SUBSTATE_SHORT_DETECTED_SHORT_CONDITION: Short
+ *	condition was detected
+ *
+ * short_detected is a variable indicating if the PSE output current has been
+ * in a short circuit condition for TLIM within a sliding window (see 33.2.7.7).
+ */
+enum ethtool_c33_pse_ext_substate_short_detected {
+	ETHTOOL_C33_PSE_EXT_SUBSTATE_SHORT_DETECTED_SHORT_CONDITION = 1,
+};
+
 /**
  * enum ethtool_pse_types - Types of PSE controller.
  * @ETHTOOL_PSE_UNKNOWN: Type of PSE controller is unknown
@@ -XXX,XX +XXX,XX @@ enum ethtool_mm_verify_status {
 	ETHTOOL_MM_VERIFY_STATUS_DISABLED,
 };
 
+/**
+ * enum ethtool_module_fw_flash_status - plug-in module firmware flashing status
+ * @ETHTOOL_MODULE_FW_FLASH_STATUS_STARTED: The firmware flashing process has
+ *	started.
+ * @ETHTOOL_MODULE_FW_FLASH_STATUS_IN_PROGRESS: The firmware flashing process
+ *	is in progress.
+ * @ETHTOOL_MODULE_FW_FLASH_STATUS_COMPLETED: The firmware flashing process was
+ *	completed successfully.
+ * @ETHTOOL_MODULE_FW_FLASH_STATUS_ERROR: The firmware flashing process was
+ *	stopped due to an error.
+ */
+enum ethtool_module_fw_flash_status {
+	ETHTOOL_MODULE_FW_FLASH_STATUS_STARTED = 1,
+	ETHTOOL_MODULE_FW_FLASH_STATUS_IN_PROGRESS,
+	ETHTOOL_MODULE_FW_FLASH_STATUS_COMPLETED,
+	ETHTOOL_MODULE_FW_FLASH_STATUS_ERROR,
+};
+
 /**
  * struct ethtool_gstrings - string set for data tagging
  * @cmd: Command number = %ETHTOOL_GSTRINGS
@@ -XXX,XX +XXX,XX @@ enum ethtool_link_mode_bit_indices {
 	ETHTOOL_LINK_MODE_10baseT1S_Full_BIT		 = 99,
 	ETHTOOL_LINK_MODE_10baseT1S_Half_BIT		 = 100,
 	ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT	 = 101,
+	ETHTOOL_LINK_MODE_10baseT1BRR_Full_BIT		 = 102,
 
 	/* must be last entry */
 	__ETHTOOL_LINK_MODE_MASK_NBITS
@@ -XXX,XX +XXX,XX @@ struct ethtool_link_settings {
 	 * uint32_t map_lp_advertising[link_mode_masks_nwords];
 	 */
 };
+
+/**
+ * enum phy_upstream - Represents the upstream component a given PHY device
+ * is connected to, as in what is on the other end of the MII bus. Most PHYs
+ * will be attached to an Ethernet MAC controller, but in some cases, there's
+ * an intermediate PHY used as a media-converter, which will driver another
+ * MII interface as its output.
+ * @PHY_UPSTREAM_MAC: Upstream component is a MAC (a switch port,
+ *		      or ethernet controller)
+ * @PHY_UPSTREAM_PHY: Upstream component is a PHY (likely a media converter)
+ */
+enum phy_upstream {
+	PHY_UPSTREAM_MAC,
+	PHY_UPSTREAM_PHY,
+};
+
 #endif /* _LINUX_ETHTOOL_H */
diff --git a/include/standard-headers/linux/fuse.h b/include/standard-headers/linux/fuse.h
index XXXXXXX..XXXXXXX 100644
--- a/include/standard-headers/linux/fuse.h
+++ b/include/standard-headers/linux/fuse.h
@@ -XXX,XX +XXX,XX @@
  *  - add backing_id to fuse_open_out, add FOPEN_PASSTHROUGH open flag
  *  - add FUSE_NO_EXPORT_SUPPORT init flag
  *  - add FUSE_NOTIFY_RESEND, add FUSE_HAS_RESEND init flag
+ *
+ *  7.41
+ *  - add FUSE_ALLOW_IDMAP
  */
 
 #ifndef _LINUX_FUSE_H
@@ -XXX,XX +XXX,XX @@
 #define FUSE_KERNEL_VERSION 7
 
 /** Minor version number of this interface */
-#define FUSE_KERNEL_MINOR_VERSION 40
+#define FUSE_KERNEL_MINOR_VERSION 41
 
 /** The node ID of the root inode */
 #define FUSE_ROOT_ID 1
@@ -XXX,XX +XXX,XX @@ struct fuse_file_lock {
  * FUSE_NO_EXPORT_SUPPORT: explicitly disable export support
  * FUSE_HAS_RESEND: kernel supports resending pending requests, and the high bit
  *		    of the request ID indicates resend requests
+ * FUSE_ALLOW_IDMAP: allow creation of idmapped mounts
  */
 #define FUSE_ASYNC_READ		(1 << 0)
 #define FUSE_POSIX_LOCKS	(1 << 1)
@@ -XXX,XX +XXX,XX @@ struct fuse_file_lock {
 
 /* Obsolete alias for FUSE_DIRECT_IO_ALLOW_MMAP */
 #define FUSE_DIRECT_IO_RELAX	FUSE_DIRECT_IO_ALLOW_MMAP
+#define FUSE_ALLOW_IDMAP	(1ULL << 40)
 
 /**
  * CUSE INIT request/reply flags
@@ -XXX,XX +XXX,XX @@ struct fuse_fallocate_in {
  */
 #define FUSE_UNIQUE_RESEND (1ULL << 63)
 
+/**
+ * This value will be set by the kernel to
+ * (struct fuse_in_header).{uid,gid} fields in
+ * case when:
+ * - fuse daemon enabled FUSE_ALLOW_IDMAP
+ * - idmapping information is not available and uid/gid
+ *   can not be mapped in accordance with an idmapping.
+ *
+ * Note: an idmapping information always available
+ * for inode creation operations like:
+ * FUSE_MKNOD, FUSE_SYMLINK, FUSE_MKDIR, FUSE_TMPFILE,
+ * FUSE_CREATE and FUSE_RENAME2 (with RENAME_WHITEOUT).
+ */
+#define FUSE_INVALID_UIDGID ((uint32_t)(-1))
+
 struct fuse_in_header {
 	uint32_t	len;
 	uint32_t	opcode;
diff --git a/include/standard-headers/linux/input-event-codes.h b/include/standard-headers/linux/input-event-codes.h
index XXXXXXX..XXXXXXX 100644
--- a/include/standard-headers/linux/input-event-codes.h
+++ b/include/standard-headers/linux/input-event-codes.h
@@ -XXX,XX +XXX,XX @@
 #define KEY_CAMERA_ACCESS_ENABLE	0x24b	/* Enables programmatic access to camera devices. (HUTRR72) */
 #define KEY_CAMERA_ACCESS_DISABLE	0x24c	/* Disables programmatic access to camera devices. (HUTRR72) */
 #define KEY_CAMERA_ACCESS_TOGGLE	0x24d	/* Toggles the current state of the camera access control. (HUTRR72) */
+#define KEY_ACCESSIBILITY		0x24e	/* Toggles the system bound accessibility UI/command (HUTRR116) */
+#define KEY_DO_NOT_DISTURB		0x24f	/* Toggles the system-wide "Do Not Disturb" control (HUTRR94)*/
 
 #define KEY_BRIGHTNESS_MIN		0x250	/* Set Brightness to Minimum */
 #define KEY_BRIGHTNESS_MAX		0x251	/* Set Brightness to Maximum */
diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h
index XXXXXXX..XXXXXXX 100644
--- a/include/standard-headers/linux/pci_regs.h
+++ b/include/standard-headers/linux/pci_regs.h
@@ -XXX,XX +XXX,XX @@
 #define  PCI_EXP_RTCTL_SENFEE	0x0002	/* System Error on Non-Fatal Error */
 #define  PCI_EXP_RTCTL_SEFEE	0x0004	/* System Error on Fatal Error */
 #define  PCI_EXP_RTCTL_PMEIE	0x0008	/* PME Interrupt Enable */
-#define  PCI_EXP_RTCTL_CRSSVE	0x0010	/* CRS Software Visibility Enable */
+#define  PCI_EXP_RTCTL_RRS_SVE	0x0010	/* Config RRS Software Visibility Enable */
+#define  PCI_EXP_RTCTL_CRSSVE PCI_EXP_RTCTL_RRS_SVE /* compatibility */
 #define PCI_EXP_RTCAP		0x1e	/* Root Capabilities */
-#define  PCI_EXP_RTCAP_CRSVIS	0x0001	/* CRS Software Visibility capability */
+#define  PCI_EXP_RTCAP_RRS_SV	0x0001	/* Config RRS Software Visibility */
+#define  PCI_EXP_RTCAP_CRSVIS PCI_EXP_RTCAP_RRS_SV /* compatibility */
 #define PCI_EXP_RTSTA		0x20	/* Root Status */
 #define  PCI_EXP_RTSTA_PME_RQ_ID 0x0000ffff /* PME Requester ID */
 #define  PCI_EXP_RTSTA_PME	0x00010000 /* PME status */
@@ -XXX,XX +XXX,XX @@
 #define PCI_EXT_CAP_ID_DVSEC	0x23	/* Designated Vendor-Specific */
 #define PCI_EXT_CAP_ID_DLF	0x25	/* Data Link Feature */
 #define PCI_EXT_CAP_ID_PL_16GT	0x26	/* Physical Layer 16.0 GT/s */
+#define PCI_EXT_CAP_ID_NPEM	0x29	/* Native PCIe Enclosure Management */
 #define PCI_EXT_CAP_ID_PL_32GT  0x2A    /* Physical Layer 32.0 GT/s */
 #define PCI_EXT_CAP_ID_DOE	0x2E	/* Data Object Exchange */
 #define PCI_EXT_CAP_ID_MAX	PCI_EXT_CAP_ID_DOE
@@ -XXX,XX +XXX,XX @@
 #define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK		0x000000F0
 #define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT	4
 
+/* Native PCIe Enclosure Management */
+#define PCI_NPEM_CAP     0x04 /* NPEM capability register */
+#define  PCI_NPEM_CAP_CAPABLE     0x00000001 /* NPEM Capable */
+
+#define PCI_NPEM_CTRL    0x08 /* NPEM control register */
+#define  PCI_NPEM_CTRL_ENABLE     0x00000001 /* NPEM Enable */
+
+/*
+ * Native PCIe Enclosure Management indication bits and Reset command bit
+ * are corresponding for capability and control registers.
+ */
+#define  PCI_NPEM_CMD_RESET       0x00000002 /* Reset Command */
+#define  PCI_NPEM_IND_OK          0x00000004 /* OK */
+#define  PCI_NPEM_IND_LOCATE      0x00000008 /* Locate */
+#define  PCI_NPEM_IND_FAIL        0x00000010 /* Fail */
+#define  PCI_NPEM_IND_REBUILD     0x00000020 /* Rebuild */
+#define  PCI_NPEM_IND_PFA         0x00000040 /* Predicted Failure Analysis */
+#define  PCI_NPEM_IND_HOTSPARE    0x00000080 /* Hot Spare */
+#define  PCI_NPEM_IND_ICA         0x00000100 /* In Critical Array */
+#define  PCI_NPEM_IND_IFA         0x00000200 /* In Failed Array */
+#define  PCI_NPEM_IND_IDT         0x00000400 /* Device Type */
+#define  PCI_NPEM_IND_DISABLED    0x00000800 /* Disabled */
+#define  PCI_NPEM_IND_SPEC_0      0x01000000
+#define  PCI_NPEM_IND_SPEC_1      0x02000000
+#define  PCI_NPEM_IND_SPEC_2      0x04000000
+#define  PCI_NPEM_IND_SPEC_3      0x08000000
+#define  PCI_NPEM_IND_SPEC_4      0x10000000
+#define  PCI_NPEM_IND_SPEC_5      0x20000000
+#define  PCI_NPEM_IND_SPEC_6      0x40000000
+#define  PCI_NPEM_IND_SPEC_7      0x80000000
+
+#define PCI_NPEM_STATUS  0x0c /* NPEM status register */
+#define  PCI_NPEM_STATUS_CC       0x00000001 /* Command Completed */
+
 /* Data Object Exchange */
 #define PCI_DOE_CAP		0x04    /* DOE Capabilities Register */
 #define  PCI_DOE_CAP_INT_SUP			0x00000001  /* Interrupt Support */
diff --git a/include/standard-headers/linux/virtio_balloon.h b/include/standard-headers/linux/virtio_balloon.h
index XXXXXXX..XXXXXXX 100644
--- a/include/standard-headers/linux/virtio_balloon.h
+++ b/include/standard-headers/linux/virtio_balloon.h
@@ -XXX,XX +XXX,XX @@ struct virtio_balloon_config {
 #define VIRTIO_BALLOON_S_CACHES   7   /* Disk caches */
 #define VIRTIO_BALLOON_S_HTLB_PGALLOC  8  /* Hugetlb page allocations */
 #define VIRTIO_BALLOON_S_HTLB_PGFAIL   9  /* Hugetlb page allocation failures */
-#define VIRTIO_BALLOON_S_NR       10
+#define VIRTIO_BALLOON_S_OOM_KILL      10 /* OOM killer invocations */
+#define VIRTIO_BALLOON_S_ALLOC_STALL   11 /* Stall count of memory allocatoin */
+#define VIRTIO_BALLOON_S_ASYNC_SCAN    12 /* Amount of memory scanned asynchronously */
+#define VIRTIO_BALLOON_S_DIRECT_SCAN   13 /* Amount of memory scanned directly */
+#define VIRTIO_BALLOON_S_ASYNC_RECLAIM 14 /* Amount of memory reclaimed asynchronously */
+#define VIRTIO_BALLOON_S_DIRECT_RECLAIM 15 /* Amount of memory reclaimed directly */
+#define VIRTIO_BALLOON_S_NR       16
 
 #define VIRTIO_BALLOON_S_NAMES_WITH_PREFIX(VIRTIO_BALLOON_S_NAMES_prefix) { \
 	VIRTIO_BALLOON_S_NAMES_prefix "swap-in", \
@@ -XXX,XX +XXX,XX @@ struct virtio_balloon_config {
 	VIRTIO_BALLOON_S_NAMES_prefix "available-memory", \
 	VIRTIO_BALLOON_S_NAMES_prefix "disk-caches", \
 	VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-allocations", \
-	VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-failures" \
+	VIRTIO_BALLOON_S_NAMES_prefix "hugetlb-failures", \
+	VIRTIO_BALLOON_S_NAMES_prefix "oom-kills", \
+	VIRTIO_BALLOON_S_NAMES_prefix "alloc-stalls", \
+	VIRTIO_BALLOON_S_NAMES_prefix "async-scans", \
+	VIRTIO_BALLOON_S_NAMES_prefix "direct-scans", \
+	VIRTIO_BALLOON_S_NAMES_prefix "async-reclaims", \
+	VIRTIO_BALLOON_S_NAMES_prefix "direct-reclaims" \
 }
 
 #define VIRTIO_BALLOON_S_NAMES VIRTIO_BALLOON_S_NAMES_WITH_PREFIX("")
diff --git a/include/standard-headers/linux/virtio_gpu.h b/include/standard-headers/linux/virtio_gpu.h
index XXXXXXX..XXXXXXX 100644
--- a/include/standard-headers/linux/virtio_gpu.h
+++ b/include/standard-headers/linux/virtio_gpu.h
@@ -XXX,XX +XXX,XX @@ struct virtio_gpu_cmd_submit {
 #define VIRTIO_GPU_CAPSET_VIRGL2 2
 /* 3 is reserved for gfxstream */
 #define VIRTIO_GPU_CAPSET_VENUS 4
+#define VIRTIO_GPU_CAPSET_DRM 6
 
 /* VIRTIO_GPU_CMD_GET_CAPSET_INFO */
 struct virtio_gpu_get_capset_info {
diff --git a/linux-headers/asm-arm64/mman.h b/linux-headers/asm-arm64/mman.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/asm-arm64/mman.h
+++ b/linux-headers/asm-arm64/mman.h
@@ -XXX,XX +XXX,XX @@
 #define PROT_BTI	0x10		/* BTI guarded page */
 #define PROT_MTE	0x20		/* Normal Tagged mapping */
 
+/* Override any generic PKEY permission defines */
+#define PKEY_DISABLE_EXECUTE	0x4
+#define PKEY_DISABLE_READ	0x8
+#undef PKEY_ACCESS_MASK
+#define PKEY_ACCESS_MASK       (PKEY_DISABLE_ACCESS |\
+				PKEY_DISABLE_WRITE  |\
+				PKEY_DISABLE_READ   |\
+				PKEY_DISABLE_EXECUTE)
+
 #endif /* ! _UAPI__ASM_MMAN_H */
diff --git a/linux-headers/asm-arm64/unistd.h b/linux-headers/asm-arm64/unistd.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/asm-arm64/unistd.h
+++ b/linux-headers/asm-arm64/unistd.h
@@ -XXX,XX +XXX,XX @@
 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-/*
- * Copyright (C) 2012 ARM Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#define __ARCH_WANT_RENAMEAT
-#define __ARCH_WANT_NEW_STAT
-#define __ARCH_WANT_SET_GET_RLIMIT
-#define __ARCH_WANT_TIME32_SYSCALLS
-#define __ARCH_WANT_SYS_CLONE3
-#define __ARCH_WANT_MEMFD_SECRET
-
-#include <asm-generic/unistd.h>
+#include <asm/unistd_64.h>
diff --git a/linux-headers/asm-generic/unistd.h b/linux-headers/asm-generic/unistd.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/asm-generic/unistd.h
+++ b/linux-headers/asm-generic/unistd.h
@@ -XXX,XX +XXX,XX @@ __SC_COMP(__NR_pselect6_time64, sys_pselect6, compat_sys_pselect6_time64)
 #define __NR_ppoll_time64 414
 __SC_COMP(__NR_ppoll_time64, sys_ppoll, compat_sys_ppoll_time64)
 #define __NR_io_pgetevents_time64 416
-__SYSCALL(__NR_io_pgetevents_time64, sys_io_pgetevents)
+__SC_COMP(__NR_io_pgetevents_time64, sys_io_pgetevents, compat_sys_io_pgetevents_time64)
 #define __NR_recvmmsg_time64 417
 __SC_COMP(__NR_recvmmsg_time64, sys_recvmmsg, compat_sys_recvmmsg_time64)
 #define __NR_mq_timedsend_time64 418
@@ -XXX,XX +XXX,XX @@ __SYSCALL(__NR_fsmount, sys_fsmount)
 __SYSCALL(__NR_fspick, sys_fspick)
 #define __NR_pidfd_open 434
 __SYSCALL(__NR_pidfd_open, sys_pidfd_open)
-
-#ifdef __ARCH_WANT_SYS_CLONE3
 #define __NR_clone3 435
 __SYSCALL(__NR_clone3, sys_clone3)
-#endif
-
 #define __NR_close_range 436
 __SYSCALL(__NR_close_range, sys_close_range)
 #define __NR_openat2 437
diff --git a/linux-headers/asm-loongarch/kvm.h b/linux-headers/asm-loongarch/kvm.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/asm-loongarch/kvm.h
+++ b/linux-headers/asm-loongarch/kvm.h
@@ -XXX,XX +XXX,XX @@ struct kvm_fpu {
 #define KVM_REG_LOONGARCH_KVM		(KVM_REG_LOONGARCH | 0x20000ULL)
 #define KVM_REG_LOONGARCH_FPSIMD	(KVM_REG_LOONGARCH | 0x30000ULL)
 #define KVM_REG_LOONGARCH_CPUCFG	(KVM_REG_LOONGARCH | 0x40000ULL)
+#define KVM_REG_LOONGARCH_LBT		(KVM_REG_LOONGARCH | 0x50000ULL)
 #define KVM_REG_LOONGARCH_MASK		(KVM_REG_LOONGARCH | 0x70000ULL)
 #define KVM_CSR_IDX_MASK		0x7fff
 #define KVM_CPUCFG_IDX_MASK		0x7fff
@@ -XXX,XX +XXX,XX @@ struct kvm_fpu {
 /* Debugging: Special instruction for software breakpoint */
 #define KVM_REG_LOONGARCH_DEBUG_INST	(KVM_REG_LOONGARCH_KVM | KVM_REG_SIZE_U64 | 3)
 
+/* LBT registers */
+#define KVM_REG_LOONGARCH_LBT_SCR0	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 1)
+#define KVM_REG_LOONGARCH_LBT_SCR1	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 2)
+#define KVM_REG_LOONGARCH_LBT_SCR2	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 3)
+#define KVM_REG_LOONGARCH_LBT_SCR3	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 4)
+#define KVM_REG_LOONGARCH_LBT_EFLAGS	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 5)
+#define KVM_REG_LOONGARCH_LBT_FTOP	(KVM_REG_LOONGARCH_LBT | KVM_REG_SIZE_U64 | 6)
+
 #define LOONGARCH_REG_SHIFT		3
 #define LOONGARCH_REG_64(TYPE, REG)	(TYPE | KVM_REG_SIZE_U64 | (REG << LOONGARCH_REG_SHIFT))
 #define KVM_IOC_CSRID(REG)		LOONGARCH_REG_64(KVM_REG_LOONGARCH_CSR, REG)
 #define KVM_IOC_CPUCFG(REG)		LOONGARCH_REG_64(KVM_REG_LOONGARCH_CPUCFG, REG)
+
+/* Device Control API on vm fd */
+#define KVM_LOONGARCH_VM_FEAT_CTRL		0
+#define  KVM_LOONGARCH_VM_FEAT_LSX		0
+#define  KVM_LOONGARCH_VM_FEAT_LASX		1
+#define  KVM_LOONGARCH_VM_FEAT_X86BT		2
+#define  KVM_LOONGARCH_VM_FEAT_ARMBT		3
+#define  KVM_LOONGARCH_VM_FEAT_MIPSBT		4
+#define  KVM_LOONGARCH_VM_FEAT_PMU		5
+#define  KVM_LOONGARCH_VM_FEAT_PV_IPI		6
+#define  KVM_LOONGARCH_VM_FEAT_PV_STEALTIME	7
+
+/* Device Control API on vcpu fd */
 #define KVM_LOONGARCH_VCPU_CPUCFG	0
+#define KVM_LOONGARCH_VCPU_PVTIME_CTRL	1
+#define  KVM_LOONGARCH_VCPU_PVTIME_GPA	0
 
 struct kvm_debug_exit_arch {
 };
diff --git a/linux-headers/asm-loongarch/unistd.h b/linux-headers/asm-loongarch/unistd.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/asm-loongarch/unistd.h
+++ b/linux-headers/asm-loongarch/unistd.h
@@ -XXX,XX +XXX,XX @@
 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#define __ARCH_WANT_SYS_CLONE
-#define __ARCH_WANT_SYS_CLONE3
 
-#include <asm-generic/unistd.h>
+#include <asm/unistd_64.h>
diff --git a/linux-headers/asm-riscv/kvm.h b/linux-headers/asm-riscv/kvm.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/asm-riscv/kvm.h
+++ b/linux-headers/asm-riscv/kvm.h
@@ -XXX,XX +XXX,XX @@ enum KVM_RISCV_ISA_EXT_ID {
 	KVM_RISCV_ISA_EXT_ZTSO,
 	KVM_RISCV_ISA_EXT_ZACAS,
 	KVM_RISCV_ISA_EXT_SSCOFPMF,
+	KVM_RISCV_ISA_EXT_ZIMOP,
+	KVM_RISCV_ISA_EXT_ZCA,
+	KVM_RISCV_ISA_EXT_ZCB,
+	KVM_RISCV_ISA_EXT_ZCD,
+	KVM_RISCV_ISA_EXT_ZCF,
+	KVM_RISCV_ISA_EXT_ZCMOP,
+	KVM_RISCV_ISA_EXT_ZAWRS,
 	KVM_RISCV_ISA_EXT_MAX,
 };
 
diff --git a/linux-headers/asm-riscv/unistd.h b/linux-headers/asm-riscv/unistd.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/asm-riscv/unistd.h
+++ b/linux-headers/asm-riscv/unistd.h
@@ -XXX,XX +XXX,XX @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <https://www.gnu.org/licenses/>.
  */
+#include <asm/bitsperlong.h>
 
-#if defined(__LP64__) && !defined(__SYSCALL_COMPAT)
-#define __ARCH_WANT_NEW_STAT
-#define __ARCH_WANT_SET_GET_RLIMIT
-#endif /* __LP64__ */
-
-#define __ARCH_WANT_SYS_CLONE3
-#define __ARCH_WANT_MEMFD_SECRET
-
-#include <asm-generic/unistd.h>
-
-/*
- * Allows the instruction cache to be flushed from userspace.  Despite RISC-V
- * having a direct 'fence.i' instruction available to userspace (which we
- * can't trap!), that's not actually viable when running on Linux because the
- * kernel might schedule a process on another hart.  There is no way for
- * userspace to handle this without invoking the kernel (as it doesn't know the
- * thread->hart mappings), so we've defined a RISC-V specific system call to
- * flush the instruction cache.
- *
- * __NR_riscv_flush_icache is defined to flush the instruction cache over an
- * address range, with the flush applying to either all threads or just the
- * caller.  We don't currently do anything with the address range, that's just
- * in there for forwards compatibility.
- */
-#ifndef __NR_riscv_flush_icache
-#define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15)
-#endif
-__SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache)
-
-/*
- * Allows userspace to query the kernel for CPU architecture and
- * microarchitecture details across a given set of CPUs.
- */
-#ifndef __NR_riscv_hwprobe
-#define __NR_riscv_hwprobe (__NR_arch_specific_syscall + 14)
+#if __BITS_PER_LONG == 64
+#include <asm/unistd_64.h>
+#else
+#include <asm/unistd_32.h>
 #endif
-__SYSCALL(__NR_riscv_hwprobe, sys_riscv_hwprobe)
diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/asm-x86/kvm.h
+++ b/linux-headers/asm-x86/kvm.h
@@ -XXX,XX +XXX,XX @@ struct kvm_ioapic_state {
 
 #define KVM_RUN_X86_SMM		 (1 << 0)
 #define KVM_RUN_X86_BUS_LOCK     (1 << 1)
+#define KVM_RUN_X86_GUEST_MODE   (1 << 2)
 
 /* for KVM_GET_REGS and KVM_SET_REGS */
 struct kvm_regs {
@@ -XXX,XX +XXX,XX @@ struct kvm_sync_regs {
 #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT	(1 << 4)
 #define KVM_X86_QUIRK_FIX_HYPERCALL_INSN	(1 << 5)
 #define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS	(1 << 6)
+#define KVM_X86_QUIRK_SLOT_ZAP_ALL		(1 << 7)
 
 #define KVM_STATE_NESTED_FORMAT_VMX	0
 #define KVM_STATE_NESTED_FORMAT_SVM	1
diff --git a/linux-headers/asm-x86/unistd_64.h b/linux-headers/asm-x86/unistd_64.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/asm-x86/unistd_64.h
+++ b/linux-headers/asm-x86/unistd_64.h
@@ -XXX,XX +XXX,XX @@
 #define __NR_statx 332
 #define __NR_io_pgetevents 333
 #define __NR_rseq 334
+#define __NR_uretprobe 335
 #define __NR_pidfd_send_signal 424
 #define __NR_io_uring_setup 425
 #define __NR_io_uring_enter 426
diff --git a/linux-headers/asm-x86/unistd_x32.h b/linux-headers/asm-x86/unistd_x32.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/asm-x86/unistd_x32.h
+++ b/linux-headers/asm-x86/unistd_x32.h
@@ -XXX,XX +XXX,XX @@
 #define __NR_statx (__X32_SYSCALL_BIT + 332)
 #define __NR_io_pgetevents (__X32_SYSCALL_BIT + 333)
 #define __NR_rseq (__X32_SYSCALL_BIT + 334)
+#define __NR_uretprobe (__X32_SYSCALL_BIT + 335)
 #define __NR_pidfd_send_signal (__X32_SYSCALL_BIT + 424)
 #define __NR_io_uring_setup (__X32_SYSCALL_BIT + 425)
 #define __NR_io_uring_enter (__X32_SYSCALL_BIT + 426)
diff --git a/linux-headers/linux/bits.h b/linux-headers/linux/bits.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/linux/bits.h
+++ b/linux-headers/linux/bits.h
@@ -XXX,XX +XXX,XX @@
         (((~_ULL(0)) - (_ULL(1) << (l)) + 1) & \
          (~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h))))
 
+#define __GENMASK_U128(h, l) \
+	((_BIT128((h)) << 1) - (_BIT128(l)))
+
 #endif /* _LINUX_BITS_H */
diff --git a/linux-headers/linux/const.h b/linux-headers/linux/const.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/linux/const.h
+++ b/linux-headers/linux/const.h
@@ -XXX,XX +XXX,XX @@
 #define _BITUL(x)	(_UL(1) << (x))
 #define _BITULL(x)	(_ULL(1) << (x))
 
+#if !defined(__ASSEMBLY__)
+/*
+ * Missing __asm__ support
+ *
+ * __BIT128() would not work in the __asm__ code, as it shifts an
+ * 'unsigned __init128' data type as direct representation of
+ * 128 bit constants is not supported in the gcc compiler, as
+ * they get silently truncated.
+ *
+ * TODO: Please revisit this implementation when gcc compiler
+ * starts representing 128 bit constants directly like long
+ * and unsigned long etc. Subsequently drop the comment for
+ * GENMASK_U128() which would then start supporting __asm__ code.
+ */
+#define _BIT128(x)	((unsigned __int128)(1) << (x))
+#endif
+
 #define __ALIGN_KERNEL(x, a)		__ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - 1)
 #define __ALIGN_KERNEL_MASK(x, mask)	(((x) + (mask)) & ~(mask))
 
diff --git a/linux-headers/linux/iommufd.h b/linux-headers/linux/iommufd.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/linux/iommufd.h
+++ b/linux-headers/linux/iommufd.h
@@ -XXX,XX +XXX,XX @@
 #ifndef _IOMMUFD_H
 #define _IOMMUFD_H
 
-#include <linux/types.h>
 #include <linux/ioctl.h>
+#include <linux/types.h>
 
 #define IOMMUFD_TYPE (';')
 
@@ -XXX,XX +XXX,XX @@
 enum {
 	IOMMUFD_CMD_BASE = 0x80,
 	IOMMUFD_CMD_DESTROY = IOMMUFD_CMD_BASE,
-	IOMMUFD_CMD_IOAS_ALLOC,
-	IOMMUFD_CMD_IOAS_ALLOW_IOVAS,
-	IOMMUFD_CMD_IOAS_COPY,
-	IOMMUFD_CMD_IOAS_IOVA_RANGES,
-	IOMMUFD_CMD_IOAS_MAP,
-	IOMMUFD_CMD_IOAS_UNMAP,
-	IOMMUFD_CMD_OPTION,
-	IOMMUFD_CMD_VFIO_IOAS,
-	IOMMUFD_CMD_HWPT_ALLOC,
-	IOMMUFD_CMD_GET_HW_INFO,
-	IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING,
-	IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP,
-	IOMMUFD_CMD_HWPT_INVALIDATE,
+	IOMMUFD_CMD_IOAS_ALLOC = 0x81,
+	IOMMUFD_CMD_IOAS_ALLOW_IOVAS = 0x82,
+	IOMMUFD_CMD_IOAS_COPY = 0x83,
+	IOMMUFD_CMD_IOAS_IOVA_RANGES = 0x84,
+	IOMMUFD_CMD_IOAS_MAP = 0x85,
+	IOMMUFD_CMD_IOAS_UNMAP = 0x86,
+	IOMMUFD_CMD_OPTION = 0x87,
+	IOMMUFD_CMD_VFIO_IOAS = 0x88,
+	IOMMUFD_CMD_HWPT_ALLOC = 0x89,
+	IOMMUFD_CMD_GET_HW_INFO = 0x8a,
+	IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING = 0x8b,
+	IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP = 0x8c,
+	IOMMUFD_CMD_HWPT_INVALIDATE = 0x8d,
+	IOMMUFD_CMD_FAULT_QUEUE_ALLOC = 0x8e,
 };
 
 /**
@@ -XXX,XX +XXX,XX @@ struct iommu_vfio_ioas {
  *                                the parent HWPT in a nesting configuration.
  * @IOMMU_HWPT_ALLOC_DIRTY_TRACKING: Dirty tracking support for device IOMMU is
  *                                   enforced on device attachment
+ * @IOMMU_HWPT_FAULT_ID_VALID: The fault_id field of hwpt allocation data is
+ *                             valid.
  */
 enum iommufd_hwpt_alloc_flags {
 	IOMMU_HWPT_ALLOC_NEST_PARENT = 1 << 0,
 	IOMMU_HWPT_ALLOC_DIRTY_TRACKING = 1 << 1,
+	IOMMU_HWPT_FAULT_ID_VALID = 1 << 2,
 };
 
 /**
@@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_vtd_s1 {
  * @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table
  */
 enum iommu_hwpt_data_type {
-	IOMMU_HWPT_DATA_NONE,
-	IOMMU_HWPT_DATA_VTD_S1,
+	IOMMU_HWPT_DATA_NONE = 0,
+	IOMMU_HWPT_DATA_VTD_S1 = 1,
 };
 
 /**
@@ -XXX,XX +XXX,XX @@ enum iommu_hwpt_data_type {
  * @data_type: One of enum iommu_hwpt_data_type
  * @data_len: Length of the type specific data
  * @data_uptr: User pointer to the type specific data
+ * @fault_id: The ID of IOMMUFD_FAULT object. Valid only if flags field of
+ *            IOMMU_HWPT_FAULT_ID_VALID is set.
+ * @__reserved2: Padding to 64-bit alignment. Must be 0.
  *
  * Explicitly allocate a hardware page table object. This is the same object
  * type that is returned by iommufd_device_attach() and represents the
@@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_alloc {
 	__u32 data_type;
 	__u32 data_len;
 	__aligned_u64 data_uptr;
+	__u32 fault_id;
+	__u32 __reserved2;
 };
 #define IOMMU_HWPT_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_ALLOC)
 
@@ -XXX,XX +XXX,XX @@ struct iommu_hw_info_vtd {
  * @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
  */
 enum iommu_hw_info_type {
-	IOMMU_HW_INFO_TYPE_NONE,
-	IOMMU_HW_INFO_TYPE_INTEL_VTD,
+	IOMMU_HW_INFO_TYPE_NONE = 0,
+	IOMMU_HW_INFO_TYPE_INTEL_VTD = 1,
 };
 
 /**
@@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_get_dirty_bitmap {
  * @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1
  */
 enum iommu_hwpt_invalidate_data_type {
-	IOMMU_HWPT_INVALIDATE_DATA_VTD_S1,
+	IOMMU_HWPT_INVALIDATE_DATA_VTD_S1 = 0,
 };
 
 /**
@@ -XXX,XX +XXX,XX @@ struct iommu_hwpt_invalidate {
 	__u32 __reserved;
 };
 #define IOMMU_HWPT_INVALIDATE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_INVALIDATE)
+
+/**
+ * enum iommu_hwpt_pgfault_flags - flags for struct iommu_hwpt_pgfault
+ * @IOMMU_PGFAULT_FLAGS_PASID_VALID: The pasid field of the fault data is
+ *                                   valid.
+ * @IOMMU_PGFAULT_FLAGS_LAST_PAGE: It's the last fault of a fault group.
+ */
+enum iommu_hwpt_pgfault_flags {
+	IOMMU_PGFAULT_FLAGS_PASID_VALID		= (1 << 0),
+	IOMMU_PGFAULT_FLAGS_LAST_PAGE		= (1 << 1),
+};
+
+/**
+ * enum iommu_hwpt_pgfault_perm - perm bits for struct iommu_hwpt_pgfault
+ * @IOMMU_PGFAULT_PERM_READ: request for read permission
+ * @IOMMU_PGFAULT_PERM_WRITE: request for write permission
+ * @IOMMU_PGFAULT_PERM_EXEC: (PCIE 10.4.1) request with a PASID that has the
+ *                           Execute Requested bit set in PASID TLP Prefix.
+ * @IOMMU_PGFAULT_PERM_PRIV: (PCIE 10.4.1) request with a PASID that has the
+ *                           Privileged Mode Requested bit set in PASID TLP
+ *                           Prefix.
+ */
+enum iommu_hwpt_pgfault_perm {
+	IOMMU_PGFAULT_PERM_READ			= (1 << 0),
+	IOMMU_PGFAULT_PERM_WRITE		= (1 << 1),
+	IOMMU_PGFAULT_PERM_EXEC			= (1 << 2),
+	IOMMU_PGFAULT_PERM_PRIV			= (1 << 3),
+};
+
+/**
+ * struct iommu_hwpt_pgfault - iommu page fault data
+ * @flags: Combination of enum iommu_hwpt_pgfault_flags
+ * @dev_id: id of the originated device
+ * @pasid: Process Address Space ID
+ * @grpid: Page Request Group Index
+ * @perm: Combination of enum iommu_hwpt_pgfault_perm
+ * @addr: Fault address
+ * @length: a hint of how much data the requestor is expecting to fetch. For
+ *          example, if the PRI initiator knows it is going to do a 10MB
+ *          transfer, it could fill in 10MB and the OS could pre-fault in
+ *          10MB of IOVA. It's default to 0 if there's no such hint.
+ * @cookie: kernel-managed cookie identifying a group of fault messages. The
+ *          cookie number encoded in the last page fault of the group should
+ *          be echoed back in the response message.
+ */
+struct iommu_hwpt_pgfault {
+	__u32 flags;
+	__u32 dev_id;
+	__u32 pasid;
+	__u32 grpid;
+	__u32 perm;
+	__u64 addr;
+	__u32 length;
+	__u32 cookie;
+};
+
+/**
+ * enum iommufd_page_response_code - Return status of fault handlers
+ * @IOMMUFD_PAGE_RESP_SUCCESS: Fault has been handled and the page tables
+ *                             populated, retry the access. This is the
+ *                             "Success" defined in PCI 10.4.2.1.
+ * @IOMMUFD_PAGE_RESP_INVALID: Could not handle this fault, don't retry the
+ *                             access. This is the "Invalid Request" in PCI
+ *                             10.4.2.1.
+ */
+enum iommufd_page_response_code {
+	IOMMUFD_PAGE_RESP_SUCCESS = 0,
+	IOMMUFD_PAGE_RESP_INVALID = 1,
+};
+
+/**
+ * struct iommu_hwpt_page_response - IOMMU page fault response
+ * @cookie: The kernel-managed cookie reported in the fault message.
+ * @code: One of response code in enum iommufd_page_response_code.
+ */
+struct iommu_hwpt_page_response {
+	__u32 cookie;
+	__u32 code;
+};
+
+/**
+ * struct iommu_fault_alloc - ioctl(IOMMU_FAULT_QUEUE_ALLOC)
+ * @size: sizeof(struct iommu_fault_alloc)
+ * @flags: Must be 0
+ * @out_fault_id: The ID of the new FAULT
+ * @out_fault_fd: The fd of the new FAULT
+ *
+ * Explicitly allocate a fault handling object.
+ */
+struct iommu_fault_alloc {
+	__u32 size;
+	__u32 flags;
+	__u32 out_fault_id;
+	__u32 out_fault_fd;
+};
+#define IOMMU_FAULT_QUEUE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_FAULT_QUEUE_ALLOC)
 #endif
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -XXX,XX +XXX,XX @@ struct kvm_xen_exit {
 /* Flags that describe what fields in emulation_failure hold valid data. */
 #define KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES (1ULL << 0)
 
+/*
+ * struct kvm_run can be modified by userspace at any time, so KVM must be
+ * careful to avoid TOCTOU bugs. In order to protect KVM, HINT_UNSAFE_IN_KVM()
+ * renames fields in struct kvm_run from <symbol> to <symbol>__unsafe when
+ * compiled into the kernel, ensuring that any use within KVM is obvious and
+ * gets extra scrutiny.
+ */
+#define HINT_UNSAFE_IN_KVM(_symbol) _symbol
+
 /* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */
 struct kvm_run {
 	/* in */
 	__u8 request_interrupt_window;
-	__u8 immediate_exit;
+	__u8 HINT_UNSAFE_IN_KVM(immediate_exit);
 	__u8 padding1[6];
 
 	/* out */
@@ -XXX,XX +XXX,XX @@ struct kvm_enable_cap {
 #define KVM_CAP_MEMORY_ATTRIBUTES 233
 #define KVM_CAP_GUEST_MEMFD 234
 #define KVM_CAP_VM_TYPES 235
+#define KVM_CAP_PRE_FAULT_MEMORY 236
+#define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237
+#define KVM_CAP_X86_GUEST_MODE 238
 
 struct kvm_irq_routing_irqchip {
 	__u32 irqchip;
@@ -XXX,XX +XXX,XX @@ struct kvm_create_guest_memfd {
 	__u64 reserved[6];
 };
 
+#define KVM_PRE_FAULT_MEMORY	_IOWR(KVMIO, 0xd5, struct kvm_pre_fault_memory)
+
+struct kvm_pre_fault_memory {
+	__u64 gpa;
+	__u64 size;
+	__u64 flags;
+	__u64 padding[5];
+};
+
 #endif /* __LINUX_KVM_H */
diff --git a/linux-headers/linux/mman.h b/linux-headers/linux/mman.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/linux/mman.h
+++ b/linux-headers/linux/mman.h
@@ -XXX,XX +XXX,XX @@
 #define MAP_SHARED	0x01		/* Share changes */
 #define MAP_PRIVATE	0x02		/* Changes are private */
 #define MAP_SHARED_VALIDATE 0x03	/* share + validate extension flags */
+#define MAP_DROPPABLE	0x08		/* Zero memory under memory pressure. */
 
 /*
  * Huge page size encoding when MAP_HUGETLB is specified, and a huge page
diff --git a/linux-headers/linux/psp-sev.h b/linux-headers/linux/psp-sev.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-headers/linux/psp-sev.h
+++ b/linux-headers/linux/psp-sev.h
@@ -XXX,XX +XXX,XX @@ enum {
 	SNP_PLATFORM_STATUS,
 	SNP_COMMIT,
 	SNP_SET_CONFIG,
+	SNP_VLEK_LOAD,
 
 	SEV_MAX,
 };
@@ -XXX,XX +XXX,XX @@ typedef enum {
 	SEV_RET_INVALID_PLATFORM_STATE,
 	SEV_RET_INVALID_GUEST_STATE,
 	SEV_RET_INAVLID_CONFIG,
+	SEV_RET_INVALID_CONFIG = SEV_RET_INAVLID_CONFIG,
 	SEV_RET_INVALID_LEN,
 	SEV_RET_ALREADY_OWNED,
 	SEV_RET_INVALID_CERTIFICATE,
@@ -XXX,XX +XXX,XX @@ struct sev_user_data_snp_config {
 	__u8 rsvd1[52];
 } __attribute__((packed));
 
+/**
+ * struct sev_data_snp_vlek_load - SNP_VLEK_LOAD structure
+ *
+ * @len: length of the command buffer read by the PSP
+ * @vlek_wrapped_version: version of wrapped VLEK hashstick (Must be 0h)
+ * @rsvd: reserved
+ * @vlek_wrapped_address: address of a wrapped VLEK hashstick
+ *                        (struct sev_user_data_snp_wrapped_vlek_hashstick)
+ */
+struct sev_user_data_snp_vlek_load {
+	__u32 len;				/* In */
+	__u8 vlek_wrapped_version;		/* In */
+	__u8 rsvd[3];				/* In */
+	__u64 vlek_wrapped_address;		/* In */
+} __attribute__((packed));
+
+/**
+ * struct sev_user_data_snp_vlek_wrapped_vlek_hashstick - Wrapped VLEK data
+ *
+ * @data: Opaque data provided by AMD KDS (as described in SEV-SNP Firmware ABI
+ *        1.54, SNP_VLEK_LOAD)
+ */
+struct sev_user_data_snp_wrapped_vlek_hashstick {
+	__u8 data[432];				/* In */
+} __attribute__((packed));
+
 /**
  * struct sev_issue_cmd - SEV ioctl parameters
  *
-- 
2.46.0

Print out error messages when virgl fence creation fails to aid debugging
of the fence-related bugs.

Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
 hw/display/virtio-gpu-virgl.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu-virgl.c
+++ b/hw/display/virtio-gpu-virgl.c
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
                                       struct virtio_gpu_ctrl_command *cmd)
 {
     bool cmd_suspended = false;
+    int ret;
 
     VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr);
 
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
     }
 
     trace_virtio_gpu_fence_ctrl(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type);
-    virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type);
+
+    ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0);
+    if (ret)
+        qemu_log_mask(LOG_GUEST_ERROR,
+                      "%s: virgl_renderer_create_fence error: %s",
+                      __func__, strerror(-ret));
 }
 
 static void virgl_write_fence(void *opaque, uint32_t fence)
-- 
2.46.0

Support asynchronous fencing feature of virglrenderer. It allows Qemu to
handle fence as soon as it's signalled instead of periodically polling
the fence status. This feature is required for enabling DRM context
support in Qemu because legacy fencing mode isn't supported for DRM
contexts in virglrenderer.

Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
 hw/display/virtio-gpu-gl.c     |   3 +
 hw/display/virtio-gpu-virgl.c  | 143 ++++++++++++++++++++++++++++-----
 include/hw/virtio/virtio-gpu.h |  14 ++++
 3 files changed, 141 insertions(+), 19 deletions(-)

diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu-gl.c
+++ b/hw/display/virtio-gpu-gl.c
@@ -XXX,XX +XXX,XX @@ static void virtio_gpu_gl_device_unrealize(DeviceState *qdev)
     if (gl->renderer_state >= RS_INITED) {
 #if VIRGL_VERSION_MAJOR >= 1
         qemu_bh_delete(gl->cmdq_resume_bh);
+
+        virtio_gpu_virgl_reset_async_fences(g);
+        qemu_bh_delete(gl->async_fence_bh);
 #endif
         if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {
             timer_free(gl->print_stats);
diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu-virgl.c
+++ b/hw/display/virtio-gpu-virgl.c
@@ -XXX,XX +XXX,XX @@ static void virgl_cmd_set_scanout_blob(VirtIOGPU *g,
 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
                                       struct virtio_gpu_ctrl_command *cmd)
 {
+    VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);
     bool cmd_suspended = false;
     int ret;
 
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
 
     trace_virtio_gpu_fence_ctrl(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type);
 
-    ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0);
-    if (ret)
-        qemu_log_mask(LOG_GUEST_ERROR,
-                      "%s: virgl_renderer_create_fence error: %s",
-                      __func__, strerror(-ret));
+    if (gl->context_fence_enabled &&
+        (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_INFO_RING_IDX)) {
+        uint32_t flags = 0;
+
+        ret = virgl_renderer_context_create_fence(cmd->cmd_hdr.ctx_id, flags,
+                                                  cmd->cmd_hdr.ring_idx,
+                                                  cmd->cmd_hdr.fence_id);
+        if (ret)
+            qemu_log_mask(LOG_GUEST_ERROR,
+                          "%s: virgl_renderer_context_create_fence error: %s",
+                          __func__, strerror(ret));
+    } else {
+        ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0);
+        if (ret)
+            qemu_log_mask(LOG_GUEST_ERROR,
+                          "%s: virgl_renderer_create_fence error: %s",
+                          __func__, strerror(-ret));
+    }
 }
 
-static void virgl_write_fence(void *opaque, uint32_t fence)
+static void virtio_gpu_virgl_async_fence_bh(void *opaque)
 {
-    VirtIOGPU *g = opaque;
+    struct virtio_gpu_virgl_context_fence *f, *f_tmp;
     struct virtio_gpu_ctrl_command *cmd, *tmp;
+    VirtIOGPU *g = opaque;
+    VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);
 
-    QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) {
-        /*
-         * the guest can end up emitting fences out of order
-         * so we should check all fenced cmds not just the first one.
-         */
-        if (cmd->cmd_hdr.fence_id > fence) {
-            continue;
+    qemu_mutex_lock(&gl->async_fence_lock);
+
+    QTAILQ_FOREACH_SAFE(f, &gl->async_fenceq, next, f_tmp) {
+        QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) {
+            /*
+             * the guest can end up emitting fences out of order
+             * so we should check all fenced cmds not just the first one.
+             */
+            if (cmd->cmd_hdr.fence_id > f->fence_id) {
+                continue;
+            }
+            if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_INFO_RING_IDX) {
+                if (cmd->cmd_hdr.ring_idx != f->ring_idx) {
+                    continue;
+                }
+                if (cmd->cmd_hdr.ctx_id != f->ctx_id) {
+                    continue;
+                }
+            } else if (f->ring_idx >= 0) {
+                /* ctx0 GL-query fences don't have ring info */
+                continue;
+            }
+            virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA);
+            QTAILQ_REMOVE(&g->fenceq, cmd, next);
+            g_free(cmd);
         }
-        trace_virtio_gpu_fence_resp(cmd->cmd_hdr.fence_id);
-        virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA);
-        QTAILQ_REMOVE(&g->fenceq, cmd, next);
-        g_free(cmd);
+
+        trace_virtio_gpu_fence_resp(f->fence_id);
+        QTAILQ_REMOVE(&gl->async_fenceq, f, next);
+        g_free(f);
         g->inflight--;
         if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {
-            trace_virtio_gpu_dec_inflight_fences(g->inflight);
+            fprintf(stderr, "inflight: %3d (-)\r", g->inflight);
         }
     }
+
+    qemu_mutex_unlock(&gl->async_fence_lock);
+}
+
+void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g)
+{
+    struct virtio_gpu_virgl_context_fence *f, *f_tmp;
+    VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);
+
+    QTAILQ_FOREACH_SAFE(f, &gl->async_fenceq, next, f_tmp) {
+        QTAILQ_REMOVE(&gl->async_fenceq, f, next);
+        g_free(f);
+    }
+}
+
+static void
+virtio_gpu_virgl_push_async_fence(VirtIOGPU *g, uint32_t ctx_id,
+                                  int64_t ring_idx, uint64_t fence_id)
+{
+    struct virtio_gpu_virgl_context_fence *f;
+    VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);
+
+    f = g_new(struct virtio_gpu_virgl_context_fence, 1);
+    f->ctx_id = ctx_id;
+    f->ring_idx = ring_idx;
+    f->fence_id = fence_id;
+
+    qemu_mutex_lock(&gl->async_fence_lock);
+    QTAILQ_INSERT_TAIL(&gl->async_fenceq, f, next);
+    qemu_mutex_unlock(&gl->async_fence_lock);
+
+    qemu_bh_schedule(gl->async_fence_bh);
+}
+
+static void virgl_write_fence(void *opaque, uint32_t fence)
+{
+    VirtIOGPU *g = opaque;
+
+    virtio_gpu_virgl_push_async_fence(g, 0, -1, fence);
+}
+
+static void virgl_write_context_fence(void *opaque, uint32_t ctx_id,
+                                      uint32_t ring_idx, uint64_t fence)
+{
+    VirtIOGPU *g = opaque;
+
+    virtio_gpu_virgl_push_async_fence(g, ctx_id, ring_idx, fence);
 }
 
 static virgl_renderer_gl_context
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g)
         dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL);
         dpy_gl_scanout_disable(g->parent_obj.scanout[i].con);
     }
+
+    virtio_gpu_virgl_reset_async_fences(g);
 }
 
 void virtio_gpu_virgl_reset(VirtIOGPU *g)
@@ -XXX,XX +XXX,XX @@ int virtio_gpu_virgl_init(VirtIOGPU *g)
     if (qemu_egl_display) {
         virtio_gpu_3d_cbs.version = 4;
         virtio_gpu_3d_cbs.get_egl_display = virgl_get_egl_display;
+#if VIRGL_VERSION_MAJOR >= 1
+        virtio_gpu_3d_cbs.write_context_fence = virgl_write_context_fence;
+        flags |= VIRGL_RENDERER_ASYNC_FENCE_CB;
+        flags |= VIRGL_RENDERER_THREAD_SYNC;
+        gl->context_fence_enabled = true;
+#endif
     }
 #endif
 #ifdef VIRGL_RENDERER_D3D11_SHARE_TEXTURE
@@ -XXX,XX +XXX,XX @@ int virtio_gpu_virgl_init(VirtIOGPU *g)
     gl->cmdq_resume_bh = aio_bh_new(qemu_get_aio_context(),
                                     virtio_gpu_virgl_resume_cmdq_bh,
                                     g);
+
+    gl->async_fence_bh = aio_bh_new(qemu_get_aio_context(),
+                                    virtio_gpu_virgl_async_fence_bh,
+                                    g);
+
+    qemu_mutex_init(&gl->async_fence_lock);
+    QTAILQ_INIT(&gl->async_fenceq);
 #endif
 
     return 0;
@@ -XXX,XX +XXX,XX @@ GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g)
         }
     }
 
+    if (virtio_gpu_drm_enabled(g->parent_obj.conf)) {
+        virgl_renderer_get_cap_set(VIRTIO_GPU_CAPSET_DRM,
+                                   &capset_max_ver,
+                                   &capset_max_size);
+        if (capset_max_size) {
+            virtio_gpu_virgl_add_capset(capset_ids, VIRTIO_GPU_CAPSET_DRM);
+        }
+    }
+
     return capset_ids;
 }
diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/virtio/virtio-gpu.h
+++ b/include/hw/virtio/virtio-gpu.h
@@ -XXX,XX +XXX,XX @@ struct VirtIOGPUClass {
                              Error **errp);
 };
 
+struct virtio_gpu_virgl_context_fence {
+    uint32_t ctx_id;
+    int64_t ring_idx;
+    uint64_t fence_id;
+    QTAILQ_ENTRY(virtio_gpu_virgl_context_fence) next;
+};
+
 /* VirtIOGPUGL renderer states */
 typedef enum {
     RS_START,       /* starting state */
@@ -XXX,XX +XXX,XX @@ struct VirtIOGPUGL {
     QEMUTimer *print_stats;
 
     QEMUBH *cmdq_resume_bh;
+
+    QEMUBH *async_fence_bh;
+    QemuMutex async_fence_lock;
+    QTAILQ_HEAD(, virtio_gpu_virgl_context_fence) async_fenceq;
+
+    bool context_fence_enabled;
 };
 
 struct VhostUserGPU {
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g);
 void virtio_gpu_virgl_reset(VirtIOGPU *g);
 int virtio_gpu_virgl_init(VirtIOGPU *g);
 GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g);
+void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g);
 
 #endif
-- 
2.46.0

Add support for DRM native contexts to VirtIO-GPU. DRM context is enabled
using a new virtio-gpu-gl device option "drm=true".

Unlike Virgl and Venus contexts that operate on application API level,
DRM native contexts work on a kernel UAPI level. This lower level results
in a lightweight context implementations that yield better performance.

Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
 docs/system/devices/virtio-gpu.rst | 11 +++++++++++
 hw/display/virtio-gpu-gl.c         |  2 ++
 hw/display/virtio-gpu-virgl.c      | 12 ++++++++++++
 hw/display/virtio-gpu.c            | 15 +++++++++++++++
 include/hw/virtio/virtio-gpu.h     |  3 +++
 5 files changed, 43 insertions(+)

diff --git a/docs/system/devices/virtio-gpu.rst b/docs/system/devices/virtio-gpu.rst
index XXXXXXX..XXXXXXX 100644
--- a/docs/system/devices/virtio-gpu.rst
+++ b/docs/system/devices/virtio-gpu.rst
@@ -XXX,XX +XXX,XX @@ of virtio-gpu host memory window. This is typically between 256M and 8G.
 
 .. _venus: https://gitlab.freedesktop.org/virgl/venus-protocol/
 
+DRM native context is supported since release of `virglrenderer`_ v1.0.0
+using `drm`_ protocol. ``DRM`` virtio-gpu capability set ("capset") requires
+host blob support (``hostmem`` and ``blob`` fields) and should be enabled
+using ``drm`` field. The ``hostmem`` field specifies the size of virtio-gpu
+host memory window. This is typically between 256M and 8G.
+
+.. parsed-literal::
+    -device virtio-gpu-gl,hostmem=8G,blob=true,drm=true
+
+.. _drm: https://gitlab.freedesktop.org/virgl/virglrenderer/-/tree/main/src/drm
+
 virtio-gpu rutabaga
 -------------------
 
diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu-gl.c
+++ b/hw/display/virtio-gpu-gl.c
@@ -XXX,XX +XXX,XX @@ static Property virtio_gpu_gl_properties[] = {
                     VIRTIO_GPU_FLAG_STATS_ENABLED, false),
     DEFINE_PROP_BIT("venus", VirtIOGPU, parent_obj.conf.flags,
                     VIRTIO_GPU_FLAG_VENUS_ENABLED, false),
+    DEFINE_PROP_BIT("drm", VirtIOGPU, parent_obj.conf.flags,
+                    VIRTIO_GPU_FLAG_DRM_ENABLED, false),
     DEFINE_PROP_END_OF_LIST(),
 };
 
diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu-virgl.c
+++ b/hw/display/virtio-gpu-virgl.c
@@ -XXX,XX +XXX,XX @@ int virtio_gpu_virgl_init(VirtIOGPU *g)
     if (virtio_gpu_venus_enabled(g->parent_obj.conf)) {
         flags |= VIRGL_RENDERER_VENUS | VIRGL_RENDERER_RENDER_SERVER;
     }
+    if (virtio_gpu_drm_enabled(g->parent_obj.conf)) {
+        flags |= VIRGL_RENDERER_DRM;
+
+        if (!gl->context_fence_enabled) {
+            /*
+             * Virglrenderer skips enabling DRM context support without
+             * enabled async-fence feature. VirtIO-GPU will initialize
+             * successfully, but DRM context won't be available in guest.
+             */
+            warn_report("DRM native context requires EGL display");
+        }
+    }
 #endif
 
     ret = virgl_renderer_init(g, flags, &virtio_gpu_3d_cbs);
diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu.c
+++ b/hw/display/virtio-gpu.c
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
 #endif
     }
 
+    if (virtio_gpu_drm_enabled(g->parent_obj.conf)) {
+#ifdef VIRGL_VERSION_MAJOR
+    #if VIRGL_VERSION_MAJOR >= 1
+        if (!virtio_gpu_blob_enabled(g->parent_obj.conf) ||
+            !virtio_gpu_hostmem_enabled(g->parent_obj.conf)) {
+            error_setg(errp, "drm requires enabled blob and hostmem options");
+            return;
+        }
+    #else
+        error_setg(errp, "old virglrenderer, drm unsupported");
+        return;
+    #endif
+#endif
+    }
+
     if (!virtio_gpu_base_device_realize(qdev,
                                         virtio_gpu_handle_ctrl_cb,
                                         virtio_gpu_handle_cursor_cb,
diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/virtio/virtio-gpu.h
+++ b/include/hw/virtio/virtio-gpu.h
@@ -XXX,XX +XXX,XX @@ enum virtio_gpu_base_conf_flags {
     VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED,
     VIRTIO_GPU_FLAG_RUTABAGA_ENABLED,
     VIRTIO_GPU_FLAG_VENUS_ENABLED,
+    VIRTIO_GPU_FLAG_DRM_ENABLED,
 };
 
 #define virtio_gpu_virgl_enabled(_cfg) \
@@ -XXX,XX +XXX,XX @@ enum virtio_gpu_base_conf_flags {
     (_cfg.hostmem > 0)
 #define virtio_gpu_venus_enabled(_cfg) \
     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VENUS_ENABLED))
+#define virtio_gpu_drm_enabled(_cfg) \
+    (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DRM_ENABLED))
 
 struct virtio_gpu_base_conf {
     uint32_t max_outputs;
-- 
2.46.0

This patchset adds DRM native context support to VirtIO-GPU on Qemu.

Contarary to Virgl and Venus contexts that mediates high level GFX APIs,
DRM native context [1] mediates lower level kernel driver UAPI, which
reflects in a less CPU overhead and less/simpler code needed to support it.
DRM context consists of a host and guest parts that have to be implemented
for each GPU driver. On a guest side, DRM context presents a virtual GPU as
a real/native host GPU device for GL/VK applications.

[1] https://www.youtube.com/watch?v=9sFP_yddLLQ

Today there are four DRM native context drivers existing in a wild:

- Freedreno (Qualcomm SoC GPUs), completely upstreamed
  - AMDGPU, completely upstreamed
  - Intel (i915), merge requests are opened
  - Asahi (Apple SoC GPUs), partially merged upstream

# How to try out DRM context:

1. DRM context uses host blobs and on host requires latest 6.13 version
of Linux kernel that contains necessary KVM fixes.

2. Use latest Mesa (both guest and host) and libvirglrenderer versions.
 Use build flags documented in tha patch #10 of this series.

3. On guest, use latest Linux kernel v6.14-rc or newer.

Example Qemu cmdline that enables DRM context:

qemu-system-x86_64 -device virtio-vga-gl,hostmem=4G,blob=on,drm_native_context=on \
      -machine q35,accel=kvm,memory-backend=mem1 \
      -object memory-backend-memfd,id=mem1,size=8G -m 8G

# Note about known performance problem in Qemu:

DRM contexts are mapping host blobs extensively and these mapping
operations work slowly in Qemu. We will need to optimize hostmem
unmapping that currently happens in a deffered RCU work, blocking
GPU for a substantial time [2].

[2] https://lore.kernel.org/qemu-devel/f58d250d-3831-4ff1-a018-f62f9aeb2527@collabora.com/T/#m17ac72336d28a64c793d4e4e0c87fc7dff9aa847

Changelog:

v11:- Added column for libvirglrenderer host requrements versions and 
      corrected Asahi kernel link. Suggested by Akihiko Odaki.

v10:- Added links to Asahi and i915 virglrenderer MRs, link to Asahi host
      kernel. Suggested by Akihiko Odaki.

- Renamed gfxstream guest requrements table's colum to match the host
      requirements table. Suggested by Akihiko Odaki.

v9: - Updated doc patch by addresing review comments from Akihiko Odaki.
      Made kernel requirements section specific to guest kernel and
      removed reference to host requirements. Removed examples of
      external projects' build flags.

- Added guest kernel minimum versions to the guest requirements table.

v8: - Addressed review comments from Akihiko Odaki on the doc patch.

- Added r-bs from Akihiko Odaki on the doc patches.

- Extended vrend doc with info about hostmem requirement for GL 4.6

v7: - Added r-b from Alex Bennée to the async fencing patch.

- Updated virtio-gpu doc patch with addressed review comments
      from Akihiko Odaki.

v6: - Fixed compilation warning using older version of virglrenderer,
      which wasn't fixed properly in v5.

- Added t-bs from Alex Bennée.

- Added patches to improve virgl/venus doc by adding links
      to the Mesa doc as was suggested by Akihiko Odaki.

- Updated patch that documents guest/host requirements. Added
      links to Asahi nctx and reworked the doc structure by adding
      requirements to each context-type section instead of having
      one big blob or requirements, which was objected by Akihiko Odaki.

v5: - Added r-bs from Akihiko Odaki.

- Added acks from Michael Tsirkin.

- Fixed compilation warning using older version of virglrenderer that
      was reported by Alex Bennée. Noticed that I need to keep old
      virgl_write_fence() code around for the older virglrenderer in
      "Support  asynchronous fencing" patch, so added it back and verified
      that old virglrenderer works properly.

- Added new patch from Alex Bennée that adds more virtio-gpu 
      documentation with a couple corrections and additions to it from me.

- Rebased patches on top of latest staging tree.

v4: - Improved SDL2/dmabuf patch by reusing existing Meson X11 config 
      option, better handling EGL error and extending comment telling
      that it's safe to enable SDL2 EGL preference hint. As was suggested
      by Akihiko Odaki.

- Replaced another QSLIST_FOREACH_SAFE with QSLIST_EMPTY+FIRST in
      the async-fencing patch for more consistency of the code. As was
      suggested by Akihiko Odaki.

- Added missing braces around if-statement that was spotted by
      Alex Bennée.

- Renamed 'drm=on' option of virtio-gpu-gl device to 
      'drm_native_context=on' for more clarity as was suggested by 
      Alex Bennée. Haven't added added new context-type option that 
      was also proposed by Alex, might do it with a separate patch.
      This context-type option will duplicate and depecate existing
      options, but in a longer run likely will be worthwhile adding
      it.

- Dropped Linux headers-update patch as headers has been updated
      in the staging tree.

v3: - Improved EGL presence-check code on X11 systems for the SDL2
      hint that prefers EGL over GLX by using better ifdefs and checking
      Xlib presence at a build time to avoid build failure if lib SDL2
      and system are configured with a disabled X11 support. Also added
      clarifying comment telling that X11 hint doesn't affect Wayland
      systems. Suggested by Akihiko Odaki.

- Corrected strerror(err) that used negative error where it should
      be positive and vice versa that was caught by Akihiko Odaki. Added
      clarifying comment for the case where we get positive error code
      from virglrenderer that differs from other virglrenderer API functions.

- Improved QSLIST usage by dropping mutex protecting the async fence
      list and using atomic variant of QSLIST helpers instead. Switched away
      from using FOREACH helper to improve readability of the code, showing
      that we don't precess list in unoptimal way. Like was suggested by
      Akihiko Odaki.

- Updated patchset base to Venus v18.

v2: - Updated SDL2-dmabuf patch by making use of error_report() and
      checking presense of X11+EGL in the system before making SDL2
      to prefer EGL backend over GLX, suggested by Akihiko Odaki.

- Improved SDL2's dmabuf-presence check that wasn't done properly
      in v1, where EGL was set up only after first console was fully
      inited, and thus, SDL's display .has_dmabuf callback didn't work
      for the first console. Now dmabuf support status is pre-checked
      before console is registered.

- Updated commit description of the patch that fixes SDL2's context
      switching logic with a more detailed explanation of the problem.
      Suggested by Akihiko Odaki.

- Corrected rebase typo in the async-fencing patch and switched
      async-fencing to use a sigle-linked list instead of the double,
      as was suggested by Akihiko Odaki.

- Replaced "=true" with "=on" in the DRM native context documentation
      example and made virtio_gpu_virgl_init() to fail with a error message
      if DRM context can't be initialized instead of giving a warning
      message, as was suggested by Akihiko Odaki.

- Added patchew's dependecy tag to the cover letter as was suggested by
      Akihiko Odaki.

Alex Bennée (1):
  docs/system: virtio-gpu: Document host/guest requirements

Dmitry Osipenko (8):
  ui/sdl2: Restore original context after new context creation
  virtio-gpu: Handle virgl fence creation errors
  virtio-gpu: Support asynchronous fencing
  virtio-gpu: Support DRM native context
  ui/sdl2: Don't disable scanout when display is refreshed
  ui/gtk: Don't disable scanout when display is refreshed
  docs/system: virtio-gpu: Add link to Mesa VirGL doc
  docs/system: virtio-gpu: Update Venus link

Pierre-Eric Pelloux-Prayer (1):
  ui/sdl2: Implement dpy dmabuf functions

-- 
2.48.1

SDL API changes GL context to a newly created GL context, which differs
from other GL providers that don't switch context. Change SDL backend to
restore the original GL context. This allows Qemu's virtio-gpu to support
new virglrenderer async-fencing feature for Virgl contexts, otherwise
virglrenderer's vrend creates a fence-sync context on the Qemu's
main-loop thread that erroneously stays in-use by the main-loop after
creation, not allowing vrend's fence-sync thread switch to this new
context that belongs to it.

diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c
index XXXXXXX..XXXXXXX 100644
--- a/ui/sdl2-gl.c
+++ b/ui/sdl2-gl.c
@@ -XXX,XX +XXX,XX @@ QEMUGLContext sdl2_gl_create_context(DisplayGLCtx *dgc,
                             SDL_GL_CONTEXT_PROFILE_ES);
         ctx = SDL_GL_CreateContext(scon->real_window);
     }
+
+    SDL_GL_MakeCurrent(scon->real_window, scon->winctx);
+
     return (QEMUGLContext)ctx;
 }
 
-- 
2.48.1

From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

If EGL is used, we can rely on dmabuf to import textures without
doing copies.

To get this working on X11, we use the existing SDL hint:
SDL_HINT_VIDEO_X11_FORCE_EGL (because dmabuf can't be used with GLX).

Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
 include/ui/sdl2.h |  7 ++++++
 meson.build       |  6 ++---
 ui/sdl2-gl.c      | 64 +++++++++++++++++++++++++++++++++++++++++++++++
 ui/sdl2.c         | 42 +++++++++++++++++++++++++++++++
 4 files changed, 115 insertions(+), 4 deletions(-)

diff --git a/include/ui/sdl2.h b/include/ui/sdl2.h
index XXXXXXX..XXXXXXX 100644
--- a/include/ui/sdl2.h
+++ b/include/ui/sdl2.h
@@ -XXX,XX +XXX,XX @@ struct sdl2_console {
     bool gui_keysym;
     SDL_GLContext winctx;
     QKbdState *kbd;
+    bool has_dmabuf;
 #ifdef CONFIG_OPENGL
     QemuGLShader *gls;
     egl_fb guest_fb;
@@ -XXX,XX +XXX,XX @@ void sdl2_gl_scanout_texture(DisplayChangeListener *dcl,
                              void *d3d_tex2d);
 void sdl2_gl_scanout_flush(DisplayChangeListener *dcl,
                            uint32_t x, uint32_t y, uint32_t w, uint32_t h);
+void sdl2_gl_scanout_dmabuf(DisplayChangeListener *dcl,
+                            QemuDmaBuf *dmabuf);
+void sdl2_gl_release_dmabuf(DisplayChangeListener *dcl,
+                            QemuDmaBuf *dmabuf);
+bool sdl2_gl_has_dmabuf(DisplayChangeListener *dcl);
+void sdl2_gl_console_init(struct sdl2_console *scon);
 
 #endif /* SDL2_H */
diff --git a/meson.build b/meson.build
index XXXXXXX..XXXXXXX 100644
--- a/meson.build
+++ b/meson.build
@@ -XXX,XX +XXX,XX @@ if get_option('gtk') \
   endif
 endif
 
-x11 = not_found
-if gtkx11.found()
-  x11 = dependency('x11', method: 'pkg-config', required: gtkx11.found())
-endif
+x11 = dependency('x11', method: 'pkg-config', required: gtkx11.found())
+
 png = not_found
 if get_option('png').allowed() and have_system
    png = dependency('libpng', version: '>=1.6.34', required: get_option('png'),
diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c
index XXXXXXX..XXXXXXX 100644
--- a/ui/sdl2-gl.c
+++ b/ui/sdl2-gl.c
@@ -XXX,XX +XXX,XX @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/main-loop.h"
+#include "qemu/error-report.h"
 #include "ui/console.h"
 #include "ui/input.h"
 #include "ui/sdl2.h"
@@ -XXX,XX +XXX,XX @@ void sdl2_gl_scanout_flush(DisplayChangeListener *dcl,
 
     SDL_GL_SwapWindow(scon->real_window);
 }
+
+void sdl2_gl_scanout_dmabuf(DisplayChangeListener *dcl,
+                            QemuDmaBuf *dmabuf)
+{
+    struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl);
+
+    assert(scon->opengl);
+    SDL_GL_MakeCurrent(scon->real_window, scon->winctx);
+
+    egl_dmabuf_import_texture(dmabuf);
+    if (!qemu_dmabuf_get_texture(dmabuf)) {
+        error_report("%s: failed fd=%d", __func__, qemu_dmabuf_get_fd(dmabuf));
+        return;
+    }
+
+    sdl2_gl_scanout_texture(dcl, qemu_dmabuf_get_texture(dmabuf), false,
+                            qemu_dmabuf_get_width(dmabuf),
+                            qemu_dmabuf_get_height(dmabuf),
+                            0, 0,
+                            qemu_dmabuf_get_width(dmabuf),
+                            qemu_dmabuf_get_height(dmabuf),
+                            NULL);
+
+    if (qemu_dmabuf_get_allow_fences(dmabuf)) {
+        scon->guest_fb.dmabuf = dmabuf;
+    }
+}
+
+void sdl2_gl_release_dmabuf(DisplayChangeListener *dcl,
+                            QemuDmaBuf *dmabuf)
+{
+    egl_dmabuf_release_texture(dmabuf);
+}
+
+bool sdl2_gl_has_dmabuf(DisplayChangeListener *dcl)
+{
+    struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl);
+
+    return scon->has_dmabuf;
+}
+
+void sdl2_gl_console_init(struct sdl2_console *scon)
+{
+    bool hidden = scon->hidden;
+
+    scon->hidden = true;
+    scon->surface = qemu_create_displaysurface(1, 1);
+    sdl2_window_create(scon);
+
+    /*
+     * QEMU checks whether console supports dma-buf before switching
+     * to the console.  To break this chicken-egg problem we pre-check
+     * dma-buf availability beforehand using a dummy SDL window.
+     */
+    scon->has_dmabuf = qemu_egl_has_dmabuf();
+
+    sdl2_window_destroy(scon);
+    qemu_free_displaysurface(scon->surface);
+
+    scon->surface = NULL;
+    scon->hidden = hidden;
+}
diff --git a/ui/sdl2.c b/ui/sdl2.c
index XXXXXXX..XXXXXXX 100644
--- a/ui/sdl2.c
+++ b/ui/sdl2.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/log.h"
 #include "qemu-main.h"
 
+#ifdef CONFIG_X11
+#include <X11/Xlib.h>
+#endif
+
 static int sdl2_num_outputs;
 static struct sdl2_console *sdl2_console;
 
@@ -XXX,XX +XXX,XX @@ void sdl2_window_create(struct sdl2_console *scon)
         /* The SDL renderer is only used by sdl2-2D, when OpenGL is disabled */
         scon->real_renderer = SDL_CreateRenderer(scon->real_window, -1, 0);
     }
+
+    qemu_egl_display = eglGetCurrentDisplay();
+
     sdl_update_caption(scon);
 }
 
@@ -XXX,XX +XXX,XX @@ static const DisplayChangeListenerOps dcl_gl_ops = {
     .dpy_gl_scanout_disable  = sdl2_gl_scanout_disable,
     .dpy_gl_scanout_texture  = sdl2_gl_scanout_texture,
     .dpy_gl_update           = sdl2_gl_scanout_flush,
+
+    .dpy_gl_scanout_dmabuf   = sdl2_gl_scanout_dmabuf,
+    .dpy_gl_release_dmabuf   = sdl2_gl_release_dmabuf,
+    .dpy_has_dmabuf          = sdl2_gl_has_dmabuf,
 };
 
 static bool
@@ -XXX,XX +XXX,XX @@ static void sdl2_display_early_init(DisplayOptions *o)
     }
 }
 
+static void sdl2_set_hint_x11_force_egl(void)
+{
+#if defined(SDL_HINT_VIDEO_X11_FORCE_EGL) && defined(CONFIG_OPENGL) && \
+    defined(CONFIG_X11)
+    Display *x_disp = XOpenDisplay(NULL);
+    EGLDisplay egl_display;
+
+    if (!x_disp) {
+        return;
+    }
+
+    /* Prefer EGL over GLX to get dma-buf support. */
+    egl_display = eglGetDisplay((EGLNativeDisplayType)x_disp);
+
+    if (egl_display != EGL_NO_DISPLAY) {
+        /*
+         * Setting X11_FORCE_EGL hint doesn't make SDL to prefer X11 over
+         * Wayland. SDL will use Wayland driver even if XWayland presents.
+         * It's always safe to set the hint even if X11 is not used by SDL.
+         * SDL will work regardless of the hint.
+         */
+        SDL_SetHint(SDL_HINT_VIDEO_X11_FORCE_EGL, "1");
+        eglTerminate(egl_display);
+    }
+
+    XCloseDisplay(x_disp);
+#endif
+}
+
 static void sdl2_display_init(DisplayState *ds, DisplayOptions *o)
 {
     uint8_t data = 0;
@@ -XXX,XX +XXX,XX @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o)
     SDL_SetHint(SDL_HINT_ALLOW_ALT_TAB_WHILE_GRABBED, "0");
 #endif
     SDL_SetHint(SDL_HINT_WINDOWS_NO_CLOSE_ON_ALT_F4, "1");
+    sdl2_set_hint_x11_force_egl();
     SDL_EnableScreenSaver();
     memset(&info, 0, sizeof(info));
     SDL_VERSION(&info.version);
@@ -XXX,XX +XXX,XX @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o)
         sdl2_console[i].kbd = qkbd_state_init(con);
         if (display_opengl) {
             qemu_console_set_display_gl_ctx(con, &sdl2_console[i].dgc);
+            sdl2_gl_console_init(&sdl2_console[i]);
         }
         register_displaychangelistener(&sdl2_console[i].dcl);
 
-- 
2.48.1

Print out error messages when virgl fence creation fails to aid debugging
of the fence-related bugs.

diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu-virgl.c
+++ b/hw/display/virtio-gpu-virgl.c
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
                                       struct virtio_gpu_ctrl_command *cmd)
 {
     bool cmd_suspended = false;
+    int ret;
 
     VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr);
 
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
     }
 
     trace_virtio_gpu_fence_ctrl(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type);
-    virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type);
+
+    /*
+     * Unlike other virglrenderer functions, this one returns a positive
+     * error code.
+     */
+    ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0);
+    if (ret) {
+        qemu_log_mask(LOG_GUEST_ERROR,
+                      "%s: virgl_renderer_create_fence error: %s",
+                      __func__, strerror(ret));
+    }
 }
 
 static void virgl_write_fence(void *opaque, uint32_t fence)
-- 
2.48.1

Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
 hw/display/virtio-gpu-gl.c     |   3 +
 hw/display/virtio-gpu-virgl.c  | 147 +++++++++++++++++++++++++++++++--
 include/hw/virtio/virtio-gpu.h |  13 +++
 3 files changed, 154 insertions(+), 9 deletions(-)

diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu-gl.c
+++ b/hw/display/virtio-gpu-gl.c
@@ -XXX,XX +XXX,XX @@ static void virtio_gpu_gl_device_unrealize(DeviceState *qdev)
     if (gl->renderer_state >= RS_INITED) {
 #if VIRGL_VERSION_MAJOR >= 1
         qemu_bh_delete(gl->cmdq_resume_bh);
+
+        virtio_gpu_virgl_reset_async_fences(g);
+        qemu_bh_delete(gl->async_fence_bh);
 #endif
         if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {
             timer_free(gl->print_stats);
diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu-virgl.c
+++ b/hw/display/virtio-gpu-virgl.c
@@ -XXX,XX +XXX,XX @@ static void virgl_cmd_set_scanout_blob(VirtIOGPU *g,
 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
                                       struct virtio_gpu_ctrl_command *cmd)
 {
+    VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);
     bool cmd_suspended = false;
     int ret;
 
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
 
     trace_virtio_gpu_fence_ctrl(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type);
 
-    /*
-     * Unlike other virglrenderer functions, this one returns a positive
-     * error code.
-     */
-    ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0);
-    if (ret) {
-        qemu_log_mask(LOG_GUEST_ERROR,
-                      "%s: virgl_renderer_create_fence error: %s",
-                      __func__, strerror(ret));
+    if (gl->context_fence_enabled &&
+        (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_INFO_RING_IDX)) {
+#if VIRGL_VERSION_MAJOR >= 1
+        uint32_t flags = 0;
+
+        ret = virgl_renderer_context_create_fence(cmd->cmd_hdr.ctx_id, flags,
+                                                  cmd->cmd_hdr.ring_idx,
+                                                  cmd->cmd_hdr.fence_id);
+        if (ret) {
+            qemu_log_mask(LOG_GUEST_ERROR,
+                          "%s: virgl_renderer_context_create_fence error: %s",
+                          __func__, strerror(-ret));
+        }
+#else
+        /* gl->context_fence_enabled cannot be set with older virglrenderer */
+        g_assert_not_reached();
+#endif
+    } else {
+        /*
+         * Unlike other virglrenderer functions, this one returns a positive
+         * error code.
+         */
+        ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0);
+        if (ret) {
+            qemu_log_mask(LOG_GUEST_ERROR,
+                          "%s: virgl_renderer_create_fence error: %s",
+                          __func__, strerror(ret));
+        }
     }
 }
 
@@ -XXX,XX +XXX,XX @@ static void virgl_write_fence(void *opaque, uint32_t fence)
     }
 }
 
+void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g)
+{
+    struct virtio_gpu_virgl_context_fence *f;
+    VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);
+
+    while (!QSLIST_EMPTY(&gl->async_fenceq)) {
+        f = QSLIST_FIRST(&gl->async_fenceq);
+
+        QSLIST_REMOVE_HEAD(&gl->async_fenceq, next);
+
+        g_free(f);
+    }
+}
+
+#if VIRGL_VERSION_MAJOR >= 1
+static void virtio_gpu_virgl_async_fence_bh(void *opaque)
+{
+    QSLIST_HEAD(, virtio_gpu_virgl_context_fence) async_fenceq;
+    struct virtio_gpu_ctrl_command *cmd, *tmp;
+    struct virtio_gpu_virgl_context_fence *f;
+    VirtIOGPU *g = opaque;
+    VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);
+
+    QSLIST_MOVE_ATOMIC(&async_fenceq, &gl->async_fenceq);
+
+    while (!QSLIST_EMPTY(&async_fenceq)) {
+        f = QSLIST_FIRST(&async_fenceq);
+
+        QSLIST_REMOVE_HEAD(&async_fenceq, next);
+
+        QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) {
+            /*
+             * the guest can end up emitting fences out of order
+             * so we should check all fenced cmds not just the first one.
+             */
+            if (cmd->cmd_hdr.fence_id > f->fence_id) {
+                continue;
+            }
+            if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_INFO_RING_IDX) {
+                if (cmd->cmd_hdr.ring_idx != f->ring_idx) {
+                    continue;
+                }
+                if (cmd->cmd_hdr.ctx_id != f->ctx_id) {
+                    continue;
+                }
+            } else if (f->ring_idx >= 0) {
+                /* ctx0 GL-query fences don't have ring info */
+                continue;
+            }
+            virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA);
+            QTAILQ_REMOVE(&g->fenceq, cmd, next);
+            g_free(cmd);
+        }
+
+        trace_virtio_gpu_fence_resp(f->fence_id);
+        g_free(f);
+        g->inflight--;
+        if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {
+            trace_virtio_gpu_dec_inflight_fences(g->inflight);
+        }
+    }
+}
+
+static void
+virtio_gpu_virgl_push_async_fence(VirtIOGPU *g, uint32_t ctx_id,
+                                  int64_t ring_idx, uint64_t fence_id)
+{
+    struct virtio_gpu_virgl_context_fence *f;
+    VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);
+
+    f = g_new(struct virtio_gpu_virgl_context_fence, 1);
+    f->ctx_id = ctx_id;
+    f->ring_idx = ring_idx;
+    f->fence_id = fence_id;
+
+    QSLIST_INSERT_HEAD_ATOMIC(&gl->async_fenceq, f, next);
+
+    qemu_bh_schedule(gl->async_fence_bh);
+}
+
+static void virgl_write_async_fence(void *opaque, uint32_t fence)
+{
+    VirtIOGPU *g = opaque;
+
+    virtio_gpu_virgl_push_async_fence(g, 0, -1, fence);
+}
+
+static void virgl_write_async_context_fence(void *opaque, uint32_t ctx_id,
+                                            uint32_t ring_idx, uint64_t fence)
+{
+    VirtIOGPU *g = opaque;
+
+    virtio_gpu_virgl_push_async_fence(g, ctx_id, ring_idx, fence);
+}
+#endif
+
 static virgl_renderer_gl_context
 virgl_create_context(void *opaque, int scanout_idx,
                      struct virgl_renderer_gl_ctx_param *params)
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g)
         dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL);
         dpy_gl_scanout_disable(g->parent_obj.scanout[i].con);
     }
+
+    virtio_gpu_virgl_reset_async_fences(g);
 }
 
 void virtio_gpu_virgl_reset(VirtIOGPU *g)
@@ -XXX,XX +XXX,XX @@ int virtio_gpu_virgl_init(VirtIOGPU *g)
     if (qemu_egl_display) {
         virtio_gpu_3d_cbs.version = 4;
         virtio_gpu_3d_cbs.get_egl_display = virgl_get_egl_display;
+#if VIRGL_VERSION_MAJOR >= 1
+        virtio_gpu_3d_cbs.write_fence         = virgl_write_async_fence;
+        virtio_gpu_3d_cbs.write_context_fence = virgl_write_async_context_fence;
+        flags |= VIRGL_RENDERER_ASYNC_FENCE_CB;
+        flags |= VIRGL_RENDERER_THREAD_SYNC;
+        gl->context_fence_enabled = true;
+#endif
     }
 #endif
 #ifdef VIRGL_RENDERER_D3D11_SHARE_TEXTURE
@@ -XXX,XX +XXX,XX @@ int virtio_gpu_virgl_init(VirtIOGPU *g)
     gl->cmdq_resume_bh = aio_bh_new(qemu_get_aio_context(),
                                     virtio_gpu_virgl_resume_cmdq_bh,
                                     g);
+
+    gl->async_fence_bh = aio_bh_new(qemu_get_aio_context(),
+                                    virtio_gpu_virgl_async_fence_bh,
+                                    g);
 #endif
 
     return 0;
diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/virtio/virtio-gpu.h
+++ b/include/hw/virtio/virtio-gpu.h
@@ -XXX,XX +XXX,XX @@ struct VirtIOGPUClass {
                              Error **errp);
 };
 
+struct virtio_gpu_virgl_context_fence {
+    uint32_t ctx_id;
+    int64_t ring_idx;
+    uint64_t fence_id;
+    QSLIST_ENTRY(virtio_gpu_virgl_context_fence) next;
+};
+
 /* VirtIOGPUGL renderer states */
 typedef enum {
     RS_START,       /* starting state */
@@ -XXX,XX +XXX,XX @@ struct VirtIOGPUGL {
     QEMUTimer *print_stats;
 
     QEMUBH *cmdq_resume_bh;
+
+    QEMUBH *async_fence_bh;
+    QSLIST_HEAD(, virtio_gpu_virgl_context_fence) async_fenceq;
+
+    bool context_fence_enabled;
 };
 
 struct VhostUserGPU {
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g);
 void virtio_gpu_virgl_reset(VirtIOGPU *g);
 int virtio_gpu_virgl_init(VirtIOGPU *g);
 GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g);
+void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g);
 
 #endif
-- 
2.48.1

Add support for DRM native contexts to VirtIO-GPU. DRM context is enabled
using a new virtio-gpu-gl device option "drm_native_context=on".

Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
 docs/system/devices/virtio-gpu.rst | 11 +++++++++++
 hw/display/virtio-gpu-gl.c         |  2 ++
 hw/display/virtio-gpu-virgl.c      | 22 ++++++++++++++++++++++
 hw/display/virtio-gpu.c            | 15 +++++++++++++++
 include/hw/virtio/virtio-gpu.h     |  3 +++
 5 files changed, 53 insertions(+)

diff --git a/docs/system/devices/virtio-gpu.rst b/docs/system/devices/virtio-gpu.rst
index XXXXXXX..XXXXXXX 100644
--- a/docs/system/devices/virtio-gpu.rst
+++ b/docs/system/devices/virtio-gpu.rst
@@ -XXX,XX +XXX,XX @@ of virtio-gpu host memory window. This is typically between 256M and 8G.
 
 .. _venus: https://gitlab.freedesktop.org/virgl/venus-protocol/
 
+DRM native context is supported since release of `virglrenderer`_ v1.0.0
+using `drm`_ protocol.  ``DRM`` virtio-gpu capability set ("capset") requires
+host blob support (``hostmem`` and ``blob`` fields) and should be enabled
+using ``drm_native_context`` field.  The ``hostmem`` field specifies the size
+of virtio-gpu host memory window. This is typically between 256M and 8G.
+
+.. parsed-literal::
+    -device virtio-gpu-gl,hostmem=8G,blob=on,drm_native_context=on
+
+.. _drm: https://gitlab.freedesktop.org/virgl/virglrenderer/-/tree/main/src/drm
+
 virtio-gpu rutabaga
 -------------------
 
diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu-gl.c
+++ b/hw/display/virtio-gpu-gl.c
@@ -XXX,XX +XXX,XX @@ static const Property virtio_gpu_gl_properties[] = {
                     VIRTIO_GPU_FLAG_STATS_ENABLED, false),
     DEFINE_PROP_BIT("venus", VirtIOGPU, parent_obj.conf.flags,
                     VIRTIO_GPU_FLAG_VENUS_ENABLED, false),
+    DEFINE_PROP_BIT("drm_native_context", VirtIOGPU, parent_obj.conf.flags,
+                    VIRTIO_GPU_FLAG_DRM_ENABLED, false),
 };
 
 static void virtio_gpu_gl_device_unrealize(DeviceState *qdev)
diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu-virgl.c
+++ b/hw/display/virtio-gpu-virgl.c
@@ -XXX,XX +XXX,XX @@ int virtio_gpu_virgl_init(VirtIOGPU *g)
     if (virtio_gpu_venus_enabled(g->parent_obj.conf)) {
         flags |= VIRGL_RENDERER_VENUS | VIRGL_RENDERER_RENDER_SERVER;
     }
+    if (virtio_gpu_drm_enabled(g->parent_obj.conf)) {
+        flags |= VIRGL_RENDERER_DRM;
+
+        if (!gl->context_fence_enabled) {
+            /*
+             * Virglrenderer skips enabling DRM context support without
+             * enabled async-fence feature. VirtIO-GPU will initialize
+             * successfully, but DRM context won't be available in guest.
+             */
+            error_report("DRM native context requires EGL display");
+            return -EINVAL;
+        }
+    }
 #endif
 
     ret = virgl_renderer_init(g, flags, &virtio_gpu_3d_cbs);
@@ -XXX,XX +XXX,XX @@ GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g)
         }
     }
 
+    if (virtio_gpu_drm_enabled(g->parent_obj.conf)) {
+        virgl_renderer_get_cap_set(VIRTIO_GPU_CAPSET_DRM,
+                                   &capset_max_ver,
+                                   &capset_max_size);
+        if (capset_max_size) {
+            virtio_gpu_virgl_add_capset(capset_ids, VIRTIO_GPU_CAPSET_DRM);
+        }
+    }
+
     return capset_ids;
 }
diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/display/virtio-gpu.c
+++ b/hw/display/virtio-gpu.c
@@ -XXX,XX +XXX,XX @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
 #endif
     }
 
+    if (virtio_gpu_drm_enabled(g->parent_obj.conf)) {
+#ifdef VIRGL_VERSION_MAJOR
+    #if VIRGL_VERSION_MAJOR >= 1
+        if (!virtio_gpu_blob_enabled(g->parent_obj.conf) ||
+            !virtio_gpu_hostmem_enabled(g->parent_obj.conf)) {
+            error_setg(errp, "drm requires enabled blob and hostmem options");
+            return;
+        }
+    #else
+        error_setg(errp, "old virglrenderer, drm unsupported");
+        return;
+    #endif
+#endif
+    }
+
     if (!virtio_gpu_base_device_realize(qdev,
                                         virtio_gpu_handle_ctrl_cb,
                                         virtio_gpu_handle_cursor_cb,
diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/virtio/virtio-gpu.h
+++ b/include/hw/virtio/virtio-gpu.h
@@ -XXX,XX +XXX,XX @@ enum virtio_gpu_base_conf_flags {
     VIRTIO_GPU_FLAG_RUTABAGA_ENABLED,
     VIRTIO_GPU_FLAG_VENUS_ENABLED,
     VIRTIO_GPU_FLAG_RESOURCE_UUID_ENABLED,
+    VIRTIO_GPU_FLAG_DRM_ENABLED,
 };
 
 #define virtio_gpu_virgl_enabled(_cfg) \
@@ -XXX,XX +XXX,XX @@ enum virtio_gpu_base_conf_flags {
     (_cfg.hostmem > 0)
 #define virtio_gpu_venus_enabled(_cfg) \
     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VENUS_ENABLED))
+#define virtio_gpu_drm_enabled(_cfg) \
+    (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DRM_ENABLED))
 
 struct virtio_gpu_base_conf {
     uint32_t max_outputs;
-- 
2.48.1

Display refreshment is invoked by a timer and it erroneously disables
the active scanout if it happens to be invoked after scanout has been
enabled. This offending scanout-disable race condition with a timer
can be easily hit when Qemu runs with a disabled vsync by using SDL or
GTK displays (with vblank_mode=0 for GTK). Refreshment of display's
content shouldn't disable the active display. Fix it by keeping the
scanout's state unchanged when display is redrawn.

diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c
index XXXXXXX..XXXXXXX 100644
--- a/ui/sdl2-gl.c
+++ b/ui/sdl2-gl.c
@@ -XXX,XX +XXX,XX @@ static void sdl2_gl_render_surface(struct sdl2_console *scon)
     int ww, wh;
 
     SDL_GL_MakeCurrent(scon->real_window, scon->winctx);
-    sdl2_set_scanout_mode(scon, false);
 
     SDL_GetWindowSize(scon->real_window, &ww, &wh);
     surface_gl_setup_viewport(scon->gls, scon->surface, ww, wh);
-- 
2.48.1

diff --git a/ui/gtk-egl.c b/ui/gtk-egl.c
index XXXXXXX..XXXXXXX 100644
--- a/ui/gtk-egl.c
+++ b/ui/gtk-egl.c
@@ -XXX,XX +XXX,XX @@ void gd_egl_refresh(DisplayChangeListener *dcl)
 
     if (vc->gfx.glupdates) {
         vc->gfx.glupdates = 0;
-        gtk_egl_set_scanout_mode(vc, false);
         gd_egl_draw(vc);
     }
 }
diff --git a/ui/gtk-gl-area.c b/ui/gtk-gl-area.c
index XXXXXXX..XXXXXXX 100644
--- a/ui/gtk-gl-area.c
+++ b/ui/gtk-gl-area.c
@@ -XXX,XX +XXX,XX @@ void gd_gl_area_refresh(DisplayChangeListener *dcl)
 
     if (vc->gfx.glupdates) {
         vc->gfx.glupdates = 0;
-        gtk_gl_area_set_scanout_mode(vc, false);
         gtk_gl_area_queue_render(GTK_GL_AREA(vc->gfx.drawing_area));
     }
 }
-- 
2.48.1

Extend virtio-gpu documentation with a link to the Mesa VirGL
documentation.

Suggested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
 docs/system/devices/virtio-gpu.rst | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/docs/system/devices/virtio-gpu.rst b/docs/system/devices/virtio-gpu.rst
index XXXXXXX..XXXXXXX 100644
--- a/docs/system/devices/virtio-gpu.rst
+++ b/docs/system/devices/virtio-gpu.rst
@@ -XXX,XX +XXX,XX @@ on typical modern Linux distributions.
 virtio-gpu virglrenderer
 ------------------------
 
-When using virgl accelerated graphics mode in the guest, OpenGL API calls
+When using `virgl`_ accelerated graphics mode in the guest, OpenGL API calls
 are translated into an intermediate representation (see `Gallium3D`_). The
 intermediate representation is communicated to the host and the
 `virglrenderer`_ library on the host translates the intermediate
@@ -XXX,XX +XXX,XX @@ representation back to OpenGL API calls.
 .. parsed-literal::
     -device virtio-gpu-gl
 
+.. _virgl: https://docs.mesa3d.org/drivers/virgl.html
 .. _Gallium3D: https://www.freedesktop.org/wiki/Software/gallium/
 .. _virglrenderer: https://gitlab.freedesktop.org/virgl/virglrenderer/
 
-- 
2.48.1

Change virtio-gpu Venus link, pointing it at the Mesa Venus
documentation instead of the protocol. The Mesa doc provides more
information and also has a link to the protocol.

Suggested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
 docs/system/devices/virtio-gpu.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

From: Alex Bennée <alex.bennee@linaro.org>

This attempts to tidy up the VirtIO GPU documentation to make the list
of requirements clearer. There are still a lot of moving parts and the
distros have some catching up to do before this is all handled
automatically.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Sergio Lopez Pascual <slp@redhat.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
[dmitry.osipenko@collabora.com: Extended and corrected doc]
---
 docs/system/devices/virtio-gpu.rst | 101 ++++++++++++++++++++++++++++-
 1 file changed, 98 insertions(+), 3 deletions(-)

diff --git a/docs/system/devices/virtio-gpu.rst b/docs/system/devices/virtio-gpu.rst
index XXXXXXX..XXXXXXX 100644
--- a/docs/system/devices/virtio-gpu.rst
+++ b/docs/system/devices/virtio-gpu.rst
@@ -XXX,XX +XXX,XX @@ virtio-gpu
 ==========
 
 This document explains the setup and usage of the virtio-gpu device.
-The virtio-gpu device paravirtualizes the GPU and display controller.
+The virtio-gpu device provides a GPU and display controller
+paravirtualized using VirtIO. It supports a number of different modes
+from simple 2D displays to fully accelerated 3D graphics.
 
-Linux kernel support
---------------------
+Linux guest kernel support
+--------------------------
 
 virtio-gpu requires a guest Linux kernel built with the
 ``CONFIG_DRM_VIRTIO_GPU`` option.
 
+3D acceleration
+---------------
+
+3D acceleration of a virtualized GPU is still an evolving field.
+Depending on the 3D mode you are running you may need to override
+distribution supplied libraries with more recent versions or enable
+build options. There are a number of requirements the host must meet
+to be able to be able to support guests. QEMU must be able to access the
+host's GPU and for the best performance be able to reliably share GPU
+memory with the guest. Details of 3D acceleration requirements are
+described in a further sections.
+
 QEMU virtio-gpu variants
 ------------------------
 
@@ -XXX,XX +XXX,XX @@ intermediate representation is communicated to the host and the
 `virglrenderer`_ library on the host translates the intermediate
 representation back to OpenGL API calls.
 
+By default OpenGL version on guest is limited to 4.3. In order to enable
+OpenGL 4.6 support, virtio-gpu  host blobs feature (``hostmem`` and ``blob``
+fields) should be enabled.  The ``hostmem`` field specifies the size of
+virtio-gpu host memory window. This is typically between 256M and 8G.
+
 .. parsed-literal::
     -device virtio-gpu-gl
+    -device virtio-gpu-gl,hostmem=8G,blob=true
 
 .. _virgl: https://docs.mesa3d.org/drivers/virgl.html
 .. _Gallium3D: https://www.freedesktop.org/wiki/Software/gallium/
@@ -XXX,XX +XXX,XX @@ of virtio-gpu host memory window. This is typically between 256M and 8G.
 
 .. _drm: https://gitlab.freedesktop.org/virgl/virglrenderer/-/tree/main/src/drm
 
+.. list-table:: Linux Host Requirements
+  :header-rows: 1
+
+  * - Capability
+    - Kernel Version
+    - Libvirglrenderer Version
+  * - OpenGL pass-through
+    - Any Linux version compatible with QEMU if not using host blobs feature,
+      Linux 6.13+ otherwise
+    - 0.8.2+
+  * - Vulkan pass-through
+    - Linux 6.13+
+    - 1.0.0+
+  * - AMDGPU DRM native context
+    - Linux 6.13+
+    - 1.1.0+
+  * - Freedreno DRM native context
+    - Linux 6.4+
+    - 1.0.0+
+  * - Intel i915 DRM native context
+    - Linux 6.13+
+    - `mr1384`_
+  * - Asahi DRM native context
+    - `Downstream version`_ of Asahi Linux kernel
+    - `mr1274`_
+
+.. _mr1384: https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1384
+.. _mr1274: https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1274
+.. _Downstream version: https://github.com/AsahiLinux/linux
+
+.. list-table:: Linux Guest Requirements
+  :header-rows: 1
+
+  * - Capability
+    - Kernel Version
+    - Mesa Version
+  * - OpenGL pass-through
+    - Any Linux version supporting virtio-gpu
+    - 16.0.0+
+  * - Vulkan pass-through
+    - Linux 5.16+
+    - 24.2.0+
+  * - AMDGPU DRM native context
+    - Linux 6.14+
+    - 25.0.0+
+  * - Freedreno DRM native context
+    - Linux 6.14+
+    - 23.1.0+
+  * - Intel i915 DRM native context
+    - Linux 6.14+
+    - `mr29870`_
+  * - Asahi DRM native context
+    - Linux 6.14+
+    - 24.2.0+
+
+.. _mr29870: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29870
+
 virtio-gpu rutabaga
 -------------------
 
@@ -XXX,XX +XXX,XX @@ Surfaceless is the default if ``wsi`` is not specified.
 .. _Wayland display passthrough: https://www.youtube.com/watch?v=OZJiHMtIQ2M
 .. _gfxstream-enabled rutabaga: https://crosvm.dev/book/appendix/rutabaga_gfx.html
 .. _guest Wayland proxy: https://crosvm.dev/book/devices/wayland.html
+
+.. list-table:: Linux Host Requirements
+  :header-rows: 1
+
+  * - Capability
+    - Kernel Version
+  * - Vulkan+Wayland pass-through
+    - Linux 6.13+
+
+.. list-table:: Linux Guest Requirements
+  :header-rows: 1
+
+  * - Capability
+    - Kernel Version
+    - Mesa Version
+  * - Vulkan+Wayland pass-through
+    - Linux 5.16+
+    - 24.3.0+
-- 
2.48.1