[v1] target/mips: Remove target-specific endianness knowledge

[PATCH 11/12] target/mips: Remove target-specific code in mips_cpu_reset_hold()

Posted by Philippe Mathieu-Daudé 2 months, 3 weeks ago

Since all code creating vCPUs now set the 'cpu-big-endian' property,
we can remove the target-specific #ifdef'ry in mips_cpu_reset_hold():
the CP0C0_BE bit is set using the property cpu->is_big_endian value.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/mips/cpu.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 02e2e72f2d..9724e71a5e 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -202,9 +202,6 @@ static void mips_cpu_reset_hold(Object *obj, ResetType type)
     env->CP0_PRid = env->cpu_model->CP0_PRid;
     env->CP0_Config0 = deposit32(env->cpu_model->CP0_Config0,
                                  CP0C0_BE, 1, cpu->is_big_endian);
-#if TARGET_BIG_ENDIAN
-    env->CP0_Config0 |= (1 << CP0C0_BE);
-#endif
     env->CP0_Config1 = env->cpu_model->CP0_Config1;
     env->CP0_Config2 = env->cpu_model->CP0_Config2;
     env->CP0_Config3 = env->cpu_model->CP0_Config3;
-- 
2.45.2

Re: [PATCH 11/12] target/mips: Remove target-specific code in mips_cpu_reset_hold()

Posted by Richard Henderson 2 months, 2 weeks ago

On 9/30/24 02:11, Philippe Mathieu-Daudé wrote:
> Since all code creating vCPUs now set the 'cpu-big-endian' property,
> we can remove the target-specific #ifdef'ry in mips_cpu_reset_hold():
> the CP0C0_BE bit is set using the property cpu->is_big_endian value.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/mips/cpu.c | 3 ---
>   1 file changed, 3 deletions(-)
> 
> diff --git a/target/mips/cpu.c b/target/mips/cpu.c
> index 02e2e72f2d..9724e71a5e 100644
> --- a/target/mips/cpu.c
> +++ b/target/mips/cpu.c
> @@ -202,9 +202,6 @@ static void mips_cpu_reset_hold(Object *obj, ResetType type)
>       env->CP0_PRid = env->cpu_model->CP0_PRid;
>       env->CP0_Config0 = deposit32(env->cpu_model->CP0_Config0,
>                                    CP0C0_BE, 1, cpu->is_big_endian);
> -#if TARGET_BIG_ENDIAN
> -    env->CP0_Config0 |= (1 << CP0C0_BE);
> -#endif
>       env->CP0_Config1 = env->cpu_model->CP0_Config1;
>       env->CP0_Config2 = env->cpu_model->CP0_Config2;
>       env->CP0_Config3 = env->cpu_model->CP0_Config3;

I think this must be merged into patch 8, or patch 8 doesn't work.


r~

Re: [PATCH 11/12] target/mips: Remove target-specific code in mips_cpu_reset_hold()

Posted by Philippe Mathieu-Daudé 2 months, 1 week ago

On 3/10/24 20:01, Richard Henderson wrote:
> On 9/30/24 02:11, Philippe Mathieu-Daudé wrote:
>> Since all code creating vCPUs now set the 'cpu-big-endian' property,
>> we can remove the target-specific #ifdef'ry in mips_cpu_reset_hold():
>> the CP0C0_BE bit is set using the property cpu->is_big_endian value.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>>   target/mips/cpu.c | 3 ---
>>   1 file changed, 3 deletions(-)
>>
>> diff --git a/target/mips/cpu.c b/target/mips/cpu.c
>> index 02e2e72f2d..9724e71a5e 100644
>> --- a/target/mips/cpu.c
>> +++ b/target/mips/cpu.c
>> @@ -202,9 +202,6 @@ static void mips_cpu_reset_hold(Object *obj, 
>> ResetType type)
>>       env->CP0_PRid = env->cpu_model->CP0_PRid;
>>       env->CP0_Config0 = deposit32(env->cpu_model->CP0_Config0,
>>                                    CP0C0_BE, 1, cpu->is_big_endian);
>> -#if TARGET_BIG_ENDIAN
>> -    env->CP0_Config0 |= (1 << CP0C0_BE);
>> -#endif
>>       env->CP0_Config1 = env->cpu_model->CP0_Config1;
>>       env->CP0_Config2 = env->cpu_model->CP0_Config2;
>>       env->CP0_Config3 = env->cpu_model->CP0_Config3;
> 
> I think this must be merged into patch 8, or patch 8 doesn't work.

Correct.