1
The following changes since commit 3b14a767eaca3df5534a162851f04787b363670e:
1
The following changes since commit aa3a285b5bc56a4208b3b57d4a55291e9c260107:
2
2
3
Merge tag 'qemu-openbios-20240924' of https://github.com/mcayland/qemu into staging (2024-09-28 12:34:44 +0100)
3
Merge tag 'mem-2024-12-21' of https://github.com/davidhildenbrand/qemu into staging (2024-12-22 14:33:27 -0500)
4
4
5
are available in the Git repository at:
5
are available in the Git repository at:
6
6
7
https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240929
7
https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241225
8
8
9
for you to fetch changes up to f7c8ef7bad7495d8c84b262a8b243efe39e56b13:
9
for you to fetch changes up to cb91b7108cb0b3781de9a00994fe78b631d80012:
10
10
11
hw/loongarch/fw_cfg: Build in common_ss[] (2024-09-29 16:22:56 +0800)
11
target/loongarch: Use auto method with LASX feature (2024-12-25 10:33:20 +0800)
12
12
13
----------------------------------------------------------------
13
----------------------------------------------------------------
14
pull-loongarch-20240929
14
pull-loongarch-20241225
15
15
16
----------------------------------------------------------------
16
----------------------------------------------------------------
17
Bibo Mao (3):
17
Bibo Mao (5):
18
acpi: ged: Add macro for acpi sleep control register
18
target/loongarch: Use actual operand size with vbsrl check
19
hw/loongarch/virt: Add FDT table support with acpi ged pm register
19
hw/loongarch/virt: Create fdt table on machine creation done notification
20
target/loongarch: Avoid bits shift exceeding width of bool type
20
hw/loongarch/virt: Improve fdt table creation for CPU object
21
target/loongarch: Use auto method with LSX feature
22
target/loongarch: Use auto method with LASX feature
21
23
22
Jiaxun Yang (2):
24
ghy (1):
23
hw/loongarch/boot: Refactor EFI booting protocol generation
25
target/loongarch: Fix vldi inst
24
hw/loongarch/boot: Rework boot code generation
25
26
26
Philippe Mathieu-Daudé (2):
27
hw/loongarch/virt.c | 142 ++++++++++++++----------
27
hw/loongarch/virt: Remove unnecessary 'cpu.h' inclusion
28
target/loongarch/cpu.c | 86 ++++++++------
28
hw/loongarch/fw_cfg: Build in common_ss[]
29
target/loongarch/cpu.h | 4 +
29
30
target/loongarch/kvm/kvm.c | 107 ++++++++++++++++++
30
hw/acpi/generic_event_device.c | 6 +-
31
target/loongarch/tcg/insn_trans/trans_vec.c.inc | 4 +-
31
hw/loongarch/boot.c | 321 +++++++++++++++++++++------------
32
5 files changed, 249 insertions(+), 94 deletions(-)
32
hw/loongarch/meson.build | 2 +-
33
hw/loongarch/virt.c | 39 ++++
34
include/hw/acpi/generic_event_device.h | 7 +-
35
include/hw/loongarch/boot.h | 106 +++++++++--
36
include/hw/loongarch/virt.h | 1 -
37
target/loongarch/arch_dump.c | 6 +-
38
8 files changed, 342 insertions(+), 146 deletions(-)
39
40
diff view generated by jsdifflib
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
1
From: ghy <2247883756@qq.com>
2
2
3
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
3
Refer to the link below for a description of the vldi instructions:
4
Reviewed-by: Song Gao <gaosong@loongson.cn>
4
https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
5
Message-Id: <20240927213254.17552-2-philmd@linaro.org>
5
Fixed errors in vldi instruction implementation.
6
Signed-off-by: Song Gao <gaosong@loongson.cn>
6
7
Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
8
Tested-by: Xianglai Li <lixianglai@loongson.cn>
9
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
10
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
11
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
7
---
12
---
8
include/hw/loongarch/virt.h | 1 -
13
target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
9
1 file changed, 1 deletion(-)
14
1 file changed, 1 insertion(+), 1 deletion(-)
10
15
11
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
16
diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
12
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
13
--- a/include/hw/loongarch/virt.h
18
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
14
+++ b/include/hw/loongarch/virt.h
19
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
15
@@ -XXX,XX +XXX,XX @@
20
@@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm)
16
#ifndef HW_LOONGARCH_H
21
break;
17
#define HW_LOONGARCH_H
22
case 1:
18
23
/* data: {2{16'0, imm[7:0], 8'0}} */
19
-#include "target/loongarch/cpu.h"
24
- data = (t << 24) | (t << 8);
20
#include "hw/boards.h"
25
+ data = (t << 40) | (t << 8);
21
#include "qemu/queue.h"
26
break;
22
#include "hw/block/flash.h"
27
case 2:
28
/* data: {2{8'0, imm[7:0], 16'0}} */
23
--
29
--
24
2.34.1
30
2.43.5
25
26
diff view generated by jsdifflib
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
1
Hardcoded 32 bytes is used for vbsrl emulation check, there is
2
problem when options lsx=on,lasx=off is used for vbsrl.v instruction
3
in TCG mode. It injects LASX exception rather LSX exception.
2
4
3
Nothing in LoongArch fw_cfg.c requires target specific definitions.
5
Here actual operand size is used.
4
6
5
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Cc: qemu-stable@nongnu.org
6
Reviewed-by: Song Gao <gaosong@loongson.cn>
8
Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve")
7
Message-Id: <20240927213254.17552-3-philmd@linaro.org>
9
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
8
Signed-off-by: Song Gao <gaosong@loongson.cn>
10
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
11
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
---
12
---
10
hw/loongarch/meson.build | 2 +-
13
target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
11
1 file changed, 1 insertion(+), 1 deletion(-)
14
1 file changed, 1 insertion(+), 1 deletion(-)
12
15
13
diff --git a/hw/loongarch/meson.build b/hw/loongarch/meson.build
16
diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
14
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
15
--- a/hw/loongarch/meson.build
18
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
16
+++ b/hw/loongarch/meson.build
19
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
17
@@ -XXX,XX +XXX,XX @@
20
@@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz)
18
loongarch_ss = ss.source_set()
21
{
19
loongarch_ss.add(files(
22
int i, ofs;
20
- 'fw_cfg.c',
23
21
'boot.c',
24
- if (!check_vec(ctx, 32)) {
22
))
25
+ if (!check_vec(ctx, oprsz)) {
23
+common_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: files('fw_cfg.c'))
26
return true;
24
loongarch_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: files('virt.c'))
27
}
25
loongarch_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-build.c'))
26
28
27
--
29
--
28
2.34.1
30
2.43.5
29
31
30
32
diff view generated by jsdifflib
1
From: Bibo Mao <maobibo@loongson.cn>
1
The same with ACPI table, fdt table is created on machine done
2
2
notification. Some objects like CPU objects can be created with cold-plug
3
ACPI ged is used for power management on LoongArch virt platform, in
3
method with command such as -smp x, -device la464-loongarch-cpu, so all
4
general it is parsed from acpi table. However if system boot directly from
4
objects finish to create when machine is done.
5
elf kernel, no UEFI bios is provided and acpi table cannot be used also.
6
7
Here acpi ged pm register is exposed with FDT table, it is compatbile
8
with syscon method in FDT table, only that acpi ged pm register is accessed
9
with 8-bit mode, rather with 32-bit mode.
10
5
11
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
12
Reviewed-by: Song Gao <gaosong@loongson.cn>
7
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
13
Tested-by: Song Gao <gaosong@loongson.cn>
14
Message-Id: <20240918014206.2165821-3-maobibo@loongson.cn>
15
Signed-off-by: Song Gao <gaosong@loongson.cn>
16
---
8
---
17
hw/loongarch/virt.c | 39 +++++++++++++++++++++++++++++++++++++++
9
hw/loongarch/virt.c | 103 ++++++++++++++++++++++++--------------------
18
1 file changed, 39 insertions(+)
10
1 file changed, 57 insertions(+), 46 deletions(-)
19
11
20
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
12
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
21
index XXXXXXX..XXXXXXX 100644
13
index XXXXXXX..XXXXXXX 100644
22
--- a/hw/loongarch/virt.c
14
--- a/hw/loongarch/virt.c
23
+++ b/hw/loongarch/virt.c
15
+++ b/hw/loongarch/virt.c
24
@@ -XXX,XX +XXX,XX @@ static void fdt_add_rtc_node(LoongArchVirtMachineState *lvms,
16
@@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
25
g_free(nodename);
17
}
26
}
18
}
27
19
28
+static void fdt_add_ged_reset(LoongArchVirtMachineState *lvms)
20
+static void virt_fdt_setup(LoongArchVirtMachineState *lvms)
29
+{
21
+{
30
+ char *name;
22
+ MachineState *machine = MACHINE(lvms);
31
+ uint32_t ged_handle;
23
+ uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
32
+ MachineState *ms = MACHINE(lvms);
24
+ int i;
33
+ hwaddr base = VIRT_GED_REG_ADDR;
25
+
34
+ hwaddr size = ACPI_GED_REG_COUNT;
26
+ create_fdt(lvms);
35
+
27
+ fdt_add_cpu_nodes(lvms);
36
+ ged_handle = qemu_fdt_alloc_phandle(ms->fdt);
28
+ fdt_add_memory_nodes(machine);
37
+ name = g_strdup_printf("/ged@%" PRIx64, base);
29
+ fdt_add_fw_cfg_node(lvms);
38
+ qemu_fdt_add_subnode(ms->fdt, name);
30
+ fdt_add_flash_node(lvms);
39
+ qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon");
31
+
40
+ qemu_fdt_setprop_cells(ms->fdt, name, "reg", 0x0, base, 0x0, size);
32
+ /* Add cpu interrupt-controller */
41
+ /* 8 bit registers */
33
+ fdt_add_cpuic_node(lvms, &cpuintc_phandle);
42
+ qemu_fdt_setprop_cell(ms->fdt, name, "reg-shift", 0);
34
+ /* Add Extend I/O Interrupt Controller node */
43
+ qemu_fdt_setprop_cell(ms->fdt, name, "reg-io-width", 1);
35
+ fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
44
+ qemu_fdt_setprop_cell(ms->fdt, name, "phandle", ged_handle);
36
+ /* Add PCH PIC node */
45
+ ged_handle = qemu_fdt_get_phandle(ms->fdt, name);
37
+ fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
46
+ g_free(name);
38
+ /* Add PCH MSI node */
47
+
39
+ fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
48
+ name = g_strdup_printf("/reboot");
40
+ /* Add pcie node */
49
+ qemu_fdt_add_subnode(ms->fdt, name);
41
+ fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle);
50
+ qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-reboot");
42
+
51
+ qemu_fdt_setprop_cell(ms->fdt, name, "regmap", ged_handle);
43
+ /*
52
+ qemu_fdt_setprop_cell(ms->fdt, name, "offset", ACPI_GED_REG_RESET);
44
+ * Create uart fdt node in reverse order so that they appear
53
+ qemu_fdt_setprop_cell(ms->fdt, name, "value", ACPI_GED_RESET_VALUE);
45
+ * in the finished device tree lowest address first
54
+ g_free(name);
46
+ */
55
+
47
+ for (i = VIRT_UART_COUNT; i-- > 0;) {
56
+ name = g_strdup_printf("/poweroff");
48
+ hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
57
+ qemu_fdt_add_subnode(ms->fdt, name);
49
+ int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
58
+ qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-poweroff");
50
+ fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0);
59
+ qemu_fdt_setprop_cell(ms->fdt, name, "regmap", ged_handle);
51
+ }
60
+ qemu_fdt_setprop_cell(ms->fdt, name, "offset", ACPI_GED_REG_SLEEP_CTL);
52
+
61
+ qemu_fdt_setprop_cell(ms->fdt, name, "value", ACPI_GED_SLP_EN |
53
+ fdt_add_rtc_node(lvms, &pch_pic_phandle);
62
+ (ACPI_GED_SLP_TYP_S5 << ACPI_GED_SLP_TYP_POS));
54
+ fdt_add_ged_reset(lvms);
63
+ g_free(name);
55
+ platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
56
+ VIRT_PLATFORM_BUS_BASEADDRESS,
57
+ VIRT_PLATFORM_BUS_SIZE,
58
+ VIRT_PLATFORM_BUS_IRQ);
59
+
60
+ /*
61
+ * Since lowmem region starts from 0 and Linux kernel legacy start address
62
+ * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
63
+ * access. FDT size limit with 1 MiB.
64
+ * Put the FDT into the memory map as a ROM image: this will ensure
65
+ * the FDT is copied again upon reset, even if addr points into RAM.
66
+ */
67
+ qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
68
+ rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
69
+ &address_space_memory);
70
+ qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
71
+ rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
64
+}
72
+}
65
+
73
+
66
static void fdt_add_uart_node(LoongArchVirtMachineState *lvms,
74
static void virt_done(Notifier *notifier, void *data)
67
uint32_t *pch_pic_phandle, hwaddr base,
75
{
68
int irq, bool chosen)
76
LoongArchVirtMachineState *lvms = container_of(notifier,
77
LoongArchVirtMachineState, machine_done);
78
virt_build_smbios(lvms);
79
loongarch_acpi_setup(lvms);
80
+ virt_fdt_setup(lvms);
81
}
82
83
static void virt_powerdown_req(Notifier *notifier, void *opaque)
84
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
85
}
86
87
static void virt_devices_init(DeviceState *pch_pic,
88
- LoongArchVirtMachineState *lvms,
89
- uint32_t *pch_pic_phandle,
90
- uint32_t *pch_msi_phandle)
91
+ LoongArchVirtMachineState *lvms)
92
{
93
MachineClass *mc = MACHINE_GET_CLASS(lvms);
94
DeviceState *gpex_dev;
69
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
95
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
96
gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
97
}
98
99
- /* Add pcie node */
100
- fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
101
-
102
/*
103
* Create uart fdt node in reverse order so that they appear
104
* in the finished device tree lowest address first
105
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
106
serial_mm_init(get_system_memory(), base, 0,
107
qdev_get_gpio_in(pch_pic, irq),
108
115200, serial_hd(i), DEVICE_LITTLE_ENDIAN);
109
- fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
110
}
111
112
/* Network init */
113
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
114
sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
70
qdev_get_gpio_in(pch_pic,
115
qdev_get_gpio_in(pch_pic,
71
VIRT_RTC_IRQ - VIRT_GSI_BASE));
116
VIRT_RTC_IRQ - VIRT_GSI_BASE));
72
fdt_add_rtc_node(lvms, pch_pic_phandle);
117
- fdt_add_rtc_node(lvms, pch_pic_phandle);
73
+ fdt_add_ged_reset(lvms);
118
- fdt_add_ged_reset(lvms);
74
119
75
/* acpi ged */
120
/* acpi ged */
76
lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
121
lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
122
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
123
CPULoongArchState *env;
124
CPUState *cpu_state;
125
int cpu, pin, i, start, num;
126
- uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
127
128
/*
129
* Extended IRQ model.
130
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
131
memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
132
sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
133
134
- /* Add cpu interrupt-controller */
135
- fdt_add_cpuic_node(lvms, &cpuintc_phandle);
136
-
137
for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
138
cpu_state = qemu_get_cpu(cpu);
139
cpudev = DEVICE(cpu_state);
140
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
141
}
142
}
143
144
- /* Add Extend I/O Interrupt Controller node */
145
- fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
146
-
147
pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
148
num = VIRT_PCH_PIC_IRQ_NUM;
149
qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
150
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
151
qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
152
}
153
154
- /* Add PCH PIC node */
155
- fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
156
-
157
pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
158
start = num;
159
num = EXTIOI_IRQS - start;
160
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
161
qdev_get_gpio_in(extioi, i + start));
162
}
163
164
- /* Add PCH MSI node */
165
- fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
166
-
167
- virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
168
+ virt_devices_init(pch_pic, lvms);
169
}
170
171
static void virt_firmware_init(LoongArchVirtMachineState *lvms)
172
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
173
cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
174
}
175
176
- create_fdt(lvms);
177
-
178
/* Create IOCSR space */
179
memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
180
machine, "iocsr", UINT64_MAX);
181
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
182
lacpu = LOONGARCH_CPU(cpu);
183
lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
184
}
185
- fdt_add_cpu_nodes(lvms);
186
- fdt_add_memory_nodes(machine);
187
fw_cfg_add_memory(machine);
188
189
/* Node0 memory */
190
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
191
memmap_table,
192
sizeof(struct memmap_entry) * (memmap_entries));
193
}
194
- fdt_add_fw_cfg_node(lvms);
195
- fdt_add_flash_node(lvms);
196
197
/* Initialize the IO interrupt subsystem */
198
virt_irq_init(lvms);
199
- platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
200
- VIRT_PLATFORM_BUS_BASEADDRESS,
201
- VIRT_PLATFORM_BUS_SIZE,
202
- VIRT_PLATFORM_BUS_IRQ);
203
lvms->machine_done.notify = virt_done;
204
qemu_add_machine_init_done_notifier(&lvms->machine_done);
205
/* connect powerdown request */
206
lvms->powerdown_notifier.notify = virt_powerdown_req;
207
qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
208
209
- /*
210
- * Since lowmem region starts from 0 and Linux kernel legacy start address
211
- * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
212
- * access. FDT size limit with 1 MiB.
213
- * Put the FDT into the memory map as a ROM image: this will ensure
214
- * the FDT is copied again upon reset, even if addr points into RAM.
215
- */
216
- qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
217
- rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
218
- &address_space_memory);
219
- qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
220
- rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
221
-
222
lvms->bootinfo.ram_size = ram_size;
223
loongarch_load_kernel(machine, &lvms->bootinfo);
224
}
77
--
225
--
78
2.34.1
226
2.43.5
diff view generated by jsdifflib
1
From: Bibo Mao <maobibo@loongson.cn>
1
For CPU object, possible_cpu_arch_ids() function is used rather than
2
2
smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus
3
Macro definition is added for acpi sleep control register, ged emulation
3
is not accurate for all possible CPU objects, possible_cpu_arch_ids()
4
driver can use the macro , also it can be used in FDT table if ged is
4
is used here.
5
exposed with FDT table.
6
5
7
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
6
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
8
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
7
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
9
Message-Id: <20240918014206.2165821-2-maobibo@loongson.cn>
10
Signed-off-by: Song Gao <gaosong@loongson.cn>
11
---
8
---
12
hw/acpi/generic_event_device.c | 6 +++---
9
hw/loongarch/virt.c | 39 +++++++++++++++++++++++++--------------
13
include/hw/acpi/generic_event_device.h | 7 +++++--
10
1 file changed, 25 insertions(+), 14 deletions(-)
14
2 files changed, 8 insertions(+), 5 deletions(-)
15
11
16
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
12
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
17
index XXXXXXX..XXXXXXX 100644
13
index XXXXXXX..XXXXXXX 100644
18
--- a/hw/acpi/generic_event_device.c
14
--- a/hw/loongarch/virt.c
19
+++ b/hw/acpi/generic_event_device.c
15
+++ b/hw/loongarch/virt.c
20
@@ -XXX,XX +XXX,XX @@ static void ged_regs_write(void *opaque, hwaddr addr, uint64_t data,
16
@@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms)
21
17
static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
22
switch (addr) {
18
{
23
case ACPI_GED_REG_SLEEP_CTL:
19
int num;
24
- slp_typ = (data >> 2) & 0x07;
20
- const MachineState *ms = MACHINE(lvms);
25
- slp_en = (data >> 5) & 0x01;
21
- int smp_cpus = ms->smp.cpus;
26
- if (slp_en && slp_typ == 5) {
22
+ MachineState *ms = MACHINE(lvms);
27
+ slp_typ = (data >> ACPI_GED_SLP_TYP_POS) & ACPI_GED_SLP_TYP_MASK;
23
+ MachineClass *mc = MACHINE_GET_CLASS(ms);
28
+ slp_en = !!(data & ACPI_GED_SLP_EN);
24
+ const CPUArchIdList *possible_cpus;
29
+ if (slp_en && slp_typ == ACPI_GED_SLP_TYP_S5) {
25
+ LoongArchCPU *cpu;
30
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
26
+ CPUState *cs;
27
+ char *nodename, *map_path;
28
29
qemu_fdt_add_subnode(ms->fdt, "/cpus");
30
qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1);
31
qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0);
32
33
/* cpu nodes */
34
- for (num = smp_cpus - 1; num >= 0; num--) {
35
- char *nodename = g_strdup_printf("/cpus/cpu@%d", num);
36
- LoongArchCPU *cpu = LOONGARCH_CPU(qemu_get_cpu(num));
37
- CPUState *cs = CPU(cpu);
38
+ possible_cpus = mc->possible_cpu_arch_ids(ms);
39
+ for (num = 0; num < possible_cpus->len; num++) {
40
+ cs = possible_cpus->cpus[num].cpu;
41
+ if (cs == NULL) {
42
+ continue;
43
+ }
44
+
45
+ nodename = g_strdup_printf("/cpus/cpu@%d", num);
46
+ cpu = LOONGARCH_CPU(cs);
47
48
qemu_fdt_add_subnode(ms->fdt, nodename);
49
qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu");
50
qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
51
cpu->dtb_compatible);
52
- if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) {
53
+ if (possible_cpus->cpus[num].props.has_node_id) {
54
qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id",
55
- ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
56
+ possible_cpus->cpus[num].props.node_id);
31
}
57
}
32
return;
58
qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num);
33
diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
59
qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle",
34
index XXXXXXX..XXXXXXX 100644
60
@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
35
--- a/include/hw/acpi/generic_event_device.h
61
36
+++ b/include/hw/acpi/generic_event_device.h
62
/*cpu map */
37
@@ -XXX,XX +XXX,XX @@ OBJECT_DECLARE_SIMPLE_TYPE(AcpiGedState, ACPI_GED)
63
qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map");
38
/* ACPI_GED_REG_RESET value for reset*/
64
+ for (num = 0; num < possible_cpus->len; num++) {
39
#define ACPI_GED_RESET_VALUE 0x42
65
+ cs = possible_cpus->cpus[num].cpu;
40
66
+ if (cs == NULL) {
41
-/* ACPI_GED_REG_SLEEP_CTL.SLP_TYP value for S5 (aka poweroff) */
67
+ continue;
42
-#define ACPI_GED_SLP_TYP_S5 0x05
68
+ }
43
+/* [ACPI 5.0 Chapter 4.8.3.7] Sleep Control and Status Register */
69
44
+#define ACPI_GED_SLP_TYP_POS 0x2 /* SLP_TYPx Bit Offset */
70
- for (num = smp_cpus - 1; num >= 0; num--) {
45
+#define ACPI_GED_SLP_TYP_MASK 0x07 /* SLP_TYPx 3-bit mask */
71
- char *cpu_path = g_strdup_printf("/cpus/cpu@%d", num);
46
+#define ACPI_GED_SLP_TYP_S5 0x05 /* System _S5 State (Soft Off) */
72
- char *map_path;
47
+#define ACPI_GED_SLP_EN 0x20 /* SLP_EN write-only bit */
73
-
48
74
+ nodename = g_strdup_printf("/cpus/cpu@%d", num);
49
#define GED_DEVICE "GED"
75
if (ms->smp.threads > 1) {
50
#define AML_GED_EVT_REG "EREG"
76
map_path = g_strdup_printf(
77
"/cpus/cpu-map/socket%d/core%d/thread%d",
78
@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
79
num % ms->smp.cores);
80
}
81
qemu_fdt_add_path(ms->fdt, map_path);
82
- qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path);
83
+ qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", nodename);
84
85
g_free(map_path);
86
- g_free(cpu_path);
87
+ g_free(nodename);
88
}
89
}
90
51
--
91
--
52
2.34.1
92
2.43.5
diff view generated by jsdifflib
1
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
1
Like LBT feature, add type OnOffAuto for LSX feature setting. Also
2
add LSX feature detection with new VM ioctl command, fallback to old
3
method if it is not supported.
2
4
3
Use stl_p to write instructions so that host endian conversion
5
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
4
will be performed.
6
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
7
---
8
target/loongarch/cpu.c | 38 +++++++++++++++------------
9
target/loongarch/cpu.h | 2 ++
10
target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++
11
3 files changed, 77 insertions(+), 17 deletions(-)
5
12
6
Replace mailbox read/write on LoongArch32 systems with 32bit IOCSR
13
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
7
instructions to prevent illegal instructions.
8
9
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
10
Reviewed-by: Song Gao <gaosong@loongson.cn>
11
Message-Id: <20240914-loongarch-booting-v1-2-1517cae11c10@flygoat.com>
12
Signed-off-by: Song Gao <gaosong@loongson.cn>
13
---
14
hw/loongarch/boot.c | 107 ++++++++++++++++++++++++--------------------
15
1 file changed, 59 insertions(+), 48 deletions(-)
16
17
diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
18
index XXXXXXX..XXXXXXX 100644
14
index XXXXXXX..XXXXXXX 100644
19
--- a/hw/loongarch/boot.c
15
--- a/target/loongarch/cpu.c
20
+++ b/hw/loongarch/boot.c
16
+++ b/target/loongarch/cpu.c
21
@@ -XXX,XX +XXX,XX @@ unsigned memmap_entries;
17
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
22
ram_addr_t initrd_offset;
18
{
23
uint64_t initrd_size;
19
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
24
20
CPULoongArchState *env = &cpu->env;
25
-static const unsigned int slave_boot_code[] = {
21
+ uint32_t data = 0;
26
- /* Configure reset ebase. */
22
int i;
27
- 0x0400302c, /* csrwr $t0, LOONGARCH_CSR_EENTRY */
23
24
for (i = 0; i < 21; i++) {
25
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
26
cpu->dtb_compatible = "loongarch,Loongson-3A5000";
27
env->cpucfg[0] = 0x14c010; /* PRID */
28
29
- uint32_t data = 0;
30
data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
31
data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
32
data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
33
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
34
{
35
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
36
CPULoongArchState *env = &cpu->env;
28
-
37
-
29
- /* Disable interrupt. */
38
+ uint32_t data = 0;
30
- 0x0380100c, /* ori $t0, $zero,0x4 */
39
int i;
31
- 0x04000180, /* csrxchg $zero, $t0, LOONGARCH_CSR_CRMD */
40
41
for (i = 0; i < 21; i++) {
42
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
43
cpu->dtb_compatible = "loongarch,Loongson-1C103";
44
env->cpucfg[0] = 0x148042; /* PRID */
45
46
- uint32_t data = 0;
47
data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
48
data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
49
data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
50
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
51
52
static bool loongarch_get_lsx(Object *obj, Error **errp)
53
{
54
- LoongArchCPU *cpu = LOONGARCH_CPU(obj);
55
- bool ret;
32
-
56
-
33
- /* Clear mailbox. */
57
- if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
34
- 0x1400002d, /* lu12i.w $t1, 1(0x1) */
58
- ret = true;
35
- 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */
59
- } else {
36
- 0x06481da0, /* iocsrwr.d $zero, $t1 */
60
- ret = false;
37
-
61
- }
38
- /* Enable IPI interrupt. */
62
- return ret;
39
- 0x1400002c, /* lu12i.w $t0, 1(0x1) */
63
+ return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF;
40
- 0x0400118c, /* csrxchg $t0, $t0, LOONGARCH_CSR_ECFG */
64
}
41
- 0x02fffc0c, /* addi.d $t0, $r0,-1(0xfff) */
65
42
- 0x1400002d, /* lu12i.w $t1, 1(0x1) */
66
static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
43
- 0x038011ad, /* ori $t1, $t1, CORE_EN_OFF */
67
{
44
- 0x064819ac, /* iocsrwr.w $t0, $t1 */
68
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
45
- 0x1400002d, /* lu12i.w $t1, 1(0x1) */
69
+ uint32_t val;
46
- 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */
70
47
-
71
- if (value) {
48
- /* Wait for wakeup <.L11>: */
72
- cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
49
- 0x06488000, /* idle 0x0 */
73
- } else {
50
- 0x03400000, /* andi $zero, $zero, 0x0 */
74
- cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
51
- 0x064809ac, /* iocsrrd.w $t0, $t1 */
75
- cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
52
- 0x43fff59f, /* beqz $t0, -12(0x7ffff4) # 48 <.L11> */
76
+ cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
53
-
77
+ if (kvm_enabled()) {
54
- /* Read and clear IPI interrupt. */
78
+ /* kvm feature detection in function kvm_arch_init_vcpu */
55
- 0x1400002d, /* lu12i.w $t1, 1(0x1) */
79
+ return;
56
- 0x064809ac, /* iocsrrd.w $t0, $t1 */
80
}
57
- 0x1400002d, /* lu12i.w $t1, 1(0x1) */
81
+
58
- 0x038031ad, /* ori $t1, $t1, CORE_CLEAR_OFF */
82
+ /* LSX feature detection in TCG mode */
59
- 0x064819ac, /* iocsrwr.w $t0, $t1 */
83
+ val = cpu->env.cpucfg[2];
60
-
84
+ if (cpu->lsx == ON_OFF_AUTO_ON) {
61
- /* Disable IPI interrupt. */
85
+ if (FIELD_EX32(val, CPUCFG2, LSX) == 0) {
62
- 0x1400002c, /* lu12i.w $t0, 1(0x1) */
86
+ error_setg(errp, "Failed to enable LSX in TCG mode");
63
- 0x04001180, /* csrxchg $zero, $t0, LOONGARCH_CSR_ECFG */
87
+ return;
64
-
88
+ }
65
- /* Read mail buf and jump to specified entry */
89
+ }
66
- 0x1400002d, /* lu12i.w $t1, 1(0x1) */
90
+
67
- 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */
91
+ cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
68
- 0x06480dac, /* iocsrrd.d $t0, $t1 */
92
}
69
- 0x00150181, /* move $ra, $t0 */
93
70
- 0x4c000020, /* jirl $zero, $ra,0 */
94
static bool loongarch_get_lasx(Object *obj, Error **errp)
71
-};
95
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
72
+static void generate_secondary_boot_code(void *boot_code, bool is_64bit)
96
{
97
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
98
99
+ cpu->lsx = ON_OFF_AUTO_AUTO;
100
object_property_add_bool(obj, "lsx", loongarch_get_lsx,
101
loongarch_set_lsx);
102
object_property_add_bool(obj, "lasx", loongarch_get_lasx,
103
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
104
105
} else {
106
cpu->lbt = ON_OFF_AUTO_OFF;
107
+ cpu->pmu = ON_OFF_AUTO_OFF;
108
}
109
}
110
111
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
112
index XXXXXXX..XXXXXXX 100644
113
--- a/target/loongarch/cpu.h
114
+++ b/target/loongarch/cpu.h
115
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
116
#endif
117
118
enum loongarch_features {
119
+ LOONGARCH_FEATURE_LSX,
120
LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
121
LOONGARCH_FEATURE_PMU,
122
};
123
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
124
uint32_t phy_id;
125
OnOffAuto lbt;
126
OnOffAuto pmu;
127
+ OnOffAuto lsx;
128
129
/* 'compatible' string for this CPU for Linux device trees */
130
const char *dtb_compatible;
131
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
132
index XXXXXXX..XXXXXXX 100644
133
--- a/target/loongarch/kvm/kvm.c
134
+++ b/target/loongarch/kvm/kvm.c
135
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
136
{
137
int ret;
138
struct kvm_device_attr attr;
139
+ uint64_t val;
140
141
switch (feature) {
142
+ case LOONGARCH_FEATURE_LSX:
143
+ attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
144
+ attr.attr = KVM_LOONGARCH_VM_FEAT_LSX;
145
+ ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
146
+ if (ret == 0) {
147
+ return true;
148
+ }
149
+
150
+ /* Fallback to old kernel detect interface */
151
+ val = 0;
152
+ attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
153
+ /* Cpucfg2 */
154
+ attr.attr = 2;
155
+ attr.addr = (uint64_t)&val;
156
+ ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
157
+ if (!ret) {
158
+ ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
159
+ if (ret) {
160
+ return false;
161
+ }
162
+
163
+ ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX);
164
+ return (ret != 0);
165
+ }
166
+ return false;
167
+
168
case LOONGARCH_FEATURE_LBT:
169
/*
170
* Return all if all the LBT features are supported such as:
171
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
172
return false;
173
}
174
175
+static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
73
+{
176
+{
74
+ uint32_t *p = boot_code;
177
+ CPULoongArchState *env = cpu_env(cs);
75
+
178
+ LoongArchCPU *cpu = LOONGARCH_CPU(cs);
76
+ /* Configure reset ebase. */
179
+ bool kvm_supported;
77
+ stl_p(p++, 0x0400302c); /* csrwr $t0, LOONGARCH_CSR_EENTRY */
180
+
78
+
181
+ kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX);
79
+ /* Disable interrupt. */
182
+ env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0);
80
+ stl_p(p++, 0x0380100c); /* ori $t0, $zero,0x4 */
183
+ if (cpu->lsx == ON_OFF_AUTO_ON) {
81
+ stl_p(p++, 0x04000180); /* csrxchg $zero, $t0, LOONGARCH_CSR_CRMD */
184
+ if (kvm_supported) {
82
+
185
+ env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
83
+ /* Clear mailbox. */
186
+ } else {
84
+ stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */
187
+ error_setg(errp, "'lsx' feature not supported by KVM on this host");
85
+ stl_p(p++, 0x038081ad); /* ori $t1, $t1, CORE_BUF_20 */
188
+ return -ENOTSUP;
86
+ if (is_64bit) {
189
+ }
87
+ stl_p(p++, 0x06481da0); /* iocsrwr.d $zero, $t1 */
190
+ } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) {
88
+ } else {
191
+ env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
89
+ stl_p(p++, 0x064819a0); /* iocsrwr.w $zero, $t1 */
90
+ }
192
+ }
91
+
193
+
92
+ /* Enable IPI interrupt. */
194
+ return 0;
93
+ stl_p(p++, 0x1400002c); /* lu12i.w $t0, 1(0x1) */
195
+}
94
+ stl_p(p++, 0x0400118c); /* csrxchg $t0, $t0, LOONGARCH_CSR_ECFG */
196
+
95
+ stl_p(p++, 0x02fffc0c); /* addi.d $t0, $r0, -1(0xfff) */
197
static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
96
+ stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */
198
{
97
+ stl_p(p++, 0x038011ad); /* ori $t1, $t1, CORE_EN_OFF */
199
CPULoongArchState *env = cpu_env(cs);
98
+ stl_p(p++, 0x064819ac); /* iocsrwr.w $t0, $t1 */
200
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
99
+ stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */
201
brk_insn = val;
100
+ stl_p(p++, 0x038081ad); /* ori $t1, $t1, CORE_BUF_20 */
202
}
101
+
203
102
+ /* Wait for wakeup <.L11>: */
204
+ ret = kvm_cpu_check_lsx(cs, &local_err);
103
+ stl_p(p++, 0x06488000); /* idle 0x0 */
205
+ if (ret < 0) {
104
+ stl_p(p++, 0x03400000); /* andi $zero, $zero, 0x0 */
206
+ error_report_err(local_err);
105
+ stl_p(p++, 0x064809ac); /* iocsrrd.w $t0, $t1 */
106
+ stl_p(p++, 0x43fff59f); /* beqz $t0, -12(0x7ffff4) # 48 <.L11> */
107
+
108
+ /* Read and clear IPI interrupt. */
109
+ stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */
110
+ stl_p(p++, 0x064809ac); /* iocsrrd.w $t0, $t1 */
111
+ stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */
112
+ stl_p(p++, 0x038031ad); /* ori $t1, $t1, CORE_CLEAR_OFF */
113
+ stl_p(p++, 0x064819ac); /* iocsrwr.w $t0, $t1 */
114
+
115
+ /* Disable IPI interrupt. */
116
+ stl_p(p++, 0x1400002c); /* lu12i.w $t0, 1(0x1) */
117
+ stl_p(p++, 0x04001180); /* csrxchg $zero, $t0, LOONGARCH_CSR_ECFG */
118
+
119
+ /* Read mail buf and jump to specified entry. */
120
+ stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */
121
+ stl_p(p++, 0x038081ad); /* ori $t1, $t1, CORE_BUF_20 */
122
+ if (is_64bit) {
123
+ stl_p(p++, 0x06480dac); /* iocsrrd.d $t0, $t1 */
124
+ } else {
125
+ stl_p(p++, 0x064809ac); /* iocsrrd.w $t0, $t1 */
126
+ }
207
+ }
127
+ stl_p(p++, 0x00150181); /* move $ra, $t0 */
208
+
128
+ stl_p(p++, 0x4c000020); /* jirl $zero, $ra, 0 */
209
ret = kvm_cpu_check_lbt(cs, &local_err);
129
+}
210
if (ret < 0) {
130
211
error_report_err(local_err);
131
static inline void *guidcpy(void *dst, const void *src)
132
{
133
@@ -XXX,XX +XXX,XX @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
134
135
/* Load slave boot code at pflash0 . */
136
void *boot_code = g_malloc0(VIRT_FLASH0_SIZE);
137
- memcpy(boot_code, &slave_boot_code, sizeof(slave_boot_code));
138
+ generate_secondary_boot_code(boot_code, is_la64(&lacpu->env));
139
rom_add_blob_fixed("boot_code", boot_code, VIRT_FLASH0_SIZE, VIRT_FLASH0_BASE);
140
141
CPU_FOREACH(cs) {
142
--
212
--
143
2.34.1
213
2.43.5
diff view generated by jsdifflib
1
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
1
Like LSX feature, add type OnOffAuto for LASX feature setting.
2
2
3
Refector EFI style booting data structure generation to
3
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
4
support 32bit EFI variant on LoongArch32 CPU.
4
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
5
---
6
target/loongarch/cpu.c | 50 +++++++++++++++++++++++------------
7
target/loongarch/cpu.h | 2 ++
8
target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++
9
3 files changed, 89 insertions(+), 16 deletions(-)
5
10
6
All data structs are filled with padding members if necessary
11
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
7
and marked as QEMU_PACKED to avoid host ABI alignment impact.
8
9
Host endian is being cared as well.
10
11
It also fixed various problems in old implementation such
12
as null pointer on empty string, memory desc map_size not set,
13
incorrect memory map definition and so on.
14
15
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
16
Reviewed-by: Song Gao <gaosong@loongson.cn>
17
Message-Id: <20240914-loongarch-booting-v1-1-1517cae11c10@flygoat.com>
18
Signed-off-by: Song Gao <gaosong@loongson.cn>
19
---
20
hw/loongarch/boot.c | 220 ++++++++++++++++++++++++------------
21
include/hw/loongarch/boot.h | 106 +++++++++++++----
22
2 files changed, 237 insertions(+), 89 deletions(-)
23
24
diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
25
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
26
--- a/hw/loongarch/boot.c
13
--- a/target/loongarch/cpu.c
27
+++ b/hw/loongarch/boot.c
14
+++ b/target/loongarch/cpu.c
28
@@ -XXX,XX +XXX,XX @@
15
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
29
* Copyright (c) 2023 Loongson Technology Corporation Limited
16
uint32_t val;
30
*/
17
31
18
cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
32
+#include <zlib.h>
19
+ if (cpu->lsx == ON_OFF_AUTO_OFF) {
33
#include "qemu/osdep.h"
20
+ cpu->lasx = ON_OFF_AUTO_OFF;
34
#include "qemu/units.h"
21
+ if (cpu->lasx == ON_OFF_AUTO_ON) {
35
#include "target/loongarch/cpu.h"
22
+ error_setg(errp, "Failed to disable LSX since LASX is enabled");
36
@@ -XXX,XX +XXX,XX @@ static const unsigned int slave_boot_code[] = {
23
+ return;
37
24
+ }
38
/* Clear mailbox. */
25
+ }
39
0x1400002d, /* lu12i.w $t1, 1(0x1) */
26
+
40
- 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */
27
if (kvm_enabled()) {
41
+ 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */
28
/* kvm feature detection in function kvm_arch_init_vcpu */
42
0x06481da0, /* iocsrwr.d $zero, $t1 */
29
return;
43
30
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
44
/* Enable IPI interrupt. */
31
error_setg(errp, "Failed to enable LSX in TCG mode");
45
@@ -XXX,XX +XXX,XX @@ static inline void *guidcpy(void *dst, const void *src)
32
return;
46
return memcpy(dst, src, sizeof(efi_guid_t));
33
}
34
+ } else {
35
+ cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0);
36
+ val = cpu->env.cpucfg[2];
37
}
38
39
cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
40
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
41
42
static bool loongarch_get_lasx(Object *obj, Error **errp)
43
{
44
- LoongArchCPU *cpu = LOONGARCH_CPU(obj);
45
- bool ret;
46
-
47
- if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
48
- ret = true;
49
- } else {
50
- ret = false;
51
- }
52
- return ret;
53
+ return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF;
47
}
54
}
48
55
49
-static void init_efi_boot_memmap(struct efi_system_table *systab,
56
static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
50
- void *p, void *start)
51
+static void efi_hdr_crc32(efi_table_hdr_t *hdr)
52
{
57
{
53
- unsigned i;
58
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
54
- struct efi_boot_memmap *boot_memmap = p;
55
- efi_guid_t tbl_guid = LINUX_EFI_BOOT_MEMMAP_GUID;
56
-
57
- /* efi_configuration_table 1 */
58
- guidcpy(&systab->tables[0].guid, &tbl_guid);
59
- systab->tables[0].table = (struct efi_configuration_table *)(p - start);
60
- systab->nr_tables = 1;
61
-
62
- boot_memmap->desc_size = sizeof(efi_memory_desc_t);
63
- boot_memmap->desc_ver = 1;
64
- boot_memmap->map_size = 0;
65
+ uint32_t val;
59
+ uint32_t val;
66
60
67
- efi_memory_desc_t *map = p + sizeof(struct efi_boot_memmap);
61
- if (value) {
68
- for (i = 0; i < memmap_entries; i++) {
62
-    if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
69
- map = (void *)boot_memmap + sizeof(*map);
63
- cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
70
- map[i].type = memmap_table[i].type;
64
-    }
71
- map[i].phys_addr = ROUND_UP(memmap_table[i].address, 64 * KiB);
65
- cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
72
- map[i].num_pages = ROUND_DOWN(memmap_table[i].address +
66
- } else {
73
- memmap_table[i].length - map[i].phys_addr, 64 * KiB);
67
- cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
74
- p += sizeof(efi_memory_desc_t);
68
+ cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
75
- }
69
+ if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) {
76
+ hdr->crc32 = 0;
70
+ error_setg(errp, "Failed to enable LASX since lSX is disabled");
77
+ val = crc32(0, (const unsigned char *)hdr, hdr->headersize);
71
+ return;
78
+ hdr->crc32 = cpu_to_le32(val);
72
+ }
73
+
74
+ if (kvm_enabled()) {
75
+ /* kvm feature detection in function kvm_arch_init_vcpu */
76
+ return;
77
}
78
+
79
+ /* LASX feature detection in TCG mode */
80
+ val = cpu->env.cpucfg[2];
81
+ if (cpu->lasx == ON_OFF_AUTO_ON) {
82
+ if (FIELD_EX32(val, CPUCFG2, LASX) == 0) {
83
+ error_setg(errp, "Failed to enable LASX in TCG mode");
84
+ return;
85
+ }
86
+ }
87
+
88
+ cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
79
}
89
}
80
90
81
-static void init_efi_initrd_table(struct efi_system_table *systab,
91
static bool loongarch_get_lbt(Object *obj, Error **errp)
82
- void *p, void *start)
92
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
83
+static void init_efi_vendor_string(void **p)
93
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
94
95
cpu->lsx = ON_OFF_AUTO_AUTO;
96
+ cpu->lasx = ON_OFF_AUTO_AUTO;
97
object_property_add_bool(obj, "lsx", loongarch_get_lsx,
98
loongarch_set_lsx);
99
object_property_add_bool(obj, "lasx", loongarch_get_lasx,
100
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
101
index XXXXXXX..XXXXXXX 100644
102
--- a/target/loongarch/cpu.h
103
+++ b/target/loongarch/cpu.h
104
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
105
106
enum loongarch_features {
107
LOONGARCH_FEATURE_LSX,
108
+ LOONGARCH_FEATURE_LASX,
109
LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
110
LOONGARCH_FEATURE_PMU,
111
};
112
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
113
OnOffAuto lbt;
114
OnOffAuto pmu;
115
OnOffAuto lsx;
116
+ OnOffAuto lasx;
117
118
/* 'compatible' string for this CPU for Linux device trees */
119
const char *dtb_compatible;
120
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
121
index XXXXXXX..XXXXXXX 100644
122
--- a/target/loongarch/kvm/kvm.c
123
+++ b/target/loongarch/kvm/kvm.c
124
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
125
}
126
return false;
127
128
+ case LOONGARCH_FEATURE_LASX:
129
+ attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
130
+ attr.attr = KVM_LOONGARCH_VM_FEAT_LASX;
131
+ ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
132
+ if (ret == 0) {
133
+ return true;
134
+ }
135
+
136
+ /* Fallback to old kernel detect interface */
137
+ val = 0;
138
+ attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
139
+ /* Cpucfg2 */
140
+ attr.attr = 2;
141
+ attr.addr = (uint64_t)&val;
142
+ ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
143
+ if (!ret) {
144
+ ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
145
+ if (ret) {
146
+ return false;
147
+ }
148
+
149
+ ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX);
150
+ return (ret != 0);
151
+ }
152
+ return false;
153
+
154
case LOONGARCH_FEATURE_LBT:
155
/*
156
* Return all if all the LBT features are supported such as:
157
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
158
return 0;
159
}
160
161
+static int kvm_cpu_check_lasx(CPUState *cs, Error **errp)
162
+{
163
+ CPULoongArchState *env = cpu_env(cs);
164
+ LoongArchCPU *cpu = LOONGARCH_CPU(cs);
165
+ bool kvm_supported;
166
+
167
+ kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX);
168
+ env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0);
169
+ if (cpu->lasx == ON_OFF_AUTO_ON) {
170
+ if (kvm_supported) {
171
+ env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
172
+ } else {
173
+ error_setg(errp, "'lasx' feature not supported by KVM on host");
174
+ return -ENOTSUP;
175
+ }
176
+ } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) {
177
+ env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
178
+ }
179
+
180
+ return 0;
181
+}
182
+
183
static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
84
{
184
{
85
- efi_guid_t tbl_guid = LINUX_EFI_INITRD_MEDIA_GUID;
185
CPULoongArchState *env = cpu_env(cs);
86
- struct efi_initrd *initrd_table = p;
186
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
87
+ uint16_t *vendor_str = *p;
187
error_report_err(local_err);
88
188
}
89
- /* efi_configuration_table 2 */
189
90
- guidcpy(&systab->tables[1].guid, &tbl_guid);
190
+ ret = kvm_cpu_check_lasx(cs, &local_err);
91
- systab->tables[1].table = (struct efi_configuration_table *)(p - start);
191
+ if (ret < 0) {
92
- systab->nr_tables = 2;
192
+ error_report_err(local_err);
93
+ /* QEMU in UTF16-LE */
193
+ }
94
+ stw_le_p(vendor_str++, 0x0051); /* Q */
95
+ stw_le_p(vendor_str++, 0x0045); /* E */
96
+ stw_le_p(vendor_str++, 0x004D); /* M */
97
+ stw_le_p(vendor_str++, 0x0055); /* U */
98
+ stw_le_p(vendor_str++, 0x0000); /* \0 */
99
100
- initrd_table->base = initrd_offset;
101
- initrd_table->size = initrd_size;
102
+ *p = vendor_str;
103
+ *p = QEMU_ALIGN_PTR_UP(*p, sizeof(target_long));
104
}
105
106
-static void init_efi_fdt_table(struct efi_system_table *systab)
107
+static void memmap_write_descs(efi_memory_desc_t *map)
108
{
109
- efi_guid_t tbl_guid = DEVICE_TREE_GUID;
110
-
111
- /* efi_configuration_table 3 */
112
- guidcpy(&systab->tables[2].guid, &tbl_guid);
113
- systab->tables[2].table = (void *)FDT_BASE;
114
- systab->nr_tables = 3;
115
-}
116
-
117
-static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
118
-{
119
- void *bp_tables_start;
120
- struct efi_system_table *systab = p;
121
+ int i;
122
123
- info->a2 = p - start;
124
+ for (i = 0; i < memmap_entries; i++) {
125
+ uint32_t efi_type;
126
+ hwaddr start = memmap_table[i].address;
127
+ hwaddr end = memmap_table[i].address + memmap_table[i].length;
128
+
194
+
129
+ switch (memmap_table[i].type) {
195
ret = kvm_cpu_check_lbt(cs, &local_err);
130
+ case MEMMAP_TYPE_MEMORY:
196
if (ret < 0) {
131
+ efi_type = EFI_CONVENTIONAL_MEMORY;
197
error_report_err(local_err);
132
+ break;
133
+ case MEMMAP_TYPE_RESERVED:
134
+ efi_type = EFI_RESERVED_TYPE;
135
+ break;
136
+ case MEMMAP_TYPE_ACPI:
137
+ efi_type = EFI_ACPI_RECLAIM_MEMORY;
138
+ break;
139
+ case MEMMAP_TYPE_NVS:
140
+ efi_type = EFI_ACPI_MEMORY_NVS;
141
+ break;
142
+ default:
143
+ efi_type = EFI_RESERVED_TYPE;
144
+ break;
145
+ }
146
147
- systab->hdr.signature = EFI_SYSTEM_TABLE_SIGNATURE;
148
- systab->hdr.revision = EFI_SPECIFICATION_VERSION;
149
- systab->hdr.revision = sizeof(struct efi_system_table),
150
- systab->fw_revision = FW_VERSION << 16 | FW_PATCHLEVEL << 8;
151
- systab->runtime = 0;
152
- systab->boottime = 0;
153
- systab->nr_tables = 0;
154
+ if (memmap_table[i].reserved) {
155
+ start = QEMU_ALIGN_DOWN(start, EFI_PAGE_SIZE);
156
+ end = QEMU_ALIGN_UP(end, EFI_PAGE_SIZE);
157
+ } else {
158
+ start = QEMU_ALIGN_UP(start, EFI_PAGE_SIZE);
159
+ end = QEMU_ALIGN_DOWN(end, EFI_PAGE_SIZE);
160
+ }
161
162
- p += ROUND_UP(sizeof(struct efi_system_table), 64 * KiB);
163
+ map[i].type = cpu_to_le32(efi_type);
164
+ map[i].phys_addr = cpu_to_le64(start);
165
+ map[i].virt_addr = cpu_to_le64(start);
166
+ map[i].num_pages = cpu_to_le64((end - start) >> EFI_PAGE_SHIFT);
167
+ }
168
+}
169
170
- systab->tables = p;
171
- bp_tables_start = p;
172
+#define EFI_BOOT_MEMMAP_TABLE_GEN(type) \
173
+static void init_efi_boot_memmap_##type(void *guidp, void **p) \
174
+{ \
175
+ struct efi_boot_memmap_##type *boot_memmap = *p; \
176
+ efi_guid_t tbl_guid = LINUX_EFI_BOOT_MEMMAP_GUID; \
177
+ \
178
+ /* efi_configuration_table 1 */ \
179
+ guidcpy(guidp, &tbl_guid); \
180
+ \
181
+ boot_memmap->desc_size = cpu_to_le##type(sizeof(efi_memory_desc_t)); \
182
+ boot_memmap->desc_ver = cpu_to_le32(1); \
183
+ boot_memmap->map_size = cpu_to_le##type(boot_memmap->desc_size * \
184
+ memmap_entries); \
185
+ memmap_write_descs(boot_memmap->map); \
186
+ *p += sizeof(struct efi_boot_memmap_##type); \
187
+}
188
189
- init_efi_boot_memmap(systab, p, start);
190
- p += ROUND_UP(sizeof(struct efi_boot_memmap) +
191
- sizeof(efi_memory_desc_t) * memmap_entries, 64 * KiB);
192
- init_efi_initrd_table(systab, p, start);
193
- p += ROUND_UP(sizeof(struct efi_initrd), 64 * KiB);
194
- init_efi_fdt_table(systab);
195
+#define EFI_INITRD_TABLE_GEN(type) \
196
+static void init_efi_initrd_table_##type(void *guidp, void **p) \
197
+{ \
198
+ efi_guid_t tbl_guid = LINUX_EFI_INITRD_MEDIA_GUID; \
199
+ struct efi_initrd_##type *initrd_table = *p; \
200
+ \
201
+ /* efi_configuration_table */ \
202
+ guidcpy(guidp, &tbl_guid); \
203
+ \
204
+ initrd_table->base = cpu_to_le##type(initrd_offset); \
205
+ initrd_table->size = cpu_to_le##type(initrd_size); \
206
+ *p += sizeof(struct efi_initrd_##type); \
207
+}
208
209
- systab->tables = (struct efi_configuration_table *)(bp_tables_start - start);
210
+#define BOOTP_ALIGN_PTR_UP(p, s, n) \
211
+ ((typeof(p))((uintptr_t)(s) + \
212
+ QEMU_ALIGN_UP((uintptr_t)(p) - (uintptr_t)(s), n)))
213
+
214
+#define EFI_INIT_SYSTAB_GEN(type) \
215
+ EFI_BOOT_MEMMAP_TABLE_GEN(type) \
216
+ EFI_INITRD_TABLE_GEN(type) \
217
+static void init_systab_##type(struct loongarch_boot_info *info, \
218
+ void *p, void *start) \
219
+{ \
220
+ uint32_t nr_tables = 0; \
221
+ const efi_guid_t fdt_guid = DEVICE_TREE_GUID; \
222
+ struct efi_system_table_##type *systab; \
223
+ struct efi_configuration_table_##type *cfg_tabs; \
224
+ \
225
+ p = BOOTP_ALIGN_PTR_UP(p, start, EFI_TABLE_ALIGN); \
226
+ systab = p; \
227
+ info->a2 = p - start; \
228
+ \
229
+ systab->hdr.signature = cpu_to_le64(EFI_SYSTEM_TABLE_SIGNATURE); \
230
+ systab->hdr.revision = cpu_to_le32(EFI_SPECIFICATION_VERSION); \
231
+ systab->hdr.headersize = \
232
+ cpu_to_le32(sizeof(struct efi_system_table_##type)); \
233
+ systab->fw_revision = \
234
+ cpu_to_le32(FW_VERSION << 16 | FW_PATCHLEVEL << 8); \
235
+ systab->runtime = 0; \
236
+ systab->boottime = 0; \
237
+ systab->nr_tables = 0; \
238
+ \
239
+ p += sizeof(struct efi_system_table_##type); \
240
+ systab->fw_vendor = cpu_to_le##type(p - start); \
241
+ init_efi_vendor_string(&p); \
242
+ \
243
+ p = BOOTP_ALIGN_PTR_UP(p, start, EFI_TABLE_ALIGN); \
244
+ systab->tables = cpu_to_le##type(p - start); \
245
+ cfg_tabs = p; \
246
+ p += sizeof(struct efi_configuration_table_##type) * 3; \
247
+ \
248
+ p = BOOTP_ALIGN_PTR_UP(p, start, EFI_TABLE_ALIGN); \
249
+ cfg_tabs[nr_tables].table = cpu_to_le##type(p - start); \
250
+ init_efi_boot_memmap_##type(&cfg_tabs[nr_tables].guid, &p); \
251
+ nr_tables++; \
252
+ \
253
+ if (initrd_size > 0) { \
254
+ cfg_tabs[nr_tables].table = cpu_to_le##type(p - start); \
255
+ init_efi_initrd_table_##type(&cfg_tabs[nr_tables].guid, &p); \
256
+ nr_tables++; \
257
+ } \
258
+ \
259
+ guidcpy(&cfg_tabs[nr_tables].guid, &fdt_guid); \
260
+ cfg_tabs[nr_tables].table = cpu_to_le##type(FDT_BASE); \
261
+ nr_tables++; \
262
+ \
263
+ systab->nr_tables = cpu_to_le32(nr_tables); \
264
+ efi_hdr_crc32(&systab->hdr); \
265
}
266
267
+EFI_INIT_SYSTAB_GEN(32)
268
+EFI_INIT_SYSTAB_GEN(64)
269
+
270
static void init_cmdline(struct loongarch_boot_info *info, void *p, void *start)
271
{
272
hwaddr cmdline_addr = p - start;
273
@@ -XXX,XX +XXX,XX @@ static void reset_load_elf(void *opaque)
274
275
cpu_reset(CPU(cpu));
276
if (env->load_elf) {
277
-    if (cpu == LOONGARCH_CPU(first_cpu)) {
278
+ if (cpu == LOONGARCH_CPU(first_cpu)) {
279
env->gpr[4] = env->boot_info->a0;
280
env->gpr[5] = env->boot_info->a1;
281
env->gpr[6] = env->boot_info->a2;
282
@@ -XXX,XX +XXX,XX @@ static void loongarch_firmware_boot(LoongArchVirtMachineState *lvms,
283
fw_cfg_add_kernel_info(info, lvms->fw_cfg);
284
}
285
286
-static void init_boot_rom(struct loongarch_boot_info *info, void *p)
287
+static void init_boot_rom(struct loongarch_boot_info *info, void *p,
288
+ bool is_64bit)
289
{
290
void *start = p;
291
292
init_cmdline(info, p, start);
293
p += COMMAND_LINE_SIZE;
294
295
- init_systab(info, p, start);
296
+ if (is_64bit)
297
+ init_systab_64(info, p, start);
298
+ else
299
+ init_systab_32(info, p, start);
300
}
301
302
static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
303
{
304
void *p, *bp;
305
int64_t kernel_addr = 0;
306
- LoongArchCPU *lacpu;
307
+ LoongArchCPU *lacpu = LOONGARCH_CPU(first_cpu);
308
CPUState *cs;
309
310
if (info->kernel_filename) {
311
@@ -XXX,XX +XXX,XX @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
312
/* Load cmdline and system tables at [0 - 1 MiB] */
313
p = g_malloc0(1 * MiB);
314
bp = p;
315
- init_boot_rom(info, p);
316
+ init_boot_rom(info, p, is_la64(&lacpu->env));
317
rom_add_blob_fixed_as("boot_info", bp, 1 * MiB, 0, &address_space_memory);
318
319
/* Load slave boot code at pflash0 . */
320
diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
321
index XXXXXXX..XXXXXXX 100644
322
--- a/include/hw/loongarch/boot.h
323
+++ b/include/hw/loongarch/boot.h
324
@@ -XXX,XX +XXX,XX @@ typedef struct {
325
EFI_GUID(0xb1b621d5, 0xf19c, 0x41a5, 0x83, 0x0b, \
326
0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0)
327
328
+/* Memory types: */
329
+#define EFI_RESERVED_TYPE 0
330
+#define EFI_LOADER_CODE 1
331
+#define EFI_LOADER_DATA 2
332
+#define EFI_BOOT_SERVICES_CODE 3
333
+#define EFI_BOOT_SERVICES_DATA 4
334
+#define EFI_RUNTIME_SERVICES_CODE 5
335
+#define EFI_RUNTIME_SERVICES_DATA 6
336
+#define EFI_CONVENTIONAL_MEMORY 7
337
+#define EFI_UNUSABLE_MEMORY 8
338
+#define EFI_ACPI_RECLAIM_MEMORY 9
339
+#define EFI_ACPI_MEMORY_NVS 10
340
+#define EFI_MEMORY_MAPPED_IO 11
341
+#define EFI_MEMORY_MAPPED_IO_PORT_SPACE 12
342
+#define EFI_PAL_CODE 13
343
+#define EFI_PERSISTENT_MEMORY 14
344
+#define EFI_UNACCEPTED_MEMORY 15
345
+#define EFI_MAX_MEMORY_TYPE 16
346
+
347
+#define EFI_PAGE_SHIFT 12
348
+#define EFI_PAGE_SIZE (1UL << EFI_PAGE_SHIFT)
349
+
350
+#define EFI_TABLE_ALIGN (64 * KiB)
351
+
352
struct efi_config_table {
353
efi_guid_t guid;
354
uint64_t *ptr;
355
const char name[16];
356
-};
357
+} QEMU_PACKED;
358
359
typedef struct {
360
uint64_t signature;
361
@@ -XXX,XX +XXX,XX @@ typedef struct {
362
uint32_t headersize;
363
uint32_t crc32;
364
uint32_t reserved;
365
-} efi_table_hdr_t;
366
+} QEMU_PACKED efi_table_hdr_t;
367
368
-struct efi_configuration_table {
369
+struct efi_configuration_table_32 {
370
efi_guid_t guid;
371
- void *table;
372
-};
373
+ uint32_t table;
374
+} QEMU_PACKED;
375
376
-struct efi_system_table {
377
+struct efi_configuration_table_64 {
378
+ efi_guid_t guid;
379
+ uint64_t table;
380
+} QEMU_PACKED;
381
+
382
+struct efi_system_table_32 {
383
+ efi_table_hdr_t hdr;
384
+ uint32_t fw_vendor; /* physical addr of CHAR16 vendor string */
385
+ uint32_t fw_revision;
386
+ uint32_t con_in_handle;
387
+ uint32_t con_in;
388
+ uint32_t con_out_handle;
389
+ uint32_t con_out;
390
+ uint32_t stderr_handle;
391
+ uint32_t stderr_placeholder;
392
+ uint32_t runtime;
393
+ uint32_t boottime;
394
+ uint32_t nr_tables;
395
+ uint32_t tables;
396
+} QEMU_PACKED;
397
+
398
+struct efi_system_table_64 {
399
efi_table_hdr_t hdr;
400
uint64_t fw_vendor; /* physical addr of CHAR16 vendor string */
401
uint32_t fw_revision;
402
+ uint32_t __pad1;
403
uint64_t con_in_handle;
404
- uint64_t *con_in;
405
+ uint64_t con_in;
406
uint64_t con_out_handle;
407
- uint64_t *con_out;
408
+ uint64_t con_out;
409
uint64_t stderr_handle;
410
uint64_t stderr_placeholder;
411
- uint64_t *runtime;
412
- uint64_t *boottime;
413
- uint64_t nr_tables;
414
- struct efi_configuration_table *tables;
415
-};
416
+ uint64_t runtime;
417
+ uint64_t boottime;
418
+ uint32_t nr_tables;
419
+ uint32_t __pad2;
420
+ uint64_t tables;
421
+} QEMU_PACKED;
422
423
typedef struct {
424
uint32_t type;
425
- uint32_t pad;
426
+ uint32_t __pad;
427
uint64_t phys_addr;
428
uint64_t virt_addr;
429
uint64_t num_pages;
430
uint64_t attribute;
431
-} efi_memory_desc_t;
432
+} QEMU_PACKED efi_memory_desc_t;
433
+
434
+struct efi_boot_memmap_32 {
435
+ uint32_t map_size;
436
+ uint32_t desc_size;
437
+ uint32_t desc_ver;
438
+ uint32_t map_key;
439
+ uint32_t buff_size;
440
+ uint32_t __pad;
441
+ efi_memory_desc_t map[32];
442
+} QEMU_PACKED;
443
444
-struct efi_boot_memmap {
445
+struct efi_boot_memmap_64 {
446
uint64_t map_size;
447
uint64_t desc_size;
448
uint32_t desc_ver;
449
+ uint32_t __pad;
450
uint64_t map_key;
451
uint64_t buff_size;
452
efi_memory_desc_t map[32];
453
-};
454
+} QEMU_PACKED;
455
+
456
+struct efi_initrd_32 {
457
+ uint32_t base;
458
+ uint32_t size;
459
+} QEMU_PACKED;
460
461
-struct efi_initrd {
462
+struct efi_initrd_64 {
463
uint64_t base;
464
uint64_t size;
465
-};
466
+} QEMU_PACKED;
467
468
struct loongarch_boot_info {
469
uint64_t ram_size;
470
@@ -XXX,XX +XXX,XX @@ extern unsigned memmap_entries;
471
struct memmap_entry {
472
uint64_t address;
473
uint64_t length;
474
+ /* E820 style type */
475
+#define MEMMAP_TYPE_MEMORY 1
476
+#define MEMMAP_TYPE_RESERVED 2
477
+#define MEMMAP_TYPE_ACPI 3
478
+#define MEMMAP_TYPE_NVS 4
479
uint32_t type;
480
uint32_t reserved;
481
};
482
--
198
--
483
2.34.1
199
2.43.5
diff view generated by jsdifflib
Deleted patch
1
From: Bibo Mao <maobibo@loongson.cn>
2
1
3
Variable env->cf[i] is defined as bool type, it is treated as int type
4
with shift operation. However the max possible width is 56 for the shift
5
operation, exceeding the width of int type. And there is existing api
6
read_fcc() which is converted to u64 type with bitwise shift, it can be
7
used to dump fp registers into coredump note segment.
8
9
Resolves: Coverity CID 1561133
10
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
11
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
12
Message-Id: <20240914064645.2099169-1-maobibo@loongson.cn>
13
Signed-off-by: Song Gao <gaosong@loongson.cn>
14
---
15
target/loongarch/arch_dump.c | 6 +-----
16
1 file changed, 1 insertion(+), 5 deletions(-)
17
18
diff --git a/target/loongarch/arch_dump.c b/target/loongarch/arch_dump.c
19
index XXXXXXX..XXXXXXX 100644
20
--- a/target/loongarch/arch_dump.c
21
+++ b/target/loongarch/arch_dump.c
22
@@ -XXX,XX +XXX,XX @@ static int loongarch_write_elf64_fprpreg(WriteCoreDumpFunction f,
23
24
loongarch_note_init(&note, s, "CORE", 5, NT_PRFPREG, sizeof(note.fpu));
25
note.fpu.fcsr = cpu_to_dump64(s, env->fcsr0);
26
-
27
- for (i = 0; i < 8; i++) {
28
- note.fpu.fcc |= env->cf[i] << (8 * i);
29
- }
30
- note.fpu.fcc = cpu_to_dump64(s, note.fpu.fcc);
31
+ note.fpu.fcc = cpu_to_dump64(s, read_fcc(env));
32
33
for (i = 0; i < 32; ++i) {
34
note.fpu.fpr[i] = cpu_to_dump64(s, env->fpr[i].vreg.UD[0]);
35
--
36
2.34.1
diff view generated by jsdifflib