Add test case to test GPIO output and input pins from A0 to D7 for AST2700.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/qtest/aspeed_gpio-test.c | 64 ++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/tests/qtest/aspeed_gpio-test.c b/tests/qtest/aspeed_gpio-test.c
index d38f51d719..8ae42a8da5 100644
--- a/tests/qtest/aspeed_gpio-test.c
+++ b/tests/qtest/aspeed_gpio-test.c
@@ -33,6 +33,10 @@
#define GPIO_ABCD_DATA_VALUE 0x000
#define GPIO_ABCD_DIRECTION 0x004
+/* AST2700 */
+#define AST2700_GPIO_BASE 0x14C0B000
+#define GPIOA0_CONTROL 0x180
+
static void test_set_colocated_pins(const void *data)
{
QTestState *s = (QTestState *)data;
@@ -72,6 +76,61 @@ static void test_set_input_pins(const void *data)
g_assert_cmphex(value, ==, 0xffffffff);
}
+static void test_2700_output_pins(const void *data)
+{
+ QTestState *s = (QTestState *)data;
+ uint32_t offset = 0;
+ uint32_t value = 0;
+ uint32_t pin = 0;
+
+ for (char c = 'A'; c <= 'D'; c++) {
+ for (int i = 0; i < 8; i++) {
+ offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
+
+ /* output direction and output hi */
+ qtest_writel(s, offset, 0x00000003);
+ value = qtest_readl(s, offset);
+ g_assert_cmphex(value, ==, 0x00000003);
+
+ /* output direction and output low */
+ qtest_writel(s, offset, 0x00000002);
+ value = qtest_readl(s, offset);
+ g_assert_cmphex(value, ==, 0x00000002);
+ pin++;
+ }
+ }
+}
+
+static void test_2700_input_pins(const void *data)
+{
+ QTestState *s = (QTestState *)data;
+ char name[16];
+ uint32_t offset = 0;
+ uint32_t value = 0;
+ uint32_t pin = 0;
+
+ for (char c = 'A'; c <= 'D'; c++) {
+ for (int i = 0; i < 8; i++) {
+ sprintf(name, "gpio%c%d", c, i);
+ offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
+ /* input direction */
+ qtest_writel(s, offset, 0);
+
+ /* set input */
+ qtest_qom_set_bool(s, "/machine/soc/gpio", name, true);
+ value = qtest_readl(s, offset);
+ g_assert_cmphex(value, ==, 0x00002000);
+
+ /* clear input */
+ qtest_qom_set_bool(s, "/machine/soc/gpio", name, false);
+ value = qtest_readl(s, offset);
+ g_assert_cmphex(value, ==, 0);
+ pin++;
+ }
+ }
+}
+
+
int main(int argc, char **argv)
{
QTestState *s;
@@ -83,6 +142,11 @@ int main(int argc, char **argv)
qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
test_set_colocated_pins);
qtest_add_data_func("/ast2600/gpio/set_input_pins", s, test_set_input_pins);
+
+ s = qtest_init("-machine ast2700-evb");
+ qtest_add_data_func("/ast2700/gpio/input_pins", s, test_2700_input_pins);
+ qtest_add_data_func("/ast2700/gpio/out_pins", s, test_2700_output_pins);
+
r = g_test_run();
qtest_quit(s);
--
2.34.1
Hi Cedric,
> Subject: [PATCH v4 7/7] hw/gpio/aspeed: Add test case for AST2700
>
> Add test case to test GPIO output and input pins from A0 to D7 for AST2700.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> tests/qtest/aspeed_gpio-test.c | 64 ++++++++++++++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/tests/qtest/aspeed_gpio-test.c b/tests/qtest/aspeed_gpio-test.c
> index d38f51d719..8ae42a8da5 100644
> --- a/tests/qtest/aspeed_gpio-test.c
> +++ b/tests/qtest/aspeed_gpio-test.c
> @@ -33,6 +33,10 @@
> #define GPIO_ABCD_DATA_VALUE 0x000
> #define GPIO_ABCD_DIRECTION 0x004
>
> +/* AST2700 */
> +#define AST2700_GPIO_BASE 0x14C0B000
> +#define GPIOA0_CONTROL 0x180
> +
> static void test_set_colocated_pins(const void *data) {
> QTestState *s = (QTestState *)data; @@ -72,6 +76,61 @@ static void
> test_set_input_pins(const void *data)
> g_assert_cmphex(value, ==, 0xffffffff); }
>
> +static void test_2700_output_pins(const void *data) {
> + QTestState *s = (QTestState *)data;
> + uint32_t offset = 0;
> + uint32_t value = 0;
> + uint32_t pin = 0;
> +
> + for (char c = 'A'; c <= 'D'; c++) {
> + for (int i = 0; i < 8; i++) {
> + offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
> +
> + /* output direction and output hi */
> + qtest_writel(s, offset, 0x00000003);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0x00000003);
> +
> + /* output direction and output low */
> + qtest_writel(s, offset, 0x00000002);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0x00000002);
> + pin++;
> + }
> + }
> +}
> +
> +static void test_2700_input_pins(const void *data) {
> + QTestState *s = (QTestState *)data;
> + char name[16];
> + uint32_t offset = 0;
> + uint32_t value = 0;
> + uint32_t pin = 0;
> +
> + for (char c = 'A'; c <= 'D'; c++) {
> + for (int i = 0; i < 8; i++) {
> + sprintf(name, "gpio%c%d", c, i);
> + offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
> + /* input direction */
> + qtest_writel(s, offset, 0);
> +
> + /* set input */
> + qtest_qom_set_bool(s, "/machine/soc/gpio", name, true);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0x00002000);
> +
> + /* clear input */
> + qtest_qom_set_bool(s, "/machine/soc/gpio", name, false);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0);
> + pin++;
> + }
> + }
> +}
> +
> +
> int main(int argc, char **argv)
> {
> QTestState *s;
> @@ -83,6 +142,11 @@ int main(int argc, char **argv)
> qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
> test_set_colocated_pins);
> qtest_add_data_func("/ast2600/gpio/set_input_pins", s,
> test_set_input_pins);
> +
> + s = qtest_init("-machine ast2700-evb");
> + qtest_add_data_func("/ast2700/gpio/input_pins", s,
> test_2700_input_pins);
> + qtest_add_data_func("/ast2700/gpio/out_pins", s,
> + test_2700_output_pins);
> +
> r = g_test_run();
> qtest_quit(s);
>
It seems I need to check arch for AST2700 to fix the following errors.
int main(int argc, char **argv)
{
const char *arch = qtest_get_arch();
QTestState *s;
int r;
g_test_init(&argc, &argv, NULL);
s = qtest_init("-machine ast2600-evb");
qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
test_set_colocated_pins);
qtest_add_data_func("/ast2600/gpio/set_input_pins", s, test_set_input_pins);
if (strcmp(arch, "aarch64") == 0) {
s = qtest_init("-machine ast2700-evb");
qtest_add_data_func("/ast2700/gpio/input_pins",
s, test_2700_input_pins);
qtest_add_data_func("/ast2700/gpio/out_pins", s, test_2700_output_pins);
}
r = g_test_run();
qtest_quit(s);
return r;
}
qemu-system-arm: unsupported machine type: "ast2700-evb"
Use -machine help to list supported machines
> --
> 2.34.1
On 27/09/2024 10.12, Jamin Lin wrote:
> Hi Cedric,
>
>> Subject: [PATCH v4 7/7] hw/gpio/aspeed: Add test case for AST2700
>>
>> Add test case to test GPIO output and input pins from A0 to D7 for AST2700.
>>
>> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
>> ---
>> tests/qtest/aspeed_gpio-test.c | 64 ++++++++++++++++++++++++++++++++++
>> 1 file changed, 64 insertions(+)
>>
>> diff --git a/tests/qtest/aspeed_gpio-test.c b/tests/qtest/aspeed_gpio-test.c
>> index d38f51d719..8ae42a8da5 100644
>> --- a/tests/qtest/aspeed_gpio-test.c
>> +++ b/tests/qtest/aspeed_gpio-test.c
>> @@ -33,6 +33,10 @@
>> #define GPIO_ABCD_DATA_VALUE 0x000
>> #define GPIO_ABCD_DIRECTION 0x004
>>
>> +/* AST2700 */
>> +#define AST2700_GPIO_BASE 0x14C0B000
>> +#define GPIOA0_CONTROL 0x180
>> +
>> static void test_set_colocated_pins(const void *data) {
>> QTestState *s = (QTestState *)data; @@ -72,6 +76,61 @@ static void
>> test_set_input_pins(const void *data)
>> g_assert_cmphex(value, ==, 0xffffffff); }
>>
>> +static void test_2700_output_pins(const void *data) {
>> + QTestState *s = (QTestState *)data;
>> + uint32_t offset = 0;
>> + uint32_t value = 0;
>> + uint32_t pin = 0;
>> +
>> + for (char c = 'A'; c <= 'D'; c++) {
>> + for (int i = 0; i < 8; i++) {
>> + offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
>> +
>> + /* output direction and output hi */
>> + qtest_writel(s, offset, 0x00000003);
>> + value = qtest_readl(s, offset);
>> + g_assert_cmphex(value, ==, 0x00000003);
>> +
>> + /* output direction and output low */
>> + qtest_writel(s, offset, 0x00000002);
>> + value = qtest_readl(s, offset);
>> + g_assert_cmphex(value, ==, 0x00000002);
>> + pin++;
>> + }
>> + }
>> +}
>> +
>> +static void test_2700_input_pins(const void *data) {
>> + QTestState *s = (QTestState *)data;
>> + char name[16];
>> + uint32_t offset = 0;
>> + uint32_t value = 0;
>> + uint32_t pin = 0;
>> +
>> + for (char c = 'A'; c <= 'D'; c++) {
>> + for (int i = 0; i < 8; i++) {
>> + sprintf(name, "gpio%c%d", c, i);
>> + offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
>> + /* input direction */
>> + qtest_writel(s, offset, 0);
>> +
>> + /* set input */
>> + qtest_qom_set_bool(s, "/machine/soc/gpio", name, true);
>> + value = qtest_readl(s, offset);
>> + g_assert_cmphex(value, ==, 0x00002000);
>> +
>> + /* clear input */
>> + qtest_qom_set_bool(s, "/machine/soc/gpio", name, false);
>> + value = qtest_readl(s, offset);
>> + g_assert_cmphex(value, ==, 0);
>> + pin++;
>> + }
>> + }
>> +}
>> +
>> +
>> int main(int argc, char **argv)
>> {
>> QTestState *s;
>> @@ -83,6 +142,11 @@ int main(int argc, char **argv)
>> qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
>> test_set_colocated_pins);
>> qtest_add_data_func("/ast2600/gpio/set_input_pins", s,
>> test_set_input_pins);
>> +
>> + s = qtest_init("-machine ast2700-evb");
>> + qtest_add_data_func("/ast2700/gpio/input_pins", s,
>> test_2700_input_pins);
>> + qtest_add_data_func("/ast2700/gpio/out_pins", s,
>> + test_2700_output_pins);
>> +
>> r = g_test_run();
>> qtest_quit(s);
>>
> It seems I need to check arch for AST2700 to fix the following errors.
>
> int main(int argc, char **argv)
> {
> const char *arch = qtest_get_arch();
> QTestState *s;
> int r;
>
> g_test_init(&argc, &argv, NULL);
>
> s = qtest_init("-machine ast2600-evb");
> qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
> test_set_colocated_pins);
> qtest_add_data_func("/ast2600/gpio/set_input_pins", s, test_set_input_pins);
>
> if (strcmp(arch, "aarch64") == 0) {
> s = qtest_init("-machine ast2700-evb");
> qtest_add_data_func("/ast2700/gpio/input_pins",
> s, test_2700_input_pins);
> qtest_add_data_func("/ast2700/gpio/out_pins", s, test_2700_output_pins);
> }
>
> r = g_test_run();
> qtest_quit(s);
>
> return r;
> }
>
> qemu-system-arm: unsupported machine type: "ast2700-evb"
> Use -machine help to list supported machines
If ast2700 is aarch64 only, you rather might need to put the test into a
separate file, since aspeed_gpio-test.c is for the 32-bit arm machines only,
isn't it? (see tests/qtest/meson.build)
Thomas
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