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[PATCH 11/17] tests/tcg: only read/write 64 bit words on 64 bit systems

Alex Bennée posted 17 patches 2 months, 1 week ago
There is a newer version of this series
[PATCH 11/17] tests/tcg: only read/write 64 bit words on 64 bit systems
Posted by Alex Bennée 2 months, 1 week ago 
While the compilers will generally happily synthesise a 64 bit value
for you on 32 bit systems it doesn't exercise anything on QEMU. It
also makes it hard to accurately compare the accesses to test_data
when instrumenting.

Message-Id: <20240910140733.4007719-21-alex.bennee@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/multiarch/system/memory.c | 26 +++++++++++++++++++-------
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/tests/tcg/multiarch/system/memory.c b/tests/tcg/multiarch/system/memory.c
index 8f2371975d..680dd4800b 100644
--- a/tests/tcg/multiarch/system/memory.c
+++ b/tests/tcg/multiarch/system/memory.c
@@ -163,6 +163,7 @@ static void init_test_data_u32(int offset)
     ml_printf("done %d @ %p\n", i, ptr);
 }
 
+#if __SIZEOF_POINTER__ == 8
 static void init_test_data_u64(int offset)
 {
     uint8_t count = 0;
@@ -187,6 +188,7 @@ static void init_test_data_u64(int offset)
     }
     ml_printf("done %d @ %p\n", i, ptr);
 }
+#endif
 
 static bool read_test_data_u16(int offset)
 {
@@ -254,6 +256,7 @@ static bool read_test_data_u32(int offset)
     return true;
 }
 
+#if __SIZEOF_POINTER__ == 8
 static bool read_test_data_u64(int offset)
 {
     uint64_t word, *ptr = (uint64_t *)&test_data[offset];
@@ -307,11 +310,16 @@ static bool read_test_data_u64(int offset)
     ml_printf("done %d @ %p\n", i, ptr);
     return true;
 }
+#endif
 
 /* Read the test data and verify at various offsets */
-read_ufn read_ufns[] = { read_test_data_u16,
-                         read_test_data_u32,
-                         read_test_data_u64 };
+read_ufn read_ufns[] = {
+    read_test_data_u16,
+    read_test_data_u32,
+#if __SIZEOF_POINTER__ == 8
+    read_test_data_u64
+#endif
+};
 
 bool do_unsigned_reads(int start_off)
 {
@@ -476,10 +484,14 @@ bool do_signed_reads(bool neg_first)
     return ok;
 }
 
-init_ufn init_ufns[] = { init_test_data_u8,
-                         init_test_data_u16,
-                         init_test_data_u32,
-                         init_test_data_u64 };
+init_ufn init_ufns[] = {
+    init_test_data_u8,
+    init_test_data_u16,
+    init_test_data_u32,
+#if __SIZEOF_POINTER__ == 8
+    init_test_data_u64
+#endif
+};
 
 int main(void)
 {
-- 
2.39.2
Re: [PATCH 11/17] tests/tcg: only read/write 64 bit words on 64 bit systems
Posted by Philippe Mathieu-Daudé 2 months, 1 week ago 
On 13/9/24 19:26, Alex Bennée wrote:
> While the compilers will generally happily synthesise a 64 bit value
> for you on 32 bit systems it doesn't exercise anything on QEMU. It
> also makes it hard to accurately compare the accesses to test_data
> when instrumenting.
> 
> Message-Id: <20240910140733.4007719-21-alex.bennee@linaro.org>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>   tests/tcg/multiarch/system/memory.c | 26 +++++++++++++++++++-------
>   1 file changed, 19 insertions(+), 7 deletions(-)
> 
> diff --git a/tests/tcg/multiarch/system/memory.c b/tests/tcg/multiarch/system/memory.c
> index 8f2371975d..680dd4800b 100644
> --- a/tests/tcg/multiarch/system/memory.c
> +++ b/tests/tcg/multiarch/system/memory.c
> @@ -163,6 +163,7 @@ static void init_test_data_u32(int offset)
>       ml_printf("done %d @ %p\n", i, ptr);
>   }
>   
> +#if __SIZEOF_POINTER__ == 8

 >= ? :)

>   static void init_test_data_u64(int offset)
>   {
>       uint8_t count = 0;
> @@ -187,6 +188,7 @@ static void init_test_data_u64(int offset)
>       }
>       ml_printf("done %d @ %p\n", i, ptr);
>   }
> +#endif
>   
>   static bool read_test_data_u16(int offset)
>   {
> @@ -254,6 +256,7 @@ static bool read_test_data_u32(int offset)
>       return true;
>   }
>   
> +#if __SIZEOF_POINTER__ == 8
>   static bool read_test_data_u64(int offset)
>   {
>       uint64_t word, *ptr = (uint64_t *)&test_data[offset];
> @@ -307,11 +310,16 @@ static bool read_test_data_u64(int offset)
>       ml_printf("done %d @ %p\n", i, ptr);
>       return true;
>   }
> +#endif
>   
>   /* Read the test data and verify at various offsets */
> -read_ufn read_ufns[] = { read_test_data_u16,
> -                         read_test_data_u32,
> -                         read_test_data_u64 };
> +read_ufn read_ufns[] = {
> +    read_test_data_u16,
> +    read_test_data_u32,
> +#if __SIZEOF_POINTER__ == 8
> +    read_test_data_u64
> +#endif
> +};
>   
>   bool do_unsigned_reads(int start_off)
>   {
> @@ -476,10 +484,14 @@ bool do_signed_reads(bool neg_first)
>       return ok;
>   }
>   
> -init_ufn init_ufns[] = { init_test_data_u8,
> -                         init_test_data_u16,
> -                         init_test_data_u32,
> -                         init_test_data_u64 };
> +init_ufn init_ufns[] = {
> +    init_test_data_u8,
> +    init_test_data_u16,
> +    init_test_data_u32,
> +#if __SIZEOF_POINTER__ == 8
> +    init_test_data_u64
> +#endif
> +};
>   
>   int main(void)
>   {
Re: [PATCH 11/17] tests/tcg: only read/write 64 bit words on 64 bit systems
Posted by Alex Bennée 2 months, 1 week ago 
Philippe Mathieu-Daudé <philmd@linaro.org> writes:

> On 13/9/24 19:26, Alex Bennée wrote:
>> While the compilers will generally happily synthesise a 64 bit value
>> for you on 32 bit systems it doesn't exercise anything on QEMU. It
>> also makes it hard to accurately compare the accesses to test_data
>> when instrumenting.
>> Message-Id: <20240910140733.4007719-21-alex.bennee@linaro.org>
>> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>>   tests/tcg/multiarch/system/memory.c | 26 +++++++++++++++++++-------
>>   1 file changed, 19 insertions(+), 7 deletions(-)
>> diff --git a/tests/tcg/multiarch/system/memory.c
>> b/tests/tcg/multiarch/system/memory.c
>> index 8f2371975d..680dd4800b 100644
>> --- a/tests/tcg/multiarch/system/memory.c
>> +++ b/tests/tcg/multiarch/system/memory.c
>> @@ -163,6 +163,7 @@ static void init_test_data_u32(int offset)
>>       ml_printf("done %d @ %p\n", i, ptr);
>>   }
>>   +#if __SIZEOF_POINTER__ == 8
>
>>= ? :)

Ahh I was confused by the email quoting. Do we actually have any systems
with bigger pointers or is this just for future proofing?

>
>>   static void init_test_data_u64(int offset)
>>   {
>>       uint8_t count = 0;
>> @@ -187,6 +188,7 @@ static void init_test_data_u64(int offset)
>>       }
>>       ml_printf("done %d @ %p\n", i, ptr);
>>   }
>> +#endif
>>     static bool read_test_data_u16(int offset)
>>   {
>> @@ -254,6 +256,7 @@ static bool read_test_data_u32(int offset)
>>       return true;
>>   }
>>   +#if __SIZEOF_POINTER__ == 8
>>   static bool read_test_data_u64(int offset)
>>   {
>>       uint64_t word, *ptr = (uint64_t *)&test_data[offset];
>> @@ -307,11 +310,16 @@ static bool read_test_data_u64(int offset)
>>       ml_printf("done %d @ %p\n", i, ptr);
>>       return true;
>>   }
>> +#endif
>>     /* Read the test data and verify at various offsets */
>> -read_ufn read_ufns[] = { read_test_data_u16,
>> -                         read_test_data_u32,
>> -                         read_test_data_u64 };
>> +read_ufn read_ufns[] = {
>> +    read_test_data_u16,
>> +    read_test_data_u32,
>> +#if __SIZEOF_POINTER__ == 8
>> +    read_test_data_u64
>> +#endif
>> +};
>>     bool do_unsigned_reads(int start_off)
>>   {
>> @@ -476,10 +484,14 @@ bool do_signed_reads(bool neg_first)
>>       return ok;
>>   }
>>   -init_ufn init_ufns[] = { init_test_data_u8,
>> -                         init_test_data_u16,
>> -                         init_test_data_u32,
>> -                         init_test_data_u64 };
>> +init_ufn init_ufns[] = {
>> +    init_test_data_u8,
>> +    init_test_data_u16,
>> +    init_test_data_u32,
>> +#if __SIZEOF_POINTER__ == 8
>> +    init_test_data_u64
>> +#endif
>> +};
>>     int main(void)
>>   {

-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro

Patchew 2.1-devel-b67e4c2

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