In XIVE Gen 2 there are many operations that were not modeled and are
needed for PowerVM. These changes are associated with the following Thread
Interrupt Management Area subjects:
- OS context
- Thread context
- Pulling contexts to 'cache lines'
- Pool targets
- Enhaced trace data for XIVE Gen2
version 3:
- moved some of ring functions from patch set 9 to 10
- version 2 reviewed-by tags:
$ b4 am 20240909211038.27440-1-kowal@linux.ibm.com
Grabbing thread from lore.kernel.org/all/20240909211038.27440-1-kowal@linux.ibm.com/t.mbox.gz
Analyzing 23 messages in the thread
Looking for additional code-review trailers on lore.kernel.org
---
[PATCH v2 1/14] pnv/xive: TIMA patch sets pre-req alignment and formatting changes
[PATCH v2 2/14] pnv/xive2: Define OGEN field in the TIMA
[PATCH v2 3/14] ppc/xive2: Support TIMA "Pull OS Context to Odd Thread Reporting Line"
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH v2 4/14] pnv/xive2: Support for "OS LGS Push" TIMA operation
[PATCH v2 5/14] ppc/xive2: Dump more NVP state with 'info pic'
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH v2 6/14] ppc/xive2: Dump the VP-group and crowd tables with 'info pic'
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH v2 7/14] ppc/xive2: Allow 1-byte write of Target field in TIMA
[PATCH v2 8/14] ppc/xive2: Support "Pull Thread Context to Register" operation
[PATCH v2 9/14] ppc/xive2: Change context/ring specific functions to be generic
[PATCH v2 10/14] ppc/xive2: Support "Pull Thread Context to Odd Thread Reporting Line"
[PATCH v2 11/14] pnv/xive: Add special handling for pool targets
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH v2 12/14] pnv/xive: Update PIPR when updating CPPR
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH v2 13/14] pnv/xive2: TIMA support for 8-byte OS context push for PHYP
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH v2 14/14] pnv/xive2: TIMA CI ops using alternative offsets or byte lengths
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
version 2:
- use dma_memory_write() instead of cpu_physical_memory_write()
- use ternery operator in NVG/NVC pnv_xive2_vst_read/write()
- removed xive2_nvgc_set_backlog() until it is needed
- re-defined word 2 valid bits since it is the same in each Reporting
- provided better fix for possible NSR operation overflow
- moved changes for operations that can occur on ring, in a new patch set (10/13)
- version 1 reviewed-by tags:
$b4 am 20240801203008.11224-1-kowal@linux.ibm.com
Analyzing 35 messages in the thread
Analyzing 0 code-review messages
---
[PATCH 1/13] pnv/xive: TIMA patch sets pre-req alignment and formatting changes
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH 2/13] pnv/xive2: Define OGEN field in the TIMA
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH 3/13] ppc/xive2: Support TIMA "Pull OS Context to Odd Thread Reporting Line"
[PATCH 4/13] pnv/xive2: Support for "OS LGS Push" TIMA operation
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH 5/13] ppc/xive2: Dump more NVP state with 'info pic'
[PATCH 6/13] ppc/xive2: Dump the VP-group and crowd tables with 'info pic'
[PATCH 7/13] ppc/xive2: Allow 1-byte write of Target field in TIMA
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH 8/13] ppc/xive2: Support "Pull Thread Context to Register" operation
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH 9/13] ppc/xive2: Support "Pull Thread Context to Odd Thread Reporting Line"
[PATCH 10/13] pnv/xive: Add special handling for pool targets
[PATCH 11/13] pnv/xive: Update PIPR when updating CPPR
[PATCH 12/13] pnv/xive2: TIMA support for 8-byte OS context push for PHYP
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
[PATCH 13/13] pnv/xive2: TIMA CI ops using alternative offsets or byte lengths
+ Reviewed-by: Cédric Le Goater <clg@redhat.com>
Frederic Barrat (4):
pnv/xive2: Define OGEN field in the TIMA
ppc/xive2: Support TIMA "Pull OS Context to Odd Thread Reporting Line"
ppc/xive2: Dump more NVP state with 'info pic'
ppc/xive2: Dump the VP-group and crowd tables with 'info pic'
Glenn Miles (7):
pnv/xive2: Support for "OS LGS Push" TIMA operation
ppc/xive2: Allow 1-byte write of Target field in TIMA
ppc/xive2: Support "Pull Thread Context to Register" operation
ppc/xive2: Support "Pull Thread Context to Odd Thread Reporting Line"
pnv/xive: Add special handling for pool targets
pnv/xive: Update PIPR when updating CPPR
pnv/xive2: TIMA support for 8-byte OS context push for PHYP
Michael Kowal (3):
pnv/xive: TIMA patch sets pre-req alignment and formatting changes
ppc/xive2: Change context/ring specific functions to be generic
pnv/xive2: TIMA CI ops using alternative offsets or byte lengths
include/hw/ppc/xive.h | 2 +-
include/hw/ppc/xive2.h | 18 ++
include/hw/ppc/xive2_regs.h | 25 ++-
include/hw/ppc/xive_regs.h | 45 +++--
hw/intc/pnv_xive2.c | 44 ++++-
hw/intc/xive.c | 201 ++++++++++++++++++-----
hw/intc/xive2.c | 317 ++++++++++++++++++++++++++++++------
7 files changed, 537 insertions(+), 115 deletions(-)
--
2.43.0