Series comparison

-[PULL 0/7] loongarch-to-apply queue
+[PULL 00/18] loongarch-to-apply queue
-The following changes since commit 4b7ea33074450bc6148c8e1545d78f179e64adb4:
+The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:
-  Merge tag 'pull-request-2024-09-11' of https://gitlab.com/thuth/qemu into staging (2024-09-11 19:28:23 +0100)
+  Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)
 are available in the Git repository at:
-  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240912
+  https://gitlab.com/bibo-mao/qemu.git pull-loongarch-20241213
-for you to fetch changes up to 45d1fe46e5a6fe2b22b034e2b2bc0d941acd4b9e:
+for you to fetch changes up to 78aa256571aa06f32001bd80635a1858187c609b:
-  hw/loongarch: Add acpi SPCR table support (2024-09-12 20:57:54 +0800)
+  hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic (2024-12-13 14:39:39 +0800)
 ----------------------------------------------------------------
-pull-loongarch-20240912
+pull-loongarch-20241213
 ----------------------------------------------------------------
-Bibo Mao (5):
+Bibo Mao (8):
-      target/loongarch: Add compatible support about VM reboot
+      include: Add loongarch_pic_common header file
-      hw/loongarch: Remove default enable with VIRTIO_VGA device
+      include: Move struct LoongArchPCHPIC to loongarch_pic_common header file
-      target/loongarch/kvm: Add vCPU reset function
+      hw/intc/loongarch_pch: Merge instance_init() into realize()
-      target/loongarch: Support QMP dump-guest-memory
+      hw/intc/loongarch_pch: Rename LoongArchPCHPIC with LoongArchPICCommonState
-      hw/loongarch: Add acpi SPCR table support
+      hw/intc/loongarch_pch: Move some functions to file loongarch_pic_common
       hw/intc/loongarch_pch: Inherit from loongarch_pic_common
       hw/intc/loongarch_pch: Add pre_save and post_load interfaces
       hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic
-Jason A. Donenfeld (2):
+ hw/intc/loongarch_pch_pic.c            | 106 +++++++++++----------------------
-      hw/loongarch: virt: support up to 4 serial ports
+ hw/intc/loongarch_pic_common.c         |  97 ++++++++++++++++++++++++++++++
-      hw/loongarch: virt: pass random seed to fdt
+ hw/intc/meson.build                    |   2 +-
+ hw/loongarch/virt.c                    |   2 +-
- hw/loongarch/Kconfig                 |   1 -
+ include/hw/intc/loongarch_pch_pic.h    |  70 +++++-----------------
- hw/loongarch/acpi-build.c            |  63 +++++++++++--
+ include/hw/intc/loongarch_pic_common.h |  82 +++++++++++++++++++++++++
- hw/loongarch/virt.c                  |  33 ++++---
+files changed, 230 insertions(+), 129 deletions(-)
- include/hw/pci-host/ls7a.h           |   9 +-
+ create mode 100644 hw/intc/loongarch_pic_common.c
- target/loongarch/arch_dump.c         | 167 +++++++++++++++++++++++++++++++++++
+ create mode 100644 include/hw/intc/loongarch_pic_common.h
  target/loongarch/cpu.c               |  17 +++-
  target/loongarch/internals.h         |   2 +
  target/loongarch/kvm/kvm.c           |   5 +-
  target/loongarch/kvm/kvm_loongarch.h |   2 +-
  target/loongarch/meson.build         |   1 +
 files changed, 274 insertions(+), 26 deletions(-)
  create mode 100644 target/loongarch/arch_dump.c

-New patch
+[PULL 01/18] include: Add loongarch_pic_common header file
+Add common header file hw/intc/loongarch_pic_common.h, and move
+some macro definition from hw/intc/loongarch_pch_pic.h to the common
+header file.
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Reviewed-by: Song Gao <gaosong@loongson.cn>
+---
+ include/hw/intc/loongarch_pch_pic.h    | 36 +++-------------------
+ include/hw/intc/loongarch_pic_common.h | 42 ++++++++++++++++++++++++++
+files changed, 47 insertions(+), 31 deletions(-)
+ create mode 100644 include/hw/intc/loongarch_pic_common.h
+diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
+index XXXXXXX..XXXXXXX 100644
+--- a/include/hw/intc/loongarch_pch_pic.h
++++ b/include/hw/intc/loongarch_pch_pic.h
+@@ -XXX,XX +XXX,XX @@
+  * Copyright (c) 2021 Loongson Technology Corporation Limited
+  */
+-#include "hw/sysbus.h"
++#ifndef HW_LOONGARCH_PCH_PIC_H
++#define HW_LOONGARCH_PCH_PIC_H
++
++#include "hw/intc/loongarch_pic_common.h"
+ #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
+ #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
+ OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
+-#define PCH_PIC_INT_ID_VAL              0x7000000UL
+-#define PCH_PIC_INT_ID_VER              0x1UL
+-
+-#define PCH_PIC_INT_ID_LO               0x00
+-#define PCH_PIC_INT_ID_HI               0x04
+-#define PCH_PIC_INT_MASK_LO             0x20
+-#define PCH_PIC_INT_MASK_HI             0x24
+-#define PCH_PIC_HTMSI_EN_LO             0x40
+-#define PCH_PIC_HTMSI_EN_HI             0x44
+-#define PCH_PIC_INT_EDGE_LO             0x60
+-#define PCH_PIC_INT_EDGE_HI             0x64
+-#define PCH_PIC_INT_CLEAR_LO            0x80
+-#define PCH_PIC_INT_CLEAR_HI            0x84
+-#define PCH_PIC_AUTO_CTRL0_LO           0xc0
+-#define PCH_PIC_AUTO_CTRL0_HI           0xc4
+-#define PCH_PIC_AUTO_CTRL1_LO           0xe0
+-#define PCH_PIC_AUTO_CTRL1_HI           0xe4
+-#define PCH_PIC_ROUTE_ENTRY_OFFSET      0x100
+-#define PCH_PIC_ROUTE_ENTRY_END         0x13f
+-#define PCH_PIC_HTMSI_VEC_OFFSET        0x200
+-#define PCH_PIC_HTMSI_VEC_END           0x23f
+-#define PCH_PIC_INT_STATUS_LO           0x3a0
+-#define PCH_PIC_INT_STATUS_HI           0x3a4
+-#define PCH_PIC_INT_POL_LO              0x3e0
+-#define PCH_PIC_INT_POL_HI              0x3e4
+-
+-#define STATUS_LO_START                 0
+-#define STATUS_HI_START                 0x4
+-#define POL_LO_START                    0x40
+-#define POL_HI_START                    0x44
+ struct LoongArchPCHPIC {
+     SysBusDevice parent_obj;
+     qemu_irq parent_irq[64];
+@@ -XXX,XX +XXX,XX @@ struct LoongArchPCHPIC {
+     MemoryRegion iomem8;
+     unsigned int irq_num;
+ };
++#endif /* HW_LOONGARCH_PCH_PIC_H */
+diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
+new file mode 100644
+index XXXXXXX..XXXXXXX
+--- /dev/null
++++ b/include/hw/intc/loongarch_pic_common.h
+@@ -XXX,XX +XXX,XX @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++/*
++ * LoongArch 7A1000 I/O interrupt controller definitions
++ * Copyright (c) 2024 Loongson Technology Corporation Limited
++ */
++
++#ifndef HW_LOONGARCH_PIC_COMMON_H
++#define HW_LOONGARCH_PIC_COMMON_H
++
++#include "hw/pci-host/ls7a.h"
++#include "hw/sysbus.h"
++
++#define PCH_PIC_INT_ID_VAL              0x7000000UL
++#define PCH_PIC_INT_ID_VER              0x1UL
++#define PCH_PIC_INT_ID_LO               0x00
++#define PCH_PIC_INT_ID_HI               0x04
++#define PCH_PIC_INT_MASK_LO             0x20
++#define PCH_PIC_INT_MASK_HI             0x24
++#define PCH_PIC_HTMSI_EN_LO             0x40
++#define PCH_PIC_HTMSI_EN_HI             0x44
++#define PCH_PIC_INT_EDGE_LO             0x60
++#define PCH_PIC_INT_EDGE_HI             0x64
++#define PCH_PIC_INT_CLEAR_LO            0x80
++#define PCH_PIC_INT_CLEAR_HI            0x84
++#define PCH_PIC_AUTO_CTRL0_LO           0xc0
++#define PCH_PIC_AUTO_CTRL0_HI           0xc4
++#define PCH_PIC_AUTO_CTRL1_LO           0xe0
++#define PCH_PIC_AUTO_CTRL1_HI           0xe4
++#define PCH_PIC_ROUTE_ENTRY_OFFSET      0x100
++#define PCH_PIC_ROUTE_ENTRY_END         0x13f
++#define PCH_PIC_HTMSI_VEC_OFFSET        0x200
++#define PCH_PIC_HTMSI_VEC_END           0x23f
++#define PCH_PIC_INT_STATUS_LO           0x3a0
++#define PCH_PIC_INT_STATUS_HI           0x3a4
++#define PCH_PIC_INT_POL_LO              0x3e0
++#define PCH_PIC_INT_POL_HI              0x3e4
++
++#define STATUS_LO_START                 0
++#define STATUS_HI_START                 0x4
++#define POL_LO_START                    0x40
++#define POL_HI_START                    0x44
++#endif  /* HW_LOONGARCH_PIC_COMMON_H */
+--
+.43.5

-New patch
+[PULL 02/18] include: Move struct LoongArchPCHPIC to loongarch_pic_common header file
+Move structure LoongArchPCHPIC from header file loongarch_pch_pic.h
+to file loongarch_pic_common.h, and rename structure name with
+LoongArchPICCommonState.
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Reviewed-by: Song Gao <gaosong@loongson.cn>
+---
+ include/hw/intc/loongarch_pch_pic.h    | 27 +------------------------
+ include/hw/intc/loongarch_pic_common.h | 28 ++++++++++++++++++++++++++
+files changed, 29 insertions(+), 26 deletions(-)
+diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
+index XXXXXXX..XXXXXXX 100644
+--- a/include/hw/intc/loongarch_pch_pic.h
++++ b/include/hw/intc/loongarch_pch_pic.h
+@@ -XXX,XX +XXX,XX @@
+ #include "hw/intc/loongarch_pic_common.h"
++#define LoongArchPCHPIC LoongArchPICCommonState
+ #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
+ #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
+ OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
+-struct LoongArchPCHPIC {
+-    SysBusDevice parent_obj;
+-    qemu_irq parent_irq[64];
+-    uint64_t int_mask; /*0x020 interrupt mask register*/
+-    uint64_t htmsi_en; /*0x040 1=msi*/
+-    uint64_t intedge; /*0x060 edge=1 level  =0*/
+-    uint64_t intclr; /*0x080 for clean edge int,set 1 clean,set 0 is noused*/
+-    uint64_t auto_crtl0; /*0x0c0*/
+-    uint64_t auto_crtl1; /*0x0e0*/
+-    uint64_t last_intirr;    /* edge detection */
+-    uint64_t intirr; /* 0x380 interrupt request register */
+-    uint64_t intisr; /* 0x3a0 interrupt service register */
+-    /*
+-     * 0x3e0 interrupt level polarity selection
+-     * register 0 for high level trigger
+-     */
+-    uint64_t int_polarity;
+-
+-    uint8_t route_entry[64]; /*0x100 - 0x138*/
+-    uint8_t htmsi_vector[64]; /*0x200 - 0x238*/
+-
+-    MemoryRegion iomem32_low;
+-    MemoryRegion iomem32_high;
+-    MemoryRegion iomem8;
+-    unsigned int irq_num;
+-};
+ #endif /* HW_LOONGARCH_PCH_PIC_H */
+diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
+index XXXXXXX..XXXXXXX 100644
+--- a/include/hw/intc/loongarch_pic_common.h
++++ b/include/hw/intc/loongarch_pic_common.h
+@@ -XXX,XX +XXX,XX @@
+ #define STATUS_HI_START                 0x4
+ #define POL_LO_START                    0x40
+ #define POL_HI_START                    0x44
++
++struct LoongArchPICCommonState {
++    SysBusDevice parent_obj;
++
++    qemu_irq parent_irq[64];
++    uint64_t int_mask;        /* 0x020 interrupt mask register */
++    uint64_t htmsi_en;        /* 0x040 1=msi */
++    uint64_t intedge;         /* 0x060 edge=1 level=0 */
++    uint64_t intclr;          /* 0x080 clean edge int, set 1 clean, 0 noused */
++    uint64_t auto_crtl0;      /* 0x0c0 */
++    uint64_t auto_crtl1;      /* 0x0e0 */
++    uint64_t last_intirr;     /* edge detection */
++    uint64_t intirr;          /* 0x380 interrupt request register */
++    uint64_t intisr;          /* 0x3a0 interrupt service register */
++    /*
++     * 0x3e0 interrupt level polarity selection
++     * register 0 for high level trigger
++     */
++    uint64_t int_polarity;
++
++    uint8_t route_entry[64];  /* 0x100 - 0x138 */
++    uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */
++
++    MemoryRegion iomem32_low;
++    MemoryRegion iomem32_high;
++    MemoryRegion iomem8;
++    unsigned int irq_num;
++};
+ #endif  /* HW_LOONGARCH_PIC_COMMON_H */
+--
+.43.5

-New patch
+[PULL 03/18] hw/intc/loongarch_pch: Merge instance_init() into realize()
+Memory region is created in instance_init(), merge it into function
+realize(). There is no special class_init() for loongarch_pch object.
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Reviewed-by: Song Gao <gaosong@loongson.cn>
+---
+ hw/intc/loongarch_pch_pic.c | 15 ++++-----------
+file changed, 4 insertions(+), 11 deletions(-)
+diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/intc/loongarch_pch_pic.c
++++ b/hw/intc/loongarch_pch_pic.c
+@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
+ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+ {
+     LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
++    SysBusDevice *sbd  = SYS_BUS_DEVICE(dev);
+     if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
+         error_setg(errp, "Invalid 'pic_irq_num'");
+@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+     qdev_init_gpio_out(dev, s->parent_irq, s->irq_num);
+     qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num);
+-}
+-
+-static void loongarch_pch_pic_init(Object *obj)
+-{
+-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(obj);
+-    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+-
+-    memory_region_init_io(&s->iomem32_low, obj,
++    memory_region_init_io(&s->iomem32_low, OBJECT(dev),
+                           &loongarch_pch_pic_reg32_low_ops,
+                           s, PCH_PIC_NAME(.reg32_part1), 0x100);
+-    memory_region_init_io(&s->iomem8, obj, &loongarch_pch_pic_reg8_ops,
++    memory_region_init_io(&s->iomem8, OBJECT(dev), &loongarch_pch_pic_reg8_ops,
+                           s, PCH_PIC_NAME(.reg8), 0x2a0);
+-    memory_region_init_io(&s->iomem32_high, obj,
++    memory_region_init_io(&s->iomem32_high, OBJECT(dev),
+                           &loongarch_pch_pic_reg32_high_ops,
+                           s, PCH_PIC_NAME(.reg32_part2), 0xc60);
+     sysbus_init_mmio(sbd, &s->iomem32_low);
+@@ -XXX,XX +XXX,XX @@ static const TypeInfo loongarch_pch_pic_info = {
+     .name          = TYPE_LOONGARCH_PCH_PIC,
+     .parent        = TYPE_SYS_BUS_DEVICE,
+     .instance_size = sizeof(LoongArchPCHPIC),
+-    .instance_init = loongarch_pch_pic_init,
+     .class_init    = loongarch_pch_pic_class_init,
+ };
+--
+.43.5

-[PULL 3/7] target/loongarch/kvm: Add vCPU reset function
+[PULL 04/18] hw/intc/loongarch_pch: Rename LoongArchPCHPIC with LoongArchPICCommonState
-From: Bibo Mao <maobibo@loongson.cn>
+With pic vmstate, rename structure name vmstate_loongarch_pch_pic with
+vmstate_loongarch_pic_common, and with pic property rename
-KVM provides interface KVM_REG_LOONGARCH_VCPU_RESET to reset vCPU,
+loongarch_pch_pic_properties with loongarch_pic_common_properties.
 it can be used to clear internal state about kvm kernel. vCPU reset
 function is added here for kvm mode.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 Reviewed-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20240822022827.2273534-1-maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- target/loongarch/cpu.c               | 2 +-
+ hw/intc/loongarch_pch_pic.c | 52 +++++++++++++++++++++++--------------
- target/loongarch/kvm/kvm.c           | 5 ++++-
+file changed, 32 insertions(+), 20 deletions(-)
  target/loongarch/kvm/kvm_loongarch.h | 2 +-
 files changed, 6 insertions(+), 3 deletions(-)
-diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
+diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
 index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/cpu.c
+--- a/hw/intc/loongarch_pch_pic.c
-+++ b/target/loongarch/cpu.c
++++ b/hw/intc/loongarch_pch_pic.c
-@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_reset_hold(Object *obj, ResetType type)
+@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
-     memset(env->tlb, 0, sizeof(env->tlb));
+     s->int_polarity = 0x0;
- #endif
+ }
-     if (kvm_enabled()) {
--        kvm_arch_reset_vcpu(env);
++static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
-+        kvm_arch_reset_vcpu(cs);
++{
 +    LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
 +
 +    if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
 +        error_setg(errp, "Invalid 'pic_irq_num'");
 +        return;
 +    }
 +}
 +
  static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
  {
      LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
      SysBusDevice *sbd  = SYS_BUS_DEVICE(dev);
 +    Error *local_err = NULL;
 -    if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
 -        error_setg(errp, "Invalid 'pic_irq_num'");
 +    loongarch_pic_common_realize(dev, &local_err);
 +    if (local_err) {
 +        error_propagate(errp, local_err);
          return;
      }
- #endif
+@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
-diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm.c
 +++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_put_regs_fp(CPUState *cs)
      return ret;
  }
--void kvm_arch_reset_vcpu(CPULoongArchState *env)
+-static Property loongarch_pch_pic_properties[] = {
-+void kvm_arch_reset_vcpu(CPUState *cs)
+-    DEFINE_PROP_UINT32("pch_pic_irq_num",  LoongArchPCHPIC, irq_num, 0),
- {
++static Property loongarch_pic_common_properties[] = {
-+    CPULoongArchState *env = cpu_env(cs);
++    DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0),
-+
+     DEFINE_PROP_END_OF_LIST(),
-     env->mp_state = KVM_MP_STATE_RUNNABLE;
+ };
-+    kvm_set_one_reg(cs, KVM_REG_LOONGARCH_VCPU_RESET, 0);
 -static const VMStateDescription vmstate_loongarch_pch_pic = {
 -    .name = TYPE_LOONGARCH_PCH_PIC,
 +static const VMStateDescription vmstate_loongarch_pic_common = {
 +    .name = "loongarch_pch_pic",
      .version_id = 1,
      .minimum_version_id = 1,
      .fields = (const VMStateField[]) {
 -        VMSTATE_UINT64(int_mask, LoongArchPCHPIC),
 -        VMSTATE_UINT64(htmsi_en, LoongArchPCHPIC),
 -        VMSTATE_UINT64(intedge, LoongArchPCHPIC),
 -        VMSTATE_UINT64(intclr, LoongArchPCHPIC),
 -        VMSTATE_UINT64(auto_crtl0, LoongArchPCHPIC),
 -        VMSTATE_UINT64(auto_crtl1, LoongArchPCHPIC),
 -        VMSTATE_UINT8_ARRAY(route_entry, LoongArchPCHPIC, 64),
 -        VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPCHPIC, 64),
 -        VMSTATE_UINT64(last_intirr, LoongArchPCHPIC),
 -        VMSTATE_UINT64(intirr, LoongArchPCHPIC),
 -        VMSTATE_UINT64(intisr, LoongArchPCHPIC),
 -        VMSTATE_UINT64(int_polarity, LoongArchPCHPIC),
 +        VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
 +        VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intedge, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intclr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState),
 +        VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState),
 +        VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64),
 +        VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64),
 +        VMSTATE_UINT64(last_intirr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intirr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(intisr, LoongArchPICCommonState),
 +        VMSTATE_UINT64(int_polarity, LoongArchPICCommonState),
          VMSTATE_END_OF_LIST()
      }
  };
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
      dc->realize = loongarch_pch_pic_realize;
      device_class_set_legacy_reset(dc, loongarch_pch_pic_reset);
 -    dc->vmsd = &vmstate_loongarch_pch_pic;
 -    device_class_set_props(dc, loongarch_pch_pic_properties);
 +    dc->vmsd = &vmstate_loongarch_pic_common;
 +    device_class_set_props(dc, loongarch_pic_common_properties);
  }
- static int kvm_loongarch_get_mpstate(CPUState *cs)
+ static const TypeInfo loongarch_pch_pic_info = {
 diff --git a/target/loongarch/kvm/kvm_loongarch.h b/target/loongarch/kvm/kvm_loongarch.h
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm_loongarch.h
 +++ b/target/loongarch/kvm/kvm_loongarch.h
@@ -XXX,XX +XXX,XX @@
  #define QEMU_KVM_LOONGARCH_H
  int  kvm_loongarch_set_interrupt(LoongArchCPU *cpu, int irq, int level);
 -void kvm_arch_reset_vcpu(CPULoongArchState *env);
 +void kvm_arch_reset_vcpu(CPUState *cs);
  #endif
 --
-.34.1
+.43.5

-New patch
+[PULL 05/18] hw/intc/loongarch_pch: Move some functions to file loongarch_pic_common
+Move some common functions to file loongarch_pic_common.c, the common
+functions include loongarch_pic_common_realize(), property structure
+loongarch_pic_common_properties and vmstate structure
+vmstate_loongarch_pic_common.
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Reviewed-by: Song Gao <gaosong@loongson.cn>
+---
+ hw/intc/loongarch_pch_pic.c    | 37 +-----------------------------
+ hw/intc/loongarch_pic_common.c | 41 ++++++++++++++++++++++++++++++++++
+files changed, 42 insertions(+), 36 deletions(-)
+ create mode 100644 hw/intc/loongarch_pic_common.c
+diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/intc/loongarch_pch_pic.c
++++ b/hw/intc/loongarch_pch_pic.c
+@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
+     s->int_polarity = 0x0;
+ }
+-static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
+-{
+-    LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
+-
+-    if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
+-        error_setg(errp, "Invalid 'pic_irq_num'");
+-        return;
+-    }
+-}
+-
++#include "loongarch_pic_common.c"
+ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+ {
+     LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
+@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+ }
+-static Property loongarch_pic_common_properties[] = {
+-    DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0),
+-    DEFINE_PROP_END_OF_LIST(),
+-};
+-
+-static const VMStateDescription vmstate_loongarch_pic_common = {
+-    .name = "loongarch_pch_pic",
+-    .version_id = 1,
+-    .minimum_version_id = 1,
+-    .fields = (const VMStateField[]) {
+-        VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
+-        VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
+-        VMSTATE_UINT64(intedge, LoongArchPICCommonState),
+-        VMSTATE_UINT64(intclr, LoongArchPICCommonState),
+-        VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState),
+-        VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState),
+-        VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64),
+-        VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64),
+-        VMSTATE_UINT64(last_intirr, LoongArchPICCommonState),
+-        VMSTATE_UINT64(intirr, LoongArchPICCommonState),
+-        VMSTATE_UINT64(intisr, LoongArchPICCommonState),
+-        VMSTATE_UINT64(int_polarity, LoongArchPICCommonState),
+-        VMSTATE_END_OF_LIST()
+-    }
+-};
+-
+ static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
+ {
+     DeviceClass *dc = DEVICE_CLASS(klass);
+diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
+new file mode 100644
+index XXXXXXX..XXXXXXX
+--- /dev/null
++++ b/hw/intc/loongarch_pic_common.c
+@@ -XXX,XX +XXX,XX @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++/*
++ * QEMU Loongson 7A1000 I/O interrupt controller.
++ * Copyright (C) 2024 Loongson Technology Corporation Limited
++ */
++
++static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
++{
++    LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
++
++    if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
++        error_setg(errp, "Invalid 'pic_irq_num'");
++        return;
++    }
++}
++
++static Property loongarch_pic_common_properties[] = {
++    DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0),
++    DEFINE_PROP_END_OF_LIST(),
++};
++
++static const VMStateDescription vmstate_loongarch_pic_common = {
++    .name = "loongarch_pch_pic",
++    .version_id = 1,
++    .minimum_version_id = 1,
++    .fields = (const VMStateField[]) {
++        VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
++        VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
++        VMSTATE_UINT64(intedge, LoongArchPICCommonState),
++        VMSTATE_UINT64(intclr, LoongArchPICCommonState),
++        VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState),
++        VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState),
++        VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64),
++        VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64),
++        VMSTATE_UINT64(last_intirr, LoongArchPICCommonState),
++        VMSTATE_UINT64(intirr, LoongArchPICCommonState),
++        VMSTATE_UINT64(intisr, LoongArchPICCommonState),
++        VMSTATE_UINT64(int_polarity, LoongArchPICCommonState),
++        VMSTATE_END_OF_LIST()
++    }
++};
+--
+.43.5

-New patch
+[PULL 06/18] hw/intc/loongarch_pch: Inherit from loongarch_pic_common
+Set TYPE_LOONGARCH_PIC inherit from TYPE_LOONGARCH_PIC_COMMON object,
+it shares vmsate and property of TYPE_LOONGARCH_PIC_COMMON, and has
+its own realize() function.
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+Reviewed-by: Song Gao <gaosong@loongson.cn>
+---
+ hw/intc/loongarch_pch_pic.c            | 38 ++++++++++++--------------
+ hw/intc/loongarch_pic_common.c         | 32 +++++++++++++++++++++-
+ hw/intc/meson.build                    |  2 +-
+ include/hw/intc/loongarch_pch_pic.h    | 21 +++++++++++---
+ include/hw/intc/loongarch_pic_common.h | 10 +++++++
+files changed, 77 insertions(+), 26 deletions(-)
+diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/intc/loongarch_pch_pic.c
++++ b/hw/intc/loongarch_pch_pic.c
+@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
+     s->int_polarity = 0x0;
+ }
+-#include "loongarch_pic_common.c"
+-static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
++static void loongarch_pic_realize(DeviceState *dev, Error **errp)
+ {
+-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
+-    SysBusDevice *sbd  = SYS_BUS_DEVICE(dev);
++    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
++    LoongarchPICClass *lpc = LOONGARCH_PIC_GET_CLASS(dev);
++    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+     Error *local_err = NULL;
+-    loongarch_pic_common_realize(dev, &local_err);
++    lpc->parent_realize(dev, &local_err);
+     if (local_err) {
+         error_propagate(errp, local_err);
+         return;
+@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+ }
+-static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
++static void loongarch_pic_class_init(ObjectClass *klass, void *data)
+ {
+     DeviceClass *dc = DEVICE_CLASS(klass);
++    LoongarchPICClass *lpc = LOONGARCH_PIC_CLASS(klass);
+-    dc->realize = loongarch_pch_pic_realize;
+     device_class_set_legacy_reset(dc, loongarch_pch_pic_reset);
+-    dc->vmsd = &vmstate_loongarch_pic_common;
+-    device_class_set_props(dc, loongarch_pic_common_properties);
++    device_class_set_parent_realize(dc, loongarch_pic_realize,
++                                    &lpc->parent_realize);
+ }
+-static const TypeInfo loongarch_pch_pic_info = {
+-    .name          = TYPE_LOONGARCH_PCH_PIC,
+-    .parent        = TYPE_SYS_BUS_DEVICE,
+-    .instance_size = sizeof(LoongArchPCHPIC),
+-    .class_init    = loongarch_pch_pic_class_init,
++static const TypeInfo loongarch_pic_types[] = {
++   {
++        .name               = TYPE_LOONGARCH_PIC,
++        .parent             = TYPE_LOONGARCH_PIC_COMMON,
++        .instance_size      = sizeof(LoongarchPICState),
++        .class_size         = sizeof(LoongarchPICClass),
++        .class_init         = loongarch_pic_class_init,
++    }
+ };
+-static void loongarch_pch_pic_register_types(void)
+-{
+-    type_register_static(&loongarch_pch_pic_info);
+-}
+-
+-type_init(loongarch_pch_pic_register_types)
++DEFINE_TYPES(loongarch_pic_types)
+diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/intc/loongarch_pic_common.c
++++ b/hw/intc/loongarch_pic_common.c
+@@ -XXX,XX +XXX,XX @@
+  * Copyright (C) 2024 Loongson Technology Corporation Limited
+  */
++#include "qemu/osdep.h"
++#include "qapi/error.h"
++#include "hw/intc/loongarch_pic_common.h"
++#include "hw/qdev-properties.h"
++#include "migration/vmstate.h"
++
+ static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
+ {
+-    LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
++    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
+     if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
+         error_setg(errp, "Invalid 'pic_irq_num'");
+@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = {
+         VMSTATE_END_OF_LIST()
+     }
+ };
++
++static void loongarch_pic_common_class_init(ObjectClass *klass, void *data)
++{
++    DeviceClass *dc = DEVICE_CLASS(klass);
++    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_CLASS(klass);
++
++    device_class_set_parent_realize(dc, loongarch_pic_common_realize,
++                                    &lpcc->parent_realize);
++    device_class_set_props(dc, loongarch_pic_common_properties);
++    dc->vmsd = &vmstate_loongarch_pic_common;
++}
++
++static const TypeInfo loongarch_pic_common_types[] = {
++    {
++        .name               = TYPE_LOONGARCH_PIC_COMMON,
++        .parent             = TYPE_SYS_BUS_DEVICE,
++        .instance_size      = sizeof(LoongArchPICCommonState),
++        .class_size         = sizeof(LoongArchPICCommonClass),
++        .class_init         = loongarch_pic_common_class_init,
++        .abstract           = true,
++    }
++};
++
++DEFINE_TYPES(loongarch_pic_common_types)
+diff --git a/hw/intc/meson.build b/hw/intc/meson.build
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/intc/meson.build
++++ b/hw/intc/meson.build
+@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c'))
+ specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c'))
+ specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c'))
+ specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c'))
+-specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c'))
++specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c', 'loongarch_pic_common.c'))
+ specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c'))
+ specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c'))
+diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
+index XXXXXXX..XXXXXXX 100644
+--- a/include/hw/intc/loongarch_pch_pic.h
++++ b/include/hw/intc/loongarch_pch_pic.h
+@@ -XXX,XX +XXX,XX @@
+ #include "hw/intc/loongarch_pic_common.h"
+-#define LoongArchPCHPIC LoongArchPICCommonState
+-#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
+-#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
+-OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
++#define TYPE_LOONGARCH_PIC  "loongarch_pic"
++#define PCH_PIC_NAME(name)  TYPE_LOONGARCH_PIC#name
++OBJECT_DECLARE_TYPE(LoongarchPICState, LoongarchPICClass, LOONGARCH_PIC)
++
++struct LoongarchPICState {
++    LoongArchPICCommonState parent_obj;
++};
++
++struct LoongarchPICClass {
++    LoongArchPICCommonClass parent_class;
++
++    DeviceRealize parent_realize;
++};
++
++#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC
++typedef struct LoongArchPICCommonState LoongArchPCHPIC;
++#define LOONGARCH_PCH_PIC(obj)   ((struct LoongArchPICCommonState *)(obj))
+ #endif /* HW_LOONGARCH_PCH_PIC_H */
+diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
+index XXXXXXX..XXXXXXX 100644
+--- a/include/hw/intc/loongarch_pic_common.h
++++ b/include/hw/intc/loongarch_pic_common.h
+@@ -XXX,XX +XXX,XX @@
+ #define POL_LO_START                    0x40
+ #define POL_HI_START                    0x44
++#define TYPE_LOONGARCH_PIC_COMMON "loongarch_pic_common"
++OBJECT_DECLARE_TYPE(LoongArchPICCommonState,
++                    LoongArchPICCommonClass, LOONGARCH_PIC_COMMON)
++
+ struct LoongArchPICCommonState {
+     SysBusDevice parent_obj;
+@@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonState {
+     MemoryRegion iomem8;
+     unsigned int irq_num;
+ };
++
++struct LoongArchPICCommonClass {
++    SysBusDeviceClass parent_class;
++
++    DeviceRealize parent_realize;
++};
+ #endif  /* HW_LOONGARCH_PIC_COMMON_H */
+--
+.43.5

-[PULL 4/7] target/loongarch: Support QMP dump-guest-memory
+[PULL 07/18] hw/intc/loongarch_pch: Add pre_save and post_load interfaces
-From: Bibo Mao <maobibo@loongson.cn>
+Add vmstate pre_save and post_load interfaces, which can be used
+by pic kvm driver in future.
 Add the support needed for creating prstatus elf notes. This allows
 us to use QMP dump-guest-memory.
 Now ELF notes of LoongArch only supports general elf notes, LSX and
 LASX is not supported, since it is mainly used to dump guest memory.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 Reviewed-by: Song Gao <gaosong@loongson.cn>
-Tested-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20240822065245.2286214-1-maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- target/loongarch/arch_dump.c | 167 +++++++++++++++++++++++++++++++++++
+ hw/intc/loongarch_pic_common.c         | 26 ++++++++++++++++++++++++++
- target/loongarch/cpu.c       |   1 +
+ include/hw/intc/loongarch_pic_common.h |  2 ++
- target/loongarch/internals.h |   2 +
+files changed, 28 insertions(+)
  target/loongarch/meson.build |   1 +
 files changed, 171 insertions(+)
  create mode 100644 target/loongarch/arch_dump.c
-diff --git a/target/loongarch/arch_dump.c b/target/loongarch/arch_dump.c
+diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
-new file mode 100644
+index XXXXXXX..XXXXXXX 100644
-index XXXXXXX..XXXXXXX
+--- a/hw/intc/loongarch_pic_common.c
---- /dev/null
++++ b/hw/intc/loongarch_pic_common.c
 +++ b/target/loongarch/arch_dump.c
 @@ -XXX,XX +XXX,XX @@
-+/*
+ #include "hw/qdev-properties.h"
-+ * Support for writing ELF notes for LoongArch architectures
+ #include "migration/vmstate.h"
-+ *
-+ * Copyright (c) 2023 Loongarch Technology
++static int loongarch_pic_pre_save(void *opaque)
-+ *
++{
-+ * This program is free software; you can redistribute it and/or modify it
++    LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
-+ * under the terms and conditions of the GNU General Public License,
++    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
 + * version 2 or later, as published by the Free Software Foundation.
 + *
 + * This program is distributed in the hope it will be useful, but WITHOUT
 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 + * more details.
 + *
 + * You should have received a copy of the GNU General Public License along with
 + * this program.  If not, see <http://www.gnu.org/licenses/>.
 + *
 + */
 +
-+#include "qemu/osdep.h"
++    if (lpcc->pre_save) {
-+#include "cpu.h"
++        return lpcc->pre_save(s);
 +#include "elf.h"
 +#include "sysemu/dump.h"
 +#include "internals.h"
 +
 +/* struct user_pt_regs from arch/loongarch/include/uapi/asm/ptrace.h */
 +struct loongarch_user_regs {
 +    uint64_t gpr[32];
 +    uint64_t pad1[1];
 +    /* Special CSR registers. */
 +    uint64_t csr_era;
 +    uint64_t csr_badv;
 +    uint64_t pad2[10];
 +} QEMU_PACKED;
 +
 +QEMU_BUILD_BUG_ON(sizeof(struct loongarch_user_regs) != 360);
 +
 +/* struct elf_prstatus from include/uapi/linux/elfcore.h */
 +struct loongarch_elf_prstatus {
 +    char pad1[32]; /* 32 == offsetof(struct elf_prstatus, pr_pid) */
 +    uint32_t pr_pid;
 +    /*
 +     * 76 == offsetof(struct elf_prstatus, pr_reg) -
 +     * offsetof(struct elf_prstatus, pr_ppid)
 +     */
 +    char pad2[76];
 +    struct loongarch_user_regs pr_reg;
 +    uint32_t pr_fpvalid;
 +    char pad3[4];
 +} QEMU_PACKED;
 +
 +QEMU_BUILD_BUG_ON(sizeof(struct loongarch_elf_prstatus) != 480);
 +
 +/* struct user_fp_state from arch/loongarch/include/uapi/asm/ptrace.h */
 +struct loongarch_fpu_struct {
 +    uint64_t fpr[32];
 +    uint64_t fcc;
 +    unsigned int fcsr;
 +} QEMU_PACKED;
 +
 +QEMU_BUILD_BUG_ON(sizeof(struct loongarch_fpu_struct) != 268);
 +
 +struct loongarch_note {
 +    Elf64_Nhdr hdr;
 +    char name[8]; /* align_up(sizeof("CORE"), 4) */
 +    union {
 +        struct loongarch_elf_prstatus prstatus;
 +        struct loongarch_fpu_struct fpu;
 +    };
 +} QEMU_PACKED;
 +
 +#define LOONGARCH_NOTE_HEADER_SIZE offsetof(struct loongarch_note, prstatus)
 +#define LOONGARCH_PRSTATUS_NOTE_SIZE                                          \
 +    (LOONGARCH_NOTE_HEADER_SIZE + sizeof(struct loongarch_elf_prstatus))
 +#define LOONGARCH_PRFPREG_NOTE_SIZE                                           \
 +    (LOONGARCH_NOTE_HEADER_SIZE + sizeof(struct loongarch_fpu_struct))
 +
 +static void loongarch_note_init(struct loongarch_note *note, DumpState *s,
 +                                const char *name, Elf64_Word namesz,
 +                                Elf64_Word type, Elf64_Word descsz)
 +{
 +    memset(note, 0, sizeof(*note));
 +
 +    note->hdr.n_namesz = cpu_to_dump32(s, namesz);
 +    note->hdr.n_descsz = cpu_to_dump32(s, descsz);
 +    note->hdr.n_type = cpu_to_dump32(s, type);
 +
 +    memcpy(note->name, name, namesz);
 +}
 +
 +static int loongarch_write_elf64_fprpreg(WriteCoreDumpFunction f,
 +                                         CPULoongArchState *env, int cpuid,
 +                                         DumpState *s)
 +{
 +    struct loongarch_note note;
 +    int ret, i;
 +
 +    loongarch_note_init(&note, s, "CORE", 5, NT_PRFPREG, sizeof(note.fpu));
 +    note.fpu.fcsr = cpu_to_dump64(s, env->fcsr0);
 +
 +    for (i = 0; i < 8; i++) {
 +        note.fpu.fcc |= env->cf[i] << (8 * i);
 +    }
 +    note.fpu.fcc = cpu_to_dump64(s, note.fpu.fcc);
 +
 +    for (i = 0; i < 32; ++i) {
 +        note.fpu.fpr[i] = cpu_to_dump64(s, env->fpr[i].vreg.UD[0]);
 +    }
 +
 +    ret = f(&note, LOONGARCH_PRFPREG_NOTE_SIZE, s);
 +    if (ret < 0) {
 +        return -1;
 +    }
 +
 +    return 0;
 +}
 +
-+int loongarch_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
++static int loongarch_pic_post_load(void *opaque, int version_id)
 +                                   int cpuid, DumpState *s)
 +{
-+    struct loongarch_note note;
++    LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
-+    CPULoongArchState *env = &LOONGARCH_CPU(cs)->env;
++    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
 +    int ret, i;
 +
-+    loongarch_note_init(&note, s, "CORE", 5, NT_PRSTATUS,
++    if (lpcc->post_load) {
-+                        sizeof(note.prstatus));
++        return lpcc->post_load(s, version_id);
 +    note.prstatus.pr_pid = cpu_to_dump32(s, cpuid);
 +    note.prstatus.pr_fpvalid = cpu_to_dump32(s, 1);
 +
 +    for (i = 0; i < 32; ++i) {
 +        note.prstatus.pr_reg.gpr[i] = cpu_to_dump64(s, env->gpr[i]);
 +    }
-+    note.prstatus.pr_reg.csr_era  = cpu_to_dump64(s, env->CSR_ERA);
-+    note.prstatus.pr_reg.csr_badv = cpu_to_dump64(s, env->CSR_BADV);
-+    ret = f(&note, LOONGARCH_PRSTATUS_NOTE_SIZE, s);
-+    if (ret < 0) {
-+        return -1;
-+    }
-+
-+    ret = loongarch_write_elf64_fprpreg(f, env, cpuid, s);
-+    if (ret < 0) {
-+        return -1;
-+    }
-+
-+    return ret;
-+}
-+
-+int cpu_get_dump_info(ArchDumpInfo *info,
-+                      const GuestPhysBlockList *guest_phys_blocks)
-+{
-+    info->d_machine = EM_LOONGARCH;
-+    info->d_endian = ELFDATA2LSB;
-+    info->d_class = ELFCLASS64;
 +
 +    return 0;
 +}
 +
-+ssize_t cpu_get_note_size(int class, int machine, int nr_cpus)
+ static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
-+{
+ {
-+    size_t note_size = 0;
+     LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
-+
+@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = {
-+    if (class == ELFCLASS64) {
+     .name = "loongarch_pch_pic",
-+        note_size = LOONGARCH_PRSTATUS_NOTE_SIZE + LOONGARCH_PRFPREG_NOTE_SIZE;
+     .version_id = 1,
-+    }
+     .minimum_version_id = 1,
-+
++    .pre_save  = loongarch_pic_pre_save,
-+    return note_size * nr_cpus;
++    .post_load = loongarch_pic_post_load,
-+}
+     .fields = (const VMStateField[]) {
-diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
+         VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
          VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
 diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
 index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/cpu.c
+--- a/include/hw/intc/loongarch_pic_common.h
-+++ b/target/loongarch/cpu.c
++++ b/include/hw/intc/loongarch_pic_common.h
-@@ -XXX,XX +XXX,XX @@ static const TCGCPUOps loongarch_tcg_ops = {
+@@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonClass {
- #include "hw/core/sysemu-cpu-ops.h"
+     SysBusDeviceClass parent_class;
- static const struct SysemuCPUOps loongarch_sysemu_ops = {
+     DeviceRealize parent_realize;
-+    .write_elf64_note = loongarch_cpu_write_elf64_note,
++    int (*pre_save)(LoongArchPICCommonState *s);
-     .get_phys_page_debug = loongarch_cpu_get_phys_page_debug,
++    int (*post_load)(LoongArchPICCommonState *s, int version_id);
  };
+ #endif  /* HW_LOONGARCH_PIC_COMMON_H */
 diff --git a/target/loongarch/internals.h b/target/loongarch/internals.h
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/internals.h
 +++ b/target/loongarch/internals.h
@@ -XXX,XX +XXX,XX @@ void write_fcc(CPULoongArchState *env, uint64_t val);
  int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n);
  int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n);
  void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs);
 +int loongarch_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 +                                   int cpuid, DumpState *s);
  #endif
 diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/meson.build
 +++ b/target/loongarch/meson.build
@@ -XXX,XX +XXX,XX @@ loongarch_ss.add(files(
  loongarch_system_ss = ss.source_set()
  loongarch_system_ss.add(files(
 +  'arch_dump.c',
    'cpu_helper.c',
    'loongarch-qmp-cmds.c',
    'machine.c',
 --
-.34.1
+.43.5

-[PULL 6/7] hw/loongarch: virt: pass random seed to fdt
+[PULL 08/18] hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic
-From: "Jason A. Donenfeld" <Jason@zx2c4.com>
+Remove definition about LoongArchPCHPIC and LOONGARCH_PCH_PIC, and
 replace them with LoongArchPICCommonState and LOONGARCH_PIC_COMMON
 separately. Also remove unnecessary header files.
-If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-initialize early. Set this using the usual guest random number
+Reviewed-by: Song Gao <gaosong@loongson.cn>
-generation function.
+---
  hw/intc/loongarch_pch_pic.c         | 24 ++++++++++--------------
  hw/loongarch/virt.c                 |  2 +-
  include/hw/intc/loongarch_pch_pic.h |  4 ----
 files changed, 11 insertions(+), 19 deletions(-)
-This is the same procedure that's done in b91b6b5a2c ("hw/microblaze:
+diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
-pass random seed to fdt"), e4b4f0b71c ("hw/riscv: virt: pass random seed
+index XXXXXXX..XXXXXXX 100644
-to fdt"), c6fe3e6b4c ("hw/openrisc: virt: pass random seed to fdt"),
+--- a/hw/intc/loongarch_pch_pic.c
-f7e426e5 ("hw/i386: pass RNG seed via setup_data entry"), c287941a4d
++++ b/hw/intc/loongarch_pch_pic.c
-("hw/rx: pass random seed to fdt"), 5e19cc68fb ("hw/mips: boston: pass
+@@ -XXX,XX +XXX,XX @@
-random seed to fdt"), 6b23a67916 ("hw/nios2: virt: pass random seed to fdt")
-c4b075318e ("hw/ppc: pass random seed to fdt"), and 5242876f37
+ #include "qemu/osdep.h"
-("hw/arm/virt: dt: add rng-seed property").
+ #include "qemu/bitops.h"
+-#include "hw/sysbus.h"
-These earlier commits later were amended to rerandomize the RNG seed on
+-#include "hw/loongarch/virt.h"
-snapshot load, but the LoongArch code somehow already does that, despite
+-#include "hw/pci-host/ls7a.h"
-not having this patch here, presumably due to some lucky copy and
+ #include "hw/irq.h"
-pasting.
+ #include "hw/intc/loongarch_pch_pic.h"
+-#include "hw/qdev-properties.h"
-Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
+-#include "migration/vmstate.h"
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+ #include "trace.h"
-Message-Id: <20240905153316.2038769-1-Jason@zx2c4.com>
+ #include "qapi/error.h"
-Signed-off-by: Song Gao <gaosong@loongson.cn>
----
+-static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
- hw/loongarch/virt.c | 6 ++++++
++static void pch_pic_update_irq(LoongArchPICCommonState *s, uint64_t mask,
-file changed, 6 insertions(+)
++                               int level)
+ {
      uint64_t val;
      int irq;
@@ -XXX,XX +XXX,XX @@ static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
  static void pch_pic_irq_handler(void *opaque, int irq, int level)
  {
 -    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
 +    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
      uint64_t mask = 1ULL << irq;
      assert(irq < s->irq_num);
@@ -XXX,XX +XXX,XX @@ static void pch_pic_irq_handler(void *opaque, int irq, int level)
  static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr,
                                              unsigned size)
  {
 -    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
 +    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
      uint64_t val = 0;
      uint32_t offset = addr & 0xfff;
@@ -XXX,XX +XXX,XX @@ static uint64_t get_writew_val(uint64_t value, uint32_t target, bool hi)
  static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,
                                           uint64_t value, unsigned size)
  {
 -    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
 +    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
      uint32_t offset, old_valid, data = (uint32_t)value;
      uint64_t old, int_mask;
      offset = addr & 0xfff;
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,
  static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,
                                          unsigned size)
  {
 -    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
 +    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
      uint64_t val = 0;
      uint32_t offset = addr & 0xfff;
@@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,
  static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,
                                       uint64_t value, unsigned size)
  {
 -    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
 +    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
      uint32_t offset, data = (uint32_t)value;
      offset = addr & 0xfff;
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,
  static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,
                                          unsigned size)
  {
 -    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
 +    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
      uint64_t val = 0;
      uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
      int64_t offset_tmp;
@@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,
  static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr,
                                       uint64_t data, unsigned size)
  {
 -    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
 +    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
      int32_t offset_tmp;
      uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_pch_pic_reg8_ops = {
  static void loongarch_pch_pic_reset(DeviceState *d)
  {
 -    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(d);
 +    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d);
      int i;
      s->int_mask = -1;
 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/virt.c
 +++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
- #include "hw/block/flash.h"
+     /* Add Extend I/O Interrupt Controller node */
- #include "hw/virtio/virtio-iommu.h"
+     fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
- #include "qemu/error-report.h"
-+#include "qemu/guest-random.h"
+-    pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
++    pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
- static bool virt_is_veiointc_enabled(LoongArchVirtMachineState *lvms)
+     num = VIRT_PCH_PIC_IRQ_NUM;
- {
+     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
-@@ -XXX,XX +XXX,XX @@ static void fdt_add_uart_node(LoongArchVirtMachineState *lvms,
+     d = SYS_BUS_DEVICE(pch_pic);
- static void create_fdt(LoongArchVirtMachineState *lvms)
+diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
- {
+index XXXXXXX..XXXXXXX 100644
-     MachineState *ms = MACHINE(lvms);
+--- a/include/hw/intc/loongarch_pch_pic.h
-+    uint8_t rng_seed[32];
++++ b/include/hw/intc/loongarch_pch_pic.h
+@@ -XXX,XX +XXX,XX @@ struct LoongarchPICClass {
-     ms->fdt = create_device_tree(&lvms->fdt_size);
+     DeviceRealize parent_realize;
-     if (!ms->fdt) {
+ };
-@@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms)
-     qemu_fdt_setprop_cell(ms->fdt, "/", "#address-cells", 0x2);
+-#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC
-     qemu_fdt_setprop_cell(ms->fdt, "/", "#size-cells", 0x2);
+-typedef struct LoongArchPICCommonState LoongArchPCHPIC;
-     qemu_fdt_add_subnode(ms->fdt, "/chosen");
+-#define LOONGARCH_PCH_PIC(obj)   ((struct LoongArchPICCommonState *)(obj))
-+
+-
-+    /* Pass seed to RNG */
+ #endif /* HW_LOONGARCH_PCH_PIC_H */
 +    qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
 +    qemu_fdt_setprop(ms->fdt, "/chosen", "rng-seed", rng_seed, sizeof(rng_seed));
  }
  static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
 --
-.34.1
+.43.5

-[PULL 2/7] hw/loongarch: Remove default enable with VIRTIO_VGA device
+[PULL 09/18] include: Add loongarch_extioi_common header file
-From: Bibo Mao <maobibo@loongson.cn>
+Add common header file include/hw/intc/loongarch_extioi_common.h, and
+move some macro definition from include/hw/intc/loongarch_extioi.h to
-For virtio VGA deivce libvirt will select VIRTIO_VGA firstly rather than
+the common header file.
 VIRTIO_GPU, VIRTIO_VGA device supports frame buffer however it requires
 legacy VGA compatible support. Frame buffer area 0xa0000 -- 0xc0000
 conflicts with low memory area 0 -- 0x10000000.
 Here remove default support for VIRTIO_VGA device, VIRTIO_GPU is prefered
 on LoongArch system. For frame buffer video card support, standard VGA can
 be used.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 Reviewed-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20240823073050.2619484-1-maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- hw/loongarch/Kconfig | 1 -
+ include/hw/intc/loongarch_extioi.h        | 50 +------------------
-file changed, 1 deletion(-)
+ include/hw/intc/loongarch_extioi_common.h | 58 +++++++++++++++++++++++
 files changed, 59 insertions(+), 49 deletions(-)
  create mode 100644 include/hw/intc/loongarch_extioi_common.h
-diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
+diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
 index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/Kconfig
+--- a/include/hw/intc/loongarch_extioi.h
-+++ b/hw/loongarch/Kconfig
++++ b/include/hw/intc/loongarch_extioi.h
-@@ -XXX,XX +XXX,XX @@ config LOONGARCH_VIRT
+@@ -XXX,XX +XXX,XX @@
-     select DEVICE_TREE
+  * Copyright (C) 2021 Loongson Technology Corporation Limited
-     select PCI
+  */
-     select PCI_EXPRESS_GENERIC_BRIDGE
--    imply VIRTIO_VGA
+-#include "hw/sysbus.h"
-     imply PCI_DEVICES
+-#include "hw/loongarch/virt.h"
-     imply NVDIMM
+-
-     imply TPM_TIS_SYSBUS
+ #ifndef LOONGARCH_EXTIOI_H
  #define LOONGARCH_EXTIOI_H
 -#define LS3A_INTC_IP               8
 -#define EXTIOI_IRQS                (256)
 -#define EXTIOI_IRQS_BITMAP_SIZE    (256 / 8)
 -/* irq from EXTIOI is routed to no more than 4 cpus */
 -#define EXTIOI_CPUS                (4)
 -/* map to ipnum per 32 irqs */
 -#define EXTIOI_IRQS_IPMAP_SIZE     (256 / 32)
 -#define EXTIOI_IRQS_COREMAP_SIZE   256
 -#define EXTIOI_IRQS_NODETYPE_COUNT  16
 -#define EXTIOI_IRQS_GROUP_COUNT    8
 -
 -#define APIC_OFFSET                  0x400
 -#define APIC_BASE                    (0x1000ULL + APIC_OFFSET)
 -
 -#define EXTIOI_NODETYPE_START        (0x4a0 - APIC_OFFSET)
 -#define EXTIOI_NODETYPE_END          (0x4c0 - APIC_OFFSET)
 -#define EXTIOI_IPMAP_START           (0x4c0 - APIC_OFFSET)
 -#define EXTIOI_IPMAP_END             (0x4c8 - APIC_OFFSET)
 -#define EXTIOI_ENABLE_START          (0x600 - APIC_OFFSET)
 -#define EXTIOI_ENABLE_END            (0x620 - APIC_OFFSET)
 -#define EXTIOI_BOUNCE_START          (0x680 - APIC_OFFSET)
 -#define EXTIOI_BOUNCE_END            (0x6a0 - APIC_OFFSET)
 -#define EXTIOI_ISR_START             (0x700 - APIC_OFFSET)
 -#define EXTIOI_ISR_END               (0x720 - APIC_OFFSET)
 -#define EXTIOI_COREISR_START         (0x800 - APIC_OFFSET)
 -#define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
 -#define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
 -#define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
 -#define EXTIOI_SIZE                  0x800
 -
 -#define EXTIOI_VIRT_BASE             (0x40000000)
 -#define EXTIOI_VIRT_SIZE             (0x1000)
 -#define EXTIOI_VIRT_FEATURES         (0x0)
 -#define  EXTIOI_HAS_VIRT_EXTENSION   (0)
 -#define  EXTIOI_HAS_ENABLE_OPTION    (1)
 -#define  EXTIOI_HAS_INT_ENCODE       (2)
 -#define  EXTIOI_HAS_CPU_ENCODE       (3)
 -#define  EXTIOI_VIRT_HAS_FEATURES    (BIT(EXTIOI_HAS_VIRT_EXTENSION)  \
 -                                      | BIT(EXTIOI_HAS_ENABLE_OPTION) \
 -                                      | BIT(EXTIOI_HAS_CPU_ENCODE))
 -#define EXTIOI_VIRT_CONFIG           (0x4)
 -#define  EXTIOI_ENABLE               (1)
 -#define  EXTIOI_ENABLE_INT_ENCODE    (2)
 -#define  EXTIOI_ENABLE_CPU_ENCODE    (3)
 -#define EXTIOI_VIRT_COREMAP_START    (0x40)
 -#define EXTIOI_VIRT_COREMAP_END      (0x240)
 +#include "hw/intc/loongarch_extioi_common.h"
  typedef struct ExtIOICore {
      uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
 diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
 new file mode 100644
 index XXXXXXX..XXXXXXX
 --- /dev/null
 +++ b/include/hw/intc/loongarch_extioi_common.h
@@ -XXX,XX +XXX,XX @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +/*
 + * LoongArch 3A5000 ext interrupt controller definitions
 + * Copyright (C) 2024 Loongson Technology Corporation Limited
 + */
 +
 +#ifndef LOONGARCH_EXTIOI_COMMON_H
 +#define LOONGARCH_EXTIOI_COMMON_H
 +
 +#include "hw/sysbus.h"
 +#include "hw/loongarch/virt.h"
 +
 +#define LS3A_INTC_IP                 8
 +#define EXTIOI_IRQS                  (256)
 +#define EXTIOI_IRQS_BITMAP_SIZE      (256 / 8)
 +/* irq from EXTIOI is routed to no more than 4 cpus */
 +#define EXTIOI_CPUS                  (4)
 +/* map to ipnum per 32 irqs */
 +#define EXTIOI_IRQS_IPMAP_SIZE       (256 / 32)
 +#define EXTIOI_IRQS_COREMAP_SIZE     256
 +#define EXTIOI_IRQS_NODETYPE_COUNT   16
 +#define EXTIOI_IRQS_GROUP_COUNT      8
 +
 +#define APIC_OFFSET                  0x400
 +#define APIC_BASE                    (0x1000ULL + APIC_OFFSET)
 +#define EXTIOI_NODETYPE_START        (0x4a0 - APIC_OFFSET)
 +#define EXTIOI_NODETYPE_END          (0x4c0 - APIC_OFFSET)
 +#define EXTIOI_IPMAP_START           (0x4c0 - APIC_OFFSET)
 +#define EXTIOI_IPMAP_END             (0x4c8 - APIC_OFFSET)
 +#define EXTIOI_ENABLE_START          (0x600 - APIC_OFFSET)
 +#define EXTIOI_ENABLE_END            (0x620 - APIC_OFFSET)
 +#define EXTIOI_BOUNCE_START          (0x680 - APIC_OFFSET)
 +#define EXTIOI_BOUNCE_END            (0x6a0 - APIC_OFFSET)
 +#define EXTIOI_ISR_START             (0x700 - APIC_OFFSET)
 +#define EXTIOI_ISR_END               (0x720 - APIC_OFFSET)
 +#define EXTIOI_COREISR_START         (0x800 - APIC_OFFSET)
 +#define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
 +#define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
 +#define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
 +#define EXTIOI_SIZE                  0x800
 +
 +#define EXTIOI_VIRT_BASE             (0x40000000)
 +#define EXTIOI_VIRT_SIZE             (0x1000)
 +#define EXTIOI_VIRT_FEATURES         (0x0)
 +#define  EXTIOI_HAS_VIRT_EXTENSION   (0)
 +#define  EXTIOI_HAS_ENABLE_OPTION    (1)
 +#define  EXTIOI_HAS_INT_ENCODE       (2)
 +#define  EXTIOI_HAS_CPU_ENCODE       (3)
 +#define  EXTIOI_VIRT_HAS_FEATURES    (BIT(EXTIOI_HAS_VIRT_EXTENSION)  \
 +                                      | BIT(EXTIOI_HAS_ENABLE_OPTION) \
 +                                      | BIT(EXTIOI_HAS_CPU_ENCODE))
 +#define EXTIOI_VIRT_CONFIG           (0x4)
 +#define  EXTIOI_ENABLE               (1)
 +#define  EXTIOI_ENABLE_INT_ENCODE    (2)
 +#define  EXTIOI_ENABLE_CPU_ENCODE    (3)
 +#define EXTIOI_VIRT_COREMAP_START    (0x40)
 +#define EXTIOI_VIRT_COREMAP_END      (0x240)
 +#endif /* LOONGARCH_EXTIOI_H */
 --
-.34.1
+.43.5

-[PULL 5/7] hw/loongarch: virt: support up to 4 serial ports
+[PULL 10/18] include: Move struct LoongArchExtIOI to header file loongarch_extioi_common
-From: "Jason A. Donenfeld" <Jason@zx2c4.com>
+Move definiton of structure LoongArchExtIOI from header file loongarch_extioi.h
 to file loongarch_extioi_common.h.
-In order to support additional channels of communication using
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-`-serial`, add several serial ports, up to the standard 4 generally
+Reviewed-by: Song Gao <gaosong@loongson.cn>
-supported by the 8250 driver.
+---
  include/hw/intc/loongarch_extioi.h        | 26 ----------------------
  include/hw/intc/loongarch_extioi_common.h | 27 +++++++++++++++++++++++
 files changed, 27 insertions(+), 26 deletions(-)
-Fixed: https://lore.kernel.org/all/20240907143439.2792924-1-Jason@zx2c4.com/
+diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
 Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
 Tested-by: Bibo Mao <maobibo@loongson.cn>
 [gaosong: ACPI uart need't reverse order]
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 Message-Id: <20240907143439.2792924-1-Jason@zx2c4.com>
 ---
  hw/loongarch/acpi-build.c  | 23 +++++++++++++++--------
  hw/loongarch/virt.c        | 27 +++++++++++++++++----------
  include/hw/pci-host/ls7a.h |  9 +++++----
 files changed, 37 insertions(+), 22 deletions(-)
 diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/acpi-build.c
+--- a/include/hw/intc/loongarch_extioi.h
-+++ b/hw/loongarch/acpi-build.c
++++ b/include/hw/intc/loongarch_extioi.h
 @@ -XXX,XX +XXX,XX @@
- #include "hw/acpi/generic_event_device.h"
+ #include "hw/intc/loongarch_extioi_common.h"
- #include "hw/pci-host/gpex.h"
-+#include "sysemu/sysemu.h"
+-typedef struct ExtIOICore {
- #include "sysemu/tpm.h"
+-    uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
- #include "hw/platform-bus.h"
+-    DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
- #include "hw/acpi/aml-build.h"
+-    qemu_irq parent_irq[LS3A_INTC_IP];
-@@ -XXX,XX +XXX,XX @@ struct AcpiBuildState {
+-} ExtIOICore;
      MemoryRegion *linker_mr;
  } AcpiBuildState;
 -static void build_uart_device_aml(Aml *table)
 +static void build_uart_device_aml(Aml *table, int index)
  {
      Aml *dev;
      Aml *crs;
      Aml *pkg0, *pkg1, *pkg2;
 -    uint32_t uart_irq = VIRT_UART_IRQ;
 -
--    Aml *scope = aml_scope("_SB");
+ #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi"
--    dev = aml_device("COMA");
+ OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI)
-+    Aml *scope;
+-struct LoongArchExtIOI {
-+    uint32_t uart_irq;
+-    SysBusDevice parent_obj;
-+    uint64_t base;
+-    uint32_t num_cpu;
 -    uint32_t features;
 -    uint32_t status;
 -    /* hardware state */
 -    uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
 -    uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
 -    uint32_t isr[EXTIOI_IRQS / 32];
 -    uint32_t enable[EXTIOI_IRQS / 32];
 -    uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
 -    uint32_t coremap[EXTIOI_IRQS / 4];
 -    uint32_t sw_pending[EXTIOI_IRQS / 32];
 -    uint8_t  sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
 -    uint8_t  sw_coremap[EXTIOI_IRQS];
 -    qemu_irq irq[EXTIOI_IRQS];
 -    ExtIOICore *cpu;
 -    MemoryRegion extioi_system_mem;
 -    MemoryRegion virt_extend;
 -};
  #endif /* LOONGARCH_EXTIOI_H */
 diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/intc/loongarch_extioi_common.h
 +++ b/include/hw/intc/loongarch_extioi_common.h
@@ -XXX,XX +XXX,XX @@
  #define  EXTIOI_ENABLE_CPU_ENCODE    (3)
  #define EXTIOI_VIRT_COREMAP_START    (0x40)
  #define EXTIOI_VIRT_COREMAP_END      (0x240)
 +
-+    uart_irq = VIRT_UART_IRQ + index;
++typedef struct ExtIOICore {
-+    base = VIRT_UART_BASE + index * VIRT_UART_SIZE;
++    uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
-+    scope = aml_scope("_SB");
++    DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
-+    dev = aml_device("COM%d", index);
++    qemu_irq parent_irq[LS3A_INTC_IP];
-     aml_append(dev, aml_name_decl("_HID", aml_string("PNP0501")));
++} ExtIOICore;
--    aml_append(dev, aml_name_decl("_UID", aml_int(0)));
++
-+    aml_append(dev, aml_name_decl("_UID", aml_int(index)));
++struct LoongArchExtIOI {
-     aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
++    SysBusDevice parent_obj;
-     crs = aml_resource_template();
++    uint32_t num_cpu;
-     aml_append(crs,
++    uint32_t features;
-         aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
++    uint32_t status;
-                          AML_NON_CACHEABLE, AML_READ_WRITE,
++    /* hardware state */
--                         0, VIRT_UART_BASE, VIRT_UART_BASE + VIRT_UART_SIZE - 1,
++    uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
-+                         0, base, base + VIRT_UART_SIZE - 1,
++    uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
-, VIRT_UART_SIZE));
++    uint32_t isr[EXTIOI_IRQS / 32];
-     aml_append(crs, aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
++    uint32_t enable[EXTIOI_IRQS / 32];
-                                   AML_SHARED, &uart_irq, 1));
++    uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
-@@ -XXX,XX +XXX,XX @@ static void acpi_dsdt_add_tpm(Aml *scope, LoongArchVirtMachineState *vms)
++    uint32_t coremap[EXTIOI_IRQS / 4];
- static void
++    uint32_t sw_pending[EXTIOI_IRQS / 32];
- build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
++    uint8_t  sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
- {
++    uint8_t  sw_coremap[EXTIOI_IRQS];
-+    int i;
++    qemu_irq irq[EXTIOI_IRQS];
-     Aml *dsdt, *scope, *pkg;
++    ExtIOICore *cpu;
-     LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine);
++    MemoryRegion extioi_system_mem;
-     AcpiTable table = { .sig = "DSDT", .rev = 1, .oem_id = lvms->oem_id,
++    MemoryRegion virt_extend;
-@@ -XXX,XX +XXX,XX @@ build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
++};
+ #endif /* LOONGARCH_EXTIOI_H */
      acpi_table_begin(&table, table_data);
      dsdt = init_aml_allocator();
 -    build_uart_device_aml(dsdt);
 +    for (i = 0; i < VIRT_UART_COUNT; i++)
 +        build_uart_device_aml(dsdt, i);
      build_pci_device_aml(dsdt, lvms);
      build_la_ged_aml(dsdt, machine);
      build_flash_aml(dsdt, lvms);
 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/virt.c
 +++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void fdt_add_rtc_node(LoongArchVirtMachineState *lvms,
  }
  static void fdt_add_uart_node(LoongArchVirtMachineState *lvms,
 -                              uint32_t *pch_pic_phandle)
 +                              uint32_t *pch_pic_phandle, hwaddr base,
 +                              int irq, bool chosen)
  {
      char *nodename;
 -    hwaddr base = VIRT_UART_BASE;
      hwaddr size = VIRT_UART_SIZE;
      MachineState *ms = MACHINE(lvms);
@@ -XXX,XX +XXX,XX @@ static void fdt_add_uart_node(LoongArchVirtMachineState *lvms,
      qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "ns16550a");
      qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0, base, 0x0, size);
      qemu_fdt_setprop_cell(ms->fdt, nodename, "clock-frequency", 100000000);
 -    qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename);
 -    qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts",
 -                           VIRT_UART_IRQ - VIRT_GSI_BASE, 0x4);
 +    if (chosen)
 +        qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename);
 +    qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", irq, 0x4);
      qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
                            *pch_pic_phandle);
      g_free(nodename);
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
      /* Add pcie node */
      fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
 -    serial_mm_init(get_system_memory(), VIRT_UART_BASE, 0,
 -                   qdev_get_gpio_in(pch_pic,
 -                                    VIRT_UART_IRQ - VIRT_GSI_BASE),
 -                   115200, serial_hd(0), DEVICE_LITTLE_ENDIAN);
 -    fdt_add_uart_node(lvms, pch_pic_phandle);
 +    /*
 +     * Create uart fdt node in reverse order so that they appear
 +     * in the finished device tree lowest address first
 +     */
 +    for (i = VIRT_UART_COUNT; i --> 0;) {
 +        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
 +        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
 +        serial_mm_init(get_system_memory(), base, 0,
 +                       qdev_get_gpio_in(pch_pic, irq),
 +                       115200, serial_hd(i), DEVICE_LITTLE_ENDIAN);
 +        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
 +    }
      /* Network init */
      pci_init_nic_devices(pci_bus, mc->default_nic);
 diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
 index XXXXXXX..XXXXXXX 100644
 --- a/include/hw/pci-host/ls7a.h
 +++ b/include/hw/pci-host/ls7a.h
@@ -XXX,XX +XXX,XX @@
  #define VIRT_PCH_PIC_IRQ_NUM     32
  #define VIRT_GSI_BASE            64
  #define VIRT_DEVICE_IRQS         16
 +#define VIRT_UART_COUNT          4
  #define VIRT_UART_IRQ            (VIRT_GSI_BASE + 2)
  #define VIRT_UART_BASE           0x1fe001e0
 -#define VIRT_UART_SIZE           0X100
 -#define VIRT_RTC_IRQ             (VIRT_GSI_BASE + 3)
 +#define VIRT_UART_SIZE           0x100
 +#define VIRT_RTC_IRQ             (VIRT_GSI_BASE + 6)
  #define VIRT_MISC_REG_BASE       (VIRT_PCH_REG_BASE + 0x00080000)
  #define VIRT_RTC_REG_BASE        (VIRT_MISC_REG_BASE + 0x00050100)
  #define VIRT_RTC_LEN             0x100
 -#define VIRT_SCI_IRQ             (VIRT_GSI_BASE + 4)
 +#define VIRT_SCI_IRQ             (VIRT_GSI_BASE + 7)
  #define VIRT_PLATFORM_BUS_BASEADDRESS   0x16000000
  #define VIRT_PLATFORM_BUS_SIZE          0x2000000
  #define VIRT_PLATFORM_BUS_NUM_IRQS      2
 -#define VIRT_PLATFORM_BUS_IRQ           (VIRT_GSI_BASE + 5)
 +#define VIRT_PLATFORM_BUS_IRQ           (VIRT_GSI_BASE + 8)
  #endif
 --
-.34.1
+.43.5

-[PULL 1/7] target/loongarch: Add compatible support about VM reboot
+[PULL 11/18] include: Rename LoongArchExtIOI with LoongArchExtIOICommonState
-From: Bibo Mao <maobibo@loongson.cn>
+Rename structure LoongArchExtIOI with LoongArchExtIOICommonState,
+since it is defined in file loongarch_extioi_common.h
 With edk2-stable202408 LoongArch UEFI bios, CSR PGD register is set only
 if its value is equal to zero for boot cpu, it causes reboot issue. Since
 CSR PGD register is changed with linux kernel, UEFI BIOS cannot use it.
 Add workaround to clear CSR registers relative with TLB in function
 loongarch_cpu_reset_hold(), so that VM can reboot with edk2-stable202408
 UEFI bios.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 Reviewed-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20240827035807.3326293-1-maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- target/loongarch/cpu.c | 14 ++++++++++++++
+ include/hw/intc/loongarch_extioi.h        | 1 +
-file changed, 14 insertions(+)
+ include/hw/intc/loongarch_extioi_common.h | 2 +-
 files changed, 2 insertions(+), 1 deletion(-)
-diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
+diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
 index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/cpu.c
+--- a/include/hw/intc/loongarch_extioi.h
-+++ b/target/loongarch/cpu.c
++++ b/include/hw/intc/loongarch_extioi.h
-@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_reset_hold(Object *obj, ResetType type)
+@@ -XXX,XX +XXX,XX @@
-     env->CSR_TLBRERA = FIELD_DP64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR, 0);
-     env->CSR_MERRCTL = FIELD_DP64(env->CSR_MERRCTL, CSR_MERRCTL, ISMERR, 0);
+ #include "hw/intc/loongarch_extioi_common.h"
-     env->CSR_TID = cs->cpu_index;
-+    /*
++#define LoongArchExtIOI LoongArchExtIOICommonState
-+     * Workaround for edk2-stable202408, CSR PGD register is set only if
+ #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi"
-+     * its value is equal to zero for boot cpu, it causes reboot issue.
+ OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI)
-+     *
+ #endif /* LOONGARCH_EXTIOI_H */
-+     * Here clear CSR registers relative with TLB.
+diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
-+     */
+index XXXXXXX..XXXXXXX 100644
-+    env->CSR_PGDH = 0;
+--- a/include/hw/intc/loongarch_extioi_common.h
-+    env->CSR_PGDL = 0;
++++ b/include/hw/intc/loongarch_extioi_common.h
-+    env->CSR_PWCL = 0;
+@@ -XXX,XX +XXX,XX @@ typedef struct ExtIOICore {
-+    env->CSR_PWCH = 0;
+     qemu_irq parent_irq[LS3A_INTC_IP];
-+    env->CSR_STLBPS = 0;
+ } ExtIOICore;
-+    env->CSR_EENTRY = 0;
-+    env->CSR_TLBRENTRY = 0;
+-struct LoongArchExtIOI {
-+    env->CSR_MERRENTRY = 0;
++struct LoongArchExtIOICommonState {
+     SysBusDevice parent_obj;
-     for (n = 0; n < 4; n++) {
+     uint32_t num_cpu;
-         env->CSR_DMW[n] = FIELD_DP64(env->CSR_DMW[n], CSR_DMW, PLV0, 0);
+     uint32_t features;
 --
-.34.1
+.43.5

-[PULL 7/7] hw/loongarch: Add acpi SPCR table support
+[PULL 12/18] hw/intc/loongarch_extioi: Rename LoongArchExtIOI with LoongArchExtIOICommonState
-From: Bibo Mao <maobibo@loongson.cn>
+With some structure such as vmstate and property, rename LoongArchExtIOI
+with LoongArchExtIOICommonState, these common structure will be moved
-Serial port console redirection table can be used for default serial
+to common file.
 port selection, like chosen stdout-path selection with FDT method.
 With acpi SPCR table added, early debug console can be parsed from
 SPCR table with simple kernel parameter earlycon rather than
 earlycon=uart,mmio,0x1fe001e0
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 Reviewed-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20240907073037.243353-1-maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- hw/loongarch/acpi-build.c | 40 +++++++++++++++++++++++++++++++++++++++
+ hw/intc/loongarch_extioi.c | 41 +++++++++++++++++++++++---------------
-file changed, 40 insertions(+)
+file changed, 25 insertions(+), 16 deletions(-)
-diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
+diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/acpi-build.c
+--- a/hw/intc/loongarch_extioi.c
-+++ b/hw/loongarch/acpi-build.c
++++ b/hw/intc/loongarch_extioi.c
-@@ -XXX,XX +XXX,XX @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
+@@ -XXX,XX +XXX,XX @@ static int vmstate_extioi_post_load(void *opaque, int version_id)
-     acpi_table_end(linker, &table);
+     return 0;
  }
-+/*
++static int loongarch_extioi_common_post_load(void *opaque, int version_id)
 + * Serial Port Console Redirection Table (SPCR)
 + * https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
 + */
 +static void
 +spcr_setup(GArray *table_data, BIOSLinker *linker, MachineState *machine)
 +{
-+    LoongArchVirtMachineState *lvms;
++    return vmstate_extioi_post_load(opaque, version_id);
 +    AcpiSpcrData serial = {
 +        .interface_type = 0,       /* 16550 compatible */
 +        .base_addr.id = AML_AS_SYSTEM_MEMORY,
 +        .base_addr.width = 32,
 +        .base_addr.offset = 0,
 +        .base_addr.size = 1,
 +        .base_addr.addr = VIRT_UART_BASE,
 +        .interrupt_type = 0,       /* Interrupt not supported */
 +        .pc_interrupt = 0,
 +        .interrupt = VIRT_UART_IRQ,
 +        .baud_rate = 7,            /* 115200 */
 +        .parity = 0,
 +        .stop_bits = 1,
 +        .flow_control = 0,
 +        .terminal_type = 3,        /* ANSI */
 +        .language = 0,             /* Language */
 +        .pci_device_id = 0xffff,   /* not a PCI device*/
 +        .pci_vendor_id = 0xffff,   /* not a PCI device*/
 +        .pci_bus = 0,
 +        .pci_device = 0,
 +        .pci_function = 0,
 +        .pci_flags = 0,
 +        .pci_segment = 0,
 +    };
 +
 +    lvms = LOONGARCH_VIRT_MACHINE(machine);
 +    build_spcr(table_data, linker, &serial, 2, lvms->oem_id,
 +               lvms->oem_table_id);
 +}
 +
- typedef
+ static const VMStateDescription vmstate_extioi_core = {
- struct AcpiBuildState {
+     .name = "extioi-core",
-     /* Copy of table in RAM (for patching). */
+     .version_id = 1,
-@@ -XXX,XX +XXX,XX @@ static void acpi_build(AcpiBuildTables *tables, MachineState *machine)
+@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_extioi_core = {
+ };
-     acpi_add_table(table_offsets, tables_blob);
-     build_srat(tables_blob, tables->linker, machine);
+ static const VMStateDescription vmstate_loongarch_extioi = {
-+    acpi_add_table(table_offsets, tables_blob);
+-    .name = TYPE_LOONGARCH_EXTIOI,
-+    spcr_setup(tables_blob, tables->linker, machine);
++    .name = "loongarch.extioi",
+     .version_id = 3,
-     if (machine->numa_state->num_nodes) {
+     .minimum_version_id = 3,
-         if (machine->numa_state->have_numa_distance) {
+-    .post_load = vmstate_extioi_post_load,
 +    .post_load = loongarch_extioi_common_post_load,
      .fields = (const VMStateField[]) {
 -        VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOI, EXTIOI_IRQS_GROUP_COUNT),
 -        VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOI,
 +        VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState,
 +                             EXTIOI_IRQS_GROUP_COUNT),
 +        VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState,
                               EXTIOI_IRQS_NODETYPE_COUNT / 2),
 -        VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOI, EXTIOI_IRQS / 32),
 -        VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOI, EXTIOI_IRQS / 32),
 -        VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOI, EXTIOI_IRQS_IPMAP_SIZE / 4),
 -        VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOI, EXTIOI_IRQS / 4),
 -
 -        VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOI, num_cpu,
 -                         vmstate_extioi_core, ExtIOICore),
 -        VMSTATE_UINT32(features, LoongArchExtIOI),
 -        VMSTATE_UINT32(status, LoongArchExtIOI),
 +        VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState,
 +                             EXTIOI_IRQS / 32),
 +        VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState,
 +                             EXTIOI_IRQS / 32),
 +        VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState,
 +                             EXTIOI_IRQS_IPMAP_SIZE / 4),
 +        VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState,
 +                             EXTIOI_IRQS / 4),
 +        VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState,
 +                             num_cpu, vmstate_extioi_core, ExtIOICore),
 +        VMSTATE_UINT32(features, LoongArchExtIOICommonState),
 +        VMSTATE_UINT32(status, LoongArchExtIOICommonState),
          VMSTATE_END_OF_LIST()
      }
  };
  static Property extioi_properties[] = {
 -    DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOI, num_cpu, 1),
 -    DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOI, features,
 -                    EXTIOI_HAS_VIRT_EXTENSION, 0),
 +    DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1),
 +    DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState,
 +                    features, EXTIOI_HAS_VIRT_EXTENSION, 0),
      DEFINE_PROP_END_OF_LIST(),
  };
 --
-.34.1
+.43.5

The following changes since commit 4b7ea33074450bc6148c8e1545d78f179e64adb4:

Merge tag 'pull-request-2024-09-11' of https://gitlab.com/thuth/qemu into staging (2024-09-11 19:28:23 +0100)

are available in the Git repository at:

https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240912

for you to fetch changes up to 45d1fe46e5a6fe2b22b034e2b2bc0d941acd4b9e:

hw/loongarch: Add acpi SPCR table support (2024-09-12 20:57:54 +0800)

----------------------------------------------------------------
pull-loongarch-20240912

----------------------------------------------------------------
Bibo Mao (5):
      target/loongarch: Add compatible support about VM reboot
      hw/loongarch: Remove default enable with VIRTIO_VGA device
      target/loongarch/kvm: Add vCPU reset function
      target/loongarch: Support QMP dump-guest-memory
      hw/loongarch: Add acpi SPCR table support

Jason A. Donenfeld (2):
      hw/loongarch: virt: support up to 4 serial ports
      hw/loongarch: virt: pass random seed to fdt

hw/loongarch/Kconfig                 |   1 -
 hw/loongarch/acpi-build.c            |  63 +++++++++++--
 hw/loongarch/virt.c                  |  33 ++++---
 include/hw/pci-host/ls7a.h           |   9 +-
 target/loongarch/arch_dump.c         | 167 +++++++++++++++++++++++++++++++++++
 target/loongarch/cpu.c               |  17 +++-
 target/loongarch/internals.h         |   2 +
 target/loongarch/kvm/kvm.c           |   5 +-
 target/loongarch/kvm/kvm_loongarch.h |   2 +-
 target/loongarch/meson.build         |   1 +
 10 files changed, 274 insertions(+), 26 deletions(-)
 create mode 100644 target/loongarch/arch_dump.c

From: Bibo Mao <maobibo@loongson.cn>

With edk2-stable202408 LoongArch UEFI bios, CSR PGD register is set only
if its value is equal to zero for boot cpu, it causes reboot issue. Since
CSR PGD register is changed with linux kernel, UEFI BIOS cannot use it.

Add workaround to clear CSR registers relative with TLB in function
loongarch_cpu_reset_hold(), so that VM can reboot with edk2-stable202408
UEFI bios.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240827035807.3326293-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/cpu.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_reset_hold(Object *obj, ResetType type)
     env->CSR_TLBRERA = FIELD_DP64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR, 0);
     env->CSR_MERRCTL = FIELD_DP64(env->CSR_MERRCTL, CSR_MERRCTL, ISMERR, 0);
     env->CSR_TID = cs->cpu_index;
+    /*
+     * Workaround for edk2-stable202408, CSR PGD register is set only if
+     * its value is equal to zero for boot cpu, it causes reboot issue.
+     *
+     * Here clear CSR registers relative with TLB.
+     */
+    env->CSR_PGDH = 0;
+    env->CSR_PGDL = 0;
+    env->CSR_PWCL = 0;
+    env->CSR_PWCH = 0;
+    env->CSR_STLBPS = 0;
+    env->CSR_EENTRY = 0;
+    env->CSR_TLBRENTRY = 0;
+    env->CSR_MERRENTRY = 0;
 
     for (n = 0; n < 4; n++) {
         env->CSR_DMW[n] = FIELD_DP64(env->CSR_DMW[n], CSR_DMW, PLV0, 0);
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

For virtio VGA deivce libvirt will select VIRTIO_VGA firstly rather than
VIRTIO_GPU, VIRTIO_VGA device supports frame buffer however it requires
legacy VGA compatible support. Frame buffer area 0xa0000 -- 0xc0000
conflicts with low memory area 0 -- 0x10000000.

Here remove default support for VIRTIO_VGA device, VIRTIO_GPU is prefered
on LoongArch system. For frame buffer video card support, standard VGA can
be used.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240823073050.2619484-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/Kconfig
+++ b/hw/loongarch/Kconfig
@@ -XXX,XX +XXX,XX @@ config LOONGARCH_VIRT
     select DEVICE_TREE
     select PCI
     select PCI_EXPRESS_GENERIC_BRIDGE
-    imply VIRTIO_VGA
     imply PCI_DEVICES
     imply NVDIMM
     imply TPM_TIS_SYSBUS
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

KVM provides interface KVM_REG_LOONGARCH_VCPU_RESET to reset vCPU,
it can be used to clear internal state about kvm kernel. vCPU reset
function is added here for kvm mode.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240822022827.2273534-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/cpu.c               | 2 +-
 target/loongarch/kvm/kvm.c           | 5 ++++-
 target/loongarch/kvm/kvm_loongarch.h | 2 +-
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_reset_hold(Object *obj, ResetType type)
     memset(env->tlb, 0, sizeof(env->tlb));
 #endif
     if (kvm_enabled()) {
-        kvm_arch_reset_vcpu(env);
+        kvm_arch_reset_vcpu(cs);
     }
 #endif
 
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static int kvm_loongarch_put_regs_fp(CPUState *cs)
     return ret;
 }
 
-void kvm_arch_reset_vcpu(CPULoongArchState *env)
+void kvm_arch_reset_vcpu(CPUState *cs)
 {
+    CPULoongArchState *env = cpu_env(cs);
+
     env->mp_state = KVM_MP_STATE_RUNNABLE;
+    kvm_set_one_reg(cs, KVM_REG_LOONGARCH_VCPU_RESET, 0);
 }
 
 static int kvm_loongarch_get_mpstate(CPUState *cs)
diff --git a/target/loongarch/kvm/kvm_loongarch.h b/target/loongarch/kvm/kvm_loongarch.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm_loongarch.h
+++ b/target/loongarch/kvm/kvm_loongarch.h
@@ -XXX,XX +XXX,XX @@
 #define QEMU_KVM_LOONGARCH_H
 
 int  kvm_loongarch_set_interrupt(LoongArchCPU *cpu, int irq, int level);
-void kvm_arch_reset_vcpu(CPULoongArchState *env);
+void kvm_arch_reset_vcpu(CPUState *cs);
 
 #endif
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

Add the support needed for creating prstatus elf notes. This allows
us to use QMP dump-guest-memory.

Now ELF notes of LoongArch only supports general elf notes, LSX and
LASX is not supported, since it is mainly used to dump guest memory.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Tested-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240822065245.2286214-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/arch_dump.c | 167 +++++++++++++++++++++++++++++++++++
 target/loongarch/cpu.c       |   1 +
 target/loongarch/internals.h |   2 +
 target/loongarch/meson.build |   1 +
 4 files changed, 171 insertions(+)
 create mode 100644 target/loongarch/arch_dump.c

diff --git a/target/loongarch/arch_dump.c b/target/loongarch/arch_dump.c
new file mode 100644
index XXXXXXX..XXXXXXX
--- /dev/null
+++ b/target/loongarch/arch_dump.c
@@ -XXX,XX +XXX,XX @@
+/*
+ * Support for writing ELF notes for LoongArch architectures
+ *
+ * Copyright (c) 2023 Loongarch Technology
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2 or later, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "elf.h"
+#include "sysemu/dump.h"
+#include "internals.h"
+
+/* struct user_pt_regs from arch/loongarch/include/uapi/asm/ptrace.h */
+struct loongarch_user_regs {
+    uint64_t gpr[32];
+    uint64_t pad1[1];
+    /* Special CSR registers. */
+    uint64_t csr_era;
+    uint64_t csr_badv;
+    uint64_t pad2[10];
+} QEMU_PACKED;
+
+QEMU_BUILD_BUG_ON(sizeof(struct loongarch_user_regs) != 360);
+
+/* struct elf_prstatus from include/uapi/linux/elfcore.h */
+struct loongarch_elf_prstatus {
+    char pad1[32]; /* 32 == offsetof(struct elf_prstatus, pr_pid) */
+    uint32_t pr_pid;
+    /*
+     * 76 == offsetof(struct elf_prstatus, pr_reg) -
+     * offsetof(struct elf_prstatus, pr_ppid)
+     */
+    char pad2[76];
+    struct loongarch_user_regs pr_reg;
+    uint32_t pr_fpvalid;
+    char pad3[4];
+} QEMU_PACKED;
+
+QEMU_BUILD_BUG_ON(sizeof(struct loongarch_elf_prstatus) != 480);
+
+/* struct user_fp_state from arch/loongarch/include/uapi/asm/ptrace.h */
+struct loongarch_fpu_struct {
+    uint64_t fpr[32];
+    uint64_t fcc;
+    unsigned int fcsr;
+} QEMU_PACKED;
+
+QEMU_BUILD_BUG_ON(sizeof(struct loongarch_fpu_struct) != 268);
+
+struct loongarch_note {
+    Elf64_Nhdr hdr;
+    char name[8]; /* align_up(sizeof("CORE"), 4) */
+    union {
+        struct loongarch_elf_prstatus prstatus;
+        struct loongarch_fpu_struct fpu;
+    };
+} QEMU_PACKED;
+
+#define LOONGARCH_NOTE_HEADER_SIZE offsetof(struct loongarch_note, prstatus)
+#define LOONGARCH_PRSTATUS_NOTE_SIZE                                          \
+    (LOONGARCH_NOTE_HEADER_SIZE + sizeof(struct loongarch_elf_prstatus))
+#define LOONGARCH_PRFPREG_NOTE_SIZE                                           \
+    (LOONGARCH_NOTE_HEADER_SIZE + sizeof(struct loongarch_fpu_struct))
+
+static void loongarch_note_init(struct loongarch_note *note, DumpState *s,
+                                const char *name, Elf64_Word namesz,
+                                Elf64_Word type, Elf64_Word descsz)
+{
+    memset(note, 0, sizeof(*note));
+
+    note->hdr.n_namesz = cpu_to_dump32(s, namesz);
+    note->hdr.n_descsz = cpu_to_dump32(s, descsz);
+    note->hdr.n_type = cpu_to_dump32(s, type);
+
+    memcpy(note->name, name, namesz);
+}
+
+static int loongarch_write_elf64_fprpreg(WriteCoreDumpFunction f,
+                                         CPULoongArchState *env, int cpuid,
+                                         DumpState *s)
+{
+    struct loongarch_note note;
+    int ret, i;
+
+    loongarch_note_init(&note, s, "CORE", 5, NT_PRFPREG, sizeof(note.fpu));
+    note.fpu.fcsr = cpu_to_dump64(s, env->fcsr0);
+
+    for (i = 0; i < 8; i++) {
+        note.fpu.fcc |= env->cf[i] << (8 * i);
+    }
+    note.fpu.fcc = cpu_to_dump64(s, note.fpu.fcc);
+
+    for (i = 0; i < 32; ++i) {
+        note.fpu.fpr[i] = cpu_to_dump64(s, env->fpr[i].vreg.UD[0]);
+    }
+
+    ret = f(&note, LOONGARCH_PRFPREG_NOTE_SIZE, s);
+    if (ret < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+int loongarch_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
+                                   int cpuid, DumpState *s)
+{
+    struct loongarch_note note;
+    CPULoongArchState *env = &LOONGARCH_CPU(cs)->env;
+    int ret, i;
+
+    loongarch_note_init(&note, s, "CORE", 5, NT_PRSTATUS,
+                        sizeof(note.prstatus));
+    note.prstatus.pr_pid = cpu_to_dump32(s, cpuid);
+    note.prstatus.pr_fpvalid = cpu_to_dump32(s, 1);
+
+    for (i = 0; i < 32; ++i) {
+        note.prstatus.pr_reg.gpr[i] = cpu_to_dump64(s, env->gpr[i]);
+    }
+    note.prstatus.pr_reg.csr_era  = cpu_to_dump64(s, env->CSR_ERA);
+    note.prstatus.pr_reg.csr_badv = cpu_to_dump64(s, env->CSR_BADV);
+    ret = f(&note, LOONGARCH_PRSTATUS_NOTE_SIZE, s);
+    if (ret < 0) {
+        return -1;
+    }
+
+    ret = loongarch_write_elf64_fprpreg(f, env, cpuid, s);
+    if (ret < 0) {
+        return -1;
+    }
+
+    return ret;
+}
+
+int cpu_get_dump_info(ArchDumpInfo *info,
+                      const GuestPhysBlockList *guest_phys_blocks)
+{
+    info->d_machine = EM_LOONGARCH;
+    info->d_endian = ELFDATA2LSB;
+    info->d_class = ELFCLASS64;
+
+    return 0;
+}
+
+ssize_t cpu_get_note_size(int class, int machine, int nr_cpus)
+{
+    size_t note_size = 0;
+
+    if (class == ELFCLASS64) {
+        note_size = LOONGARCH_PRSTATUS_NOTE_SIZE + LOONGARCH_PRFPREG_NOTE_SIZE;
+    }
+
+    return note_size * nr_cpus;
+}
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static const TCGCPUOps loongarch_tcg_ops = {
 #include "hw/core/sysemu-cpu-ops.h"
 
 static const struct SysemuCPUOps loongarch_sysemu_ops = {
+    .write_elf64_note = loongarch_cpu_write_elf64_note,
     .get_phys_page_debug = loongarch_cpu_get_phys_page_debug,
 };
 
diff --git a/target/loongarch/internals.h b/target/loongarch/internals.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/internals.h
+++ b/target/loongarch/internals.h
@@ -XXX,XX +XXX,XX @@ void write_fcc(CPULoongArchState *env, uint64_t val);
 int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n);
 int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n);
 void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs);
+int loongarch_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
+                                   int cpuid, DumpState *s);
 
 #endif
diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/meson.build
+++ b/target/loongarch/meson.build
@@ -XXX,XX +XXX,XX @@ loongarch_ss.add(files(
 
 loongarch_system_ss = ss.source_set()
 loongarch_system_ss.add(files(
+  'arch_dump.c',
   'cpu_helper.c',
   'loongarch-qmp-cmds.c',
   'machine.c',
-- 
2.34.1

From: "Jason A. Donenfeld" <Jason@zx2c4.com>

In order to support additional channels of communication using
`-serial`, add several serial ports, up to the standard 4 generally
supported by the 8250 driver.

Fixed: https://lore.kernel.org/all/20240907143439.2792924-1-Jason@zx2c4.com/

Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Tested-by: Bibo Mao <maobibo@loongson.cn>
[gaosong: ACPI uart need't reverse order]
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240907143439.2792924-1-Jason@zx2c4.com>
---
 hw/loongarch/acpi-build.c  | 23 +++++++++++++++--------
 hw/loongarch/virt.c        | 27 +++++++++++++++++----------
 include/hw/pci-host/ls7a.h |  9 +++++----
 3 files changed, 37 insertions(+), 22 deletions(-)

diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/acpi-build.c
+++ b/hw/loongarch/acpi-build.c
@@ -XXX,XX +XXX,XX @@
 
 #include "hw/acpi/generic_event_device.h"
 #include "hw/pci-host/gpex.h"
+#include "sysemu/sysemu.h"
 #include "sysemu/tpm.h"
 #include "hw/platform-bus.h"
 #include "hw/acpi/aml-build.h"
@@ -XXX,XX +XXX,XX @@ struct AcpiBuildState {
     MemoryRegion *linker_mr;
 } AcpiBuildState;
 
-static void build_uart_device_aml(Aml *table)
+static void build_uart_device_aml(Aml *table, int index)
 {
     Aml *dev;
     Aml *crs;
     Aml *pkg0, *pkg1, *pkg2;
-    uint32_t uart_irq = VIRT_UART_IRQ;
-
-    Aml *scope = aml_scope("_SB");
-    dev = aml_device("COMA");
+    Aml *scope;
+    uint32_t uart_irq;
+    uint64_t base;
+
+    uart_irq = VIRT_UART_IRQ + index;
+    base = VIRT_UART_BASE + index * VIRT_UART_SIZE;
+    scope = aml_scope("_SB");
+    dev = aml_device("COM%d", index);
     aml_append(dev, aml_name_decl("_HID", aml_string("PNP0501")));
-    aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+    aml_append(dev, aml_name_decl("_UID", aml_int(index)));
     aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
     crs = aml_resource_template();
     aml_append(crs,
         aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
                          AML_NON_CACHEABLE, AML_READ_WRITE,
-                         0, VIRT_UART_BASE, VIRT_UART_BASE + VIRT_UART_SIZE - 1,
+                         0, base, base + VIRT_UART_SIZE - 1,
                          0, VIRT_UART_SIZE));
     aml_append(crs, aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
                                   AML_SHARED, &uart_irq, 1));
@@ -XXX,XX +XXX,XX @@ static void acpi_dsdt_add_tpm(Aml *scope, LoongArchVirtMachineState *vms)
 static void
 build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
 {
+    int i;
     Aml *dsdt, *scope, *pkg;
     LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine);
     AcpiTable table = { .sig = "DSDT", .rev = 1, .oem_id = lvms->oem_id,
@@ -XXX,XX +XXX,XX @@ build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
 
     acpi_table_begin(&table, table_data);
     dsdt = init_aml_allocator();
-    build_uart_device_aml(dsdt);
+    for (i = 0; i < VIRT_UART_COUNT; i++)
+        build_uart_device_aml(dsdt, i);
     build_pci_device_aml(dsdt, lvms);
     build_la_ged_aml(dsdt, machine);
     build_flash_aml(dsdt, lvms);
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void fdt_add_rtc_node(LoongArchVirtMachineState *lvms,
 }
 
 static void fdt_add_uart_node(LoongArchVirtMachineState *lvms,
-                              uint32_t *pch_pic_phandle)
+                              uint32_t *pch_pic_phandle, hwaddr base,
+                              int irq, bool chosen)
 {
     char *nodename;
-    hwaddr base = VIRT_UART_BASE;
     hwaddr size = VIRT_UART_SIZE;
     MachineState *ms = MACHINE(lvms);
 
@@ -XXX,XX +XXX,XX @@ static void fdt_add_uart_node(LoongArchVirtMachineState *lvms,
     qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "ns16550a");
     qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0, base, 0x0, size);
     qemu_fdt_setprop_cell(ms->fdt, nodename, "clock-frequency", 100000000);
-    qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename);
-    qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts",
-                           VIRT_UART_IRQ - VIRT_GSI_BASE, 0x4);
+    if (chosen)
+        qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename);
+    qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", irq, 0x4);
     qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
                           *pch_pic_phandle);
     g_free(nodename);
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
     /* Add pcie node */
     fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
 
-    serial_mm_init(get_system_memory(), VIRT_UART_BASE, 0,
-                   qdev_get_gpio_in(pch_pic,
-                                    VIRT_UART_IRQ - VIRT_GSI_BASE),
-                   115200, serial_hd(0), DEVICE_LITTLE_ENDIAN);
-    fdt_add_uart_node(lvms, pch_pic_phandle);
+    /*
+     * Create uart fdt node in reverse order so that they appear
+     * in the finished device tree lowest address first
+     */
+    for (i = VIRT_UART_COUNT; i --> 0;) {
+        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
+        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
+        serial_mm_init(get_system_memory(), base, 0,
+                       qdev_get_gpio_in(pch_pic, irq),
+                       115200, serial_hd(i), DEVICE_LITTLE_ENDIAN);
+        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
+    }
 
     /* Network init */
     pci_init_nic_devices(pci_bus, mc->default_nic);
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/pci-host/ls7a.h
+++ b/include/hw/pci-host/ls7a.h
@@ -XXX,XX +XXX,XX @@
 #define VIRT_PCH_PIC_IRQ_NUM     32
 #define VIRT_GSI_BASE            64
 #define VIRT_DEVICE_IRQS         16
+#define VIRT_UART_COUNT          4
 #define VIRT_UART_IRQ            (VIRT_GSI_BASE + 2)
 #define VIRT_UART_BASE           0x1fe001e0
-#define VIRT_UART_SIZE           0X100
-#define VIRT_RTC_IRQ             (VIRT_GSI_BASE + 3)
+#define VIRT_UART_SIZE           0x100
+#define VIRT_RTC_IRQ             (VIRT_GSI_BASE + 6)
 #define VIRT_MISC_REG_BASE       (VIRT_PCH_REG_BASE + 0x00080000)
 #define VIRT_RTC_REG_BASE        (VIRT_MISC_REG_BASE + 0x00050100)
 #define VIRT_RTC_LEN             0x100
-#define VIRT_SCI_IRQ             (VIRT_GSI_BASE + 4)
+#define VIRT_SCI_IRQ             (VIRT_GSI_BASE + 7)
 
 #define VIRT_PLATFORM_BUS_BASEADDRESS   0x16000000
 #define VIRT_PLATFORM_BUS_SIZE          0x2000000
 #define VIRT_PLATFORM_BUS_NUM_IRQS      2
-#define VIRT_PLATFORM_BUS_IRQ           (VIRT_GSI_BASE + 5)
+#define VIRT_PLATFORM_BUS_IRQ           (VIRT_GSI_BASE + 8)
 #endif
-- 
2.34.1

From: "Jason A. Donenfeld" <Jason@zx2c4.com>

If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
initialize early. Set this using the usual guest random number
generation function.

This is the same procedure that's done in b91b6b5a2c ("hw/microblaze:
pass random seed to fdt"), e4b4f0b71c ("hw/riscv: virt: pass random seed
to fdt"), c6fe3e6b4c ("hw/openrisc: virt: pass random seed to fdt"),
67f7e426e5 ("hw/i386: pass RNG seed via setup_data entry"), c287941a4d
("hw/rx: pass random seed to fdt"), 5e19cc68fb ("hw/mips: boston: pass
random seed to fdt"), 6b23a67916 ("hw/nios2: virt: pass random seed to fdt")
c4b075318e ("hw/ppc: pass random seed to fdt"), and 5242876f37
("hw/arm/virt: dt: add rng-seed property").

These earlier commits later were amended to rerandomize the RNG seed on
snapshot load, but the LoongArch code somehow already does that, despite
not having this patch here, presumably due to some lucky copy and
pasting.

Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240905153316.2038769-1-Jason@zx2c4.com>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@
 #include "hw/block/flash.h"
 #include "hw/virtio/virtio-iommu.h"
 #include "qemu/error-report.h"
+#include "qemu/guest-random.h"
 
 static bool virt_is_veiointc_enabled(LoongArchVirtMachineState *lvms)
 {
@@ -XXX,XX +XXX,XX @@ static void fdt_add_uart_node(LoongArchVirtMachineState *lvms,
 static void create_fdt(LoongArchVirtMachineState *lvms)
 {
     MachineState *ms = MACHINE(lvms);
+    uint8_t rng_seed[32];
 
     ms->fdt = create_device_tree(&lvms->fdt_size);
     if (!ms->fdt) {
@@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms)
     qemu_fdt_setprop_cell(ms->fdt, "/", "#address-cells", 0x2);
     qemu_fdt_setprop_cell(ms->fdt, "/", "#size-cells", 0x2);
     qemu_fdt_add_subnode(ms->fdt, "/chosen");
+
+    /* Pass seed to RNG */
+    qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
+    qemu_fdt_setprop(ms->fdt, "/chosen", "rng-seed", rng_seed, sizeof(rng_seed));
 }
 
 static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

Serial port console redirection table can be used for default serial
port selection, like chosen stdout-path selection with FDT method.

With acpi SPCR table added, early debug console can be parsed from
SPCR table with simple kernel parameter earlycon rather than
earlycon=uart,mmio,0x1fe001e0

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240907073037.243353-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/acpi-build.c | 40 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/acpi-build.c
+++ b/hw/loongarch/acpi-build.c
@@ -XXX,XX +XXX,XX @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
     acpi_table_end(linker, &table);
 }
 
+/*
+ * Serial Port Console Redirection Table (SPCR)
+ * https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
+ */
+static void
+spcr_setup(GArray *table_data, BIOSLinker *linker, MachineState *machine)
+{
+    LoongArchVirtMachineState *lvms;
+    AcpiSpcrData serial = {
+        .interface_type = 0,       /* 16550 compatible */
+        .base_addr.id = AML_AS_SYSTEM_MEMORY,
+        .base_addr.width = 32,
+        .base_addr.offset = 0,
+        .base_addr.size = 1,
+        .base_addr.addr = VIRT_UART_BASE,
+        .interrupt_type = 0,       /* Interrupt not supported */
+        .pc_interrupt = 0,
+        .interrupt = VIRT_UART_IRQ,
+        .baud_rate = 7,            /* 115200 */
+        .parity = 0,
+        .stop_bits = 1,
+        .flow_control = 0,
+        .terminal_type = 3,        /* ANSI */
+        .language = 0,             /* Language */
+        .pci_device_id = 0xffff,   /* not a PCI device*/
+        .pci_vendor_id = 0xffff,   /* not a PCI device*/
+        .pci_bus = 0,
+        .pci_device = 0,
+        .pci_function = 0,
+        .pci_flags = 0,
+        .pci_segment = 0,
+    };
+
+    lvms = LOONGARCH_VIRT_MACHINE(machine);
+    build_spcr(table_data, linker, &serial, 2, lvms->oem_id,
+               lvms->oem_table_id);
+}
+
 typedef
 struct AcpiBuildState {
     /* Copy of table in RAM (for patching). */
@@ -XXX,XX +XXX,XX @@ static void acpi_build(AcpiBuildTables *tables, MachineState *machine)
 
     acpi_add_table(table_offsets, tables_blob);
     build_srat(tables_blob, tables->linker, machine);
+    acpi_add_table(table_offsets, tables_blob);
+    spcr_setup(tables_blob, tables->linker, machine);
 
     if (machine->numa_state->num_nodes) {
         if (machine->numa_state->have_numa_distance) {
-- 
2.34.1

The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:

Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)

are available in the Git repository at:

https://gitlab.com/bibo-mao/qemu.git pull-loongarch-20241213

for you to fetch changes up to 78aa256571aa06f32001bd80635a1858187c609b:

hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic (2024-12-13 14:39:39 +0800)

----------------------------------------------------------------
pull-loongarch-20241213

----------------------------------------------------------------
Bibo Mao (8):
      include: Add loongarch_pic_common header file
      include: Move struct LoongArchPCHPIC to loongarch_pic_common header file
      hw/intc/loongarch_pch: Merge instance_init() into realize()
      hw/intc/loongarch_pch: Rename LoongArchPCHPIC with LoongArchPICCommonState
      hw/intc/loongarch_pch: Move some functions to file loongarch_pic_common
      hw/intc/loongarch_pch: Inherit from loongarch_pic_common
      hw/intc/loongarch_pch: Add pre_save and post_load interfaces
      hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic

hw/intc/loongarch_pch_pic.c            | 106 +++++++++++----------------------
 hw/intc/loongarch_pic_common.c         |  97 ++++++++++++++++++++++++++++++
 hw/intc/meson.build                    |   2 +-
 hw/loongarch/virt.c                    |   2 +-
 include/hw/intc/loongarch_pch_pic.h    |  70 +++++-----------------
 include/hw/intc/loongarch_pic_common.h |  82 +++++++++++++++++++++++++
 6 files changed, 230 insertions(+), 129 deletions(-)
 create mode 100644 hw/intc/loongarch_pic_common.c
 create mode 100644 include/hw/intc/loongarch_pic_common.h

Add common header file hw/intc/loongarch_pic_common.h, and move
some macro definition from hw/intc/loongarch_pch_pic.h to the common
header file.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/intc/loongarch_pch_pic.h    | 36 +++-------------------
 include/hw/intc/loongarch_pic_common.h | 42 ++++++++++++++++++++++++++
 2 files changed, 47 insertions(+), 31 deletions(-)
 create mode 100644 include/hw/intc/loongarch_pic_common.h

diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pch_pic.h
+++ b/include/hw/intc/loongarch_pch_pic.h
@@ -XXX,XX +XXX,XX @@
  * Copyright (c) 2021 Loongson Technology Corporation Limited
  */
 
-#include "hw/sysbus.h"
+#ifndef HW_LOONGARCH_PCH_PIC_H
+#define HW_LOONGARCH_PCH_PIC_H
+
+#include "hw/intc/loongarch_pic_common.h"
 
 #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
 #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
 OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
 
-#define PCH_PIC_INT_ID_VAL              0x7000000UL
-#define PCH_PIC_INT_ID_VER              0x1UL
-
-#define PCH_PIC_INT_ID_LO               0x00
-#define PCH_PIC_INT_ID_HI               0x04
-#define PCH_PIC_INT_MASK_LO             0x20
-#define PCH_PIC_INT_MASK_HI             0x24
-#define PCH_PIC_HTMSI_EN_LO             0x40
-#define PCH_PIC_HTMSI_EN_HI             0x44
-#define PCH_PIC_INT_EDGE_LO             0x60
-#define PCH_PIC_INT_EDGE_HI             0x64
-#define PCH_PIC_INT_CLEAR_LO            0x80
-#define PCH_PIC_INT_CLEAR_HI            0x84
-#define PCH_PIC_AUTO_CTRL0_LO           0xc0
-#define PCH_PIC_AUTO_CTRL0_HI           0xc4
-#define PCH_PIC_AUTO_CTRL1_LO           0xe0
-#define PCH_PIC_AUTO_CTRL1_HI           0xe4
-#define PCH_PIC_ROUTE_ENTRY_OFFSET      0x100
-#define PCH_PIC_ROUTE_ENTRY_END         0x13f
-#define PCH_PIC_HTMSI_VEC_OFFSET        0x200
-#define PCH_PIC_HTMSI_VEC_END           0x23f
-#define PCH_PIC_INT_STATUS_LO           0x3a0
-#define PCH_PIC_INT_STATUS_HI           0x3a4
-#define PCH_PIC_INT_POL_LO              0x3e0
-#define PCH_PIC_INT_POL_HI              0x3e4
-
-#define STATUS_LO_START                 0
-#define STATUS_HI_START                 0x4
-#define POL_LO_START                    0x40
-#define POL_HI_START                    0x44
 struct LoongArchPCHPIC {
     SysBusDevice parent_obj;
     qemu_irq parent_irq[64];
@@ -XXX,XX +XXX,XX @@ struct LoongArchPCHPIC {
     MemoryRegion iomem8;
     unsigned int irq_num;
 };
+#endif /* HW_LOONGARCH_PCH_PIC_H */
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
new file mode 100644
index XXXXXXX..XXXXXXX
--- /dev/null
+++ b/include/hw/intc/loongarch_pic_common.h
@@ -XXX,XX +XXX,XX @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * LoongArch 7A1000 I/O interrupt controller definitions
+ * Copyright (c) 2024 Loongson Technology Corporation Limited
+ */
+
+#ifndef HW_LOONGARCH_PIC_COMMON_H
+#define HW_LOONGARCH_PIC_COMMON_H
+
+#include "hw/pci-host/ls7a.h"
+#include "hw/sysbus.h"
+
+#define PCH_PIC_INT_ID_VAL              0x7000000UL
+#define PCH_PIC_INT_ID_VER              0x1UL
+#define PCH_PIC_INT_ID_LO               0x00
+#define PCH_PIC_INT_ID_HI               0x04
+#define PCH_PIC_INT_MASK_LO             0x20
+#define PCH_PIC_INT_MASK_HI             0x24
+#define PCH_PIC_HTMSI_EN_LO             0x40
+#define PCH_PIC_HTMSI_EN_HI             0x44
+#define PCH_PIC_INT_EDGE_LO             0x60
+#define PCH_PIC_INT_EDGE_HI             0x64
+#define PCH_PIC_INT_CLEAR_LO            0x80
+#define PCH_PIC_INT_CLEAR_HI            0x84
+#define PCH_PIC_AUTO_CTRL0_LO           0xc0
+#define PCH_PIC_AUTO_CTRL0_HI           0xc4
+#define PCH_PIC_AUTO_CTRL1_LO           0xe0
+#define PCH_PIC_AUTO_CTRL1_HI           0xe4
+#define PCH_PIC_ROUTE_ENTRY_OFFSET      0x100
+#define PCH_PIC_ROUTE_ENTRY_END         0x13f
+#define PCH_PIC_HTMSI_VEC_OFFSET        0x200
+#define PCH_PIC_HTMSI_VEC_END           0x23f
+#define PCH_PIC_INT_STATUS_LO           0x3a0
+#define PCH_PIC_INT_STATUS_HI           0x3a4
+#define PCH_PIC_INT_POL_LO              0x3e0
+#define PCH_PIC_INT_POL_HI              0x3e4
+
+#define STATUS_LO_START                 0
+#define STATUS_HI_START                 0x4
+#define POL_LO_START                    0x40
+#define POL_HI_START                    0x44
+#endif  /* HW_LOONGARCH_PIC_COMMON_H */
-- 
2.43.5

Move structure LoongArchPCHPIC from header file loongarch_pch_pic.h
to file loongarch_pic_common.h, and rename structure name with
LoongArchPICCommonState.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/intc/loongarch_pch_pic.h    | 27 +------------------------
 include/hw/intc/loongarch_pic_common.h | 28 ++++++++++++++++++++++++++
 2 files changed, 29 insertions(+), 26 deletions(-)

diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pch_pic.h
+++ b/include/hw/intc/loongarch_pch_pic.h
@@ -XXX,XX +XXX,XX @@
 
 #include "hw/intc/loongarch_pic_common.h"
 
+#define LoongArchPCHPIC LoongArchPICCommonState
 #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
 #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
 OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
 
-struct LoongArchPCHPIC {
-    SysBusDevice parent_obj;
-    qemu_irq parent_irq[64];
-    uint64_t int_mask; /*0x020 interrupt mask register*/
-    uint64_t htmsi_en; /*0x040 1=msi*/
-    uint64_t intedge; /*0x060 edge=1 level  =0*/
-    uint64_t intclr; /*0x080 for clean edge int,set 1 clean,set 0 is noused*/
-    uint64_t auto_crtl0; /*0x0c0*/
-    uint64_t auto_crtl1; /*0x0e0*/
-    uint64_t last_intirr;    /* edge detection */
-    uint64_t intirr; /* 0x380 interrupt request register */
-    uint64_t intisr; /* 0x3a0 interrupt service register */
-    /*
-     * 0x3e0 interrupt level polarity selection
-     * register 0 for high level trigger
-     */
-    uint64_t int_polarity;
-
-    uint8_t route_entry[64]; /*0x100 - 0x138*/
-    uint8_t htmsi_vector[64]; /*0x200 - 0x238*/
-
-    MemoryRegion iomem32_low;
-    MemoryRegion iomem32_high;
-    MemoryRegion iomem8;
-    unsigned int irq_num;
-};
 #endif /* HW_LOONGARCH_PCH_PIC_H */
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pic_common.h
+++ b/include/hw/intc/loongarch_pic_common.h
@@ -XXX,XX +XXX,XX @@
 #define STATUS_HI_START                 0x4
 #define POL_LO_START                    0x40
 #define POL_HI_START                    0x44
+
+struct LoongArchPICCommonState {
+    SysBusDevice parent_obj;
+
+    qemu_irq parent_irq[64];
+    uint64_t int_mask;        /* 0x020 interrupt mask register */
+    uint64_t htmsi_en;        /* 0x040 1=msi */
+    uint64_t intedge;         /* 0x060 edge=1 level=0 */
+    uint64_t intclr;          /* 0x080 clean edge int, set 1 clean, 0 noused */
+    uint64_t auto_crtl0;      /* 0x0c0 */
+    uint64_t auto_crtl1;      /* 0x0e0 */
+    uint64_t last_intirr;     /* edge detection */
+    uint64_t intirr;          /* 0x380 interrupt request register */
+    uint64_t intisr;          /* 0x3a0 interrupt service register */
+    /*
+     * 0x3e0 interrupt level polarity selection
+     * register 0 for high level trigger
+     */
+    uint64_t int_polarity;
+
+    uint8_t route_entry[64];  /* 0x100 - 0x138 */
+    uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */
+
+    MemoryRegion iomem32_low;
+    MemoryRegion iomem32_high;
+    MemoryRegion iomem8;
+    unsigned int irq_num;
+};
 #endif  /* HW_LOONGARCH_PIC_COMMON_H */
-- 
2.43.5

Memory region is created in instance_init(), merge it into function
realize(). There is no special class_init() for loongarch_pch object.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pch_pic.c | 15 ++++-----------
 1 file changed, 4 insertions(+), 11 deletions(-)

With pic vmstate, rename structure name vmstate_loongarch_pch_pic with
vmstate_loongarch_pic_common, and with pic property rename
loongarch_pch_pic_properties with loongarch_pic_common_properties.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pch_pic.c | 52 +++++++++++++++++++++++--------------
 1 file changed, 32 insertions(+), 20 deletions(-)

Move some common functions to file loongarch_pic_common.c, the common
functions include loongarch_pic_common_realize(), property structure
loongarch_pic_common_properties and vmstate structure
vmstate_loongarch_pic_common.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pch_pic.c    | 37 +-----------------------------
 hw/intc/loongarch_pic_common.c | 41 ++++++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+), 36 deletions(-)
 create mode 100644 hw/intc/loongarch_pic_common.c

Set TYPE_LOONGARCH_PIC inherit from TYPE_LOONGARCH_PIC_COMMON object,
it shares vmsate and property of TYPE_LOONGARCH_PIC_COMMON, and has
its own realize() function.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pch_pic.c            | 38 ++++++++++++--------------
 hw/intc/loongarch_pic_common.c         | 32 +++++++++++++++++++++-
 hw/intc/meson.build                    |  2 +-
 include/hw/intc/loongarch_pch_pic.h    | 21 +++++++++++---
 include/hw/intc/loongarch_pic_common.h | 10 +++++++
 5 files changed, 77 insertions(+), 26 deletions(-)

diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/loongarch_pch_pic.c
+++ b/hw/intc/loongarch_pch_pic.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_reset(DeviceState *d)
     s->int_polarity = 0x0;
 }
 
-#include "loongarch_pic_common.c"
-static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+static void loongarch_pic_realize(DeviceState *dev, Error **errp)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
-    SysBusDevice *sbd  = SYS_BUS_DEVICE(dev);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
+    LoongarchPICClass *lpc = LOONGARCH_PIC_GET_CLASS(dev);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
     Error *local_err = NULL;
 
-    loongarch_pic_common_realize(dev, &local_err);
+    lpc->parent_realize(dev, &local_err);
     if (local_err) {
         error_propagate(errp, local_err);
         return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
 
 }
 
-static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
+static void loongarch_pic_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
+    LoongarchPICClass *lpc = LOONGARCH_PIC_CLASS(klass);
 
-    dc->realize = loongarch_pch_pic_realize;
     device_class_set_legacy_reset(dc, loongarch_pch_pic_reset);
-    dc->vmsd = &vmstate_loongarch_pic_common;
-    device_class_set_props(dc, loongarch_pic_common_properties);
+    device_class_set_parent_realize(dc, loongarch_pic_realize,
+                                    &lpc->parent_realize);
 }
 
-static const TypeInfo loongarch_pch_pic_info = {
-    .name          = TYPE_LOONGARCH_PCH_PIC,
-    .parent        = TYPE_SYS_BUS_DEVICE,
-    .instance_size = sizeof(LoongArchPCHPIC),
-    .class_init    = loongarch_pch_pic_class_init,
+static const TypeInfo loongarch_pic_types[] = {
+   {
+        .name               = TYPE_LOONGARCH_PIC,
+        .parent             = TYPE_LOONGARCH_PIC_COMMON,
+        .instance_size      = sizeof(LoongarchPICState),
+        .class_size         = sizeof(LoongarchPICClass),
+        .class_init         = loongarch_pic_class_init,
+    }
 };
 
-static void loongarch_pch_pic_register_types(void)
-{
-    type_register_static(&loongarch_pch_pic_info);
-}
-
-type_init(loongarch_pch_pic_register_types)
+DEFINE_TYPES(loongarch_pic_types)
diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/loongarch_pic_common.c
+++ b/hw/intc/loongarch_pic_common.c
@@ -XXX,XX +XXX,XX @@
  * Copyright (C) 2024 Loongson Technology Corporation Limited
  */
 
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/intc/loongarch_pic_common.h"
+#include "hw/qdev-properties.h"
+#include "migration/vmstate.h"
+
 static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
 {
-    LoongArchPICCommonState *s = LOONGARCH_PCH_PIC(dev);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
 
     if (!s->irq_num || s->irq_num  > VIRT_PCH_PIC_IRQ_NUM) {
         error_setg(errp, "Invalid 'pic_irq_num'");
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = {
         VMSTATE_END_OF_LIST()
     }
 };
+
+static void loongarch_pic_common_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_CLASS(klass);
+
+    device_class_set_parent_realize(dc, loongarch_pic_common_realize,
+                                    &lpcc->parent_realize);
+    device_class_set_props(dc, loongarch_pic_common_properties);
+    dc->vmsd = &vmstate_loongarch_pic_common;
+}
+
+static const TypeInfo loongarch_pic_common_types[] = {
+    {
+        .name               = TYPE_LOONGARCH_PIC_COMMON,
+        .parent             = TYPE_SYS_BUS_DEVICE,
+        .instance_size      = sizeof(LoongArchPICCommonState),
+        .class_size         = sizeof(LoongArchPICCommonClass),
+        .class_init         = loongarch_pic_common_class_init,
+        .abstract           = true,
+    }
+};
+
+DEFINE_TYPES(loongarch_pic_common_types)
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/meson.build
+++ b/hw/intc/meson.build
@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c'))
 specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c'))
 specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c'))
 specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c'))
-specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c'))
+specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c', 'loongarch_pic_common.c'))
 specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c'))
 specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c'))
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pch_pic.h
+++ b/include/hw/intc/loongarch_pch_pic.h
@@ -XXX,XX +XXX,XX @@
 
 #include "hw/intc/loongarch_pic_common.h"
 
-#define LoongArchPCHPIC LoongArchPICCommonState
-#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
-#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
-OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
+#define TYPE_LOONGARCH_PIC  "loongarch_pic"
+#define PCH_PIC_NAME(name)  TYPE_LOONGARCH_PIC#name
+OBJECT_DECLARE_TYPE(LoongarchPICState, LoongarchPICClass, LOONGARCH_PIC)
+
+struct LoongarchPICState {
+    LoongArchPICCommonState parent_obj;
+};
+
+struct LoongarchPICClass {
+    LoongArchPICCommonClass parent_class;
+
+    DeviceRealize parent_realize;
+};
+
+#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC
+typedef struct LoongArchPICCommonState LoongArchPCHPIC;
+#define LOONGARCH_PCH_PIC(obj)   ((struct LoongArchPICCommonState *)(obj))
 
 #endif /* HW_LOONGARCH_PCH_PIC_H */
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pic_common.h
+++ b/include/hw/intc/loongarch_pic_common.h
@@ -XXX,XX +XXX,XX @@
 #define POL_LO_START                    0x40
 #define POL_HI_START                    0x44
 
+#define TYPE_LOONGARCH_PIC_COMMON "loongarch_pic_common"
+OBJECT_DECLARE_TYPE(LoongArchPICCommonState,
+                    LoongArchPICCommonClass, LOONGARCH_PIC_COMMON)
+
 struct LoongArchPICCommonState {
     SysBusDevice parent_obj;
 
@@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonState {
     MemoryRegion iomem8;
     unsigned int irq_num;
 };
+
+struct LoongArchPICCommonClass {
+    SysBusDeviceClass parent_class;
+
+    DeviceRealize parent_realize;
+};
 #endif  /* HW_LOONGARCH_PIC_COMMON_H */
-- 
2.43.5

Add vmstate pre_save and post_load interfaces, which can be used
by pic kvm driver in future.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pic_common.c         | 26 ++++++++++++++++++++++++++
 include/hw/intc/loongarch_pic_common.h |  2 ++
 2 files changed, 28 insertions(+)

diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/loongarch_pic_common.c
+++ b/hw/intc/loongarch_pic_common.c
@@ -XXX,XX +XXX,XX @@
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
 
+static int loongarch_pic_pre_save(void *opaque)
+{
+    LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
+    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
+
+    if (lpcc->pre_save) {
+        return lpcc->pre_save(s);
+    }
+
+    return 0;
+}
+
+static int loongarch_pic_post_load(void *opaque, int version_id)
+{
+    LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
+    LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
+
+    if (lpcc->post_load) {
+        return lpcc->post_load(s, version_id);
+    }
+
+    return 0;
+}
+
 static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
 {
     LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_pic_common = {
     .name = "loongarch_pch_pic",
     .version_id = 1,
     .minimum_version_id = 1,
+    .pre_save  = loongarch_pic_pre_save,
+    .post_load = loongarch_pic_post_load,
     .fields = (const VMStateField[]) {
         VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
         VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pic_common.h
+++ b/include/hw/intc/loongarch_pic_common.h
@@ -XXX,XX +XXX,XX @@ struct LoongArchPICCommonClass {
     SysBusDeviceClass parent_class;
 
     DeviceRealize parent_realize;
+    int (*pre_save)(LoongArchPICCommonState *s);
+    int (*post_load)(LoongArchPICCommonState *s, int version_id);
 };
 #endif  /* HW_LOONGARCH_PIC_COMMON_H */
-- 
2.43.5

Remove definition about LoongArchPCHPIC and LOONGARCH_PCH_PIC, and
replace them with LoongArchPICCommonState and LOONGARCH_PIC_COMMON
separately. Also remove unnecessary header files.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pch_pic.c         | 24 ++++++++++--------------
 hw/loongarch/virt.c                 |  2 +-
 include/hw/intc/loongarch_pch_pic.h |  4 ----
 3 files changed, 11 insertions(+), 19 deletions(-)

diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/loongarch_pch_pic.c
+++ b/hw/intc/loongarch_pch_pic.c
@@ -XXX,XX +XXX,XX @@
 
 #include "qemu/osdep.h"
 #include "qemu/bitops.h"
-#include "hw/sysbus.h"
-#include "hw/loongarch/virt.h"
-#include "hw/pci-host/ls7a.h"
 #include "hw/irq.h"
 #include "hw/intc/loongarch_pch_pic.h"
-#include "hw/qdev-properties.h"
-#include "migration/vmstate.h"
 #include "trace.h"
 #include "qapi/error.h"
 
-static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
+static void pch_pic_update_irq(LoongArchPICCommonState *s, uint64_t mask,
+                               int level)
 {
     uint64_t val;
     int irq;
@@ -XXX,XX +XXX,XX @@ static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
 
 static void pch_pic_irq_handler(void *opaque, int irq, int level)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint64_t mask = 1ULL << irq;
 
     assert(irq < s->irq_num);
@@ -XXX,XX +XXX,XX @@ static void pch_pic_irq_handler(void *opaque, int irq, int level)
 static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr,
                                             unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint64_t val = 0;
     uint32_t offset = addr & 0xfff;
 
@@ -XXX,XX +XXX,XX @@ static uint64_t get_writew_val(uint64_t value, uint32_t target, bool hi)
 static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,
                                          uint64_t value, unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint32_t offset, old_valid, data = (uint32_t)value;
     uint64_t old, int_mask;
     offset = addr & 0xfff;
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,
 static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,
                                         unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint64_t val = 0;
     uint32_t offset = addr & 0xfff;
 
@@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,
 static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,
                                      uint64_t value, unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint32_t offset, data = (uint32_t)value;
     offset = addr & 0xfff;
 
@@ -XXX,XX +XXX,XX @@ static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,
 static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,
                                         unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     uint64_t val = 0;
     uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
     int64_t offset_tmp;
@@ -XXX,XX +XXX,XX @@ static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,
 static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr,
                                      uint64_t data, unsigned size)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
     int32_t offset_tmp;
     uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
 
@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_pch_pic_reg8_ops = {
 
 static void loongarch_pch_pic_reset(DeviceState *d)
 {
-    LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(d);
+    LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d);
     int i;
 
     s->int_mask = -1;
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     /* Add Extend I/O Interrupt Controller node */
     fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
 
-    pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
+    pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
     num = VIRT_PCH_PIC_IRQ_NUM;
     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
     d = SYS_BUS_DEVICE(pch_pic);
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_pch_pic.h
+++ b/include/hw/intc/loongarch_pch_pic.h
@@ -XXX,XX +XXX,XX @@ struct LoongarchPICClass {
     DeviceRealize parent_realize;
 };
 
-#define TYPE_LOONGARCH_PCH_PIC TYPE_LOONGARCH_PIC
-typedef struct LoongArchPICCommonState LoongArchPCHPIC;
-#define LOONGARCH_PCH_PIC(obj)   ((struct LoongArchPICCommonState *)(obj))
-
 #endif /* HW_LOONGARCH_PCH_PIC_H */
-- 
2.43.5

Add common header file include/hw/intc/loongarch_extioi_common.h, and
move some macro definition from include/hw/intc/loongarch_extioi.h to
the common header file.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/intc/loongarch_extioi.h        | 50 +------------------
 include/hw/intc/loongarch_extioi_common.h | 58 +++++++++++++++++++++++
 2 files changed, 59 insertions(+), 49 deletions(-)
 create mode 100644 include/hw/intc/loongarch_extioi_common.h

diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_extioi.h
+++ b/include/hw/intc/loongarch_extioi.h
@@ -XXX,XX +XXX,XX @@
  * Copyright (C) 2021 Loongson Technology Corporation Limited
  */
 
-#include "hw/sysbus.h"
-#include "hw/loongarch/virt.h"
-
 #ifndef LOONGARCH_EXTIOI_H
 #define LOONGARCH_EXTIOI_H
 
-#define LS3A_INTC_IP               8
-#define EXTIOI_IRQS                (256)
-#define EXTIOI_IRQS_BITMAP_SIZE    (256 / 8)
-/* irq from EXTIOI is routed to no more than 4 cpus */
-#define EXTIOI_CPUS                (4)
-/* map to ipnum per 32 irqs */
-#define EXTIOI_IRQS_IPMAP_SIZE     (256 / 32)
-#define EXTIOI_IRQS_COREMAP_SIZE   256
-#define EXTIOI_IRQS_NODETYPE_COUNT  16
-#define EXTIOI_IRQS_GROUP_COUNT    8
-
-#define APIC_OFFSET                  0x400
-#define APIC_BASE                    (0x1000ULL + APIC_OFFSET)
-
-#define EXTIOI_NODETYPE_START        (0x4a0 - APIC_OFFSET)
-#define EXTIOI_NODETYPE_END          (0x4c0 - APIC_OFFSET)
-#define EXTIOI_IPMAP_START           (0x4c0 - APIC_OFFSET)
-#define EXTIOI_IPMAP_END             (0x4c8 - APIC_OFFSET)
-#define EXTIOI_ENABLE_START          (0x600 - APIC_OFFSET)
-#define EXTIOI_ENABLE_END            (0x620 - APIC_OFFSET)
-#define EXTIOI_BOUNCE_START          (0x680 - APIC_OFFSET)
-#define EXTIOI_BOUNCE_END            (0x6a0 - APIC_OFFSET)
-#define EXTIOI_ISR_START             (0x700 - APIC_OFFSET)
-#define EXTIOI_ISR_END               (0x720 - APIC_OFFSET)
-#define EXTIOI_COREISR_START         (0x800 - APIC_OFFSET)
-#define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
-#define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
-#define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
-#define EXTIOI_SIZE                  0x800
-
-#define EXTIOI_VIRT_BASE             (0x40000000)
-#define EXTIOI_VIRT_SIZE             (0x1000)
-#define EXTIOI_VIRT_FEATURES         (0x0)
-#define  EXTIOI_HAS_VIRT_EXTENSION   (0)
-#define  EXTIOI_HAS_ENABLE_OPTION    (1)
-#define  EXTIOI_HAS_INT_ENCODE       (2)
-#define  EXTIOI_HAS_CPU_ENCODE       (3)
-#define  EXTIOI_VIRT_HAS_FEATURES    (BIT(EXTIOI_HAS_VIRT_EXTENSION)  \
-                                      | BIT(EXTIOI_HAS_ENABLE_OPTION) \
-                                      | BIT(EXTIOI_HAS_CPU_ENCODE))
-#define EXTIOI_VIRT_CONFIG           (0x4)
-#define  EXTIOI_ENABLE               (1)
-#define  EXTIOI_ENABLE_INT_ENCODE    (2)
-#define  EXTIOI_ENABLE_CPU_ENCODE    (3)
-#define EXTIOI_VIRT_COREMAP_START    (0x40)
-#define EXTIOI_VIRT_COREMAP_END      (0x240)
+#include "hw/intc/loongarch_extioi_common.h"
 
 typedef struct ExtIOICore {
     uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
new file mode 100644
index XXXXXXX..XXXXXXX
--- /dev/null
+++ b/include/hw/intc/loongarch_extioi_common.h
@@ -XXX,XX +XXX,XX @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * LoongArch 3A5000 ext interrupt controller definitions
+ * Copyright (C) 2024 Loongson Technology Corporation Limited
+ */
+
+#ifndef LOONGARCH_EXTIOI_COMMON_H
+#define LOONGARCH_EXTIOI_COMMON_H
+
+#include "hw/sysbus.h"
+#include "hw/loongarch/virt.h"
+
+#define LS3A_INTC_IP                 8
+#define EXTIOI_IRQS                  (256)
+#define EXTIOI_IRQS_BITMAP_SIZE      (256 / 8)
+/* irq from EXTIOI is routed to no more than 4 cpus */
+#define EXTIOI_CPUS                  (4)
+/* map to ipnum per 32 irqs */
+#define EXTIOI_IRQS_IPMAP_SIZE       (256 / 32)
+#define EXTIOI_IRQS_COREMAP_SIZE     256
+#define EXTIOI_IRQS_NODETYPE_COUNT   16
+#define EXTIOI_IRQS_GROUP_COUNT      8
+
+#define APIC_OFFSET                  0x400
+#define APIC_BASE                    (0x1000ULL + APIC_OFFSET)
+#define EXTIOI_NODETYPE_START        (0x4a0 - APIC_OFFSET)
+#define EXTIOI_NODETYPE_END          (0x4c0 - APIC_OFFSET)
+#define EXTIOI_IPMAP_START           (0x4c0 - APIC_OFFSET)
+#define EXTIOI_IPMAP_END             (0x4c8 - APIC_OFFSET)
+#define EXTIOI_ENABLE_START          (0x600 - APIC_OFFSET)
+#define EXTIOI_ENABLE_END            (0x620 - APIC_OFFSET)
+#define EXTIOI_BOUNCE_START          (0x680 - APIC_OFFSET)
+#define EXTIOI_BOUNCE_END            (0x6a0 - APIC_OFFSET)
+#define EXTIOI_ISR_START             (0x700 - APIC_OFFSET)
+#define EXTIOI_ISR_END               (0x720 - APIC_OFFSET)
+#define EXTIOI_COREISR_START         (0x800 - APIC_OFFSET)
+#define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
+#define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
+#define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
+#define EXTIOI_SIZE                  0x800
+
+#define EXTIOI_VIRT_BASE             (0x40000000)
+#define EXTIOI_VIRT_SIZE             (0x1000)
+#define EXTIOI_VIRT_FEATURES         (0x0)
+#define  EXTIOI_HAS_VIRT_EXTENSION   (0)
+#define  EXTIOI_HAS_ENABLE_OPTION    (1)
+#define  EXTIOI_HAS_INT_ENCODE       (2)
+#define  EXTIOI_HAS_CPU_ENCODE       (3)
+#define  EXTIOI_VIRT_HAS_FEATURES    (BIT(EXTIOI_HAS_VIRT_EXTENSION)  \
+                                      | BIT(EXTIOI_HAS_ENABLE_OPTION) \
+                                      | BIT(EXTIOI_HAS_CPU_ENCODE))
+#define EXTIOI_VIRT_CONFIG           (0x4)
+#define  EXTIOI_ENABLE               (1)
+#define  EXTIOI_ENABLE_INT_ENCODE    (2)
+#define  EXTIOI_ENABLE_CPU_ENCODE    (3)
+#define EXTIOI_VIRT_COREMAP_START    (0x40)
+#define EXTIOI_VIRT_COREMAP_END      (0x240)
+#endif /* LOONGARCH_EXTIOI_H */
-- 
2.43.5

Move definiton of structure LoongArchExtIOI from header file loongarch_extioi.h
to file loongarch_extioi_common.h.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/intc/loongarch_extioi.h        | 26 ----------------------
 include/hw/intc/loongarch_extioi_common.h | 27 +++++++++++++++++++++++
 2 files changed, 27 insertions(+), 26 deletions(-)

diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_extioi.h
+++ b/include/hw/intc/loongarch_extioi.h
@@ -XXX,XX +XXX,XX @@
 
 #include "hw/intc/loongarch_extioi_common.h"
 
-typedef struct ExtIOICore {
-    uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
-    DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
-    qemu_irq parent_irq[LS3A_INTC_IP];
-} ExtIOICore;
-
 #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi"
 OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI)
-struct LoongArchExtIOI {
-    SysBusDevice parent_obj;
-    uint32_t num_cpu;
-    uint32_t features;
-    uint32_t status;
-    /* hardware state */
-    uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
-    uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
-    uint32_t isr[EXTIOI_IRQS / 32];
-    uint32_t enable[EXTIOI_IRQS / 32];
-    uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
-    uint32_t coremap[EXTIOI_IRQS / 4];
-    uint32_t sw_pending[EXTIOI_IRQS / 32];
-    uint8_t  sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
-    uint8_t  sw_coremap[EXTIOI_IRQS];
-    qemu_irq irq[EXTIOI_IRQS];
-    ExtIOICore *cpu;
-    MemoryRegion extioi_system_mem;
-    MemoryRegion virt_extend;
-};
 #endif /* LOONGARCH_EXTIOI_H */
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_extioi_common.h
+++ b/include/hw/intc/loongarch_extioi_common.h
@@ -XXX,XX +XXX,XX @@
 #define  EXTIOI_ENABLE_CPU_ENCODE    (3)
 #define EXTIOI_VIRT_COREMAP_START    (0x40)
 #define EXTIOI_VIRT_COREMAP_END      (0x240)
+
+typedef struct ExtIOICore {
+    uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
+    DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
+    qemu_irq parent_irq[LS3A_INTC_IP];
+} ExtIOICore;
+
+struct LoongArchExtIOI {
+    SysBusDevice parent_obj;
+    uint32_t num_cpu;
+    uint32_t features;
+    uint32_t status;
+    /* hardware state */
+    uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
+    uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
+    uint32_t isr[EXTIOI_IRQS / 32];
+    uint32_t enable[EXTIOI_IRQS / 32];
+    uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
+    uint32_t coremap[EXTIOI_IRQS / 4];
+    uint32_t sw_pending[EXTIOI_IRQS / 32];
+    uint8_t  sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
+    uint8_t  sw_coremap[EXTIOI_IRQS];
+    qemu_irq irq[EXTIOI_IRQS];
+    ExtIOICore *cpu;
+    MemoryRegion extioi_system_mem;
+    MemoryRegion virt_extend;
+};
 #endif /* LOONGARCH_EXTIOI_H */
-- 
2.43.5

Rename structure LoongArchExtIOI with LoongArchExtIOICommonState,
since it is defined in file loongarch_extioi_common.h

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/intc/loongarch_extioi.h        | 1 +
 include/hw/intc/loongarch_extioi_common.h | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_extioi.h
+++ b/include/hw/intc/loongarch_extioi.h
@@ -XXX,XX +XXX,XX @@
 
 #include "hw/intc/loongarch_extioi_common.h"
 
+#define LoongArchExtIOI LoongArchExtIOICommonState
 #define TYPE_LOONGARCH_EXTIOI "loongarch.extioi"
 OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI)
 #endif /* LOONGARCH_EXTIOI_H */
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/intc/loongarch_extioi_common.h
+++ b/include/hw/intc/loongarch_extioi_common.h
@@ -XXX,XX +XXX,XX @@ typedef struct ExtIOICore {
     qemu_irq parent_irq[LS3A_INTC_IP];
 } ExtIOICore;
 
-struct LoongArchExtIOI {
+struct LoongArchExtIOICommonState {
     SysBusDevice parent_obj;
     uint32_t num_cpu;
     uint32_t features;
-- 
2.43.5

With some structure such as vmstate and property, rename LoongArchExtIOI
with LoongArchExtIOICommonState, these common structure will be moved
to common file.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_extioi.c | 41 +++++++++++++++++++++++---------------
 1 file changed, 25 insertions(+), 16 deletions(-)

diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/loongarch_extioi.c
+++ b/hw/intc/loongarch_extioi.c
@@ -XXX,XX +XXX,XX @@ static int vmstate_extioi_post_load(void *opaque, int version_id)
     return 0;
 }
 
+static int loongarch_extioi_common_post_load(void *opaque, int version_id)
+{
+    return vmstate_extioi_post_load(opaque, version_id);
+}
+
 static const VMStateDescription vmstate_extioi_core = {
     .name = "extioi-core",
     .version_id = 1,
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_extioi_core = {
 };
 
 static const VMStateDescription vmstate_loongarch_extioi = {
-    .name = TYPE_LOONGARCH_EXTIOI,
+    .name = "loongarch.extioi",
     .version_id = 3,
     .minimum_version_id = 3,
-    .post_load = vmstate_extioi_post_load,
+    .post_load = loongarch_extioi_common_post_load,
     .fields = (const VMStateField[]) {
-        VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOI, EXTIOI_IRQS_GROUP_COUNT),
-        VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOI,
+        VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState,
+                             EXTIOI_IRQS_GROUP_COUNT),
+        VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState,
                              EXTIOI_IRQS_NODETYPE_COUNT / 2),
-        VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOI, EXTIOI_IRQS / 32),
-        VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOI, EXTIOI_IRQS / 32),
-        VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOI, EXTIOI_IRQS_IPMAP_SIZE / 4),
-        VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOI, EXTIOI_IRQS / 4),
-
-        VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOI, num_cpu,
-                         vmstate_extioi_core, ExtIOICore),
-        VMSTATE_UINT32(features, LoongArchExtIOI),
-        VMSTATE_UINT32(status, LoongArchExtIOI),
+        VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState,
+                             EXTIOI_IRQS / 32),
+        VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState,
+                             EXTIOI_IRQS / 32),
+        VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState,
+                             EXTIOI_IRQS_IPMAP_SIZE / 4),
+        VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState,
+                             EXTIOI_IRQS / 4),
+        VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState,
+                             num_cpu, vmstate_extioi_core, ExtIOICore),
+        VMSTATE_UINT32(features, LoongArchExtIOICommonState),
+        VMSTATE_UINT32(status, LoongArchExtIOICommonState),
         VMSTATE_END_OF_LIST()
     }
 };
 
 static Property extioi_properties[] = {
-    DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOI, num_cpu, 1),
-    DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOI, features,
-                    EXTIOI_HAS_VIRT_EXTENSION, 0),
+    DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1),
+    DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState,
+                    features, EXTIOI_HAS_VIRT_EXTENSION, 0),
     DEFINE_PROP_END_OF_LIST(),
 };
 
-- 
2.43.5