This instruction sets CC and EXC bits just like any other.
So far we do not properly emulate inexact for the various
rom entries, but we can certainly update CC correctly.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/m68k/translate.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 423c663607..003318163c 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4955,6 +4955,7 @@ DISAS_INSN(fpu)
             TCGv rom_offset = tcg_constant_i32(opmode);
             cpu_dest = gen_fp_ptr(REG(ext, 7));
             gen_helper_fconst(tcg_env, cpu_dest, rom_offset);
+            gen_helper_update_fpsr(tcg_env, cpu_dest);
             return;
         }
         break;
-- 
2.43.0