Introduce defines for UHCI registers to simplify adding register access
in subsequent patches of the series.
No functional change.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
hw/usb/hcd-uhci.c | 32 ++++++++++++++++----------------
include/hw/usb/uhci-regs.h | 11 +++++++++++
2 files changed, 27 insertions(+), 16 deletions(-)
diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c
index dfcc3e05c0..8bc163f688 100644
--- a/hw/usb/hcd-uhci.c
+++ b/hw/usb/hcd-uhci.c
@@ -389,7 +389,7 @@ static void uhci_port_write(void *opaque, hwaddr addr,
trace_usb_uhci_mmio_writew(addr, val);
switch (addr) {
- case 0x00:
+ case UHCI_USBCMD:
if ((val & UHCI_CMD_RS) && !(s->cmd & UHCI_CMD_RS)) {
/* start frame processing */
trace_usb_uhci_schedule_start();
@@ -424,7 +424,7 @@ static void uhci_port_write(void *opaque, hwaddr addr,
}
}
break;
- case 0x02:
+ case UHCI_USBSTS:
s->status &= ~val;
/*
* XXX: the chip spec is not coherent, so we add a hidden
@@ -435,27 +435,27 @@ static void uhci_port_write(void *opaque, hwaddr addr,
}
uhci_update_irq(s);
break;
- case 0x04:
+ case UHCI_USBINTR:
s->intr = val;
uhci_update_irq(s);
break;
- case 0x06:
+ case UHCI_USBFRNUM:
if (s->status & UHCI_STS_HCHALTED) {
s->frnum = val & 0x7ff;
}
break;
- case 0x08:
+ case UHCI_USBFLBASEADD:
s->fl_base_addr &= 0xffff0000;
s->fl_base_addr |= val & ~0xfff;
break;
- case 0x0a:
+ case UHCI_USBFLBASEADD + 2:
s->fl_base_addr &= 0x0000ffff;
s->fl_base_addr |= (val << 16);
break;
- case 0x0c:
+ case UHCI_USBSOF:
s->sof_timing = val & 0xff;
break;
- case 0x10 ... 0x1f:
+ case UHCI_USBPORTSC1 ... UHCI_USBPORTSC4:
{
UHCIPort *port;
USBDevice *dev;
@@ -493,28 +493,28 @@ static uint64_t uhci_port_read(void *opaque, hwaddr addr, unsigned size)
uint32_t val;
switch (addr) {
- case 0x00:
+ case UHCI_USBCMD:
val = s->cmd;
break;
- case 0x02:
+ case UHCI_USBSTS:
val = s->status;
break;
- case 0x04:
+ case UHCI_USBINTR:
val = s->intr;
break;
- case 0x06:
+ case UHCI_USBFRNUM:
val = s->frnum;
break;
- case 0x08:
+ case UHCI_USBFLBASEADD:
val = s->fl_base_addr & 0xffff;
break;
- case 0x0a:
+ case UHCI_USBFLBASEADD + 2:
val = (s->fl_base_addr >> 16) & 0xffff;
break;
- case 0x0c:
+ case UHCI_USBSOF:
val = s->sof_timing;
break;
- case 0x10 ... 0x1f:
+ case UHCI_USBPORTSC1 ... UHCI_USBPORTSC4:
{
UHCIPort *port;
int n;
diff --git a/include/hw/usb/uhci-regs.h b/include/hw/usb/uhci-regs.h
index fd45d29db0..5b81714e5c 100644
--- a/include/hw/usb/uhci-regs.h
+++ b/include/hw/usb/uhci-regs.h
@@ -1,6 +1,17 @@
#ifndef HW_USB_UHCI_REGS_H
#define HW_USB_UHCI_REGS_H
+#define UHCI_USBCMD 0
+#define UHCI_USBSTS 2
+#define UHCI_USBINTR 4
+#define UHCI_USBFRNUM 6
+#define UHCI_USBFLBASEADD 8
+#define UHCI_USBSOF 0x0c
+#define UHCI_USBPORTSC1 0x10
+#define UHCI_USBPORTSC2 0x12
+#define UHCI_USBPORTSC3 0x14
+#define UHCI_USBPORTSC4 0x16
+
#define UHCI_CMD_FGR (1 << 4)
#define UHCI_CMD_EGSM (1 << 3)
#define UHCI_CMD_GRESET (1 << 2)
--
2.45.2
On 9/6/24 14:25, Guenter Roeck wrote:
> Introduce defines for UHCI registers to simplify adding register access
> in subsequent patches of the series.
>
> No functional change.
>
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
> ---
> hw/usb/hcd-uhci.c | 32 ++++++++++++++++----------------
> include/hw/usb/uhci-regs.h | 11 +++++++++++
> 2 files changed, 27 insertions(+), 16 deletions(-)
>
> diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c
> index dfcc3e05c0..8bc163f688 100644
> --- a/hw/usb/hcd-uhci.c
> +++ b/hw/usb/hcd-uhci.c
> @@ -389,7 +389,7 @@ static void uhci_port_write(void *opaque, hwaddr addr,
> trace_usb_uhci_mmio_writew(addr, val);
>
> switch (addr) {
> - case 0x00:
> + case UHCI_USBCMD:
> if ((val & UHCI_CMD_RS) && !(s->cmd & UHCI_CMD_RS)) {
> /* start frame processing */
> trace_usb_uhci_schedule_start();
> @@ -424,7 +424,7 @@ static void uhci_port_write(void *opaque, hwaddr addr,
> }
> }
> break;
> - case 0x02:
> + case UHCI_USBSTS:
> s->status &= ~val;
> /*
> * XXX: the chip spec is not coherent, so we add a hidden
> @@ -435,27 +435,27 @@ static void uhci_port_write(void *opaque, hwaddr addr,
> }
> uhci_update_irq(s);
> break;
> - case 0x04:
> + case UHCI_USBINTR:
> s->intr = val;
> uhci_update_irq(s);
> break;
> - case 0x06:
> + case UHCI_USBFRNUM:
> if (s->status & UHCI_STS_HCHALTED) {
> s->frnum = val & 0x7ff;
> }
> break;
> - case 0x08:
> + case UHCI_USBFLBASEADD:
> s->fl_base_addr &= 0xffff0000;
> s->fl_base_addr |= val & ~0xfff;
> break;
> - case 0x0a:
> + case UHCI_USBFLBASEADD + 2:
> s->fl_base_addr &= 0x0000ffff;
> s->fl_base_addr |= (val << 16);
> break;
> - case 0x0c:
> + case UHCI_USBSOF:
> s->sof_timing = val & 0xff;
> break;
> - case 0x10 ... 0x1f:
> + case UHCI_USBPORTSC1 ... UHCI_USBPORTSC4:
> {
> UHCIPort *port;
> USBDevice *dev;
> @@ -493,28 +493,28 @@ static uint64_t uhci_port_read(void *opaque, hwaddr addr, unsigned size)
> uint32_t val;
>
> switch (addr) {
> - case 0x00:
> + case UHCI_USBCMD:
> val = s->cmd;
> break;
> - case 0x02:
> + case UHCI_USBSTS:
> val = s->status;
> break;
> - case 0x04:
> + case UHCI_USBINTR:
> val = s->intr;
> break;
> - case 0x06:
> + case UHCI_USBFRNUM:
> val = s->frnum;
> break;
> - case 0x08:
> + case UHCI_USBFLBASEADD:
> val = s->fl_base_addr & 0xffff;
> break;
> - case 0x0a:
> + case UHCI_USBFLBASEADD + 2:
> val = (s->fl_base_addr >> 16) & 0xffff;
> break;
> - case 0x0c:
> + case UHCI_USBSOF:
> val = s->sof_timing;
> break;
> - case 0x10 ... 0x1f:
> + case UHCI_USBPORTSC1 ... UHCI_USBPORTSC4:
> {
> UHCIPort *port;
> int n;
> diff --git a/include/hw/usb/uhci-regs.h b/include/hw/usb/uhci-regs.h
> index fd45d29db0..5b81714e5c 100644
> --- a/include/hw/usb/uhci-regs.h
> +++ b/include/hw/usb/uhci-regs.h
> @@ -1,6 +1,17 @@
> #ifndef HW_USB_UHCI_REGS_H
> #define HW_USB_UHCI_REGS_H
>
> +#define UHCI_USBCMD 0
> +#define UHCI_USBSTS 2
> +#define UHCI_USBINTR 4
> +#define UHCI_USBFRNUM 6
> +#define UHCI_USBFLBASEADD 8
> +#define UHCI_USBSOF 0x0c
> +#define UHCI_USBPORTSC1 0x10
> +#define UHCI_USBPORTSC2 0x12
> +#define UHCI_USBPORTSC3 0x14
> +#define UHCI_USBPORTSC4 0x16
> +
> #define UHCI_CMD_FGR (1 << 4)
> #define UHCI_CMD_EGSM (1 << 3)
> #define UHCI_CMD_GRESET (1 << 2)
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