On Fri, Aug 16, 2024 at 09:35:05AM -0700, Doug Brown wrote:
> There was no case for handling received CAN FD frames with a DLC of 0-8.
> This was already handled properly with TX. Add similar code for RX.
>
> Signed-off-by: Doug Brown <doug@schmorgal.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
> ---
> hw/net/can/xlnx-versal-canfd.c | 13 +++++++++----
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/hw/net/can/xlnx-versal-canfd.c b/hw/net/can/xlnx-versal-canfd.c
> index fda1e7016a..ce68dab46a 100644
> --- a/hw/net/can/xlnx-versal-canfd.c
> +++ b/hw/net/can/xlnx-versal-canfd.c
> @@ -1052,10 +1052,15 @@ static void store_rx_sequential(XlnxVersalCANFDState *s,
> if (frame->flags & QEMU_CAN_FRMF_TYPE_FD) {
> is_canfd_frame = true;
>
> - /* Store dlc value in Xilinx specific format. */
> - for (i = 0; i < ARRAY_SIZE(canfd_dlc_array); i++) {
> - if (canfd_dlc_array[i] == frame->can_dlc) {
> - dlc_reg_val = FIELD_DP32(0, RB_DLC_REGISTER, DLC, 8 + i);
> + if (dlc <= 8) {
> + dlc_reg_val = FIELD_DP32(0, RB_DLC_REGISTER, DLC, dlc);
> + } else {
> + /* Store dlc value in Xilinx specific format. */
> + for (i = 0; i < ARRAY_SIZE(canfd_dlc_array); i++) {
> + if (canfd_dlc_array[i] == frame->can_dlc) {
> + dlc_reg_val = FIELD_DP32(0, RB_DLC_REGISTER, DLC,
> + 8 + i);
> + }
> }
> }
> } else {
> --
> 2.34.1
>