[PATCH 4/5] hw/net/can/xlnx-versal-canfd: Fix byte ordering

Doug Brown posted 5 patches 3 months, 1 week ago
There is a newer version of this series
[PATCH 4/5] hw/net/can/xlnx-versal-canfd: Fix byte ordering
Posted by Doug Brown 3 months, 1 week ago
The endianness of the CAN data was backwards in each group of 4 bytes.
For example, the following data:

00 11 22 33 44 55 66 77

was showing up like this:

33 22 11 00 77 66 55 44

Fix both the TX and RX code to put the data in the correct order.

Signed-off-by: Doug Brown <doug@schmorgal.com>
---
 hw/net/can/xlnx-versal-canfd.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/net/can/xlnx-versal-canfd.c b/hw/net/can/xlnx-versal-canfd.c
index 1704b558d0..fda1e7016a 100644
--- a/hw/net/can/xlnx-versal-canfd.c
+++ b/hw/net/can/xlnx-versal-canfd.c
@@ -945,7 +945,7 @@ static void regs2frame(XlnxVersalCANFDState *s, qemu_can_frame *frame,
     }
 
     for (j = 0; j < frame->can_dlc; j++) {
-        val = 8 * i;
+        val = 8 * (3 - i);
 
         frame->data[j] = extract32(s->regs[reg_num + 2 + (j / 4)], val, 8);
         i++;
@@ -1080,19 +1080,19 @@ static void store_rx_sequential(XlnxVersalCANFDState *s,
             case 0:
                 rx_reg_num = i / 4;
 
-                data_reg_val = FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES3,
+                data_reg_val = FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES0,
                                           frame->data[i]);
                 break;
             case 1:
-                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES2,
+                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES1,
                                            frame->data[i]);
                 break;
             case 2:
-                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES1,
+                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES2,
                                            frame->data[i]);
                 break;
             case 3:
-                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES0,
+                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES3,
                                            frame->data[i]);
                 /*
                  * Last Bytes data which means we have all 4 bytes ready to
-- 
2.34.1
Re: [PATCH 4/5] hw/net/can/xlnx-versal-canfd: Fix byte ordering
Posted by Francisco Iglesias 3 months ago
On Fri, Aug 16, 2024 at 09:35:04AM -0700, Doug Brown wrote:
> The endianness of the CAN data was backwards in each group of 4 bytes.
> For example, the following data:
> 
> 00 11 22 33 44 55 66 77
> 
> was showing up like this:
> 
> 33 22 11 00 77 66 55 44
> 
> Fix both the TX and RX code to put the data in the correct order.
> 
> Signed-off-by: Doug Brown <doug@schmorgal.com>

Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>


> ---
>  hw/net/can/xlnx-versal-canfd.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/net/can/xlnx-versal-canfd.c b/hw/net/can/xlnx-versal-canfd.c
> index 1704b558d0..fda1e7016a 100644
> --- a/hw/net/can/xlnx-versal-canfd.c
> +++ b/hw/net/can/xlnx-versal-canfd.c
> @@ -945,7 +945,7 @@ static void regs2frame(XlnxVersalCANFDState *s, qemu_can_frame *frame,
>      }
>  
>      for (j = 0; j < frame->can_dlc; j++) {
> -        val = 8 * i;
> +        val = 8 * (3 - i);
>  
>          frame->data[j] = extract32(s->regs[reg_num + 2 + (j / 4)], val, 8);
>          i++;
> @@ -1080,19 +1080,19 @@ static void store_rx_sequential(XlnxVersalCANFDState *s,
>              case 0:
>                  rx_reg_num = i / 4;
>  
> -                data_reg_val = FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES3,
> +                data_reg_val = FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES0,
>                                            frame->data[i]);
>                  break;
>              case 1:
> -                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES2,
> +                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES1,
>                                             frame->data[i]);
>                  break;
>              case 2:
> -                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES1,
> +                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES2,
>                                             frame->data[i]);
>                  break;
>              case 3:
> -                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES0,
> +                data_reg_val |= FIELD_DP32(0, RB_DW0_REGISTER, DATA_BYTES3,
>                                             frame->data[i]);
>                  /*
>                   * Last Bytes data which means we have all 4 bytes ready to
> -- 
> 2.34.1
>