1
Hi; this pullreq contains some minor bug fixes, and also
1
This one's almost all docs fixes.
2
the txt-to-rST document conversions I did. The latter are not
3
strictly speaking bugfixes but I think for rc2 they're OK. Let
4
me know if you'd rather I respin this without them.
5
2
6
thanks
3
thanks
7
-- PMM
4
-- PMM
8
5
9
The following changes since commit 0f397dcfecc9211d12c2c720c01eb32f0eaa7d23:
6
The following changes since commit ba54a7e6b86884e43bed2d2f5a79c719059652a8:
10
7
11
Merge tag 'pull-nbd-2024-08-08' of https://repo.or.cz/qemu/ericb into staging (2024-08-09 08:40:37 +1000)
8
Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into staging (2024-11-26 14:06:40 +0000)
12
9
13
are available in the Git repository at:
10
are available in the Git repository at:
14
11
15
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240809
12
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20241126
16
13
17
for you to fetch changes up to 77100e100d76a568800e19ee20c7e9255053b84a:
14
for you to fetch changes up to d8790ead55a2ef1e65332ebec63ae3c5db598942:
18
15
19
arm/virt: place power button pin number on a define (2024-08-09 17:37:56 +0100)
16
docs/system/arm/aspeed: add missing model supermicrox11spi-bmc (2024-11-26 16:22:38 +0000)
20
17
21
----------------------------------------------------------------
18
----------------------------------------------------------------
22
target-arm queue:
19
target-arm queue:
23
* Fix BTI versus CF_PCREL
20
* target/arm/tcg/cpu32.c: swap ATCM and BTCM register names
24
* include: Fix typo in name of MAKE_IDENTFIER macro
21
* docs/system/arm: Fix broken links and missing feature names
25
* docs: Various txt-to-rST conversions
26
* add support for PMUv3 64-bit PMCCNTR in AArch32 mode
27
* hw/core/ptimer: fix timer zero period condition for freq > 1GHz
28
* arm/virt: place power button pin number on a define
29
22
30
----------------------------------------------------------------
23
----------------------------------------------------------------
31
Alex Richardson (1):
24
Michael Tokarev (1):
32
target/arm: add support for PMUv3 64-bit PMCCNTR in AArch32 mode
25
target/arm/tcg/cpu32.c: swap ATCM and BTCM register names
33
26
34
Eric Blake (1):
27
Pierrick Bouvier (8):
35
docs: Typo fix in live disk backup
28
docs/system/arm/emulation: mention armv9
29
docs/system/arm/emulation: fix typo in feature name
30
docs/system/arm/emulation: add FEAT_SSBS2
31
target/arm/tcg/: fix typo in FEAT name
32
docs/system/arm/: add FEAT_MTE_ASYNC
33
docs/system/arm/: add FEAT_DoubleLock
34
docs/system/arm/fby35: update link to product page
35
docs/system/arm/aspeed: add missing model supermicrox11spi-bmc
36
36
37
Jianzhou Yue (1):
37
docs/system/arm/aspeed.rst | 7 ++++---
38
hw/core/ptimer: fix timer zero period condition for freq > 1GHz
38
docs/system/arm/emulation.rst | 11 +++++++----
39
39
docs/system/arm/fby35.rst | 2 +-
40
Mauro Carvalho Chehab (1):
40
target/arm/tcg/cpu32.c | 6 +++---
41
arm/virt: place power button pin number on a define
41
4 files changed, 15 insertions(+), 11 deletions(-)
42
43
Peter Maydell (6):
44
include: Fix typo in name of MAKE_IDENTFIER macro
45
docs/specs/rocker.txt: Convert to rST
46
docs/interop/nbd.txt: Convert to rST
47
docs/interop/parallels.txt: Convert to rST
48
docs/interop/prl-xml.txt: Convert to rST
49
docs/interop/prl-xml.rst: Fix minor grammar nits
50
51
Richard Henderson (1):
52
target/arm: Fix BTI versus CF_PCREL
53
54
MAINTAINERS | 7 +-
55
docs/interop/index.rst | 3 +
56
docs/interop/live-block-operations.rst | 4 +-
57
docs/interop/nbd.rst | 89 ++++++++++++
58
docs/interop/nbd.txt | 72 ----------
59
docs/interop/{parallels.txt => parallels.rst} | 108 ++++++++-------
60
docs/interop/prl-xml.rst | 192 ++++++++++++++++++++++++++
61
docs/interop/prl-xml.txt | 158 ---------------------
62
docs/specs/index.rst | 1 +
63
docs/specs/{rocker.txt => rocker.rst} | 181 ++++++++++++------------
64
include/hw/arm/virt.h | 3 +
65
include/qapi/qmp/qobject.h | 2 +-
66
include/qemu/atomic.h | 2 +-
67
include/qemu/compiler.h | 2 +-
68
include/qemu/osdep.h | 6 +-
69
target/arm/tcg/helper-a64.h | 3 +
70
target/arm/tcg/translate.h | 2 -
71
hw/arm/virt-acpi-build.c | 6 +-
72
hw/arm/virt.c | 7 +-
73
hw/core/ptimer.c | 4 +-
74
target/arm/helper.c | 6 +
75
target/arm/tcg/helper-a64.c | 39 ++++++
76
target/arm/tcg/translate-a64.c | 64 ++-------
77
tests/unit/ptimer-test.c | 33 +++++
78
24 files changed, 553 insertions(+), 441 deletions(-)
79
create mode 100644 docs/interop/nbd.rst
80
delete mode 100644 docs/interop/nbd.txt
81
rename docs/interop/{parallels.txt => parallels.rst} (72%)
82
create mode 100644 docs/interop/prl-xml.rst
83
delete mode 100644 docs/interop/prl-xml.txt
84
rename docs/specs/{rocker.txt => rocker.rst} (91%)
diff view generated by jsdifflib
1
From: Eric Blake <eblake@redhat.com>
1
From: Michael Tokarev <mjt@tls.msk.ru>
2
2
3
Add in the missing space in the section header.
3
According to Cortex-R5 r1p2 manual, register with opcode2=0 is
4
BTCM and with opcode2=1 is ATCM, - exactly the opposite from how
5
qemu labels them. Just swap the labels to avoid confusion, -
6
both registers are implemented as always-zero.
4
7
5
Fixes: 1084159b31 ("qapi: deprecate drive-backup", v6.2.0)
8
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
6
Signed-off-by: Eric Blake <eblake@redhat.com>
9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
10
Message-id: 20241121171602.3273252-1-mjt@tls.msk.ru
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
---
12
---
9
docs/interop/live-block-operations.rst | 4 ++--
13
target/arm/tcg/cpu32.c | 4 ++--
10
1 file changed, 2 insertions(+), 2 deletions(-)
14
1 file changed, 2 insertions(+), 2 deletions(-)
11
15
12
diff --git a/docs/interop/live-block-operations.rst b/docs/interop/live-block-operations.rst
16
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
13
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
14
--- a/docs/interop/live-block-operations.rst
18
--- a/target/arm/tcg/cpu32.c
15
+++ b/docs/interop/live-block-operations.rst
19
+++ b/target/arm/tcg/cpu32.c
16
@@ -XXX,XX +XXX,XX @@ Shutdown the guest, by issuing the ``quit`` QMP command::
20
@@ -XXX,XX +XXX,XX @@ static void cortex_a15_initfn(Object *obj)
17
}
21
18
22
static const ARMCPRegInfo cortexr5_cp_reginfo[] = {
19
23
/* Dummy the TCM region regs for the moment */
20
-Live disk backup --- ``blockdev-backup`` and the deprecated``drive-backup``
24
- { .name = "ATCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 0,
21
----------------------------------------------------------------------------
25
+ { .name = "BTCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 0,
22
+Live disk backup --- ``blockdev-backup`` and the deprecated ``drive-backup``
26
.access = PL1_RW, .type = ARM_CP_CONST },
23
+----------------------------------------------------------------------------
27
- { .name = "BTCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 1,
24
28
+ { .name = "ATCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 1,
25
The ``blockdev-backup`` (and the deprecated ``drive-backup``) allows
29
.access = PL1_RW, .type = ARM_CP_CONST },
26
you to create a point-in-time snapshot.
30
{ .name = "DCACHE_INVAL", .cp = 15, .opc1 = 0, .crn = 15, .crm = 5,
31
.opc2 = 0, .access = PL1_W, .type = ARM_CP_NOP },
27
--
32
--
28
2.34.1
33
2.34.1
diff view generated by jsdifflib
1
Fix some minor grammar nits in the prl-xml documentation.
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
2
3
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Message-id: 20241122225049.1617774-2-pierrick.bouvier@linaro.org
3
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
6
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Eric Blake <eblake@redhat.com>
6
Message-id: 20240801170131.3977807-6-peter.maydell@linaro.org
7
---
7
---
8
docs/interop/prl-xml.rst | 73 +++++++++++++++++++++-------------------
8
docs/system/arm/emulation.rst | 6 +++---
9
1 file changed, 39 insertions(+), 34 deletions(-)
9
1 file changed, 3 insertions(+), 3 deletions(-)
10
10
11
diff --git a/docs/interop/prl-xml.rst b/docs/interop/prl-xml.rst
11
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
12
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
13
--- a/docs/interop/prl-xml.rst
13
--- a/docs/system/arm/emulation.rst
14
+++ b/docs/interop/prl-xml.rst
14
+++ b/docs/system/arm/emulation.rst
15
@@ -XXX,XX +XXX,XX @@ Parallels Disk Format
15
@@ -XXX,XX +XXX,XX @@
16
See the COPYING file in the top-level directory.
16
A-profile CPU architecture support
17
17
==================================
18
This specification contains minimal information about Parallels Disk Format,
18
19
-which is enough to proper work with QEMU. Nevertheless, Parallels Cloud Server
19
-QEMU's TCG emulation includes support for the Armv5, Armv6, Armv7 and
20
-and Parallels Desktop are able to add some unspecified nodes to xml and use
20
-Armv8 versions of the A-profile architecture. It also has support for
21
+which is enough to properly work with QEMU. Nevertheless, Parallels Cloud Server
21
+QEMU's TCG emulation includes support for the Armv5, Armv6, Armv7,
22
+and Parallels Desktop are able to add some unspecified nodes to the xml and use
22
+Armv8 and Armv9 versions of the A-profile architecture. It also has support for
23
them, but they are for internal work and don't affect functionality. Also it
23
the following architecture extensions:
24
-uses auxiliary xml ``Snapshot.xml``, which allows to store optional snapshot
24
25
-information, but it doesn't influence open/read/write functionality. QEMU and
25
- FEAT_AA32BF16 (AArch32 BFloat16 instructions)
26
-other software should not use fields not covered in this document and
26
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
27
-``Snapshot.xml`` file and must leave them as is.
27
- FEAT_XNX (Translation table stage 2 Unprivileged Execute-never)
28
+uses auxiliary xml ``Snapshot.xml``, which allows storage of optional snapshot
28
29
+information, but this doesn't influence open/read/write functionality. QEMU and
29
For information on the specifics of these extensions, please refer
30
+other software should not use fields not covered in this document or the
30
-to the `Armv8-A Arm Architecture Reference Manual
31
+``Snapshot.xml`` file, and must leave them as is.
31
+to the `Arm Architecture Reference Manual for A-profile architecture
32
32
<https://developer.arm.com/documentation/ddi0487/latest>`_.
33
-Parallels disk consists of two parts: the set of snapshots and the disk
33
34
+A Parallels disk consists of two parts: the set of snapshots and the disk
34
When a specific named CPU is being emulated, only those features which
35
descriptor file, which stores information about all files and snapshots.
36
37
Definitions
38
@@ -XXX,XX +XXX,XX @@ Definitions
39
40
Snapshot
41
a record of the contents captured at a particular time, capable
42
- of storing current state. A snapshot has UUID and parent UUID.
43
+ of storing current state. A snapshot has a UUID and a parent UUID.
44
45
Snapshot image
46
an overlay representing the difference between this
47
@@ -XXX,XX +XXX,XX @@ Overlay
48
an image storing the different sectors between two captured states.
49
50
Root image
51
- snapshot image with no parent, the root of snapshot tree.
52
+ a snapshot image with no parent, the root of the snapshot tree.
53
54
Storage
55
the backing storage for a subset of the virtual disk. When
56
there is more than one storage in a Parallels disk then that
57
is referred to as a split image. In this case every storage
58
- covers specific address space area of the disk and has its
59
+ covers a specific address space area of the disk and has its
60
particular root image. Split images are not considered here
61
and are not supported. Each storage consists of disk
62
parameters and a list of images. The list of images always
63
@@ -XXX,XX +XXX,XX @@ Storage
64
65
Description file
66
``DiskDescriptor.xml`` stores information about disk parameters,
67
- snapshots, storages.
68
+ snapshots, and storages.
69
70
Top Snapshot
71
The overlay between actual state and some previous snapshot.
72
@@ -XXX,XX +XXX,XX @@ Description file
73
74
All information is placed in a single XML element
75
``Parallels_disk_image``.
76
-The element has only one attribute ``Version``, that must be ``1.0``.
77
+The element has only one attribute, ``Version``, which must be ``1.0``.
78
79
-Schema of ``DiskDescriptor.xml``::
80
+The schema of ``DiskDescriptor.xml``::
81
82
<Parallels_disk_image Version="1.0">
83
<Disk_Parameters>
84
@@ -XXX,XX +XXX,XX @@ The ``Disk_Parameters`` element MUST contain the following child elements:
85
* ``Heads`` - number of the disk heads.
86
* ``Sectors`` - number of the disk sectors per cylinder
87
(sector size is 512 bytes)
88
- Limitation: Product of the ``Heads``, ``Sectors`` and ``Cylinders``
89
+ Limitation: The product of the ``Heads``, ``Sectors`` and ``Cylinders``
90
values MUST be equal to the value of the Disk_size parameter.
91
* ``Padding`` - must be 0. Parallels Cloud Server and Parallels Desktop may
92
- use padding set to 1, however this case is not covered
93
- by this spec, QEMU and other software should not open
94
+ use padding set to 1; however this case is not covered
95
+ by this specification. QEMU and other software should not open
96
such disks and should not create them.
97
98
``StorageData`` element
99
@@ -XXX,XX +XXX,XX @@ as shown below::
100
</Storage>
101
</StorageData>
102
103
-A ``Storage`` element has following child elements:
104
+A ``Storage`` element has the following child elements:
105
106
* ``Start`` - start sector of the storage, in case of non split storage
107
equals to 0.
108
* ``End`` - number of sector following the last sector, in case of non
109
split storage equals to ``Disk_size``.
110
* ``Blocksize`` - storage cluster size, number of sectors per one cluster.
111
- Cluster size for each "Compressed" (see below) image in
112
- parallels disk must be equal to this field. Note: cluster
113
- size for Parallels Expandable Image is in ``tracks`` field of
114
+ The cluster size for each "Compressed" (see below) image in
115
+ a parallels disk must be equal to this field. Note: the cluster
116
+ size for a Parallels Expandable Image is in the ``tracks`` field of
117
its header (see :doc:`parallels`).
118
* Several ``Image`` child elements.
119
120
-Each ``Image`` element has following child elements:
121
+Each ``Image`` element has the following child elements:
122
123
* ``GUID`` - image identifier, UUID in curly brackets.
124
For instance, ``{12345678-9abc-def1-2345-6789abcdef12}.``
125
@@ -XXX,XX +XXX,XX @@ Each ``Image`` element has following child elements:
126
* ``Plain`` for raw files.
127
* ``Compressed`` for expanding disks.
128
129
-* ``File`` - path to image file. Path can be relative to
130
+* ``File`` - path to image file. The path can be relative to
131
``DiskDescriptor.xml`` or absolute.
132
133
``Snapshots`` element
134
@@ -XXX,XX +XXX,XX @@ Each ``Shot`` element contains the following child elements:
135
* ``GUID`` - an image GUID.
136
* ``ParentGUID`` - GUID of the image of the parent snapshot.
137
138
-The software may traverse snapshots from child to parent using ``<ParentGUID>``
139
-field as reference. ``ParentGUID`` of root snapshot is
140
-``{00000000-0000-0000-0000-000000000000}``. There should be only one root
141
-snapshot. Top snapshot could be described via two ways: via ``TopGUID`` child
142
-element of the ``Snapshots`` element or via predefined GUID
143
+The software may traverse snapshots from child to parent using the
144
+``<ParentGUID>`` field as reference. The ``ParentGUID`` of the root
145
+snapshot is ``{00000000-0000-0000-0000-000000000000}``.
146
+There should be only one root snapshot.
147
+
148
+The Top snapshot could be
149
+described via two ways: via the ``TopGUID`` child
150
+element of the ``Snapshots`` element, or via the predefined GUID
151
``{5fbaabe3-6958-40ff-92a7-860e329aab41}``. If ``TopGUID`` is defined,
152
-predefined GUID is interpreted as usual GUID. All snapshot images
153
-(except Top Snapshot) should be
154
-opened read-only. There is another predefined GUID,
155
+the predefined GUID is interpreted as a normal GUID. All snapshot images
156
+(except the Top Snapshot) should be
157
+opened read-only.
158
+
159
+There is another predefined GUID,
160
``BackupID = {704718e1-2314-44c8-9087-d78ed36b0f4e}``, which is used by
161
-original and some third-party software for backup, QEMU and other
162
-software may operate with images with ``GUID = BackupID`` as usual,
163
-however, it is not recommended to use this
164
-GUID for new disks. Top snapshot cannot have this GUID.
165
+original and some third-party software for backup. QEMU and other
166
+software may operate with images with ``GUID = BackupID`` as usual.
167
+However, it is not recommended to use this
168
+GUID for new disks. The Top snapshot cannot have this GUID.
169
--
35
--
170
2.34.1
36
2.34.1
diff view generated by jsdifflib
1
Convert prl-xml.txt to rST format.
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
2
3
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Message-id: 20241122225049.1617774-3-pierrick.bouvier@linaro.org
3
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
6
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Eric Blake <eblake@redhat.com>
6
Message-id: 20240801170131.3977807-5-peter.maydell@linaro.org
7
---
7
---
8
MAINTAINERS | 1 +
8
docs/system/arm/emulation.rst | 2 +-
9
docs/interop/index.rst | 1 +
9
1 file changed, 1 insertion(+), 1 deletion(-)
10
docs/interop/prl-xml.rst | 187 +++++++++++++++++++++++++++++++++++++++
11
docs/interop/prl-xml.txt | 158 ---------------------------------
12
4 files changed, 189 insertions(+), 158 deletions(-)
13
create mode 100644 docs/interop/prl-xml.rst
14
delete mode 100644 docs/interop/prl-xml.txt
15
10
16
diff --git a/MAINTAINERS b/MAINTAINERS
11
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
17
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
18
--- a/MAINTAINERS
13
--- a/docs/system/arm/emulation.rst
19
+++ b/MAINTAINERS
14
+++ b/docs/system/arm/emulation.rst
20
@@ -XXX,XX +XXX,XX @@ S: Supported
15
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
21
F: block/parallels.c
16
- FEAT_LSE2 (Large System Extensions v2)
22
F: block/parallels-ext.c
17
- FEAT_LVA (Large Virtual Address space)
23
F: docs/interop/parallels.rst
18
- FEAT_MixedEnd (Mixed-endian support)
24
+F: docs/interop/prl-xml.rst
19
-- FEAT_MixdEndEL0 (Mixed-endian support at EL0)
25
T: git https://src.openvz.org/scm/~den/qemu.git parallels
20
+- FEAT_MixedEndEL0 (Mixed-endian support at EL0)
26
21
- FEAT_MOPS (Standardization of memory operations)
27
qed
22
- FEAT_MTE (Memory Tagging Extension)
28
diff --git a/docs/interop/index.rst b/docs/interop/index.rst
23
- FEAT_MTE2 (Memory Tagging Extension)
29
index XXXXXXX..XXXXXXX 100644
30
--- a/docs/interop/index.rst
31
+++ b/docs/interop/index.rst
32
@@ -XXX,XX +XXX,XX @@ are useful for making QEMU interoperate with other software.
33
live-block-operations
34
nbd
35
parallels
36
+ prl-xml
37
pr-helper
38
qmp-spec
39
qemu-ga
40
diff --git a/docs/interop/prl-xml.rst b/docs/interop/prl-xml.rst
41
new file mode 100644
42
index XXXXXXX..XXXXXXX
43
--- /dev/null
44
+++ b/docs/interop/prl-xml.rst
45
@@ -XXX,XX +XXX,XX @@
46
+Parallels Disk Format
47
+=====================
48
+
49
+..
50
+ Copyright (c) 2015-2017, Virtuozzo, Inc.
51
+ Authors:
52
+ 2015 Denis Lunev <den@openvz.org>
53
+ 2015 Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
54
+ 2016-2017 Klim Kireev <klim.kireev@virtuozzo.com>
55
+ 2016-2017 Edgar Kaziakhmedov <edgar.kaziakhmedov@virtuozzo.com>
56
+
57
+ This work is licensed under the terms of the GNU GPL, version 2 or later.
58
+ See the COPYING file in the top-level directory.
59
+
60
+This specification contains minimal information about Parallels Disk Format,
61
+which is enough to proper work with QEMU. Nevertheless, Parallels Cloud Server
62
+and Parallels Desktop are able to add some unspecified nodes to xml and use
63
+them, but they are for internal work and don't affect functionality. Also it
64
+uses auxiliary xml ``Snapshot.xml``, which allows to store optional snapshot
65
+information, but it doesn't influence open/read/write functionality. QEMU and
66
+other software should not use fields not covered in this document and
67
+``Snapshot.xml`` file and must leave them as is.
68
+
69
+Parallels disk consists of two parts: the set of snapshots and the disk
70
+descriptor file, which stores information about all files and snapshots.
71
+
72
+Definitions
73
+-----------
74
+
75
+Snapshot
76
+ a record of the contents captured at a particular time, capable
77
+ of storing current state. A snapshot has UUID and parent UUID.
78
+
79
+Snapshot image
80
+ an overlay representing the difference between this
81
+ snapshot and some earlier snapshot.
82
+
83
+Overlay
84
+ an image storing the different sectors between two captured states.
85
+
86
+Root image
87
+ snapshot image with no parent, the root of snapshot tree.
88
+
89
+Storage
90
+ the backing storage for a subset of the virtual disk. When
91
+ there is more than one storage in a Parallels disk then that
92
+ is referred to as a split image. In this case every storage
93
+ covers specific address space area of the disk and has its
94
+ particular root image. Split images are not considered here
95
+ and are not supported. Each storage consists of disk
96
+ parameters and a list of images. The list of images always
97
+ contains a root image and may also contain overlays. The
98
+ root image can be an expandable Parallels image file or
99
+ plain. Overlays must be expandable.
100
+
101
+Description file
102
+ ``DiskDescriptor.xml`` stores information about disk parameters,
103
+ snapshots, storages.
104
+
105
+Top Snapshot
106
+ The overlay between actual state and some previous snapshot.
107
+ It is not a snapshot in the classical sense because it
108
+ serves as the active image that the guest writes to.
109
+
110
+Sector
111
+ a 512-byte data chunk.
112
+
113
+Description file
114
+----------------
115
+
116
+All information is placed in a single XML element
117
+``Parallels_disk_image``.
118
+The element has only one attribute ``Version``, that must be ``1.0``.
119
+
120
+Schema of ``DiskDescriptor.xml``::
121
+
122
+ <Parallels_disk_image Version="1.0">
123
+ <Disk_Parameters>
124
+ ...
125
+ </Disk_Parameters>
126
+ <StorageData>
127
+ ...
128
+ </StorageData>
129
+ <Snapshots>
130
+ ...
131
+ </Snapshots>
132
+ </Parallels_disk_image>
133
+
134
+``Disk_Parameters`` element
135
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
136
+
137
+The ``Disk_Parameters`` element describes the physical layout of the
138
+virtual disk and some general settings.
139
+
140
+The ``Disk_Parameters`` element MUST contain the following child elements:
141
+
142
+* ``Disk_size`` - number of sectors in the disk,
143
+ desired size of the disk.
144
+* ``Cylinders`` - number of the disk cylinders.
145
+* ``Heads`` - number of the disk heads.
146
+* ``Sectors`` - number of the disk sectors per cylinder
147
+ (sector size is 512 bytes)
148
+ Limitation: Product of the ``Heads``, ``Sectors`` and ``Cylinders``
149
+ values MUST be equal to the value of the Disk_size parameter.
150
+* ``Padding`` - must be 0. Parallels Cloud Server and Parallels Desktop may
151
+ use padding set to 1, however this case is not covered
152
+ by this spec, QEMU and other software should not open
153
+ such disks and should not create them.
154
+
155
+``StorageData`` element
156
+^^^^^^^^^^^^^^^^^^^^^^^
157
+
158
+This element of the file describes the root image and all snapshot images.
159
+
160
+The ``StorageData`` element consists of the ``Storage`` child element,
161
+as shown below::
162
+
163
+ <StorageData>
164
+ <Storage>
165
+ ...
166
+ </Storage>
167
+ </StorageData>
168
+
169
+A ``Storage`` element has following child elements:
170
+
171
+* ``Start`` - start sector of the storage, in case of non split storage
172
+ equals to 0.
173
+* ``End`` - number of sector following the last sector, in case of non
174
+ split storage equals to ``Disk_size``.
175
+* ``Blocksize`` - storage cluster size, number of sectors per one cluster.
176
+ Cluster size for each "Compressed" (see below) image in
177
+ parallels disk must be equal to this field. Note: cluster
178
+ size for Parallels Expandable Image is in ``tracks`` field of
179
+ its header (see :doc:`parallels`).
180
+* Several ``Image`` child elements.
181
+
182
+Each ``Image`` element has following child elements:
183
+
184
+* ``GUID`` - image identifier, UUID in curly brackets.
185
+ For instance, ``{12345678-9abc-def1-2345-6789abcdef12}.``
186
+ The GUID is used by the Snapshots element to reference images
187
+ (see below)
188
+* ``Type`` - image type of the element. It can be:
189
+
190
+ * ``Plain`` for raw files.
191
+ * ``Compressed`` for expanding disks.
192
+
193
+* ``File`` - path to image file. Path can be relative to
194
+ ``DiskDescriptor.xml`` or absolute.
195
+
196
+``Snapshots`` element
197
+^^^^^^^^^^^^^^^^^^^^^
198
+
199
+The ``Snapshots`` element describes the snapshot relations with the snapshot tree.
200
+
201
+The element contains the set of ``Shot`` child elements, as shown below::
202
+
203
+ <Snapshots>
204
+ <TopGUID> ... </TopGUID> /* Optional child element */
205
+ <Shot>
206
+ ...
207
+ </Shot>
208
+ <Shot>
209
+ ...
210
+ </Shot>
211
+ ...
212
+ </Snapshots>
213
+
214
+Each ``Shot`` element contains the following child elements:
215
+
216
+* ``GUID`` - an image GUID.
217
+* ``ParentGUID`` - GUID of the image of the parent snapshot.
218
+
219
+The software may traverse snapshots from child to parent using ``<ParentGUID>``
220
+field as reference. ``ParentGUID`` of root snapshot is
221
+``{00000000-0000-0000-0000-000000000000}``. There should be only one root
222
+snapshot. Top snapshot could be described via two ways: via ``TopGUID`` child
223
+element of the ``Snapshots`` element or via predefined GUID
224
+``{5fbaabe3-6958-40ff-92a7-860e329aab41}``. If ``TopGUID`` is defined,
225
+predefined GUID is interpreted as usual GUID. All snapshot images
226
+(except Top Snapshot) should be
227
+opened read-only. There is another predefined GUID,
228
+``BackupID = {704718e1-2314-44c8-9087-d78ed36b0f4e}``, which is used by
229
+original and some third-party software for backup, QEMU and other
230
+software may operate with images with ``GUID = BackupID`` as usual,
231
+however, it is not recommended to use this
232
+GUID for new disks. Top snapshot cannot have this GUID.
233
diff --git a/docs/interop/prl-xml.txt b/docs/interop/prl-xml.txt
234
deleted file mode 100644
235
index XXXXXXX..XXXXXXX
236
--- a/docs/interop/prl-xml.txt
237
+++ /dev/null
238
@@ -XXX,XX +XXX,XX @@
239
-= License =
240
-
241
-Copyright (c) 2015-2017, Virtuozzo, Inc.
242
-Authors:
243
- 2015 Denis Lunev <den@openvz.org>
244
- 2015 Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
245
- 2016-2017 Klim Kireev <klim.kireev@virtuozzo.com>
246
- 2016-2017 Edgar Kaziakhmedov <edgar.kaziakhmedov@virtuozzo.com>
247
-
248
-This work is licensed under the terms of the GNU GPL, version 2 or later.
249
-See the COPYING file in the top-level directory.
250
-
251
-This specification contains minimal information about Parallels Disk Format,
252
-which is enough to proper work with QEMU. Nevertheless, Parallels Cloud Server
253
-and Parallels Desktop are able to add some unspecified nodes to xml and use
254
-them, but they are for internal work and don't affect functionality. Also it
255
-uses auxiliary xml "Snapshot.xml", which allows to store optional snapshot
256
-information, but it doesn't influence open/read/write functionality. QEMU and
257
-other software should not use fields not covered in this document and
258
-Snapshot.xml file and must leave them as is.
259
-
260
-= Parallels Disk Format =
261
-
262
-Parallels disk consists of two parts: the set of snapshots and the disk
263
-descriptor file, which stores information about all files and snapshots.
264
-
265
-== Definitions ==
266
- Snapshot a record of the contents captured at a particular time,
267
- capable of storing current state. A snapshot has UUID and
268
- parent UUID.
269
-
270
- Snapshot image an overlay representing the difference between this
271
- snapshot and some earlier snapshot.
272
-
273
- Overlay an image storing the different sectors between two captured
274
- states.
275
-
276
- Root image snapshot image with no parent, the root of snapshot tree.
277
-
278
- Storage the backing storage for a subset of the virtual disk. When
279
- there is more than one storage in a Parallels disk then that
280
- is referred to as a split image. In this case every storage
281
- covers specific address space area of the disk and has its
282
- particular root image. Split images are not considered here
283
- and are not supported. Each storage consists of disk
284
- parameters and a list of images. The list of images always
285
- contains a root image and may also contain overlays. The
286
- root image can be an expandable Parallels image file or
287
- plain. Overlays must be expandable.
288
-
289
- Description DiskDescriptor.xml stores information about disk parameters,
290
- file snapshots, storages.
291
-
292
- Top The overlay between actual state and some previous snapshot.
293
- Snapshot It is not a snapshot in the classical sense because it
294
- serves as the active image that the guest writes to.
295
-
296
- Sector a 512-byte data chunk.
297
-
298
-== Description file ==
299
-All information is placed in a single XML element Parallels_disk_image.
300
-The element has only one attribute "Version", that must be 1.0.
301
-Schema of DiskDescriptor.xml:
302
-
303
-<Parallels_disk_image Version="1.0">
304
- <Disk_Parameters>
305
- ...
306
- </Disk_Parameters>
307
- <StorageData>
308
- ...
309
- </StorageData>
310
- <Snapshots>
311
- ...
312
- </Snapshots>
313
-</Parallels_disk_image>
314
-
315
-== Disk_Parameters element ==
316
-The Disk_Parameters element describes the physical layout of the virtual disk
317
-and some general settings.
318
-
319
-The Disk_Parameters element MUST contain the following child elements:
320
- * Disk_size - number of sectors in the disk,
321
- desired size of the disk.
322
- * Cylinders - number of the disk cylinders.
323
- * Heads - number of the disk heads.
324
- * Sectors - number of the disk sectors per cylinder
325
- (sector size is 512 bytes)
326
- Limitation: Product of the Heads, Sectors and Cylinders
327
- values MUST be equal to the value of the Disk_size parameter.
328
- * Padding - must be 0. Parallels Cloud Server and Parallels Desktop may
329
- use padding set to 1, however this case is not covered
330
- by this spec, QEMU and other software should not open
331
- such disks and should not create them.
332
-
333
-== StorageData element ==
334
-This element of the file describes the root image and all snapshot images.
335
-
336
-The StorageData element consists of the Storage child element, as shown below:
337
-<StorageData>
338
- <Storage>
339
- ...
340
- </Storage>
341
-</StorageData>
342
-
343
-A Storage element has following child elements:
344
- * Start - start sector of the storage, in case of non split storage
345
- equals to 0.
346
- * End - number of sector following the last sector, in case of non
347
- split storage equals to Disk_size.
348
- * Blocksize - storage cluster size, number of sectors per one cluster.
349
- Cluster size for each "Compressed" (see below) image in
350
- parallels disk must be equal to this field. Note: cluster
351
- size for Parallels Expandable Image is in 'tracks' field of
352
- its header (see docs/interop/parallels.txt).
353
- * Several Image child elements.
354
-
355
-Each Image element has following child elements:
356
- * GUID - image identifier, UUID in curly brackets.
357
- For instance, {12345678-9abc-def1-2345-6789abcdef12}.
358
- The GUID is used by the Snapshots element to reference images
359
- (see below)
360
- * Type - image type of the element. It can be:
361
- "Plain" for raw files.
362
- "Compressed" for expanding disks.
363
- * File - path to image file. Path can be relative to DiskDescriptor.xml or
364
- absolute.
365
-
366
-== Snapshots element ==
367
-The Snapshots element describes the snapshot relations with the snapshot tree.
368
-
369
-The element contains the set of Shot child elements, as shown below:
370
-<Snapshots>
371
- <TopGUID> ... </TopGUID> /* Optional child element */
372
- <Shot>
373
- ...
374
- </Shot>
375
- <Shot>
376
- ...
377
- </Shot>
378
- ...
379
-</Snapshots>
380
-
381
-Each Shot element contains the following child elements:
382
- * GUID - an image GUID.
383
- * ParentGUID - GUID of the image of the parent snapshot.
384
-
385
-The software may traverse snapshots from child to parent using <ParentGUID>
386
-field as reference. ParentGUID of root snapshot is
387
-{00000000-0000-0000-0000-000000000000}. There should be only one root
388
-snapshot. Top snapshot could be described via two ways: via TopGUID child
389
-element of the Snapshots element or via predefined GUID
390
-{5fbaabe3-6958-40ff-92a7-860e329aab41}. If TopGUID is defined, predefined GUID is
391
-interpreted as usual GUID. All snapshot images (except Top Snapshot) should be
392
-opened read-only. There is another predefined GUID,
393
-BackupID = {704718e1-2314-44c8-9087-d78ed36b0f4e}, which is used by original and
394
-some third-party software for backup, QEMU and other software may operate with
395
-images with GUID = BackupID as usual, however, it is not recommended to use this
396
-GUID for new disks. Top snapshot cannot have this GUID.
397
--
24
--
398
2.34.1
25
2.34.1
diff view generated by jsdifflib
1
From: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
2
3
Having magic numbers inside the code is not a good idea, as it
3
We implemented this at the same times as FEAT_SSBS, but forgot
4
is error-prone. So, instead, create a macro with the number
4
to list it in the documentation.
5
definition.
6
5
7
Link: https://lore.kernel.org/qemu-devel/CAFEAcA-PYnZ-32MRX+PgvzhnoAV80zBKMYg61j2f=oHaGfwSsg@mail.gmail.com/
6
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
8
7
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
8
Message-id: 20241122225049.1617774-4-pierrick.bouvier@linaro.org
10
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
11
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
12
Message-id: ef0e7f5fca6cd94eda415ecee670c3028c671b74.1723121692.git.mchehab+huawei@kernel.org
13
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
14
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
15
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
16
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
[PMM: improve commit message]
17
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
18
---
12
---
19
include/hw/arm/virt.h | 3 +++
13
docs/system/arm/emulation.rst | 1 +
20
hw/arm/virt-acpi-build.c | 6 +++---
14
1 file changed, 1 insertion(+)
21
hw/arm/virt.c | 7 ++++---
22
3 files changed, 10 insertions(+), 6 deletions(-)
23
15
24
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
16
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
25
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
26
--- a/include/hw/arm/virt.h
18
--- a/docs/system/arm/emulation.rst
27
+++ b/include/hw/arm/virt.h
19
+++ b/docs/system/arm/emulation.rst
28
@@ -XXX,XX +XXX,XX @@
20
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
29
/* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */
21
- FEAT_SVE2 (Scalable Vector Extension version 2)
30
#define PVTIME_SIZE_PER_CPU 64
22
- FEAT_SPECRES (Speculation restriction instructions)
31
23
- FEAT_SSBS (Speculative Store Bypass Safe)
32
+/* GPIO pins */
24
+- FEAT_SSBS2 (MRS and MSR instructions for SSBS version 2)
33
+#define GPIO_PIN_POWER_BUTTON 3
25
- FEAT_TGran16K (Support for 16KB memory translation granule size at stage 1)
34
+
26
- FEAT_TGran4K (Support for 4KB memory translation granule size at stage 1)
35
enum {
27
- FEAT_TGran64K (Support for 64KB memory translation granule size at stage 1)
36
VIRT_FLASH,
37
VIRT_MEM,
38
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
39
index XXXXXXX..XXXXXXX 100644
40
--- a/hw/arm/virt-acpi-build.c
41
+++ b/hw/arm/virt-acpi-build.c
42
@@ -XXX,XX +XXX,XX @@ static void acpi_dsdt_add_gpio(Aml *scope, const MemMapEntry *gpio_memmap,
43
aml_append(dev, aml_name_decl("_CRS", crs));
44
45
Aml *aei = aml_resource_template();
46
- /* Pin 3 for power button */
47
- const uint32_t pin_list[1] = {3};
48
+
49
+ const uint32_t pin = GPIO_PIN_POWER_BUTTON;
50
aml_append(aei, aml_gpio_int(AML_CONSUMER, AML_EDGE, AML_ACTIVE_HIGH,
51
- AML_EXCLUSIVE, AML_PULL_UP, 0, pin_list, 1,
52
+ AML_EXCLUSIVE, AML_PULL_UP, 0, &pin, 1,
53
"GPO0", NULL, 0));
54
aml_append(dev, aml_name_decl("_AEI", aei));
55
56
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
57
index XXXXXXX..XXXXXXX 100644
58
--- a/hw/arm/virt.c
59
+++ b/hw/arm/virt.c
60
@@ -XXX,XX +XXX,XX @@ static void virt_powerdown_req(Notifier *n, void *opaque)
61
if (s->acpi_dev) {
62
acpi_send_event(s->acpi_dev, ACPI_POWER_DOWN_STATUS);
63
} else {
64
- /* use gpio Pin 3 for power button event */
65
+ /* use gpio Pin for power button event */
66
qemu_set_irq(qdev_get_gpio_in(gpio_key_dev, 0), 1);
67
}
68
}
69
@@ -XXX,XX +XXX,XX @@ static void create_gpio_keys(char *fdt, DeviceState *pl061_dev,
70
uint32_t phandle)
71
{
72
gpio_key_dev = sysbus_create_simple("gpio-key", -1,
73
- qdev_get_gpio_in(pl061_dev, 3));
74
+ qdev_get_gpio_in(pl061_dev,
75
+ GPIO_PIN_POWER_BUTTON));
76
77
qemu_fdt_add_subnode(fdt, "/gpio-keys");
78
qemu_fdt_setprop_string(fdt, "/gpio-keys", "compatible", "gpio-keys");
79
@@ -XXX,XX +XXX,XX @@ static void create_gpio_keys(char *fdt, DeviceState *pl061_dev,
80
qemu_fdt_setprop_cell(fdt, "/gpio-keys/poweroff", "linux,code",
81
KEY_POWER);
82
qemu_fdt_setprop_cells(fdt, "/gpio-keys/poweroff",
83
- "gpios", phandle, 3, 0);
84
+ "gpios", phandle, GPIO_PIN_POWER_BUTTON, 0);
85
}
86
87
#define SECURE_GPIO_POWEROFF 0
88
--
28
--
89
2.34.1
29
2.34.1
diff view generated by jsdifflib
1
Convert the rocker.txt specification document to rST format. We make
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
extensive use of the :: marker to introduce a literal block for all
3
the tables and ASCII art, rather than trying to convert the tables to
4
rST table syntax. This produces a valid rST document without needing
5
a huge diff.
6
2
3
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
5
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
6
Message-id: 20241122225049.1617774-5-pierrick.bouvier@linaro.org
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Message-id: 20240801170131.3977807-2-peter.maydell@linaro.org
10
---
8
---
11
MAINTAINERS | 2 +-
9
target/arm/tcg/cpu32.c | 2 +-
12
docs/specs/index.rst | 1 +
10
1 file changed, 1 insertion(+), 1 deletion(-)
13
docs/specs/{rocker.txt => rocker.rst} | 181 +++++++++++++-------------
14
3 files changed, 93 insertions(+), 91 deletions(-)
15
rename docs/specs/{rocker.txt => rocker.rst} (91%)
16
11
17
diff --git a/MAINTAINERS b/MAINTAINERS
12
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
18
index XXXXXXX..XXXXXXX 100644
13
index XXXXXXX..XXXXXXX 100644
19
--- a/MAINTAINERS
14
--- a/target/arm/tcg/cpu32.c
20
+++ b/MAINTAINERS
15
+++ b/target/arm/tcg/cpu32.c
21
@@ -XXX,XX +XXX,XX @@ S: Maintained
16
@@ -XXX,XX +XXX,XX @@ void aa32_max_features(ARMCPU *cpu)
22
F: hw/net/rocker/
17
cpu->isar.id_mmfr5 = t;
23
F: qapi/rocker.json
18
24
F: tests/rocker/
19
t = cpu->isar.id_pfr0;
25
-F: docs/specs/rocker.txt
20
- t = FIELD_DP32(t, ID_PFR0, CSV2, 2); /* FEAT_CVS2 */
26
+F: docs/specs/rocker.rst
21
+ t = FIELD_DP32(t, ID_PFR0, CSV2, 2); /* FEAT_CSV2 */
27
22
t = FIELD_DP32(t, ID_PFR0, DIT, 1); /* FEAT_DIT */
28
e1000x
23
t = FIELD_DP32(t, ID_PFR0, RAS, 1); /* FEAT_RAS */
29
M: Dmitry Fleytman <dmitry.fleytman@gmail.com>
24
cpu->isar.id_pfr0 = t;
30
diff --git a/docs/specs/index.rst b/docs/specs/index.rst
31
index XXXXXXX..XXXXXXX 100644
32
--- a/docs/specs/index.rst
33
+++ b/docs/specs/index.rst
34
@@ -XXX,XX +XXX,XX @@ guest hardware that is specific to QEMU.
35
vmcoreinfo
36
vmgenid
37
rapl-msr
38
+ rocker
39
diff --git a/docs/specs/rocker.txt b/docs/specs/rocker.rst
40
similarity index 91%
41
rename from docs/specs/rocker.txt
42
rename to docs/specs/rocker.rst
43
index XXXXXXX..XXXXXXX 100644
44
--- a/docs/specs/rocker.txt
45
+++ b/docs/specs/rocker.rst
46
@@ -XXX,XX +XXX,XX @@
47
Rocker Network Switch Register Programming Guide
48
-Copyright (c) Scott Feldman <sfeldma@gmail.com>
49
-Copyright (c) Neil Horman <nhorman@tuxdriver.com>
50
-Version 0.11, 12/29/2014
51
+************************************************
52
53
-LICENSE
54
-=======
55
+..
56
+ Copyright (c) Scott Feldman <sfeldma@gmail.com>
57
+ Copyright (c) Neil Horman <nhorman@tuxdriver.com>
58
+ Version 0.11, 12/29/2014
59
60
-This program is free software; you can redistribute it and/or modify
61
-it under the terms of the GNU General Public License as published by
62
-the Free Software Foundation; either version 2 of the License, or
63
-(at your option) any later version.
64
+ This program is free software; you can redistribute it and/or modify
65
+ it under the terms of the GNU General Public License as published by
66
+ the Free Software Foundation; either version 2 of the License, or
67
+ (at your option) any later version.
68
69
-This program is distributed in the hope that it will be useful,
70
-but WITHOUT ANY WARRANTY; without even the implied warranty of
71
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
72
-GNU General Public License for more details.
73
+ This program is distributed in the hope that it will be useful,
74
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
75
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
76
+ GNU General Public License for more details.
77
78
-SECTION 1: Introduction
79
-=======================
80
+Introduction
81
+============
82
83
Overview
84
--------
85
@@ -XXX,XX +XXX,XX @@ software.
86
Notations and Conventions
87
-------------------------
88
89
-o In register descriptions, [n:m] indicates a range from bit n to bit m,
90
-inclusive.
91
-o Use of leading 0x indicates a hexadecimal number.
92
-o Use of leading 0b indicates a binary number.
93
-o The use of RSVD or Reserved indicates that a bit or field is reserved for
94
-future use.
95
-o Field width is in bytes, unless otherwise noted.
96
-o Register are (R) read-only, (R/W) read/write, (W) write-only, or (COR) clear
97
-on read
98
-o TLV values in network-byte-order are designated with (N).
99
+* In register descriptions, [n:m] indicates a range from bit n to bit m,
100
+ inclusive.
101
+* Use of leading 0x indicates a hexadecimal number.
102
+* Use of leading 0b indicates a binary number.
103
+* The use of RSVD or Reserved indicates that a bit or field is reserved for
104
+ future use.
105
+* Field width is in bytes, unless otherwise noted.
106
+* Register are (R) read-only, (R/W) read/write, (W) write-only, or (COR) clear
107
+ on read
108
+* TLV values in network-byte-order are designated with (N).
109
110
111
-SECTION 2: PCI Configuration Registers
112
-======================================
113
+PCI Configuration Registers
114
+===========================
115
116
PCI Configuration Space
117
-----------------------
118
119
-Each switch instance registers as a PCI device with PCI configuration space:
120
+Each switch instance registers as a PCI device with PCI configuration space::
121
122
    offset    width    description        value
123
    ---------------------------------------------
124
@@ -XXX,XX +XXX,XX @@ Each switch instance registers as a PCI device with PCI configuration space:
125
    0x41    1    Retry count
126
    0x42    2    Reserved
127
128
+ * Assigned by sub-system implementation
129
130
-* Assigned by sub-system implementation
131
-
132
-SECTION 3: Memory-Mapped Register Space
133
-=======================================
134
+Memory-Mapped Register Space
135
+============================
136
137
There are two memory-mapped BARs. BAR0 maps device register space and is
138
0x2000 in size. BAR1 maps MSI-X vector and PBA tables and is also 0x2000 in
139
@@ -XXX,XX +XXX,XX @@ byte registers with one 4-byte access, and 8 byte registers with either two
140
4-byte accesses or a single 8-byte access. In the case of two 4-byte accesses,
141
access must be lower and then upper 4-bytes, in that order.
142
143
-BAR0 device register space is organized as follows:
144
+BAR0 device register space is organized as follows::
145
146
    offset        description
147
    ------------------------------------------------------
148
@@ -XXX,XX +XXX,XX @@ Reads to reserved registers read back as 0.
149
150
No fancy stuff like write-combining is enabled on any of the registers.
151
152
-BAR1 MSI-X register space is organized as follows:
153
+BAR1 MSI-X register space is organized as follows::
154
155
    offset        description
156
    ------------------------------------------------------
157
@@ -XXX,XX +XXX,XX @@ BAR1 MSI-X register space is organized as follows:
158
    0x1000-0x1fff    MSI-X PBA table
159
160
161
-SECTION 4: Interrupts, DMA, and Endianness
162
-==========================================
163
+Interrupts, DMA, and Endianness
164
+===============================
165
166
PCI Interrupts
167
--------------
168
@@ -XXX,XX +XXX,XX @@ PCI Interrupts
169
The device supports only MSI-X interrupts. BAR1 memory-mapped region contains
170
the MSI-X vector and PBA tables, with support for up to 256 MSI-X vectors.
171
172
-The vector assignment is:
173
+The vector assignment is::
174
175
    vector        description
176
    -----------------------------------------------------
177
@@ -XXX,XX +XXX,XX @@ The vector assignment is:
178
             Tx vector is even
179
             Rx vector is odd
180
181
-A MSI-X vector table entry is 16 bytes:
182
+A MSI-X vector table entry is 16 bytes::
183
184
    field        offset    width    description
185
    -------------------------------------------------------------
186
@@ -XXX,XX +XXX,XX @@ ring, and hardware will set this bit when the descriptor is complete.
187
Descriptor ring sizes must be a power of 2 and range from 2 to 64K entries.
188
Descriptor rings' base address must be 8-byte aligned. Descriptors must be
189
packed within ring. Each descriptor in each ring must also be aligned on an 8
190
-byte boundary. Each descriptor ring will have these registers:
191
+byte boundary. Each descriptor ring will have these registers::
192
193
    DMA_DESC_xxx_BASE_ADDR, offset 0x1000 + (x * 32), 64-bit, (R/W)
194
    DMA_DESC_xxx_SIZE, offset 0x1008 + (x * 32), 32-bit, (R/W)
195
@@ -XXX,XX +XXX,XX @@ byte boundary. Each descriptor ring will have these registers:
196
    DMA_DESC_xxx_CREDITS, offset 0x1018 + (x * 32), 32-bit, (R/W)
197
    DMA_DESC_xxx_RSVD1, offset 0x101c + (x * 32), 32-bit, (R/W)
198
199
-Where x is descriptor ring index:
200
+Where x is descriptor ring index::
201
202
    index        ring
203
    --------------------
204
@@ -XXX,XX +XXX,XX @@ written past TAIL. To do so would wrap the ring. An empty ring is when HEAD
205
== TAIL. A full ring is when HEAD is one position behind TAIL. Both HEAD and
206
TAIL increment and modulo wrap at the ring size.
207
208
-CTRL register bits:
209
+CTRL register bits::
210
211
    bit    name        description
212
    ------------------------------------------------------------------------
213
    [0]    CTRL_RESET    Reset the descriptor ring
214
    [1:31]    Reserved
215
216
-All descriptor types share some common fields:
217
+All descriptor types share some common fields::
218
219
    field            width    description
220
    -------------------------------------------------------------------
221
@@ -XXX,XX +XXX,XX @@ filled in by the switch. Likewise, the switch will ignore unknown fields
222
filled in by software.
223
224
Descriptor payload buffer is 8-byte aligned and TLVs are 8-byte aligned. The
225
-value within a TLV is also 8-byte aligned. The (packed, 8 byte) TLV header is:
226
+value within a TLV is also 8-byte aligned. The (packed, 8 byte) TLV header is::
227
228
    field    width    description
229
    -----------------------------
230
@@ -XXX,XX +XXX,XX @@ The alignment requirements for descriptors and TLVs are to avoid unaligned
231
access exceptions in software. Note that the payload for each TLV is also
232
8 byte aligned.
233
234
-Figure 1 shows an example descriptor buffer with two TLVs.
235
+Figure 1 shows an example descriptor buffer with two TLVs::
236
237
<------- 8 bytes ------->
238
239
@@ -XXX,XX +XXX,XX @@ network packet data. All non-network-packet TLV multi-byte values will be LE.
240
TLV values in network-byte-order are designated with (N).
241
242
243
-SECTION 5: Test Registers
244
-=========================
245
+Test Registers
246
+==============
247
248
Rocker has several test registers to support troubleshooting register access,
249
-interrupt generation, and DMA operations:
250
+interrupt generation, and DMA operations::
251
252
    TEST_REG, offset 0x0010, 32-bit (R/W)
253
    TEST_REG64, offset 0x0018, 64-bit (R/W)
254
@@ -XXX,XX +XXX,XX @@ for that vector.
255
256
To test basic DMA operations, allocate a DMA-able host buffer and put the
257
buffer address into TEST_DMA_ADDR and size into TEST_DMA_SIZE. Then, write to
258
-TEST_DMA_CTRL to manipulate the buffer contents. TEST_DMA_CTRL operations are:
259
+TEST_DMA_CTRL to manipulate the buffer contents. TEST_DMA_CTRL operations are::
260
261
    operation        value    description
262
    -----------------------------------------------------------
263
@@ -XXX,XX +XXX,XX @@ issue exists. In particular, buffers that start on odd-8-byte boundary and/or
264
span multiple PAGE sizes should be tested.
265
266
267
-SECTION 6: Ports
268
-================
269
+Ports
270
+=====
271
272
Physical and Logical Ports
273
------------------------------------
274
275
The switch supports up to 62 physical (front-panel) ports. Register
276
-PORT_PHYS_COUNT returns the actual number of physical ports available:
277
+PORT_PHYS_COUNT returns the actual number of physical ports available::
278
279
    PORT_PHYS_COUNT, offset 0x0304, 32-bit, (R)
280
281
@@ -XXX,XX +XXX,XX @@ Front-panel ports and logical tunnel ports are mapped into a single 32-bit port
282
space. A special CPU port is assigned port 0. The front-panel ports are
283
mapped to ports 1-62. A special loopback port is assigned port 63. Logical
284
tunnel ports are assigned ports 0x0001000-0x0001ffff.
285
-To summarize the port assignments:
286
+To summarize the port assignments::
287
288
    port            mapping
289
    -------------------------------------------------------
290
@@ -XXX,XX +XXX,XX @@ set/get the mode for front-panel ports, see port settings, below.
291
Port Settings
292
-------------
293
294
-Link status for all front-panel ports is available via PORT_PHYS_LINK_STATUS:
295
+Link status for all front-panel ports is available via PORT_PHYS_LINK_STATUS::
296
297
    PORT_PHYS_LINK_STATUS, offset 0x0310, 64-bit, (R)
298
299
    Value is port bitmap. Bits 0 and 63 always read 0. Bits 1-62
300
    read 1 for link UP and 0 for link DOWN for respective front-panel ports.
301
302
-Other properties for front-panel ports are available via DMA CMD descriptors:
303
+Other properties for front-panel ports are available via DMA CMD descriptors::
304
305
    Get PORT_SETTINGS descriptor:
306
307
@@ -XXX,XX +XXX,XX @@ Port Enable
308
-----------
309
310
Front-panel ports are initially disabled, which means port ingress and egress
311
-packets will be dropped. To enable or disable a port, use PORT_PHYS_ENABLE:
312
+packets will be dropped. To enable or disable a port, use PORT_PHYS_ENABLE::
313
314
    PORT_PHYS_ENABLE: offset 0x0318, 64-bit, (R/W)
315
316
@@ -XXX,XX +XXX,XX @@ packets will be dropped. To enable or disable a port, use PORT_PHYS_ENABLE:
317
    Default is 0.
318
319
320
-SECTION 7: Switch Control
321
-=========================
322
+Switch Control
323
+==============
324
325
This section covers switch-wide register settings.
326
327
Control
328
-------
329
330
-This register is used for low level control of the switch.
331
+This register is used for low level control of the switch::
332
333
    CONTROL: offset 0x0300, 32-bit, (W)
334
335
@@ -XXX,XX +XXX,XX @@ Switch ID
336
---------
337
338
The switch has a SWITCH_ID to be used by software to uniquely identify the
339
-switch:
340
+switch::
341
342
    SWITCH_ID: offset 0x0320, 64-bit, (R)
343
344
    Value is opaque to switch software and no special encoding is implied.
345
346
347
-SECTION 8: Events
348
-=================
349
+Events
350
+======
351
352
Non-I/O asynchronous events from the device are notified to the host using the
353
-event ring. The TLV structure for events is:
354
+event ring. The TLV structure for events is::
355
356
    field        width    description
357
    ---------------------------------------------------
358
@@ -XXX,XX +XXX,XX @@ event ring. The TLV structure for events is:
359
Link Changed Event
360
------------------
361
362
-When link status changes on a physical port, this event is generated.
363
+When link status changes on a physical port, this event is generated::
364
365
    field        width    description
366
    ---------------------------------------------------
367
@@ -XXX,XX +XXX,XX @@ driver should install to the device the MAC/VLAN on the port into the bridge
368
table. Once installed, the MAC/VLAN is known on the port and this event will
369
no longer be generated.
370
371
+::
372
+
373
    field        width    description
374
    ---------------------------------------------------
375
    INFO        <nest>
376
@@ -XXX,XX +XXX,XX @@ no longer be generated.
377
     VLAN        2    VLAN ID
378
379
380
-SECTION 9: CPU Packet Processing
381
-================================
382
+CPU Packet Processing
383
+=====================
384
385
Ingress packets directed to the host CPU for further processing are delivered
386
in the DMA RX ring. Likewise, host CPU originating packets destined to egress
387
@@ -XXX,XX +XXX,XX @@ software that Tx is complete and software resources (e.g. skb) backing packet
388
can be released.
389
390
Figure 2 shows an example 3-fragment packet queued with one Tx descriptor. A
391
-TLV is used for each packet fragment.
392
+TLV is used for each packet fragment::
393
394
     pkt frag 1
395
     +–––––––+ +–+
396
@@ -XXX,XX +XXX,XX @@ TLV is used for each packet fragment.
397
398
                fig 2.
399
400
-The TLVs for Tx descriptor buffer are:
401
+The TLVs for Tx descriptor buffer are::
402
403
    field            width    description
404
    ---------------------------------------------------------------------
405
@@ -XXX,XX +XXX,XX @@ The TLVs for Tx descriptor buffer are:
406
     TX_FRAG_ADDR    8    DMA address of packet fragment
407
     TX_FRAG_LEN        2    Packet fragment length
408
409
-Possible status return codes in descriptor on completion are:
410
+Possible status return codes in descriptor on completion are::
411
412
    DESC_COMP_ERR    reason
413
    --------------------------------------------------------------------
414
@@ -XXX,XX +XXX,XX @@ worst-case packet size. A single Rx descriptor will contain the entire Rx
415
packet data in one RX_FRAG. Other Rx TLVs describe and hardware offloads
416
performed on the packet, such as checksum validation.
417
418
-The TLVs for Rx descriptor buffer are:
419
+The TLVs for Rx descriptor buffer are::
420
421
    field        width    description
422
    ---------------------------------------------------
423
@@ -XXX,XX +XXX,XX @@ The TLVs for Rx descriptor buffer are:
424
Offload forward RX_FLAG indicates the device has already forwarded the packet
425
so the host CPU should not also forward the packet.
426
427
-Possible status return codes in descriptor on completion are:
428
+Possible status return codes in descriptor on completion are::
429
430
    DESC_COMP_ERR    reason
431
    --------------------------------------------------------------------
432
@@ -XXX,XX +XXX,XX @@ Possible status return codes in descriptor on completion are:
433
            packet data TLV and other TLVs.
434
435
436
-SECTION 10: OF-DPA Mode
437
-======================
438
+OF-DPA Mode
439
+===========
440
441
OF-DPA mode allows the switch to offload flow packet processing functions to
442
hardware. An OpenFlow controller would communicate with an OpenFlow agent
443
installed on the switch. The OpenFlow agent would (directly or indirectly)
444
communicate with the Rocker switch driver, which in turn would program switch
445
-hardware with flow functionality, as defined in OF-DPA. The block diagram is:
446
+hardware with flow functionality, as defined in OF-DPA. The block diagram is::
447
448
        +–––––––––––––––----–––+
449
        | OF |
450
@@ -XXX,XX +XXX,XX @@ OF-DPA Flow Table Interface
451
452
There are commands to add, modify, delete, and get stats of flow table entries.
453
The commands are issued using the DMA CMD descriptor ring. The following
454
-commands are defined:
455
+commands are defined::
456
457
    CMD_ADD:        add an entry to flow table
458
    CMD_MOD:        modify an entry in flow table
459
    CMD_DEL:        delete an entry from flow table
460
    CMD_GET_STATS:        get stats for flow entry
461
462
-TLVs for add and modify commands are:
463
+TLVs for add and modify commands are::
464
465
    field            width    description
466
    ----------------------------------------------------
467
@@ -XXX,XX +XXX,XX @@ TLVs for add and modify commands are:
468
469
Additional TLVs based on flow table ID:
470
471
-Table ID 0: ingress port
472
+Table ID 0: ingress port::
473
474
    field            width    description
475
    ----------------------------------------------------
476
    OF_DPA_IN_PPORT        4    ingress physical port number
477
    OF_DPA_GOTO_TBL        2    goto table ID; zero to drop
478
479
-Table ID 10: vlan
480
+Table ID 10: vlan::
481
482
    field            width    description
483
    ----------------------------------------------------
484
@@ -XXX,XX +XXX,XX @@ Table ID 10: vlan
485
    OF_DPA_GOTO_TBL        2    goto table ID; zero to drop
486
    OF_DPA_NEW_VLAN_ID    2 (N)    new vlan ID
487
488
-Table ID 20: termination mac
489
+Table ID 20: termination mac::
490
491
    field            width    description
492
    ----------------------------------------------------
493
@@ -XXX,XX +XXX,XX @@ Table ID 20: termination mac
494
    OF_DPA_OUT_PPORT    2    if specified, must be
495
                    controller, set zero otherwise
496
497
-Table ID 30: unicast routing
498
+Table ID 30: unicast routing::
499
500
    field            width    description
501
    ----------------------------------------------------
502
@@ -XXX,XX +XXX,XX @@ Table ID 30: unicast routing
503
    OF_DPA_GROUP_ID        4    data for GROUP action must
504
                    be an L3 Unicast group entry
505
506
-Table ID 40: multicast routing
507
+Table ID 40: multicast routing::
508
509
    field            width    description
510
    ----------------------------------------------------
511
@@ -XXX,XX +XXX,XX @@ Table ID 40: multicast routing
512
    OF_DPA_GROUP_ID        4    data for GROUP action must
513
                    be an L3 multicast group entry
514
515
-Table ID 50: bridging
516
+Table ID 50: bridging::
517
518
    field            width    description
519
    ----------------------------------------------------
520
@@ -XXX,XX +XXX,XX @@ Table ID 50: bridging
521
                    restricted to CONTROLLER,
522
                    set to 0 otherwise
523
524
-Table ID 60: acl policy
525
+Table ID 60: acl policy::
526
527
    field            width    description
528
    ----------------------------------------------------
529
@@ -XXX,XX +XXX,XX @@ Table ID 60: acl policy
530
                    dropped (all other instructions
531
                    ignored)
532
533
-TLVs for flow delete and get stats command are:
534
+TLVs for flow delete and get stats command are::
535
536
    field            width    description
537
    ---------------------------------------------------
538
@@ -XXX,XX +XXX,XX @@ TLVs for flow delete and get stats command are:
539
    OF_DPA_COOKIE        8    Cookie
540
541
On completion of get stats command, the descriptor buffer is written back with
542
-the following TLVs:
543
+the following TLVs::
544
545
    field            width    description
546
    ---------------------------------------------------
547
@@ -XXX,XX +XXX,XX @@ the following TLVs:
548
    OF_DPA_STAT_RX_PKTS    8    Received packets
549
    OF_DPA_STAT_TX_PKTS    8    Transmit packets
550
551
-Possible status return codes in descriptor on completion are:
552
+Possible status return codes in descriptor on completion are::
553
554
    DESC_COMP_ERR    command            reason
555
    --------------------------------------------------------------------
556
@@ -XXX,XX +XXX,XX @@ Group Table Interface
557
558
There are commands to add, modify, delete, and get stats of group table
559
entries. The commands are issued using the DMA CMD descriptor ring. The
560
-following commands are defined:
561
+following commands are defined::
562
563
    CMD_ADD:        add an entry to group table
564
    CMD_MOD:        modify an entry in group table
565
    CMD_DEL:        delete an entry from group table
566
    CMD_GET_STATS:        get stats for group entry
567
568
-TLVs for add and modify commands are:
569
+TLVs for add and modify commands are::
570
571
    field            width    description
572
    -----------------------------------------------------------
573
@@ -XXX,XX +XXX,XX @@ TLVs for add and modify commands are:
574
     FLOW_SRC_MAC        6    (types 1, 2, 5)
575
     FLOW_DST_MAC        6    (types 1, 2)
576
577
-TLVs for flow delete and get stats command are:
578
+TLVs for flow delete and get stats command are::
579
580
    field            width    description
581
    -----------------------------------------------------------
582
@@ -XXX,XX +XXX,XX @@ TLVs for flow delete and get stats command are:
583
    FLOW_GROUP_ID        2    Flow group ID
584
585
On completion of get stats command, the descriptor buffer is written back with
586
-the following TLVs:
587
+the following TLVs::
588
589
    field            width    description
590
    ---------------------------------------------------
591
@@ -XXX,XX +XXX,XX @@ the following TLVs:
592
    FLOW_STAT_REF_COUNT    4    Flow reference count
593
    FLOW_STAT_BUCKET_COUNT    4    Flow bucket count
594
595
-Possible status return codes in descriptor on completion are:
596
+Possible status return codes in descriptor on completion are::
597
598
    DESC_COMP_ERR    command            reason
599
    --------------------------------------------------------------------
600
--
25
--
601
2.34.1
26
2.34.1
602
27
603
28
diff view generated by jsdifflib
1
From: Jianzhou Yue <JianZhou.Yue@verisilicon.com>
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
2
3
The real period is zero when both period and period_frac are zero.
3
We already implement FEAT_MTE_ASYNC; we just forgot to list it
4
Check the method ptimer_set_freq, if freq is larger than 1000 MHz,
4
in the documentation.
5
the period is zero, but the period_frac is not, in this case, the
6
ptimer will work but the current code incorrectly recognizes that
7
the ptimer is disabled.
8
5
9
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2306
6
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
10
Signed-off-by: JianZhou Yue <JianZhou.Yue@verisilicon.com>
7
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
11
Message-id: 3DA024AEA8B57545AF1B3CAA37077D0FB75E82C8@SHASXM03.verisilicon.com
8
Message-id: 20241122225049.1617774-6-pierrick.bouvier@linaro.org
12
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
9
[PMM: expand commit message]
13
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
14
---
11
---
15
hw/core/ptimer.c | 4 ++--
12
docs/system/arm/emulation.rst | 1 +
16
tests/unit/ptimer-test.c | 33 +++++++++++++++++++++++++++++++++
13
1 file changed, 1 insertion(+)
17
2 files changed, 35 insertions(+), 2 deletions(-)
18
14
19
diff --git a/hw/core/ptimer.c b/hw/core/ptimer.c
15
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
20
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
21
--- a/hw/core/ptimer.c
17
--- a/docs/system/arm/emulation.rst
22
+++ b/hw/core/ptimer.c
18
+++ b/docs/system/arm/emulation.rst
23
@@ -XXX,XX +XXX,XX @@ static void ptimer_reload(ptimer_state *s, int delta_adjust)
19
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
24
delta = s->delta = s->limit;
20
- FEAT_MTE2 (Memory Tagging Extension)
25
}
21
- FEAT_MTE3 (MTE Asymmetric Fault Handling)
26
22
- FEAT_MTE_ASYM_FAULT (Memory tagging asymmetric faults)
27
- if (s->period == 0) {
23
+- FEAT_MTE_ASYNC (Asynchronous reporting of Tag Check Fault)
28
+ if (s->period == 0 && s->period_frac == 0) {
24
- FEAT_NMI (Non-maskable Interrupt)
29
if (!qtest_enabled()) {
25
- FEAT_NV (Nested Virtualization)
30
fprintf(stderr, "Timer with period zero, disabling\n");
26
- FEAT_NV2 (Enhanced nested virtualization support)
31
}
32
@@ -XXX,XX +XXX,XX @@ void ptimer_run(ptimer_state *s, int oneshot)
33
34
assert(s->in_transaction);
35
36
- if (was_disabled && s->period == 0) {
37
+ if (was_disabled && s->period == 0 && s->period_frac == 0) {
38
if (!qtest_enabled()) {
39
fprintf(stderr, "Timer with period zero, disabling\n");
40
}
41
diff --git a/tests/unit/ptimer-test.c b/tests/unit/ptimer-test.c
42
index XXXXXXX..XXXXXXX 100644
43
--- a/tests/unit/ptimer-test.c
44
+++ b/tests/unit/ptimer-test.c
45
@@ -XXX,XX +XXX,XX @@ static void check_oneshot_with_load_0(gconstpointer arg)
46
ptimer_free(ptimer);
47
}
48
49
+static void check_freq_more_than_1000M(gconstpointer arg)
50
+{
51
+ const uint8_t *policy = arg;
52
+ ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy);
53
+ bool no_round_down = (*policy & PTIMER_POLICY_NO_COUNTER_ROUND_DOWN);
54
+
55
+ triggered = false;
56
+
57
+ ptimer_transaction_begin(ptimer);
58
+ ptimer_set_freq(ptimer, 2000000000);
59
+ ptimer_set_limit(ptimer, 8, 1);
60
+ ptimer_run(ptimer, 1);
61
+ ptimer_transaction_commit(ptimer);
62
+
63
+ qemu_clock_step(3);
64
+
65
+ g_assert_cmpuint(ptimer_get_count(ptimer), ==, no_round_down ? 3 : 2);
66
+ g_assert_false(triggered);
67
+
68
+ qemu_clock_step(1);
69
+
70
+ g_assert_cmpuint(ptimer_get_count(ptimer), ==, 0);
71
+ g_assert_true(triggered);
72
+
73
+ ptimer_free(ptimer);
74
+}
75
+
76
static void add_ptimer_tests(uint8_t policy)
77
{
78
char policy_name[256] = "";
79
@@ -XXX,XX +XXX,XX @@ static void add_ptimer_tests(uint8_t policy)
80
policy_name),
81
g_memdup2(&policy, 1), check_oneshot_with_load_0, g_free);
82
g_free(tmp);
83
+
84
+ g_test_add_data_func_full(
85
+ tmp = g_strdup_printf("/ptimer/freq_more_than_1000M policy=%s",
86
+ policy_name),
87
+ g_memdup2(&policy, 1), check_freq_more_than_1000M, g_free);
88
+ g_free(tmp);
89
}
90
91
static void add_all_ptimer_policies_comb_tests(void)
92
--
27
--
93
2.34.1
28
2.34.1
diff view generated by jsdifflib
1
From: Alex Richardson <alexrichardson@google.com>
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
2
3
In the PMUv3, a new AArch32 64-bit (MCRR/MRRC) accessor for the
3
We already implement FEAT_DoubleLock (see commit f94a6df5dd6a7) when
4
PMCCNTR was added. In QEMU we forgot to implement this, so only
4
the ID registers call for it. This feature is actually one that must
5
provide the 32-bit accessor. Since we have a 64-bit PMCCNTR
5
*not* be implemented in v9.0, but since our documentation lists
6
sysreg for AArch64, adding the 64-bit AArch32 version is easy.
6
everything we can emulate, we should include FEAT_DoubleLock in the
7
list.
7
8
8
We add the PMCCNTR to the v8_cp_reginfo because PMUv3 was added
9
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
9
in the ARMv8 architecture. This is consistent with how we
10
Message-id: 20241122225049.1617774-7-pierrick.bouvier@linaro.org
10
handle the existing PMCCNTR support, where we always implement
11
it for all v7 CPUs. This is arguably something we should
12
clean up so it is gated on ARM_FEATURE_PMU and/or an ID
13
register check for the relevant PMU version, but we should
14
do that as its own tidyup rather than being inconsistent between
15
this PMCCNTR accessor and the others.
16
17
See https://developer.arm.com/documentation/ddi0601/2024-06/AArch32-Registers/PMCCNTR--Performance-Monitors-Cycle-Count-Register?lang=en
18
19
Signed-off-by: Alex Richardson <alexrichardson@google.com>
20
Message-id: 20240801220328.941866-1-alexrichardson@google.com
21
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
[PMM: expand commit message]
22
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
23
---
14
---
24
target/arm/helper.c | 6 ++++++
15
docs/system/arm/emulation.rst | 1 +
25
1 file changed, 6 insertions(+)
16
1 file changed, 1 insertion(+)
26
17
27
diff --git a/target/arm/helper.c b/target/arm/helper.c
18
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
28
index XXXXXXX..XXXXXXX 100644
19
index XXXXXXX..XXXXXXX 100644
29
--- a/target/arm/helper.c
20
--- a/docs/system/arm/emulation.rst
30
+++ b/target/arm/helper.c
21
+++ b/docs/system/arm/emulation.rst
31
@@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
22
@@ -XXX,XX +XXX,XX @@ the following architecture extensions:
32
.access = PL1_RW, .accessfn = access_trap_aa32s_el1,
23
- FEAT_CSV3 (Cache speculation variant 3)
33
.writefn = sdcr_write,
24
- FEAT_DGH (Data gathering hint)
34
.fieldoffset = offsetoflow32(CPUARMState, cp15.mdcr_el3) },
25
- FEAT_DIT (Data Independent Timing instructions)
35
+ { .name = "PMCCNTR", .state = ARM_CP_STATE_AA32,
26
+- FEAT_DoubleLock (Double Lock)
36
+ .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_64BIT,
27
- FEAT_DPB (DC CVAP instruction)
37
+ .cp = 15, .crm = 9, .opc1 = 0,
28
- FEAT_DPB2 (DC CVADP instruction)
38
+ .access = PL0_RW, .resetvalue = 0, .fgt = FGT_PMCCNTR_EL0,
29
- FEAT_Debugv8p1 (Debug with VHE)
39
+ .readfn = pmccntr_read, .writefn = pmccntr_write,
40
+ .accessfn = pmreg_access_ccntr },
41
};
42
43
/* These are present only when EL1 supports AArch32 */
44
--
30
--
45
2.34.1
31
2.34.1
diff view generated by jsdifflib
1
From: Richard Henderson <richard.henderson@linaro.org>
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
2
3
With pcrel, we cannot check the guarded page bit at translation
3
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
time, as different mappings of the same physical page may or may
5
not have the GP bit set.
6
7
Instead, add a couple of helpers to check the page at runtime,
8
after all other filters that might obviate the need for the check.
9
10
The set_btype_for_br call must be moved after the gen_a64_set_pc
11
call to ensure the current pc can still be computed.
12
13
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
14
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
15
Message-id: 20240802003028.795476-1-richard.henderson@linaro.org
6
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
16
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
7
Message-id: 20241122225049.1617774-8-pierrick.bouvier@linaro.org
17
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
18
---
9
---
19
target/arm/tcg/helper-a64.h | 3 ++
10
docs/system/arm/fby35.rst | 2 +-
20
target/arm/tcg/translate.h | 2 --
11
1 file changed, 1 insertion(+), 1 deletion(-)
21
target/arm/tcg/helper-a64.c | 39 +++++++++++++++++++++
22
target/arm/tcg/translate-a64.c | 64 ++++++++--------------------------
23
4 files changed, 56 insertions(+), 52 deletions(-)
24
12
25
diff --git a/target/arm/tcg/helper-a64.h b/target/arm/tcg/helper-a64.h
13
diff --git a/docs/system/arm/fby35.rst b/docs/system/arm/fby35.rst
26
index XXXXXXX..XXXXXXX 100644
14
index XXXXXXX..XXXXXXX 100644
27
--- a/target/arm/tcg/helper-a64.h
15
--- a/docs/system/arm/fby35.rst
28
+++ b/target/arm/tcg/helper-a64.h
16
+++ b/docs/system/arm/fby35.rst
29
@@ -XXX,XX +XXX,XX @@ DEF_HELPER_4(cpyfp, void, env, i32, i32, i32)
17
@@ -XXX,XX +XXX,XX @@ include various compute accelerators (video, inferencing, etc). At the moment,
30
DEF_HELPER_4(cpyfm, void, env, i32, i32, i32)
18
only the first server slot's BIC is included.
31
DEF_HELPER_4(cpyfe, void, env, i32, i32, i32)
19
32
20
Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds
33
+DEF_HELPER_FLAGS_1(guarded_page_check, TCG_CALL_NO_WG, void, env)
21
-can be fit into a chassis. See `here <https://www.opencompute.org/products/423/wiwynn-yosemite-v3-server>`__
34
+DEF_HELPER_FLAGS_2(guarded_page_br, TCG_CALL_NO_RWG, void, env, tl)
22
+can be fit into a chassis. See `here <https://www.opencompute.org/products-chiplets/237/wiwynn-yosemite-v3-server>`__
35
+
23
for an example.
36
DEF_HELPER_FLAGS_5(gvec_fdiv_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
24
37
DEF_HELPER_FLAGS_5(gvec_fdiv_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
25
In this generation, the BMC is an AST2600 and each BIC is an AST1030. The BMC
38
DEF_HELPER_FLAGS_5(gvec_fdiv_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
39
diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h
40
index XXXXXXX..XXXXXXX 100644
41
--- a/target/arm/tcg/translate.h
42
+++ b/target/arm/tcg/translate.h
43
@@ -XXX,XX +XXX,XX @@ typedef struct DisasContext {
44
uint8_t dcz_blocksize;
45
/* A copy of cpu->gm_blocksize. */
46
uint8_t gm_blocksize;
47
- /* True if this page is guarded. */
48
- bool guarded_page;
49
/* True if the current insn_start has been updated. */
50
bool insn_start_updated;
51
/* Bottom two bits of XScale c15_cpar coprocessor access control reg */
52
diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c
53
index XXXXXXX..XXXXXXX 100644
54
--- a/target/arm/tcg/helper-a64.c
55
+++ b/target/arm/tcg/helper-a64.c
56
@@ -XXX,XX +XXX,XX @@ void HELPER(cpyfe)(CPUARMState *env, uint32_t syndrome, uint32_t wdesc,
57
{
58
do_cpye(env, syndrome, wdesc, rdesc, false, GETPC());
59
}
60
+
61
+static bool is_guarded_page(CPUARMState *env, target_ulong addr, uintptr_t ra)
62
+{
63
+#ifdef CONFIG_USER_ONLY
64
+ return page_get_flags(addr) & PAGE_BTI;
65
+#else
66
+ CPUTLBEntryFull *full;
67
+ void *host;
68
+ int mmu_idx = cpu_mmu_index(env_cpu(env), true);
69
+ int flags = probe_access_full(env, addr, 0, MMU_INST_FETCH, mmu_idx,
70
+ false, &host, &full, ra);
71
+
72
+ assert(!(flags & TLB_INVALID_MASK));
73
+ return full->extra.arm.guarded;
74
+#endif
75
+}
76
+
77
+void HELPER(guarded_page_check)(CPUARMState *env)
78
+{
79
+ /*
80
+ * We have already verified that bti is enabled, and that the
81
+ * instruction at PC is not ok for BTYPE. This is always at
82
+ * the beginning of a block, so PC is always up-to-date and
83
+ * no unwind is required.
84
+ */
85
+ if (is_guarded_page(env, env->pc, 0)) {
86
+ raise_exception(env, EXCP_UDEF, syn_btitrap(env->btype),
87
+ exception_target_el(env));
88
+ }
89
+}
90
+
91
+void HELPER(guarded_page_br)(CPUARMState *env, target_ulong pc)
92
+{
93
+ /*
94
+ * We have already checked for branch via x16 and x17.
95
+ * What remains for choosing BTYPE is checking for a guarded page.
96
+ */
97
+ env->btype = is_guarded_page(env, pc, GETPC()) ? 3 : 1;
98
+}
99
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
100
index XXXXXXX..XXXXXXX 100644
101
--- a/target/arm/tcg/translate-a64.c
102
+++ b/target/arm/tcg/translate-a64.c
103
@@ -XXX,XX +XXX,XX @@ static void set_btype_for_br(DisasContext *s, int rn)
104
{
105
if (dc_isar_feature(aa64_bti, s)) {
106
/* BR to {x16,x17} or !guard -> 1, else 3. */
107
- set_btype(s, rn == 16 || rn == 17 || !s->guarded_page ? 1 : 3);
108
+ if (rn == 16 || rn == 17) {
109
+ set_btype(s, 1);
110
+ } else {
111
+ TCGv_i64 pc = tcg_temp_new_i64();
112
+ gen_pc_plus_diff(s, pc, 0);
113
+ gen_helper_guarded_page_br(tcg_env, pc);
114
+ s->btype = -1;
115
+ }
116
}
117
}
118
119
@@ -XXX,XX +XXX,XX @@ static void set_btype_for_blr(DisasContext *s)
120
121
static bool trans_BR(DisasContext *s, arg_r *a)
122
{
123
- gen_a64_set_pc(s, cpu_reg(s, a->rn));
124
set_btype_for_br(s, a->rn);
125
+ gen_a64_set_pc(s, cpu_reg(s, a->rn));
126
s->base.is_jmp = DISAS_JUMP;
127
return true;
128
}
129
@@ -XXX,XX +XXX,XX @@ static bool trans_BRAZ(DisasContext *s, arg_braz *a)
130
}
131
132
dst = auth_branch_target(s, cpu_reg(s, a->rn), tcg_constant_i64(0), !a->m);
133
- gen_a64_set_pc(s, dst);
134
set_btype_for_br(s, a->rn);
135
+ gen_a64_set_pc(s, dst);
136
s->base.is_jmp = DISAS_JUMP;
137
return true;
138
}
139
@@ -XXX,XX +XXX,XX @@ static bool trans_FAIL(DisasContext *s, arg_OK *a)
140
return true;
141
}
142
143
-/**
144
- * is_guarded_page:
145
- * @env: The cpu environment
146
- * @s: The DisasContext
147
- *
148
- * Return true if the page is guarded.
149
- */
150
-static bool is_guarded_page(CPUARMState *env, DisasContext *s)
151
-{
152
- uint64_t addr = s->base.pc_first;
153
-#ifdef CONFIG_USER_ONLY
154
- return page_get_flags(addr) & PAGE_BTI;
155
-#else
156
- CPUTLBEntryFull *full;
157
- void *host;
158
- int mmu_idx = arm_to_core_mmu_idx(s->mmu_idx);
159
- int flags;
160
-
161
- /*
162
- * We test this immediately after reading an insn, which means
163
- * that the TLB entry must be present and valid, and thus this
164
- * access will never raise an exception.
165
- */
166
- flags = probe_access_full(env, addr, 0, MMU_INST_FETCH, mmu_idx,
167
- false, &host, &full, 0);
168
- assert(!(flags & TLB_INVALID_MASK));
169
-
170
- return full->extra.arm.guarded;
171
-#endif
172
-}
173
-
174
/**
175
* btype_destination_ok:
176
* @insn: The instruction at the branch destination
177
@@ -XXX,XX +XXX,XX @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
178
179
if (dc_isar_feature(aa64_bti, s)) {
180
if (s->base.num_insns == 1) {
181
- /*
182
- * At the first insn of the TB, compute s->guarded_page.
183
- * We delayed computing this until successfully reading
184
- * the first insn of the TB, above. This (mostly) ensures
185
- * that the softmmu tlb entry has been populated, and the
186
- * page table GP bit is available.
187
- *
188
- * Note that we need to compute this even if btype == 0,
189
- * because this value is used for BR instructions later
190
- * where ENV is not available.
191
- */
192
- s->guarded_page = is_guarded_page(env, s);
193
-
194
/* First insn can have btype set to non-zero. */
195
tcg_debug_assert(s->btype >= 0);
196
197
@@ -XXX,XX +XXX,XX @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
198
* priority -- below debugging exceptions but above most
199
* everything else. This allows us to handle this now
200
* instead of waiting until the insn is otherwise decoded.
201
+ *
202
+ * We can check all but the guarded page check here;
203
+ * defer the latter to a helper.
204
*/
205
if (s->btype != 0
206
- && s->guarded_page
207
&& !btype_destination_ok(insn, s->bt, s->btype)) {
208
- gen_exception_insn(s, 0, EXCP_UDEF, syn_btitrap(s->btype));
209
- return;
210
+ gen_helper_guarded_page_check(tcg_env);
211
}
212
} else {
213
/* Not the first insn: btype must be 0. */
214
--
26
--
215
2.34.1
27
2.34.1
216
28
217
29
diff view generated by jsdifflib
Deleted patch
1
In commit bb71846325e23 we added some macro magic to avoid
2
variable-shadowing when using some of our more complicated
3
macros. One of the internal components of this is a macro
4
named MAKE_IDENTFIER. Fix the typo in its name: it should
5
be MAKE_IDENTIFIER.
6
1
7
Commit created with
8
sed -i -e 's/MAKE_IDENTFIER/MAKE_IDENTIFIER/g' include/qemu/*.h include/qapi/qmp/qobject.h
9
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Reviewed-by: Markus Armbruster <armbru@redhat.com>
12
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
13
Message-id: 20240801102516.3843780-1-peter.maydell@linaro.org
14
---
15
include/qapi/qmp/qobject.h | 2 +-
16
include/qemu/atomic.h | 2 +-
17
include/qemu/compiler.h | 2 +-
18
include/qemu/osdep.h | 6 +++---
19
4 files changed, 6 insertions(+), 6 deletions(-)
20
21
diff --git a/include/qapi/qmp/qobject.h b/include/qapi/qmp/qobject.h
22
index XXXXXXX..XXXXXXX 100644
23
--- a/include/qapi/qmp/qobject.h
24
+++ b/include/qapi/qmp/qobject.h
25
@@ -XXX,XX +XXX,XX @@ struct QObject {
26
typeof(obj) _obj = (obj); \
27
_obj ? container_of(&_obj->base, QObject, base) : NULL; \
28
})
29
-#define QOBJECT(obj) QOBJECT_INTERNAL((obj), MAKE_IDENTFIER(_obj))
30
+#define QOBJECT(obj) QOBJECT_INTERNAL((obj), MAKE_IDENTIFIER(_obj))
31
32
/* Required for qobject_to() */
33
#define QTYPE_CAST_TO_QNull QTYPE_QNULL
34
diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
35
index XXXXXXX..XXXXXXX 100644
36
--- a/include/qemu/atomic.h
37
+++ b/include/qemu/atomic.h
38
@@ -XXX,XX +XXX,XX @@
39
_val; \
40
})
41
#define qatomic_rcu_read(ptr) \
42
- qatomic_rcu_read_internal((ptr), MAKE_IDENTFIER(_val))
43
+ qatomic_rcu_read_internal((ptr), MAKE_IDENTIFIER(_val))
44
45
#define qatomic_rcu_set(ptr, i) do { \
46
qemu_build_assert(sizeof(*ptr) <= ATOMIC_REG_SIZE); \
47
diff --git a/include/qemu/compiler.h b/include/qemu/compiler.h
48
index XXXXXXX..XXXXXXX 100644
49
--- a/include/qemu/compiler.h
50
+++ b/include/qemu/compiler.h
51
@@ -XXX,XX +XXX,XX @@
52
#endif
53
54
/* Expands into an identifier stemN, where N is another number each time */
55
-#define MAKE_IDENTFIER(stem) glue(stem, __COUNTER__)
56
+#define MAKE_IDENTIFIER(stem) glue(stem, __COUNTER__)
57
58
#ifndef likely
59
#define likely(x) __builtin_expect(!!(x), 1)
60
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
61
index XXXXXXX..XXXXXXX 100644
62
--- a/include/qemu/osdep.h
63
+++ b/include/qemu/osdep.h
64
@@ -XXX,XX +XXX,XX @@ void QEMU_ERROR("code path is reachable")
65
})
66
#undef MIN
67
#define MIN(a, b) \
68
- MIN_INTERNAL((a), (b), MAKE_IDENTFIER(_a), MAKE_IDENTFIER(_b))
69
+ MIN_INTERNAL((a), (b), MAKE_IDENTIFIER(_a), MAKE_IDENTIFIER(_b))
70
71
#define MAX_INTERNAL(a, b, _a, _b) \
72
({ \
73
@@ -XXX,XX +XXX,XX @@ void QEMU_ERROR("code path is reachable")
74
})
75
#undef MAX
76
#define MAX(a, b) \
77
- MAX_INTERNAL((a), (b), MAKE_IDENTFIER(_a), MAKE_IDENTFIER(_b))
78
+ MAX_INTERNAL((a), (b), MAKE_IDENTIFIER(_a), MAKE_IDENTIFIER(_b))
79
80
#ifdef __COVERITY__
81
# define MIN_CONST(a, b) ((a) < (b) ? (a) : (b))
82
@@ -XXX,XX +XXX,XX @@ void QEMU_ERROR("code path is reachable")
83
_a == 0 ? _b : (_b == 0 || _b > _a) ? _a : _b; \
84
})
85
#define MIN_NON_ZERO(a, b) \
86
- MIN_NON_ZERO_INTERNAL((a), (b), MAKE_IDENTFIER(_a), MAKE_IDENTFIER(_b))
87
+ MIN_NON_ZERO_INTERNAL((a), (b), MAKE_IDENTIFIER(_a), MAKE_IDENTIFIER(_b))
88
89
/*
90
* Round number down to multiple. Safe when m is not a power of 2 (see
91
--
92
2.34.1
93
94
diff view generated by jsdifflib
Deleted patch
1
Convert nbd.txt to rST format.
2
1
3
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Eric Blake <eblake@redhat.com>
6
Message-id: 20240801170131.3977807-3-peter.maydell@linaro.org
7
---
8
MAINTAINERS | 2 +-
9
docs/interop/index.rst | 1 +
10
docs/interop/nbd.rst | 89 ++++++++++++++++++++++++++++++++++++++++++
11
docs/interop/nbd.txt | 72 ----------------------------------
12
4 files changed, 91 insertions(+), 73 deletions(-)
13
create mode 100644 docs/interop/nbd.rst
14
delete mode 100644 docs/interop/nbd.txt
15
16
diff --git a/MAINTAINERS b/MAINTAINERS
17
index XXXXXXX..XXXXXXX 100644
18
--- a/MAINTAINERS
19
+++ b/MAINTAINERS
20
@@ -XXX,XX +XXX,XX @@ F: nbd/
21
F: include/block/nbd*
22
F: qemu-nbd.*
23
F: blockdev-nbd.c
24
-F: docs/interop/nbd.txt
25
+F: docs/interop/nbd.rst
26
F: docs/tools/qemu-nbd.rst
27
F: tests/qemu-iotests/tests/*nbd*
28
T: git https://repo.or.cz/qemu/ericb.git nbd
29
diff --git a/docs/interop/index.rst b/docs/interop/index.rst
30
index XXXXXXX..XXXXXXX 100644
31
--- a/docs/interop/index.rst
32
+++ b/docs/interop/index.rst
33
@@ -XXX,XX +XXX,XX @@ are useful for making QEMU interoperate with other software.
34
dbus-vmstate
35
dbus-display
36
live-block-operations
37
+ nbd
38
pr-helper
39
qmp-spec
40
qemu-ga
41
diff --git a/docs/interop/nbd.rst b/docs/interop/nbd.rst
42
new file mode 100644
43
index XXXXXXX..XXXXXXX
44
--- /dev/null
45
+++ b/docs/interop/nbd.rst
46
@@ -XXX,XX +XXX,XX @@
47
+QEMU NBD protocol support
48
+=========================
49
+
50
+QEMU supports the NBD protocol, and has an internal NBD client (see
51
+``block/nbd.c``), an internal NBD server (see ``blockdev-nbd.c``), and an
52
+external NBD server tool (see ``qemu-nbd.c``). The common code is placed
53
+in ``nbd/*``.
54
+
55
+The NBD protocol is specified here:
56
+https://github.com/NetworkBlockDevice/nbd/blob/master/doc/proto.md
57
+
58
+The following paragraphs describe some specific properties of NBD
59
+protocol realization in QEMU.
60
+
61
+Metadata namespaces
62
+-------------------
63
+
64
+QEMU supports the ``base:allocation`` metadata context as defined in the
65
+NBD protocol specification, and also defines an additional metadata
66
+namespace ``qemu``.
67
+
68
+``qemu`` namespace
69
+------------------
70
+
71
+The ``qemu`` namespace currently contains two available metadata context
72
+types. The first is related to exposing the contents of a dirty
73
+bitmap alongside the associated disk contents. That metadata context
74
+is named with the following form::
75
+
76
+ qemu:dirty-bitmap:<dirty-bitmap-export-name>
77
+
78
+Each dirty-bitmap metadata context defines only one flag for extents
79
+in reply for ``NBD_CMD_BLOCK_STATUS``:
80
+
81
+bit 0:
82
+ ``NBD_STATE_DIRTY``, set when the extent is "dirty"
83
+
84
+The second is related to exposing the source of various extents within
85
+the image, with a single metadata context named::
86
+
87
+ qemu:allocation-depth
88
+
89
+In the allocation depth context, the entire 32-bit value represents a
90
+depth of which layer in a thin-provisioned backing chain provided the
91
+data (0 for unallocated, 1 for the active layer, 2 for the first
92
+backing layer, and so forth).
93
+
94
+For ``NBD_OPT_LIST_META_CONTEXT`` the following queries are supported
95
+in addition to the specific ``qemu:allocation-depth`` and
96
+``qemu:dirty-bitmap:<dirty-bitmap-export-name>``:
97
+
98
+``qemu:``
99
+ returns list of all available metadata contexts in the namespace
100
+``qemu:dirty-bitmap:``
101
+ returns list of all available dirty-bitmap metadata contexts
102
+
103
+Features by version
104
+-------------------
105
+
106
+The following list documents which qemu version first implemented
107
+various features (both as a server exposing the feature, and as a
108
+client taking advantage of the feature when present), to make it
109
+easier to plan for cross-version interoperability. Note that in
110
+several cases, the initial release containing a feature may require
111
+additional patches from the corresponding stable branch to fix bugs in
112
+the operation of that feature.
113
+
114
+2.6
115
+ ``NBD_OPT_STARTTLS`` with TLS X.509 Certificates
116
+2.8
117
+ ``NBD_CMD_WRITE_ZEROES``
118
+2.10
119
+ ``NBD_OPT_GO``, ``NBD_INFO_BLOCK``
120
+2.11
121
+ ``NBD_OPT_STRUCTURED_REPLY``
122
+2.12
123
+ ``NBD_CMD_BLOCK_STATUS`` for ``base:allocation``
124
+3.0
125
+ ``NBD_OPT_STARTTLS`` with TLS Pre-Shared Keys (PSK),
126
+ ``NBD_CMD_BLOCK_STATUS`` for ``qemu:dirty-bitmap:``, ``NBD_CMD_CACHE``
127
+4.2
128
+ ``NBD_FLAG_CAN_MULTI_CONN`` for shareable read-only exports,
129
+ ``NBD_CMD_FLAG_FAST_ZERO``
130
+5.2
131
+ ``NBD_CMD_BLOCK_STATUS`` for ``qemu:allocation-depth``
132
+7.1
133
+ ``NBD_FLAG_CAN_MULTI_CONN`` for shareable writable exports
134
+8.2
135
+ ``NBD_OPT_EXTENDED_HEADERS``, ``NBD_FLAG_BLOCK_STATUS_PAYLOAD``
136
diff --git a/docs/interop/nbd.txt b/docs/interop/nbd.txt
137
deleted file mode 100644
138
index XXXXXXX..XXXXXXX
139
--- a/docs/interop/nbd.txt
140
+++ /dev/null
141
@@ -XXX,XX +XXX,XX @@
142
-QEMU supports the NBD protocol, and has an internal NBD client (see
143
-block/nbd.c), an internal NBD server (see blockdev-nbd.c), and an
144
-external NBD server tool (see qemu-nbd.c). The common code is placed
145
-in nbd/*.
146
-
147
-The NBD protocol is specified here:
148
-https://github.com/NetworkBlockDevice/nbd/blob/master/doc/proto.md
149
-
150
-The following paragraphs describe some specific properties of NBD
151
-protocol realization in QEMU.
152
-
153
-= Metadata namespaces =
154
-
155
-QEMU supports the "base:allocation" metadata context as defined in the
156
-NBD protocol specification, and also defines an additional metadata
157
-namespace "qemu".
158
-
159
-== "qemu" namespace ==
160
-
161
-The "qemu" namespace currently contains two available metadata context
162
-types. The first is related to exposing the contents of a dirty
163
-bitmap alongside the associated disk contents. That metadata context
164
-is named with the following form:
165
-
166
- qemu:dirty-bitmap:<dirty-bitmap-export-name>
167
-
168
-Each dirty-bitmap metadata context defines only one flag for extents
169
-in reply for NBD_CMD_BLOCK_STATUS:
170
-
171
- bit 0: NBD_STATE_DIRTY, set when the extent is "dirty"
172
-
173
-The second is related to exposing the source of various extents within
174
-the image, with a single metadata context named:
175
-
176
- qemu:allocation-depth
177
-
178
-In the allocation depth context, the entire 32-bit value represents a
179
-depth of which layer in a thin-provisioned backing chain provided the
180
-data (0 for unallocated, 1 for the active layer, 2 for the first
181
-backing layer, and so forth).
182
-
183
-For NBD_OPT_LIST_META_CONTEXT the following queries are supported
184
-in addition to the specific "qemu:allocation-depth" and
185
-"qemu:dirty-bitmap:<dirty-bitmap-export-name>":
186
-
187
-* "qemu:" - returns list of all available metadata contexts in the
188
- namespace.
189
-* "qemu:dirty-bitmap:" - returns list of all available dirty-bitmap
190
- metadata contexts.
191
-
192
-= Features by version =
193
-
194
-The following list documents which qemu version first implemented
195
-various features (both as a server exposing the feature, and as a
196
-client taking advantage of the feature when present), to make it
197
-easier to plan for cross-version interoperability. Note that in
198
-several cases, the initial release containing a feature may require
199
-additional patches from the corresponding stable branch to fix bugs in
200
-the operation of that feature.
201
-
202
-* 2.6: NBD_OPT_STARTTLS with TLS X.509 Certificates
203
-* 2.8: NBD_CMD_WRITE_ZEROES
204
-* 2.10: NBD_OPT_GO, NBD_INFO_BLOCK
205
-* 2.11: NBD_OPT_STRUCTURED_REPLY
206
-* 2.12: NBD_CMD_BLOCK_STATUS for "base:allocation"
207
-* 3.0: NBD_OPT_STARTTLS with TLS Pre-Shared Keys (PSK),
208
-NBD_CMD_BLOCK_STATUS for "qemu:dirty-bitmap:", NBD_CMD_CACHE
209
-* 4.2: NBD_FLAG_CAN_MULTI_CONN for shareable read-only exports,
210
-NBD_CMD_FLAG_FAST_ZERO
211
-* 5.2: NBD_CMD_BLOCK_STATUS for "qemu:allocation-depth"
212
-* 7.1: NBD_FLAG_CAN_MULTI_CONN for shareable writable exports
213
-* 8.2: NBD_OPT_EXTENDED_HEADERS, NBD_FLAG_BLOCK_STATUS_PAYLOAD
214
--
215
2.34.1
diff view generated by jsdifflib
1
Convert parallels.txt to rST format.
1
From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2
2
3
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
4
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
5
Message-id: 20241122225049.1617774-13-pierrick.bouvier@linaro.org
3
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
6
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Eric Blake <eblake@redhat.com>
6
Message-id: 20240801170131.3977807-4-peter.maydell@linaro.org
7
---
7
---
8
MAINTAINERS | 2 +-
8
docs/system/arm/aspeed.rst | 7 ++++---
9
docs/interop/index.rst | 1 +
9
1 file changed, 4 insertions(+), 3 deletions(-)
10
docs/interop/{parallels.txt => parallels.rst} | 108 ++++++++++--------
11
3 files changed, 60 insertions(+), 51 deletions(-)
12
rename docs/interop/{parallels.txt => parallels.rst} (72%)
13
10
14
diff --git a/MAINTAINERS b/MAINTAINERS
11
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
15
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
16
--- a/MAINTAINERS
13
--- a/docs/system/arm/aspeed.rst
17
+++ b/MAINTAINERS
14
+++ b/docs/system/arm/aspeed.rst
18
@@ -XXX,XX +XXX,XX @@ L: qemu-block@nongnu.org
19
S: Supported
20
F: block/parallels.c
21
F: block/parallels-ext.c
22
-F: docs/interop/parallels.txt
23
+F: docs/interop/parallels.rst
24
T: git https://src.openvz.org/scm/~den/qemu.git parallels
25
26
qed
27
diff --git a/docs/interop/index.rst b/docs/interop/index.rst
28
index XXXXXXX..XXXXXXX 100644
29
--- a/docs/interop/index.rst
30
+++ b/docs/interop/index.rst
31
@@ -XXX,XX +XXX,XX @@ are useful for making QEMU interoperate with other software.
32
dbus-display
33
live-block-operations
34
nbd
35
+ parallels
36
pr-helper
37
qmp-spec
38
qemu-ga
39
diff --git a/docs/interop/parallels.txt b/docs/interop/parallels.rst
40
similarity index 72%
41
rename from docs/interop/parallels.txt
42
rename to docs/interop/parallels.rst
43
index XXXXXXX..XXXXXXX 100644
44
--- a/docs/interop/parallels.txt
45
+++ b/docs/interop/parallels.rst
46
@@ -XXX,XX +XXX,XX @@
15
@@ -XXX,XX +XXX,XX @@
47
-= License =
16
-Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``tiogapass-bmc``, ``tacoma-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``)
48
+Parallels Expandable Image File Format
17
-========================================================================================================================================================================================================================================================================================================================================================================================================
49
+======================================
18
+Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``supermicrox11spi-bmc``, ``tiogapass-bmc``, ``tacoma-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``)
50
19
+==================================================================================================================================================================================================================================================================================================================================================================================================================================
51
-Copyright (c) 2015 Denis Lunev
20
52
-Copyright (c) 2015 Vladimir Sementsov-Ogievskiy
21
The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
53
+..
22
Aspeed evaluation boards. They are based on different releases of the
54
+ Copyright (c) 2015 Denis Lunev
23
@@ -XXX,XX +XXX,XX @@ AST2400 SoC based machines :
55
+ Copyright (c) 2015 Vladimir Sementsov-Ogievskiy
24
56
25
- ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC
57
-This work is licensed under the terms of the GNU GPL, version 2 or later.
26
- ``quanta-q71l-bmc`` OpenBMC Quanta BMC
58
-See the COPYING file in the top-level directory.
27
-- ``supermicrox11-bmc`` Supermicro X11 BMC
59
+ This work is licensed under the terms of the GNU GPL, version 2 or later.
28
+- ``supermicrox11-bmc`` Supermicro X11 BMC (ARM926EJ-S)
60
+ See the COPYING file in the top-level directory.
29
+- ``supermicrox11spi-bmc`` Supermicro X11 SPI BMC (ARM1176)
61
30
62
-= Parallels Expandable Image File Format =
31
AST2500 SoC based machines :
63
32
64
A Parallels expandable image file consists of three consecutive parts:
65
- * header
66
- * BAT
67
- * data area
68
+
69
+* header
70
+* BAT
71
+* data area
72
73
All numbers in a Parallels expandable image are stored in little-endian byte
74
order.
75
76
77
-== Definitions ==
78
+Definitions
79
+-----------
80
81
- Sector A 512-byte data chunk.
82
+Sector
83
+ A 512-byte data chunk.
84
85
- Cluster A data chunk of the size specified in the image header.
86
- Currently, the default size is 1MiB (2048 sectors). In previous
87
- versions, cluster sizes of 63 sectors, 256 and 252 kilobytes were
88
- used.
89
+Cluster
90
+ A data chunk of the size specified in the image header.
91
+ Currently, the default size is 1MiB (2048 sectors). In previous
92
+ versions, cluster sizes of 63 sectors, 256 and 252 kilobytes were used.
93
94
- BAT Block Allocation Table, an entity that contains information for
95
- guest-to-host I/O data address translation.
96
+BAT
97
+ Block Allocation Table, an entity that contains information for
98
+ guest-to-host I/O data address translation.
99
100
-
101
-== Header ==
102
+Header
103
+------
104
105
The header is placed at the start of an image and contains the following
106
-fields:
107
+fields::
108
109
-Bytes:
110
+ Bytes:
111
0 - 15: magic
112
Must contain "WithoutFreeSpace" or "WithouFreSpacExt".
113
114
@@ -XXX,XX +XXX,XX @@ Bytes:
115
ext_off must meet the same requirements as cluster offsets
116
defined by BAT entries (see below).
117
118
-
119
-== BAT ==
120
+BAT
121
+---
122
123
BAT is placed immediately after the image header. In the file, BAT is a
124
contiguous array of 32-bit unsigned little-endian integers with
125
-(bat_entries * 4) bytes size.
126
+``(bat_entries * 4)`` bytes size.
127
128
Each BAT entry contains an offset from the start of the file to the
129
-corresponding cluster. The offset set in clusters for "WithouFreSpacExt" images
130
-and in sectors for "WithoutFreeSpace" images.
131
+corresponding cluster. The offset set in clusters for ``WithouFreSpacExt``
132
+images and in sectors for ``WithoutFreeSpace`` images.
133
134
If a BAT entry is zero, the corresponding cluster is not allocated and should
135
be considered as filled with zeroes.
136
137
Cluster offsets specified by BAT entries must meet the following requirements:
138
- - the value must not be lower than data offset (provided by header.data_off
139
- or calculated as specified above),
140
- - the value must be lower than the desired file size,
141
- - the value must be unique among all BAT entries,
142
- - the result of (cluster offset - data offset) must be aligned to cluster
143
- size.
144
145
+- the value must not be lower than data offset (provided by ``header.data_off``
146
+ or calculated as specified above)
147
+- the value must be lower than the desired file size
148
+- the value must be unique among all BAT entries
149
+- the result of ``(cluster offset - data offset)`` must be aligned to
150
+ cluster size
151
152
-== Data Area ==
153
+Data Area
154
+---------
155
156
-The data area is an area from the data offset (provided by header.data_off or
157
-calculated as specified above) to the end of the file. It represents a
158
+The data area is an area from the data offset (provided by ``header.data_off``
159
+or calculated as specified above) to the end of the file. It represents a
160
contiguous array of clusters. Most of them are allocated by the BAT, some may
161
-be allocated by the ext_off field in the header while other may be allocated by
162
-extensions. All clusters allocated by ext_off and extensions should meet the
163
-same requirements as clusters specified by BAT entries.
164
+be allocated by the ``ext_off`` field in the header while other may be
165
+allocated by extensions. All clusters allocated by ``ext_off`` and extensions
166
+should meet the same requirements as clusters specified by BAT entries.
167
168
169
-== Format Extension ==
170
+Format Extension
171
+----------------
172
173
The Format Extension is an area 1 cluster in size that provides additional
174
format features. This cluster is addressed by the ext_off field in the header.
175
-The format of the Format Extension area is the following:
176
+The format of the Format Extension area is the following::
177
178
0 - 7: magic
179
Must be 0xAB234CEF23DCEA87
180
@@ -XXX,XX +XXX,XX @@ The format of the Format Extension area is the following:
181
The MD5 checksum of the entire Header Extension cluster except
182
the first 24 bytes.
183
184
- The above are followed by feature sections or "extensions". The last
185
- extension must be "End of features" (see below).
186
+The above are followed by feature sections or "extensions". The last
187
+extension must be "End of features" (see below).
188
189
-Each feature section has the following format:
190
+Each feature section has the following format::
191
192
0 - 7: magic
193
The identifier of the feature:
194
@@ -XXX,XX +XXX,XX @@ Each feature section has the following format:
195
196
variable: data (data_size bytes)
197
198
- The above is followed by padding to the next 8 bytes boundary, then the
199
- next extension starts.
200
+The above is followed by padding to the next 8 bytes boundary, then the
201
+next extension starts.
202
203
- The last extension must be "End of features" with all the fields set to 0.
204
+The last extension must be "End of features" with all the fields set to 0.
205
206
207
-=== Dirty bitmaps feature ===
208
+Dirty bitmaps feature
209
+---------------------
210
211
This feature provides a way of storing dirty bitmaps in the image. The fields
212
-of its data area are:
213
+of its data area are::
214
215
0 - 7: size
216
The bitmap size, should be equal to disk size in sectors.
217
@@ -XXX,XX +XXX,XX @@ clusters inside the Parallels image file. The offsets of these clusters are
218
saved in the L1 offset table specified by the feature extension. Each L1 table
219
entry is a 64 bit integer as described below:
220
221
-Given an offset in bytes into the bitmap data, corresponding L1 entry is
222
+Given an offset in bytes into the bitmap data, corresponding L1 entry is::
223
224
l1_table[offset / cluster_size]
225
226
@@ -XXX,XX +XXX,XX @@ are assumed to be 1.
227
228
If an L1 table entry is not 0 or 1, it contains the corresponding cluster
229
offset (in 512b sectors). Given an offset in bytes into the bitmap data the
230
-offset in bytes into the image file can be obtained as follows:
231
+offset in bytes into the image file can be obtained as follows::
232
233
offset = l1_table[offset / cluster_size] * 512 + (offset % cluster_size)
234
--
33
--
235
2.34.1
34
2.34.1
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