[PULL 00/21] target-arm queue

There is a newer version of this series
hw/arm/smmuv3-internal.h       |   3 +-
hw/char/bcm2835_aux.c          |   2 +-
hw/misc/bcm2835_property.c     |  91 +++++++------
system/physmem.c               |  18 ++-
target/arm/helper.c            |   2 +-
target/arm/hvf/hvf.c           | 302 +++++++++++++++++++++--------------------
target/arm/kvm.c               |   7 +-
target/arm/tcg/sme_helper.c    |   8 +-
target/arm/tcg/translate-sme.c |  10 +-
target/arm/tcg/translate-sve.c |  18 ++-
target/i386/tcg/seg_helper.c   |   5 +-
target/m68k/helper.c           |   7 +-
target/sh4/helper.c            |   2 +-
target/tricore/op_helper.c     |   4 +-
target/xtensa/mmu_helper.c     |   4 +-
15 files changed, 262 insertions(+), 221 deletions(-)
[PULL 00/21] target-arm queue
Posted by Peter Maydell 3 months, 3 weeks ago
Arm pullreq: these are all bugfixes. I've included a handful
of my fixes for various non-arm minor Coverity issues too.

thanks
-- PMM

The following changes since commit 93b799fafd9170da3a79a533ea6f73a18de82e22:

  Merge tag 'pull-ppc-for-9.1-2-20240726-1' of https://gitlab.com/npiggin/qemu into staging (2024-07-26 15:10:45 +1000)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240730

for you to fetch changes up to 73188068d7ba40c8a37b4763db38bb1ce24ca07d:

  system/physmem: Where we assume we have a RAM MR, assert it (2024-07-29 17:03:35 +0100)

----------------------------------------------------------------
target-arm queue:
 * hw/char/bcm2835_aux: Fix assert when receive FIFO fills up
 * hw/arm/smmuv3: Assert input to oas2bits() is valid
 * target/arm/kvm: Set PMU for host only when available
 * target/arm/kvm: Do not silently remove PMU
 * hvf: arm: Properly disable PMU
 * hvf: arm: Do not advance PC when raising an exception
 * hw/misc/bcm2835_property: several minor bugfixes
 * target/arm: Don't assert for 128-bit tile accesses when SVL is 128
 * target/arm: Fix UMOPA/UMOPS of 16-bit values
 * target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled
 * system/physmem: Where we assume we have a RAM MR, assert it
 * sh4, i386, m68k, xtensa, tricore, arm: fix minor Coverity issues

----------------------------------------------------------------
Akihiko Odaki (5):
      target/arm/kvm: Set PMU for host only when available
      target/arm/kvm: Do not silently remove PMU
      hvf: arm: Raise an exception for sysreg by default
      hvf: arm: Properly disable PMU
      hvf: arm: Do not advance PC when raising an exception

Frederik van Hövell (1):
      hw/char/bcm2835_aux: Fix assert when receive FIFO fills up

Mostafa Saleh (1):
      hw/arm/smmuv3: Assert input to oas2bits() is valid

Peter Maydell (14):
      hw/misc/bcm2835_property: Fix handling of FRAMEBUFFER_SET_PALETTE
      hw/misc/bcm2835_property: Avoid overflow in OTP access properties
      hw/misc/bcm2835_property: Restrict scope of start_num, number, otp_row
      hw/misc/bcm2835_property: Reduce scope of variables in mbox push function
      target/arm: Don't assert for 128-bit tile accesses when SVL is 128
      target/arm: Fix UMOPA/UMOPS of 16-bit values
      target/arm: Avoid shifts by -1 in tszimm_shr() and tszimm_shl()
      target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled
      target/tricore: Use unsigned types for bitops in helper_eq_b()
      target/xtensa: Make use of 'segment' in pptlb helper less confusing
      target/m68k: avoid shift into sign bit in dump_address_map()
      target/i386: Remove dead assignment to ss in do_interrupt64()
      target/sh4: Avoid shift into sign bit in update_itlb_use()
      system/physmem: Where we assume we have a RAM MR, assert it

 hw/arm/smmuv3-internal.h       |   3 +-
 hw/char/bcm2835_aux.c          |   2 +-
 hw/misc/bcm2835_property.c     |  91 +++++++------
 system/physmem.c               |  18 ++-
 target/arm/helper.c            |   2 +-
 target/arm/hvf/hvf.c           | 302 +++++++++++++++++++++--------------------
 target/arm/kvm.c               |   7 +-
 target/arm/tcg/sme_helper.c    |   8 +-
 target/arm/tcg/translate-sme.c |  10 +-
 target/arm/tcg/translate-sve.c |  18 ++-
 target/i386/tcg/seg_helper.c   |   5 +-
 target/m68k/helper.c           |   7 +-
 target/sh4/helper.c            |   2 +-
 target/tricore/op_helper.c     |   4 +-
 target/xtensa/mmu_helper.c     |   4 +-
 15 files changed, 262 insertions(+), 221 deletions(-)

Re: [PULL 00/21] target-arm queue
Posted by Richard Henderson 3 months, 3 weeks ago
On 7/30/24 19:39, Peter Maydell wrote:
> Arm pullreq: these are all bugfixes. I've included a handful
> of my fixes for various non-arm minor Coverity issues too.
> 
> thanks
> -- PMM
> 
> The following changes since commit 93b799fafd9170da3a79a533ea6f73a18de82e22:
> 
>    Merge tag 'pull-ppc-for-9.1-2-20240726-1' ofhttps://gitlab.com/npiggin/qemu into staging (2024-07-26 15:10:45 +1000)
> 
> are available in the Git repository at:
> 
>    https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240730
> 
> for you to fetch changes up to 73188068d7ba40c8a37b4763db38bb1ce24ca07d:
> 
>    system/physmem: Where we assume we have a RAM MR, assert it (2024-07-29 17:03:35 +0100)
> 
> ----------------------------------------------------------------
> target-arm queue:
>   * hw/char/bcm2835_aux: Fix assert when receive FIFO fills up
>   * hw/arm/smmuv3: Assert input to oas2bits() is valid
>   * target/arm/kvm: Set PMU for host only when available
>   * target/arm/kvm: Do not silently remove PMU
>   * hvf: arm: Properly disable PMU
>   * hvf: arm: Do not advance PC when raising an exception
>   * hw/misc/bcm2835_property: several minor bugfixes
>   * target/arm: Don't assert for 128-bit tile accesses when SVL is 128
>   * target/arm: Fix UMOPA/UMOPS of 16-bit values
>   * target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled
>   * system/physmem: Where we assume we have a RAM MR, assert it
>   * sh4, i386, m68k, xtensa, tricore, arm: fix minor Coverity issues

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/9.1 as appropriate.

r~