On 7/18/24 08:49, Jamin Lin wrote:
> It only support continuous pool buffer memory region for all I2C bus.
> However, the pool buffer address of all I2c bus are discontinuous
> for AST2700.
>
> Ex: the pool buffer address of I2C bus for ast2700 as following.
> 0x1A0 - 0x1BF: Device 0 buffer
> 0x2A0 - 0x2BF: Device 1 buffer
> 0x3A0 - 0x3BF: Device 2 buffer
> 0x4A0 - 0x4BF: Device 3 buffer
> 0x5A0 - 0x5BF: Device 4 buffer
> 0x6A0 - 0x6BF: Device 5 buffer
> 0x7A0 - 0x7BF: Device 6 buffer
> 0x8A0 - 0x8BF: Device 7 buffer
> 0x9A0 - 0x9BF: Device 8 buffer
> 0xAA0 - 0xABF: Device 9 buffer
> 0xBA0 - 0xBBF: Device 10 buffer
> 0xCA0 - 0xCBF: Device 11 buffer
> 0xDA0 - 0xDBF: Device 12 buffer
> 0xEA0 - 0xEBF: Device 13 buffer
> 0xFA0 – 0xFBF: Device 14 buffer
> 0x10A0 – 0x10BF: Device 15 buffer
>
> Introduce a new class attribute to make user set each I2C bus
> pool buffer gap size. Update formula to create all I2C bus
> pool buffer memory regions.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Same comment than on patch 4.
Thanks,
C.
> ---
> hw/i2c/aspeed_i2c.c | 3 ++-
> include/hw/i2c/aspeed_i2c.h | 1 +
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
> index d3d49340ea..abcb1d5330 100644
> --- a/hw/i2c/aspeed_i2c.c
> +++ b/hw/i2c/aspeed_i2c.c
> @@ -1098,6 +1098,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
> AspeedI2CState *s = ASPEED_I2C(dev);
> AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(s);
> uint32_t reg_offset = aic->reg_size + aic->reg_gap_size;
> + uint32_t pool_offset = aic->pool_size + aic->pool_gap_size;
>
> sysbus_init_irq(sbd, &s->irq);
> memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_i2c_ctrl_ops, s,
> @@ -1133,7 +1134,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
> } else {
> for (i = 0; i < aic->num_busses; i++) {
> memory_region_add_subregion(&s->iomem,
> - aic->pool_base + (aic->pool_size * i),
> + aic->pool_base + (pool_offset * i),
> &s->busses[i].mr_pool);
> }
> }
> diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
> index 8e62ec64f8..b42c4dc584 100644
> --- a/include/hw/i2c/aspeed_i2c.h
> +++ b/include/hw/i2c/aspeed_i2c.h
> @@ -284,6 +284,7 @@ struct AspeedI2CClass {
>
> uint64_t pool_size;
> hwaddr pool_base;
> + uint32_t pool_gap_size;
> uint8_t *(*bus_pool_base)(AspeedI2CBus *);
> bool check_sram;
> bool has_dma;