support ADC and I2C for AST2700

[PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus

Posted by Jamin Lin via 1 year, 6 months ago

It only support continuous register memory region for all I2C bus.
However, the register address of all I2c bus are discontinuous
for AST2700.

Ex: the register address of I2C bus for ast2700 as following.
0x100 - 0x17F: Device 0
0x200 - 0x27F: Device 1
0x300 - 0x37F: Device 2
0x400 - 0x47F: Device 3
0x500 - 0x57F: Device 4
0x600 - 0x67F: Device 5
0x700 - 0x77F: Device 6
0x800 - 0x87F: Device 7
0x900 - 0x97F: Device 8
0xA00 - 0xA7F: Device 9
0xB00 - 0xB7F: Device 10
0xC00 - 0xC7F: Device 11
0xD00 - 0xD7F: Device 12
0xE00 - 0xE7F: Device 13
0xF00 – 0xF7F: Device 14
0x1000 – 0x107F: Device 15

Introduce a new class attribute to make user set each I2C bus gap size.
Update formula to create all I2C bus register memory regions.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/i2c/aspeed_i2c.c         | 3 ++-
 include/hw/i2c/aspeed_i2c.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index 7d5a53c4c0..462ad78a13 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -1011,6 +1011,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
     AspeedI2CState *s = ASPEED_I2C(dev);
     AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(s);
+    uint32_t reg_offset = aic->reg_size + aic->reg_gap_size;
 
     sysbus_init_irq(sbd, &s->irq);
     memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_i2c_ctrl_ops, s,
@@ -1033,7 +1034,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
             return;
         }
 
-        memory_region_add_subregion(&s->iomem, aic->reg_size * (i + offset),
+        memory_region_add_subregion(&s->iomem, reg_offset * (i + offset),
                                     &s->busses[i].mr);
     }
 
diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
index 065b636d29..422ee0e298 100644
--- a/include/hw/i2c/aspeed_i2c.h
+++ b/include/hw/i2c/aspeed_i2c.h
@@ -275,6 +275,7 @@ struct AspeedI2CClass {
 
     uint8_t num_busses;
     uint8_t reg_size;
+    uint32_t reg_gap_size;
     uint8_t gap;
     qemu_irq (*bus_get_irq)(AspeedI2CBus *);
 
-- 
2.34.1

Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus

Posted by Cédric Le Goater 1 year, 6 months ago

On 7/18/24 08:49, Jamin Lin wrote:
> It only support continuous register memory region for all I2C bus.
> However, the register address of all I2c bus are discontinuous
> for AST2700.
> 
> Ex: the register address of I2C bus for ast2700 as following.
> 0x100 - 0x17F: Device 0
> 0x200 - 0x27F: Device 1
> 0x300 - 0x37F: Device 2
> 0x400 - 0x47F: Device 3
> 0x500 - 0x57F: Device 4
> 0x600 - 0x67F: Device 5
> 0x700 - 0x77F: Device 6
> 0x800 - 0x87F: Device 7
> 0x900 - 0x97F: Device 8
> 0xA00 - 0xA7F: Device 9
> 0xB00 - 0xB7F: Device 10
> 0xC00 - 0xC7F: Device 11
> 0xD00 - 0xD7F: Device 12
> 0xE00 - 0xE7F: Device 13
> 0xF00 – 0xF7F: Device 14
> 0x1000 – 0x107F: Device 15
> 
> Introduce a new class attribute to make user set each I2C bus gap size.
> Update formula to create all I2C bus register memory regions.

I don't think this is necessary to model. Could we simply increase
tge register MMIO size for the AST2700 bus model and rely on the
memops to catch invalid register offsets ?


Thanks,

C.



> 
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
>   hw/i2c/aspeed_i2c.c         | 3 ++-
>   include/hw/i2c/aspeed_i2c.h | 1 +
>   2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
> index 7d5a53c4c0..462ad78a13 100644
> --- a/hw/i2c/aspeed_i2c.c
> +++ b/hw/i2c/aspeed_i2c.c
> @@ -1011,6 +1011,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
>       SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
>       AspeedI2CState *s = ASPEED_I2C(dev);
>       AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(s);
> +    uint32_t reg_offset = aic->reg_size + aic->reg_gap_size;
>   
>       sysbus_init_irq(sbd, &s->irq);
>       memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_i2c_ctrl_ops, s,
> @@ -1033,7 +1034,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
>               return;
>           }
>   
> -        memory_region_add_subregion(&s->iomem, aic->reg_size * (i + offset),
> +        memory_region_add_subregion(&s->iomem, reg_offset * (i + offset),
>                                       &s->busses[i].mr);
>       }
>   
> diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
> index 065b636d29..422ee0e298 100644
> --- a/include/hw/i2c/aspeed_i2c.h
> +++ b/include/hw/i2c/aspeed_i2c.h
> @@ -275,6 +275,7 @@ struct AspeedI2CClass {
>   
>       uint8_t num_busses;
>       uint8_t reg_size;
> +    uint32_t reg_gap_size;
>       uint8_t gap;
>       qemu_irq (*bus_get_irq)(AspeedI2CBus *);
>

RE: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus

Posted by Jamin Lin 1 year, 6 months ago

Hi Cedric,

> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register
> memory region of I2C bus
>
> On 7/18/24 08:49, Jamin Lin wrote:
> > It only support continuous register memory region for all I2C bus.
> > However, the register address of all I2c bus are discontinuous for
> > AST2700.
> >
> > Ex: the register address of I2C bus for ast2700 as following.
> > 0x100 - 0x17F: Device 0
> > 0x200 - 0x27F: Device 1
> > 0x300 - 0x37F: Device 2
> > 0x400 - 0x47F: Device 3
> > 0x500 - 0x57F: Device 4
> > 0x600 - 0x67F: Device 5
> > 0x700 - 0x77F: Device 6
> > 0x800 - 0x87F: Device 7
> > 0x900 - 0x97F: Device 8
> > 0xA00 - 0xA7F: Device 9
> > 0xB00 - 0xB7F: Device 10
> > 0xC00 - 0xC7F: Device 11
> > 0xD00 - 0xD7F: Device 12
> > 0xE00 - 0xE7F: Device 13
> > 0xF00 – 0xF7F: Device 14
> > 0x1000 – 0x107F: Device 15
> >
> > Introduce a new class attribute to make user set each I2C bus gap size.
> > Update formula to create all I2C bus register memory regions.
>
> I don't think this is necessary to model. Could we simply increase tge register
> MMIO size for the AST2700 bus model and rely on the memops to catch
> invalid register offsets ?
>
Thanks for your review and suggestion.

Sorry, I am not very clearly understand your comments.
Could you please describe it more detail?
Thanks-Jamin

>
> Thanks,
>
> C.
>
>
>
> >
> > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> > ---
> >   hw/i2c/aspeed_i2c.c         | 3 ++-
> >   include/hw/i2c/aspeed_i2c.h | 1 +
> >   2 files changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c index
> > 7d5a53c4c0..462ad78a13 100644
> > --- a/hw/i2c/aspeed_i2c.c
> > +++ b/hw/i2c/aspeed_i2c.c
> > @@ -1011,6 +1011,7 @@ static void aspeed_i2c_realize(DeviceState *dev,
> Error **errp)
> >       SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
> >       AspeedI2CState *s = ASPEED_I2C(dev);
> >       AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(s);
> > +    uint32_t reg_offset = aic->reg_size + aic->reg_gap_size;
> >
> >       sysbus_init_irq(sbd, &s->irq);
> >       memory_region_init_io(&s->iomem, OBJECT(s),
> > &aspeed_i2c_ctrl_ops, s, @@ -1033,7 +1034,7 @@ static void
> aspeed_i2c_realize(DeviceState *dev, Error **errp)
> >               return;
> >           }
> >
> > -        memory_region_add_subregion(&s->iomem, aic->reg_size * (i +
> offset),
> > +        memory_region_add_subregion(&s->iomem, reg_offset * (i +
> > + offset),
> >                                       &s->busses[i].mr);
> >       }
> >
> > diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
> > index 065b636d29..422ee0e298 100644
> > --- a/include/hw/i2c/aspeed_i2c.h
> > +++ b/include/hw/i2c/aspeed_i2c.h
> > @@ -275,6 +275,7 @@ struct AspeedI2CClass {
> >
> >       uint8_t num_busses;
> >       uint8_t reg_size;
> > +    uint32_t reg_gap_size;
> >       uint8_t gap;
> >       qemu_irq (*bus_get_irq)(AspeedI2CBus *);
> >

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Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus

Posted by Cédric Le Goater 1 year, 6 months ago

On 7/18/24 11:44, Jamin Lin wrote:
> Hi Cedric,
> 
>> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register
>> memory region of I2C bus
>>
>> On 7/18/24 08:49, Jamin Lin wrote:
>>> It only support continuous register memory region for all I2C bus.
>>> However, the register address of all I2c bus are discontinuous for
>>> AST2700.
>>>
>>> Ex: the register address of I2C bus for ast2700 as following.
>>> 0x100 - 0x17F: Device 0
>>> 0x200 - 0x27F: Device 1
>>> 0x300 - 0x37F: Device 2
>>> 0x400 - 0x47F: Device 3
>>> 0x500 - 0x57F: Device 4
>>> 0x600 - 0x67F: Device 5
>>> 0x700 - 0x77F: Device 6
>>> 0x800 - 0x87F: Device 7
>>> 0x900 - 0x97F: Device 8
>>> 0xA00 - 0xA7F: Device 9
>>> 0xB00 - 0xB7F: Device 10
>>> 0xC00 - 0xC7F: Device 11
>>> 0xD00 - 0xD7F: Device 12
>>> 0xE00 - 0xE7F: Device 13
>>> 0xF00 – 0xF7F: Device 14
>>> 0x1000 – 0x107F: Device 15
>>>
>>> Introduce a new class attribute to make user set each I2C bus gap size.
>>> Update formula to create all I2C bus register memory regions.
>>
>> I don't think this is necessary to model. Could we simply increase tge register
>> MMIO size for the AST2700 bus model and rely on the memops to catch
>> invalid register offsets ?
>>
> Thanks for your review and suggestion.
> 
> Sorry, I am not very clearly understand your comments.
> Could you please describe it more detail?
> Thanks-Jamin

I don't think you need to introduce a gap size class attribute.

Setting :

     aic->reg_size = 0x100; /* size + gap */

in aspeed_2700_i2c_class_init() should be enough.

Thanks,

C.

RE: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus

Posted by Jamin Lin 1 year, 6 months ago

Hi Cedric,

> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register
> memory region of I2C bus
>
> On 7/18/24 11:44, Jamin Lin wrote:
> > Hi Cedric,
> >
> >> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous
> >> register memory region of I2C bus
> >>
> >> On 7/18/24 08:49, Jamin Lin wrote:
> >>> It only support continuous register memory region for all I2C bus.
> >>> However, the register address of all I2c bus are discontinuous for
> >>> AST2700.
> >>>
> >>> Ex: the register address of I2C bus for ast2700 as following.
> >>> 0x100 - 0x17F: Device 0
> >>> 0x200 - 0x27F: Device 1
> >>> 0x300 - 0x37F: Device 2
> >>> 0x400 - 0x47F: Device 3
> >>> 0x500 - 0x57F: Device 4
> >>> 0x600 - 0x67F: Device 5
> >>> 0x700 - 0x77F: Device 6
> >>> 0x800 - 0x87F: Device 7
> >>> 0x900 - 0x97F: Device 8
> >>> 0xA00 - 0xA7F: Device 9
> >>> 0xB00 - 0xB7F: Device 10
> >>> 0xC00 - 0xC7F: Device 11
> >>> 0xD00 - 0xD7F: Device 12
> >>> 0xE00 - 0xE7F: Device 13
> >>> 0xF00 – 0xF7F: Device 14
> >>> 0x1000 – 0x107F: Device 15
> >>>
> >>> Introduce a new class attribute to make user set each I2C bus gap size.
> >>> Update formula to create all I2C bus register memory regions.
> >>
> >> I don't think this is necessary to model. Could we simply increase
> >> tge register MMIO size for the AST2700 bus model and rely on the
> >> memops to catch invalid register offsets ?
> >>
> > Thanks for your review and suggestion.
> >
> > Sorry, I am not very clearly understand your comments.
> > Could you please describe it more detail?
> > Thanks-Jamin
>
> I don't think you need to introduce a gap size class attribute.
>
> Setting :
>
>      aic->reg_size = 0x100; /* size + gap */
>
> in aspeed_2700_i2c_class_init() should be enough.
>
Sorry reply you late.

The address space of I2C bus and pool buffer are as following
0x100 - 0x17F: device1_reg  0x1a0 - 0x1bf: device1_buf
0x200 - 0x27F: device2_reg  0x2a0 - 0x2bf:device2_buf
0x300 - 0x37F: device3_reg  0x3a0 -0x3bf: device3_buf

I tried to set the aic->reg_size 0x100 and aic->pool_size 0x100.
And the memory regions of I2c bus became as following.

0x100-0x1ff aspeed.i2c.bus.0  0x1a0-0x29f aspeed.i2c.bus.0.pool
0x200-0x2ff aspeed.i2c.bus.1  0x2a0-0x39f aspeed.i2c.bus.1.pool
0x300-0x3ff aspeed.i2c.bus.2  0x3a0-0x49f aspeed.i2c.bus.2.pool

0000000014c0f000-0000000014c10fff (prio 0, i/o): aspeed.i2c
    0000000014c0f100-0000000014c0f1ff (prio 0, i/o): aspeed.i2c.bus.0
    0000000014c0f1a0-0000000014c0f29f (prio 0, i/o): aspeed.i2c.bus.0.pool
    0000000014c0f200-0000000014c0f2ff (prio 0, i/o): aspeed.i2c.bus.1
    0000000014c0f2a0-0000000014c0f39f (prio 0, i/o): aspeed.i2c.bus.1.pool
    0000000014c0f300-0000000014c0f3ff (prio 0, i/o): aspeed.i2c.bus.2
    0000000014c0f3a0-0000000014c0f49f (prio 0, i/o): aspeed.i2c.bus.2.pool

The memory region of aspeed.i2c.bus.0 (0x100-0x1ff) occupied aspeed.i2c.bus.0.pool address space(0x1a0-0x1bf).
And the memory region of aspeed.i2c.bus.0.pool (0x1a0-0x29f) occupied aspeed.i2c.bus.1 address space(0x200-0x27F)
That was why I created reg_gap_size and pool_gap_size to fix this issue.
Do you have any suggestion?

Thanks-Jamin

> Thanks,
>
> C.
>

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Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus

Posted by Cédric Le Goater 1 year, 5 months ago

Hello Jamin,

On 7/26/24 08:00, Jamin Lin wrote:
> Hi Cedric,

I will looked at v2. Sorry for the late reply, I was on PTO.

Thanks,

C.

  


>> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register
>> memory region of I2C bus
>>
>> On 7/18/24 11:44, Jamin Lin wrote:
>>> Hi Cedric,
>>>
>>>> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous
>>>> register memory region of I2C bus
>>>>
>>>> On 7/18/24 08:49, Jamin Lin wrote:
>>>>> It only support continuous register memory region for all I2C bus.
>>>>> However, the register address of all I2c bus are discontinuous for
>>>>> AST2700.
>>>>>
>>>>> Ex: the register address of I2C bus for ast2700 as following.
>>>>> 0x100 - 0x17F: Device 0
>>>>> 0x200 - 0x27F: Device 1
>>>>> 0x300 - 0x37F: Device 2
>>>>> 0x400 - 0x47F: Device 3
>>>>> 0x500 - 0x57F: Device 4
>>>>> 0x600 - 0x67F: Device 5
>>>>> 0x700 - 0x77F: Device 6
>>>>> 0x800 - 0x87F: Device 7
>>>>> 0x900 - 0x97F: Device 8
>>>>> 0xA00 - 0xA7F: Device 9
>>>>> 0xB00 - 0xB7F: Device 10
>>>>> 0xC00 - 0xC7F: Device 11
>>>>> 0xD00 - 0xD7F: Device 12
>>>>> 0xE00 - 0xE7F: Device 13
>>>>> 0xF00 – 0xF7F: Device 14
>>>>> 0x1000 – 0x107F: Device 15
>>>>>
>>>>> Introduce a new class attribute to make user set each I2C bus gap size.
>>>>> Update formula to create all I2C bus register memory regions.
>>>>
>>>> I don't think this is necessary to model. Could we simply increase
>>>> tge register MMIO size for the AST2700 bus model and rely on the
>>>> memops to catch invalid register offsets ?
>>>>
>>> Thanks for your review and suggestion.
>>>
>>> Sorry, I am not very clearly understand your comments.
>>> Could you please describe it more detail?
>>> Thanks-Jamin
>>
>> I don't think you need to introduce a gap size class attribute.
>>
>> Setting :
>>
>>       aic->reg_size = 0x100; /* size + gap */
>>
>> in aspeed_2700_i2c_class_init() should be enough.
>>
> Sorry reply you late.
> 
> The address space of I2C bus and pool buffer are as following
> 0x100 - 0x17F: device1_reg  0x1a0 - 0x1bf: device1_buf
> 0x200 - 0x27F: device2_reg  0x2a0 - 0x2bf:device2_buf
> 0x300 - 0x37F: device3_reg  0x3a0 -0x3bf: device3_buf
> 
> I tried to set the aic->reg_size 0x100 and aic->pool_size 0x100.
> And the memory regions of I2c bus became as following.
> 
> 0x100-0x1ff aspeed.i2c.bus.0  0x1a0-0x29f aspeed.i2c.bus.0.pool
> 0x200-0x2ff aspeed.i2c.bus.1  0x2a0-0x39f aspeed.i2c.bus.1.pool
> 0x300-0x3ff aspeed.i2c.bus.2  0x3a0-0x49f aspeed.i2c.bus.2.pool
> 
> 0000000014c0f000-0000000014c10fff (prio 0, i/o): aspeed.i2c
>      0000000014c0f100-0000000014c0f1ff (prio 0, i/o): aspeed.i2c.bus.0
>      0000000014c0f1a0-0000000014c0f29f (prio 0, i/o): aspeed.i2c.bus.0.pool
>      0000000014c0f200-0000000014c0f2ff (prio 0, i/o): aspeed.i2c.bus.1
>      0000000014c0f2a0-0000000014c0f39f (prio 0, i/o): aspeed.i2c.bus.1.pool
>      0000000014c0f300-0000000014c0f3ff (prio 0, i/o): aspeed.i2c.bus.2
>      0000000014c0f3a0-0000000014c0f49f (prio 0, i/o): aspeed.i2c.bus.2.pool
> 
> The memory region of aspeed.i2c.bus.0 (0x100-0x1ff) occupied aspeed.i2c.bus.0.pool address space(0x1a0-0x1bf).
> And the memory region of aspeed.i2c.bus.0.pool (0x1a0-0x29f) occupied aspeed.i2c.bus.1 address space(0x200-0x27F)
> That was why I created reg_gap_size and pool_gap_size to fix this issue.
> Do you have any suggestion?
> 
> Thanks-Jamin
> 
>> Thanks,
>>
>> C.
>>
> 
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> 免責聲明:
> 本信件(或其附件)可能包含機密資訊，並受法律保護。如 台端非指定之收件者，請以電子郵件通知本電子郵件之發送者, 並請立即刪除本電子郵件及其附件和銷毀所有複印件。謝謝您的合作!
> 
> DISCLAIMER:
> This message (and any attachments) may contain legally privileged and/or other confidential information. If you have received it in error, please notify the sender by reply e-mail and immediately delete the e-mail and any attachments without copying or disclosing the contents. Thank you.

Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus

Posted by 林建明 1 year, 5 months ago

Hi Cedric,

Cédric Le Goater <clg@kaod.org> 於 2024年8月26日 週一 下午7:49寫道：
>
> Hello Jamin,
>
> On 7/26/24 08:00, Jamin Lin wrote:
> > Hi Cedric,
>
> I will looked at v2. Sorry for the late reply, I was on PTO.
>
> Thanks,
>
> C.
>
Thanks for help

Due to my company internal policy, it will automatically add the
following statement if I reply the reviewers questions via my outlook
with my aspeed account.
Therefore, I will change to use my personal gmail to reply reviewers question.
My Chinese name is "林建明"  gmail: jaminlin1207@gmail.com


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Thanks-Jamin
>
>
>
>
> >> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register
> >> memory region of I2C bus
> >>
> >> On 7/18/24 11:44, Jamin Lin wrote:
> >>> Hi Cedric,
> >>>
> >>>> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous
> >>>> register memory region of I2C bus
> >>>>
> >>>> On 7/18/24 08:49, Jamin Lin wrote:
> >>>>> It only support continuous register memory region for all I2C bus.
> >>>>> However, the register address of all I2c bus are discontinuous for
> >>>>> AST2700.
> >>>>>
> >>>>> Ex: the register address of I2C bus for ast2700 as following.
> >>>>> 0x100 - 0x17F: Device 0
> >>>>> 0x200 - 0x27F: Device 1
> >>>>> 0x300 - 0x37F: Device 2
> >>>>> 0x400 - 0x47F: Device 3
> >>>>> 0x500 - 0x57F: Device 4
> >>>>> 0x600 - 0x67F: Device 5
> >>>>> 0x700 - 0x77F: Device 6
> >>>>> 0x800 - 0x87F: Device 7
> >>>>> 0x900 - 0x97F: Device 8
> >>>>> 0xA00 - 0xA7F: Device 9
> >>>>> 0xB00 - 0xB7F: Device 10
> >>>>> 0xC00 - 0xC7F: Device 11
> >>>>> 0xD00 - 0xD7F: Device 12
> >>>>> 0xE00 - 0xE7F: Device 13
> >>>>> 0xF00 – 0xF7F: Device 14
> >>>>> 0x1000 – 0x107F: Device 15
> >>>>>
> >>>>> Introduce a new class attribute to make user set each I2C bus gap size.
> >>>>> Update formula to create all I2C bus register memory regions.
> >>>>
> >>>> I don't think this is necessary to model. Could we simply increase
> >>>> tge register MMIO size for the AST2700 bus model and rely on the
> >>>> memops to catch invalid register offsets ?
> >>>>
> >>> Thanks for your review and suggestion.
> >>>
> >>> Sorry, I am not very clearly understand your comments.
> >>> Could you please describe it more detail?
> >>> Thanks-Jamin
> >>
> >> I don't think you need to introduce a gap size class attribute.
> >>
> >> Setting :
> >>
> >>       aic->reg_size = 0x100; /* size + gap */
> >>
> >> in aspeed_2700_i2c_class_init() should be enough.
> >>
> > Sorry reply you late.
> >
> > The address space of I2C bus and pool buffer are as following
> > 0x100 - 0x17F: device1_reg  0x1a0 - 0x1bf: device1_buf
> > 0x200 - 0x27F: device2_reg  0x2a0 - 0x2bf:device2_buf
> > 0x300 - 0x37F: device3_reg  0x3a0 -0x3bf: device3_buf
> >
> > I tried to set the aic->reg_size 0x100 and aic->pool_size 0x100.
> > And the memory regions of I2c bus became as following.
> >
> > 0x100-0x1ff aspeed.i2c.bus.0  0x1a0-0x29f aspeed.i2c.bus.0.pool
> > 0x200-0x2ff aspeed.i2c.bus.1  0x2a0-0x39f aspeed.i2c.bus.1.pool
> > 0x300-0x3ff aspeed.i2c.bus.2  0x3a0-0x49f aspeed.i2c.bus.2.pool
> >
> > 0000000014c0f000-0000000014c10fff (prio 0, i/o): aspeed.i2c
> >      0000000014c0f100-0000000014c0f1ff (prio 0, i/o): aspeed.i2c.bus.0
> >      0000000014c0f1a0-0000000014c0f29f (prio 0, i/o): aspeed.i2c.bus.0.pool
> >      0000000014c0f200-0000000014c0f2ff (prio 0, i/o): aspeed.i2c.bus.1
> >      0000000014c0f2a0-0000000014c0f39f (prio 0, i/o): aspeed.i2c.bus.1.pool
> >      0000000014c0f300-0000000014c0f3ff (prio 0, i/o): aspeed.i2c.bus.2
> >      0000000014c0f3a0-0000000014c0f49f (prio 0, i/o): aspeed.i2c.bus.2.pool
> >
> > The memory region of aspeed.i2c.bus.0 (0x100-0x1ff) occupied aspeed.i2c.bus.0.pool address space(0x1a0-0x1bf).
> > And the memory region of aspeed.i2c.bus.0.pool (0x1a0-0x29f) occupied aspeed.i2c.bus.1 address space(0x200-0x27F)
> > That was why I created reg_gap_size and pool_gap_size to fix this issue.
> > Do you have any suggestion?
> >
> > Thanks-Jamin
> >
> >> Thanks,
> >>
> >> C.
> >>
> >
> > ************* Email Confidentiality Notice ********************
> > 免責聲明:
> > 本信件(或其附件)可能包含機密資訊，並受法律保護。如 台端非指定之收件者，請以電子郵件通知本電子郵件之發送者, 並請立即刪除本電子郵件及其附件和銷毀所有複印件。謝謝您的合作!
> >
> > DISCLAIMER:
> > This message (and any attachments) may contain legally privileged and/or other confidential information. If you have received it in error, please notify the sender by reply e-mail and immediately delete the e-mail and any attachments without copying or disclosing the contents. Thank you.
>
>