On Mon, 15 Jul 2024 22:41:24 +0530
Sunil V L <sunilvl@ventanamicro.com> wrote:
> Currently, PCI link devices (PNP0C0F) are always created within the
> scope of the PCI root bridge. However, RISC-V needs these link devices
> to be created outside to ensure the probing order in the OS. This
> matches the example given in the ACPI specification [1] as well. Hence,
> create these link devices directly under _SB instead of under the PCI
> root bridge.
>
> To keep these link device names unique for multiple PCI bridges, change
> the device name from GSIx to LXXY format where XX is the PCI bus number
> and Y is the INTx.
>
> GPEX is currently used by riscv, aarch64/virt and x86/microvm machines.
> So, this change will alter the DSDT for those systems.
>
> [1] - ACPI 5.1: 6.2.13.1 Example: Using _PRT to Describe PCI IRQ Routing
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
> ---
> hw/pci-host/gpex-acpi.c | 13 +++++++------
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index f69413ea2c..391fabb8a8 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -7,7 +7,8 @@
> #include "hw/pci/pcie_host.h"
> #include "hw/acpi/cxl.h"
>
> -static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq)
> +static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> + Aml *scope, uint8_t bus_num)
> {
> Aml *method, *crs;
> int i, slot_no;
> @@ -20,7 +21,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq)
> Aml *pkg = aml_package(4);
> aml_append(pkg, aml_int((slot_no << 16) | 0xFFFF));
> aml_append(pkg, aml_int(i));
> - aml_append(pkg, aml_name("GSI%d", gsi));
> + aml_append(pkg, aml_name("L%.02X%X", bus_num, gsi));
> aml_append(pkg, aml_int(0));
> aml_append(rt_pkg, pkg);
> }
> @@ -30,7 +31,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq)
> /* Create GSI link device */
> for (i = 0; i < PCI_NUM_PINS; i++) {
> uint32_t irqs = irq + i;
> - Aml *dev_gsi = aml_device("GSI%d", i);
> + Aml *dev_gsi = aml_device("L%.02X%X", bus_num, i);
> aml_append(dev_gsi, aml_name_decl("_HID", aml_string("PNP0C0F")));
> aml_append(dev_gsi, aml_name_decl("_UID", aml_int(i)));
> crs = aml_resource_template();
> @@ -45,7 +46,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq)
> aml_append(dev_gsi, aml_name_decl("_CRS", crs));
> method = aml_method("_SRS", 1, AML_NOTSERIALIZED);
> aml_append(dev_gsi, method);
> - aml_append(dev, dev_gsi);
> + aml_append(scope, dev_gsi);
> }
> }
>
> @@ -174,7 +175,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> aml_append(dev, aml_name_decl("_PXM", aml_int(numa_node)));
> }
>
> - acpi_dsdt_add_pci_route_table(dev, cfg->irq);
> + acpi_dsdt_add_pci_route_table(dev, cfg->irq, scope, bus_num);
>
> /*
> * Resources defined for PXBs are composed of the following parts:
> @@ -205,7 +206,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> aml_append(dev, aml_name_decl("_STR", aml_unicode("PCIe 0 Device")));
> aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
>
> - acpi_dsdt_add_pci_route_table(dev, cfg->irq);
> + acpi_dsdt_add_pci_route_table(dev, cfg->irq, scope, 0);
>
> method = aml_method("_CBA", 0, AML_NOTSERIALIZED);
> aml_append(method, aml_return(aml_int(cfg->ecam.base)));