Series comparison

-[PULL 0/9] loongarch-to-apply queue
+[PULL v2 0/6] loongarch-to-apply queue
-The following changes since commit 59084feb256c617063e0dbe7e64821ae8852d7cf:
+The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595:
-  Merge tag 'pull-aspeed-20240709' of https://github.com/legoater/qemu into staging (2024-07-09 07:13:55 -0700)
+  Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500)
 are available in the Git repository at:
-  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240711
+  https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227
-for you to fetch changes up to 78341408e705e1b8dc92eaae2071ae0023d586b0:
+for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424:
-  target/loongarch: Fix cpu_reset set wrong CSR_CRMD (2024-07-11 15:56:50 +0800)
+  target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800)
 ----------------------------------------------------------------
-pull-loongarch-20240711
+pull-loongarch-20241227
 v1 ... v2
 . Modify patch auther inconsistent with SOB
 ----------------------------------------------------------------
-Bibo Mao (2):
+Bibo Mao (5):
-      hw/loongarch/virt: Remove unused assignment
+      target/loongarch: Use actual operand size with vbsrl check
-      target/loongarch/kvm: Add software breakpoint support
+      hw/loongarch/virt: Create fdt table on machine creation done notification
       hw/loongarch/virt: Improve fdt table creation for CPU object
       target/loongarch: Use auto method with LSX feature
       target/loongarch: Use auto method with LASX feature
-Dmitry Frolov (1):
+Guo Hongyu (1):
-      hw/loongarch/boot.c: fix out-of-bound reading
+      target/loongarch: Fix vldi inst
-Feiyang Chen (1):
+ hw/loongarch/virt.c                             | 142 ++++++++++++++----------
-      target/loongarch: Remove avail_64 in trans_srai_w() and simplify it
+ target/loongarch/cpu.c                          |  86 ++++++++------
+ target/loongarch/cpu.h                          |   4 +
-Jiaxun Yang (1):
+ target/loongarch/kvm/kvm.c                      | 107 ++++++++++++++++++
-      MAINTAINERS: Add myself as a reviewer of LoongArch virt machine
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc |   4 +-
+files changed, 249 insertions(+), 94 deletions(-)
 Song Gao (2):
       target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values
       target/loongarch: Fix cpu_reset set wrong CSR_CRMD
 Xianglai Li (2):
       hw/loongarch: Change the tpm support by default
       hw/loongarch: Modify flash block size to 256K
  MAINTAINERS                                       |  1 +
  configs/targets/loongarch64-softmmu.mak           |  1 +
  hw/loongarch/Kconfig                              |  1 +
  hw/loongarch/acpi-build.c                         |  3 +
  hw/loongarch/boot.c                               |  2 +-
  hw/loongarch/virt.c                               | 15 +++--
  include/hw/loongarch/virt.h                       |  2 +-
  target/loongarch/cpu.c                            | 23 ++++---
  target/loongarch/kvm/kvm.c                        | 76 +++++++++++++++++++++++
  target/loongarch/tcg/insn_trans/trans_shift.c.inc | 15 +----
 files changed, 109 insertions(+), 30 deletions(-)

-[PULL 3/9] hw/loongarch: Modify flash block size to 256K
+[PULL v2 1/6] target/loongarch: Fix vldi inst
-From: Xianglai Li <lixianglai@loongson.cn>
+From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
-loongarch added a common library for edk2 to
+Refer to the link below for a description of the vldi instructions:
-parse flash base addresses through fdt.
+https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
-For compatibility with other architectures,
+Fixed errors in vldi instruction implementation.
 the flash block size in qemu is now changed to 256k.
+Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
+Tested-by: Xianglai Li <lixianglai@loongson.cn>
 Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
-Message-Id: <20240624033319.999631-1-lixianglai@loongson.cn>
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- include/hw/loongarch/virt.h | 2 +-
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
+diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
 index XXXXXXX..XXXXXXX 100644
---- a/include/hw/loongarch/virt.h
+--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-+++ b/include/hw/loongarch/virt.h
++++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm)
- #define VIRT_FWCFG_BASE         0x1e020000UL
+         break;
- #define VIRT_BIOS_BASE          0x1c000000UL
+     case 1:
- #define VIRT_BIOS_SIZE          (16 * MiB)
+         /* data: {2{16'0, imm[7:0], 8'0}} */
--#define VIRT_FLASH_SECTOR_SIZE  (128 * KiB)
+-        data = (t << 24) | (t << 8);
-+#define VIRT_FLASH_SECTOR_SIZE  (256 * KiB)
++        data = (t << 40) | (t << 8);
- #define VIRT_FLASH0_BASE        VIRT_BIOS_BASE
+         break;
- #define VIRT_FLASH0_SIZE        VIRT_BIOS_SIZE
+     case 2:
- #define VIRT_FLASH1_BASE        0x1d000000UL
+         /* data: {2{8'0, imm[7:0], 16'0}} */
 --
-.34.1
+.43.5

-[PULL 1/9] hw/loongarch/boot.c: fix out-of-bound reading
+[PULL v2 2/6] target/loongarch: Use actual operand size with vbsrl check
-From: Dmitry Frolov <frolov@swemel.ru>
+Hardcoded 32 bytes is used for vbsrl emulation check, there is
 problem when options lsx=on,lasx=off is used for vbsrl.v instruction
 in TCG mode. It injects LASX exception rather LSX exception.
-memcpy() is trying to READ 512 bytes from memory,
+Here actual operand size is used.
 pointed by info->kernel_cmdline,
 which was (presumable) allocated by g_strdup("");
 Found with ASAN, making check with enabled sanitizers.
-Signed-off-by: Dmitry Frolov <frolov@swemel.ru>
+Cc: qemu-stable@nongnu.org
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve")
-Message-Id: <20240628123910.577740-1-frolov@swemel.ru>
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
 ---
- hw/loongarch/boot.c | 2 +-
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
+diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
 index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/boot.c
+--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-+++ b/hw/loongarch/boot.c
++++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-@@ -XXX,XX +XXX,XX @@ static void init_cmdline(struct loongarch_boot_info *info, void *p, void *start)
+@@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz)
-     info->a0 = 1;
+ {
-     info->a1 = cmdline_addr;
+     int i, ofs;
--    memcpy(p, info->kernel_cmdline, COMMAND_LINE_SIZE);
+-    if (!check_vec(ctx, 32)) {
-+    g_strlcpy(p, info->kernel_cmdline, COMMAND_LINE_SIZE);
++    if (!check_vec(ctx, oprsz)) {
- }
+         return true;
+     }
- static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
 --
-.34.1
+.43.5

-[PULL 2/9] hw/loongarch: Change the tpm support by default
+Deleted patch
-From: Xianglai Li <lixianglai@loongson.cn>
-Add devices that support tpm by default,
-Fixed incomplete tpm acpi table information.
-Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20240624032300.999157-1-lixianglai@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
----
- hw/loongarch/Kconfig      | 1 +
- hw/loongarch/acpi-build.c | 3 +++
-files changed, 4 insertions(+)
-diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
-index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/Kconfig
-+++ b/hw/loongarch/Kconfig
-@@ -XXX,XX +XXX,XX @@ config LOONGARCH_VIRT
-     imply VIRTIO_VGA
-     imply PCI_DEVICES
-     imply NVDIMM
-+    imply TPM_TIS_SYSBUS
-     select SERIAL
-     select VIRTIO_PCI
-     select PLATFORM_BUS
-diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/acpi-build.c
-+++ b/hw/loongarch/acpi-build.c
-@@ -XXX,XX +XXX,XX @@ void loongarch_acpi_setup(LoongArchVirtMachineState *lvms)
-                                              build_state, tables.rsdp,
-                                              ACPI_BUILD_RSDP_FILE);
-+    fw_cfg_add_file(lvms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, tables.tcpalog->data,
-+                    acpi_data_len(tables.tcpalog));
-+
-     qemu_register_reset(acpi_build_reset, build_state);
-     acpi_build_reset(build_state);
-     vmstate_register(NULL, 0, &vmstate_acpi_build, build_state);
---
-.34.1

-[PULL 4/9] hw/loongarch/virt: Remove unused assignment
+[PULL v2 3/6] hw/loongarch/virt: Create fdt table on machine creation done notification
-From: Bibo Mao <maobibo@loongson.cn>
+The same with ACPI table, fdt table is created on machine done
 notification. Some objects like CPU objects can be created with cold-plug
 method with command such as -smp x, -device la464-loongarch-cpu, so all
 objects finish to create when machine is done.
-There is abuse usage about local variable gap. Remove
-duplicated assignment and solve Coverity reported error.
-Resolves: Coverity CID 1546441
-Fixes: 3cc451cbce ("hw/loongarch: Refine fwcfg memory map")
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20240612033637.167787-1-maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- hw/loongarch/virt.c | 15 +++++++--------
+ hw/loongarch/virt.c | 103 ++++++++++++++++++++++++--------------------
-file changed, 7 insertions(+), 8 deletions(-)
+file changed, 57 insertions(+), 46 deletions(-)
 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/virt.c
 +++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ static void fw_cfg_add_memory(MachineState *ms)
+@@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
-         memmap_add_entry(base, gap, 1);
+     }
-         size -= gap;
+ }
-         base = VIRT_HIGHMEM_BASE;
--        gap = ram_size - VIRT_LOWMEM_SIZE;
++static void virt_fdt_setup(LoongArchVirtMachineState *lvms)
-     }
++{
++    MachineState *machine = MACHINE(lvms);
-     if (size) {
++    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
-@@ -XXX,XX +XXX,XX @@ static void fw_cfg_add_memory(MachineState *ms)
++    int i;
-     }
++
++    create_fdt(lvms);
-     /* add fw_cfg memory map of other nodes */
++    fdt_add_cpu_nodes(lvms);
--    size = ram_size - numa_info[0].node_mem;
++    fdt_add_memory_nodes(machine);
--    gap  = VIRT_LOWMEM_BASE + VIRT_LOWMEM_SIZE;
++    fdt_add_fw_cfg_node(lvms);
--    if (base < gap && (base + size) > gap) {
++    fdt_add_flash_node(lvms);
-+    if (numa_info[0].node_mem < gap && ram_size > gap) {
++
-         /*
++    /* Add cpu interrupt-controller */
-          * memory map for the maining nodes splited into two part
++    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
--         *   lowram:  [base, +(gap - base))
++    /* Add Extend I/O Interrupt Controller node */
--         *   highram: [VIRT_HIGHMEM_BASE, +(size - (gap - base)))
++    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
-+         * lowram:  [base, +(gap - numa_info[0].node_mem))
++    /* Add PCH PIC node */
-+         * highram: [VIRT_HIGHMEM_BASE, +(ram_size - gap))
++    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
-          */
++    /* Add PCH MSI node */
--        memmap_add_entry(base, gap - base, 1);
++    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
--        size -= gap - base;
++    /* Add pcie node */
-+        memmap_add_entry(base, gap - numa_info[0].node_mem, 1);
++    fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle);
-+        size = ram_size - gap;
++
-         base = VIRT_HIGHMEM_BASE;
++    /*
-+    } else {
++     * Create uart fdt node in reverse order so that they appear
-+        size = ram_size - numa_info[0].node_mem;
++     * in the finished device tree lowest address first
-     }
++     */
++    for (i = VIRT_UART_COUNT; i-- > 0;) {
-    if (size)
++        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
 +        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
 +        fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0);
 +    }
 +
 +    fdt_add_rtc_node(lvms, &pch_pic_phandle);
 +    fdt_add_ged_reset(lvms);
 +    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
 +                                   VIRT_PLATFORM_BUS_BASEADDRESS,
 +                                   VIRT_PLATFORM_BUS_SIZE,
 +                                   VIRT_PLATFORM_BUS_IRQ);
 +
 +    /*
 +     * Since lowmem region starts from 0 and Linux kernel legacy start address
 +     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
 +     * access. FDT size limit with 1 MiB.
 +     * Put the FDT into the memory map as a ROM image: this will ensure
 +     * the FDT is copied again upon reset, even if addr points into RAM.
 +     */
 +    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
 +    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
 +                          &address_space_memory);
 +    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 +            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
 +}
 +
  static void virt_done(Notifier *notifier, void *data)
  {
      LoongArchVirtMachineState *lvms = container_of(notifier,
                                        LoongArchVirtMachineState, machine_done);
      virt_build_smbios(lvms);
      loongarch_acpi_setup(lvms);
 +    virt_fdt_setup(lvms);
  }
  static void virt_powerdown_req(Notifier *notifier, void *opaque)
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
  }
  static void virt_devices_init(DeviceState *pch_pic,
 -                                   LoongArchVirtMachineState *lvms,
 -                                   uint32_t *pch_pic_phandle,
 -                                   uint32_t *pch_msi_phandle)
 +                                   LoongArchVirtMachineState *lvms)
  {
      MachineClass *mc = MACHINE_GET_CLASS(lvms);
      DeviceState *gpex_dev;
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
          gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
      }
 -    /* Add pcie node */
 -    fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
 -
      /*
       * Create uart fdt node in reverse order so that they appear
       * in the finished device tree lowest address first
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
          serial_mm_init(get_system_memory(), base, 0,
                         qdev_get_gpio_in(pch_pic, irq),
 , serial_hd(i), DEVICE_LITTLE_ENDIAN);
 -        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
      }
      /* Network init */
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
      sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
                           qdev_get_gpio_in(pch_pic,
                           VIRT_RTC_IRQ - VIRT_GSI_BASE));
 -    fdt_add_rtc_node(lvms, pch_pic_phandle);
 -    fdt_add_ged_reset(lvms);
      /* acpi ged */
      lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
      CPULoongArchState *env;
      CPUState *cpu_state;
      int cpu, pin, i, start, num;
 -    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
      /*
       * Extended IRQ model.
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
      memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
                     sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
 -    /* Add cpu interrupt-controller */
 -    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
 -
      for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
          cpu_state = qemu_get_cpu(cpu);
          cpudev = DEVICE(cpu_state);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
          }
      }
 -    /* Add Extend I/O Interrupt Controller node */
 -    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
 -
      pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
      num = VIRT_PCH_PIC_IRQ_NUM;
      qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
          qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
      }
 -    /* Add PCH PIC node */
 -    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
 -
      pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
      start   =  num;
      num = EXTIOI_IRQS - start;
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
                                qdev_get_gpio_in(extioi, i + start));
      }
 -    /* Add PCH MSI node */
 -    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
 -
 -    virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
 +    virt_devices_init(pch_pic, lvms);
  }
  static void virt_firmware_init(LoongArchVirtMachineState *lvms)
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
          cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
      }
 -    create_fdt(lvms);
 -
      /* Create IOCSR space */
      memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
                            machine, "iocsr", UINT64_MAX);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
          lacpu = LOONGARCH_CPU(cpu);
          lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
      }
 -    fdt_add_cpu_nodes(lvms);
 -    fdt_add_memory_nodes(machine);
      fw_cfg_add_memory(machine);
      /* Node0 memory */
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                          memmap_table,
                          sizeof(struct memmap_entry) * (memmap_entries));
      }
 -    fdt_add_fw_cfg_node(lvms);
 -    fdt_add_flash_node(lvms);
      /* Initialize the IO interrupt subsystem */
      virt_irq_init(lvms);
 -    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
 -                                   VIRT_PLATFORM_BUS_BASEADDRESS,
 -                                   VIRT_PLATFORM_BUS_SIZE,
 -                                   VIRT_PLATFORM_BUS_IRQ);
      lvms->machine_done.notify = virt_done;
      qemu_add_machine_init_done_notifier(&lvms->machine_done);
       /* connect powerdown request */
      lvms->powerdown_notifier.notify = virt_powerdown_req;
      qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
 -    /*
 -     * Since lowmem region starts from 0 and Linux kernel legacy start address
 -     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
 -     * access. FDT size limit with 1 MiB.
 -     * Put the FDT into the memory map as a ROM image: this will ensure
 -     * the FDT is copied again upon reset, even if addr points into RAM.
 -     */
 -    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
 -    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
 -                          &address_space_memory);
 -    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 -            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
 -
      lvms->bootinfo.ram_size = ram_size;
      loongarch_load_kernel(machine, &lvms->bootinfo);
  }
 --
-.34.1
+.43.5

-[PULL 5/9] MAINTAINERS: Add myself as a reviewer of LoongArch virt machine
+Deleted patch
-From: Jiaxun Yang <jiaxun.yang@flygoat.com>
-I would like to be informed on changes made to the LoongArch virt machine.
-I'm fairly familiar with Loongson-3 series platform hardware and doing
-firmwre (U-Boot) development as hobbyist on LoongArch virt platform,
-so I believe I can give positive review input to changes on that machine.
-Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
-Message-Id: <20240627-ipi-fixes-v1-2-9b061dc28a3a@flygoat.com>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
----
- MAINTAINERS | 1 +
-file changed, 1 insertion(+)
-diff --git a/MAINTAINERS b/MAINTAINERS
-index XXXXXXX..XXXXXXX 100644
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -XXX,XX +XXX,XX @@ LoongArch Machines
- ------------------
- Virt
- M: Song Gao <gaosong@loongson.cn>
-+R: Jiaxun Yang <jiaxun.yang@flygoat.com>
- S: Maintained
- F: docs/system/loongarch/virt.rst
- F: configs/targets/loongarch64-softmmu.mak
---
-.34.1

-[PULL 7/9] target/loongarch: Remove avail_64 in trans_srai_w() and simplify it
+[PULL v2 4/6] hw/loongarch/virt: Improve fdt table creation for CPU object
-From: Feiyang Chen <chris.chenfeiyang@gmail.com>
+For CPU object, possible_cpu_arch_ids() function is used rather than
 smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus
 is not accurate for all possible CPU objects, possible_cpu_arch_ids()
 is used here.
-Since srai.w is a valid instruction on la32, remove the avail_64 check
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-and simplify trans_srai_w().
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 ---
  hw/loongarch/virt.c | 39 +++++++++++++++++++++++++--------------
 file changed, 25 insertions(+), 14 deletions(-)
-Fixes: c0c0461e3a06 ("target/loongarch: Add avail_64 to check la64-only instructions")
+diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
 Signed-off-by: Feiyang Chen <chris.chenfeiyang@gmail.com>
 Message-Id: <20240628033357.50027-1-chris.chenfeiyang@gmail.com>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
  target/loongarch/tcg/insn_trans/trans_shift.c.inc | 15 +++------------
 file changed, 3 insertions(+), 12 deletions(-)
 diff --git a/target/loongarch/tcg/insn_trans/trans_shift.c.inc b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
 index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/tcg/insn_trans/trans_shift.c.inc
+--- a/hw/loongarch/virt.c
-+++ b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
++++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ static void gen_rotr_d(TCGv dest, TCGv src1, TCGv src2)
+@@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms)
-     tcg_gen_rotr_tl(dest, src1, t0);
+ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
  {
      int num;
 -    const MachineState *ms = MACHINE(lvms);
 -    int smp_cpus = ms->smp.cpus;
 +    MachineState *ms = MACHINE(lvms);
 +    MachineClass *mc = MACHINE_GET_CLASS(ms);
 +    const CPUArchIdList *possible_cpus;
 +    LoongArchCPU *cpu;
 +    CPUState *cs;
 +    char *nodename, *map_path;
      qemu_fdt_add_subnode(ms->fdt, "/cpus");
      qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1);
      qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0);
      /* cpu nodes */
 -    for (num = smp_cpus - 1; num >= 0; num--) {
 -        char *nodename = g_strdup_printf("/cpus/cpu@%d", num);
 -        LoongArchCPU *cpu = LOONGARCH_CPU(qemu_get_cpu(num));
 -        CPUState *cs = CPU(cpu);
 +    possible_cpus = mc->possible_cpu_arch_ids(ms);
 +    for (num = 0; num < possible_cpus->len; num++) {
 +        cs = possible_cpus->cpus[num].cpu;
 +        if (cs == NULL) {
 +            continue;
 +        }
 +
 +        nodename = g_strdup_printf("/cpus/cpu@%d", num);
 +        cpu = LOONGARCH_CPU(cs);
          qemu_fdt_add_subnode(ms->fdt, nodename);
          qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu");
          qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
                                  cpu->dtb_compatible);
 -        if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) {
 +        if (possible_cpus->cpus[num].props.has_node_id) {
              qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id",
 -                ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
 +                possible_cpus->cpus[num].props.node_id);
          }
          qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num);
          qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle",
@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
      /*cpu map */
      qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map");
 +    for (num = 0; num < possible_cpus->len; num++) {
 +        cs = possible_cpus->cpus[num].cpu;
 +        if (cs == NULL) {
 +            continue;
 +        }
 -    for (num = smp_cpus - 1; num >= 0; num--) {
 -        char *cpu_path = g_strdup_printf("/cpus/cpu@%d", num);
 -        char *map_path;
 -
 +        nodename = g_strdup_printf("/cpus/cpu@%d", num);
          if (ms->smp.threads > 1) {
              map_path = g_strdup_printf(
                  "/cpus/cpu-map/socket%d/core%d/thread%d",
@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
                  num % ms->smp.cores);
          }
          qemu_fdt_add_path(ms->fdt, map_path);
 -        qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path);
 +        qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", nodename);
          g_free(map_path);
 -        g_free(cpu_path);
 +        g_free(nodename);
      }
  }
--static bool trans_srai_w(DisasContext *ctx, arg_srai_w *a)
-+static void gen_sari_w(TCGv dest, TCGv src1, target_long imm)
- {
--    TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
--    TCGv src1 = gpr_src(ctx, a->rj, EXT_ZERO);
--
--    if (!avail_64(ctx)) {
--        return false;
--    }
--
--    tcg_gen_sextract_tl(dest, src1, a->imm, 32 - a->imm);
--    gen_set_gpr(a->rd, dest, EXT_NONE);
--
--    return true;
-+    tcg_gen_sextract_tl(dest, src1, imm, 32 - imm);
- }
- TRANS(sll_w, ALL, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_sll_w)
-@@ -XXX,XX +XXX,XX @@ TRANS(slli_w, ALL, gen_rri_c, EXT_NONE, EXT_SIGN, tcg_gen_shli_tl)
- TRANS(slli_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shli_tl)
- TRANS(srli_w, ALL, gen_rri_c, EXT_ZERO, EXT_SIGN, tcg_gen_shri_tl)
- TRANS(srli_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shri_tl)
-+TRANS(srai_w, ALL, gen_rri_c, EXT_NONE, EXT_NONE, gen_sari_w)
- TRANS(srai_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_sari_tl)
- TRANS(rotri_w, 64, gen_rri_v, EXT_NONE, EXT_NONE, gen_rotr_w)
- TRANS(rotri_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_rotri_tl)
 --
-.34.1
+.43.5

-[PULL 8/9] target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values
+[PULL v2 5/6] target/loongarch: Use auto method with LSX feature
-We set the value of register CSR_PRCFG3, but left out CSR_PRCFG1
+Like LBT feature, add type OnOffAuto for LSX feature setting. Also
-and CSR_PRCFG2. Set CSR_PRCFG1 and CSR_PRCFG2 according to the
+add LSX feature detection with new VM ioctl command, fallback to old
-default values of the physical machine.
+method if it is not supported.
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 Reviewed-by: Bibo Mao <maobibo@loongson.cn>
-Message-Id: <20240705021839.1004374-1-gaosong@loongson.cn>
 ---
- target/loongarch/cpu.c | 17 ++++++++++++-----
+ target/loongarch/cpu.c     | 38 +++++++++++++++------------
-file changed, 12 insertions(+), 5 deletions(-)
+ target/loongarch/cpu.h     |  2 ++
  target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++
 files changed, 77 insertions(+), 17 deletions(-)
 diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.c
 +++ b/target/loongarch/cpu.c
 @@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
-     env->cpucfg[20] = data;
+ {
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-     env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa);
+     CPULoongArchState *env = &cpu->env;
-+
++    uint32_t data = 0;
-+    env->CSR_PRCFG1 = FIELD_DP64(env->CSR_PRCFG1, CSR_PRCFG1, SAVE_NUM, 8);
+     int i;
-+    env->CSR_PRCFG1 = FIELD_DP64(env->CSR_PRCFG1, CSR_PRCFG1, TIMER_BITS, 0x2f);
-+    env->CSR_PRCFG1 = FIELD_DP64(env->CSR_PRCFG1, CSR_PRCFG1, VSMAX, 7);
+     for (i = 0; i < 21; i++) {
-+
+@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
-+    env->CSR_PRCFG2 = 0x3ffff000;
+     cpu->dtb_compatible = "loongarch,Loongson-3A5000";
-+
+     env->cpucfg[0] = 0x14c010;  /* PRID */
-+    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, TLB_TYPE, 2);
-+    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, MTLB_ENTRY, 63);
+-    uint32_t data = 0;
-+    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_WAYS, 7);
+     data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
-+    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_SETS, 8);
+     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
-+
+     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
-     loongarch_cpu_post_init(obj);
+@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
- }
+ {
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_reset_hold(Object *obj, ResetType type)
+     CPULoongArchState *env = &cpu->env;
      env->CSR_MERRCTL = FIELD_DP64(env->CSR_MERRCTL, CSR_MERRCTL, ISMERR, 0);
      env->CSR_TID = cs->cpu_index;
 -    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, TLB_TYPE, 2);
 -    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, MTLB_ENTRY, 63);
 -    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_WAYS, 7);
 -    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_SETS, 8);
 -
-     for (n = 0; n < 4; n++) {
++    uint32_t data = 0;
-         env->CSR_DMW[n] = FIELD_DP64(env->CSR_DMW[n], CSR_DMW, PLV0, 0);
+     int i;
-         env->CSR_DMW[n] = FIELD_DP64(env->CSR_DMW[n], CSR_DMW, PLV1, 0);
      for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
      cpu->dtb_compatible = "loongarch,Loongson-1C103";
      env->cpucfg[0] = 0x148042;  /* PRID */
 -    uint32_t data = 0;
      data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
      data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
      data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
  static bool loongarch_get_lsx(Object *obj, Error **errp)
  {
 -    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 -    bool ret;
 -
 -    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
 -        ret = true;
 -    } else {
 -        ret = false;
 -    }
 -    return ret;
 +    return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF;
  }
  static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +    uint32_t val;
 -    if (value) {
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
 -    } else {
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
 +    cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +    if (kvm_enabled()) {
 +        /* kvm feature detection in function kvm_arch_init_vcpu */
 +        return;
      }
 +
 +    /* LSX feature detection in TCG mode */
 +    val = cpu->env.cpucfg[2];
 +    if (cpu->lsx == ON_OFF_AUTO_ON) {
 +        if (FIELD_EX32(val, CPUCFG2, LSX) == 0) {
 +            error_setg(errp, "Failed to enable LSX in TCG mode");
 +            return;
 +        }
 +    }
 +
 +    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
  }
  static bool loongarch_get_lasx(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +    cpu->lsx = ON_OFF_AUTO_AUTO;
      object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                               loongarch_set_lsx);
      object_property_add_bool(obj, "lasx", loongarch_get_lasx,
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
      } else {
          cpu->lbt = ON_OFF_AUTO_OFF;
 +        cpu->pmu = ON_OFF_AUTO_OFF;
      }
  }
 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.h
 +++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
  #endif
  enum loongarch_features {
 +    LOONGARCH_FEATURE_LSX,
      LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
      LOONGARCH_FEATURE_PMU,
  };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
      uint32_t  phy_id;
      OnOffAuto lbt;
      OnOffAuto pmu;
 +    OnOffAuto lsx;
      /* 'compatible' string for this CPU for Linux device trees */
      const char *dtb_compatible;
 diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm.c
 +++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
  {
      int ret;
      struct kvm_device_attr attr;
 +    uint64_t val;
      switch (feature) {
 +    case LOONGARCH_FEATURE_LSX:
 +        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
 +        attr.attr = KVM_LOONGARCH_VM_FEAT_LSX;
 +        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (ret == 0) {
 +            return true;
 +        }
 +
 +        /* Fallback to old kernel detect interface */
 +        val = 0;
 +        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
 +        /* Cpucfg2 */
 +        attr.attr  = 2;
 +        attr.addr = (uint64_t)&val;
 +        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (!ret) {
 +            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
 +            if (ret) {
 +                return false;
 +            }
 +
 +            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX);
 +            return (ret != 0);
 +        }
 +        return false;
 +
      case LOONGARCH_FEATURE_LBT:
          /*
           * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
      return false;
  }
 +static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
 +{
 +    CPULoongArchState *env = cpu_env(cs);
 +    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
 +    bool kvm_supported;
 +
 +    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX);
 +    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0);
 +    if (cpu->lsx == ON_OFF_AUTO_ON) {
 +        if (kvm_supported) {
 +            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
 +        } else {
 +            error_setg(errp, "'lsx' feature not supported by KVM on this host");
 +            return -ENOTSUP;
 +        }
 +    } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) {
 +        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
 +    }
 +
 +    return 0;
 +}
 +
  static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
  {
      CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
          brk_insn = val;
      }
 +    ret = kvm_cpu_check_lsx(cs, &local_err);
 +    if (ret < 0) {
 +        error_report_err(local_err);
 +    }
 +
      ret = kvm_cpu_check_lbt(cs, &local_err);
      if (ret < 0) {
          error_report_err(local_err);
 --
-.34.1
+.43.5

-[PULL 6/9] target/loongarch/kvm: Add software breakpoint support
+[PULL v2 6/6] target/loongarch: Use auto method with LASX feature
-From: Bibo Mao <maobibo@loongson.cn>
+Like LSX feature, add type OnOffAuto for LASX feature setting.
 With KVM virtualization, debug exception is injected to guest kernel
 rather than host for normal break intruction. Here hypercall
 instruction with special code is used for sw breakpoint usage,
 and detailed instruction comes from kvm kernel with user API
 KVM_REG_LOONGARCH_DEBUG_INST.
 Now only software breakpoint is supported, and it is allowed to
 insert/remove software breakpoint. We can debug guest kernel with gdb
 method after kernel is loaded, hardware breakpoint will be added in later.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Tested-by: Song Gao <gaosong@loongson.cn>
 Message-Id: <20240607035016.2975799-1-maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- configs/targets/loongarch64-softmmu.mak |  1 +
+ target/loongarch/cpu.c     | 50 +++++++++++++++++++++++------------
- target/loongarch/kvm/kvm.c              | 76 +++++++++++++++++++++++++
+ target/loongarch/cpu.h     |  2 ++
-files changed, 77 insertions(+)
+ target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++
 files changed, 89 insertions(+), 16 deletions(-)
-diff --git a/configs/targets/loongarch64-softmmu.mak b/configs/targets/loongarch64-softmmu.mak
+diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
 index XXXXXXX..XXXXXXX 100644
---- a/configs/targets/loongarch64-softmmu.mak
+--- a/target/loongarch/cpu.c
-+++ b/configs/targets/loongarch64-softmmu.mak
++++ b/target/loongarch/cpu.c
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
- TARGET_ARCH=loongarch64
+     uint32_t val;
- TARGET_BASE_ARCH=loongarch
-+TARGET_KVM_HAVE_GUEST_DEBUG=y
+     cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
- TARGET_SUPPORTS_MTTCG=y
++    if (cpu->lsx == ON_OFF_AUTO_OFF) {
- TARGET_XML_FILES= gdb-xml/loongarch-base32.xml gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml
++        cpu->lasx = ON_OFF_AUTO_OFF;
- # all boards require libfdt
++        if (cpu->lasx == ON_OFF_AUTO_ON) {
 +            error_setg(errp, "Failed to disable LSX since LASX is enabled");
 +            return;
 +        }
 +    }
 +
      if (kvm_enabled()) {
          /* kvm feature detection in function kvm_arch_init_vcpu */
          return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
              error_setg(errp, "Failed to enable LSX in TCG mode");
              return;
          }
 +    } else {
 +        cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0);
 +        val = cpu->env.cpucfg[2];
      }
      cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
  static bool loongarch_get_lasx(Object *obj, Error **errp)
  {
 -    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 -    bool ret;
 -
 -    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
 -        ret = true;
 -    } else {
 -        ret = false;
 -    }
 -    return ret;
 +    return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF;
  }
  static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +    uint32_t val;
 -    if (value) {
 -    if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
 -            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
 -    }
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
 -    } else {
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
 +    cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +    if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) {
 +        error_setg(errp, "Failed to enable LASX since lSX is disabled");
 +        return;
 +    }
 +
 +    if (kvm_enabled()) {
 +        /* kvm feature detection in function kvm_arch_init_vcpu */
 +        return;
      }
 +
 +    /* LASX feature detection in TCG mode */
 +    val = cpu->env.cpucfg[2];
 +    if (cpu->lasx == ON_OFF_AUTO_ON) {
 +        if (FIELD_EX32(val, CPUCFG2, LASX) == 0) {
 +            error_setg(errp, "Failed to enable LASX in TCG mode");
 +            return;
 +        }
 +    }
 +
 +    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
  }
  static bool loongarch_get_lbt(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
      cpu->lsx = ON_OFF_AUTO_AUTO;
 +    cpu->lasx = ON_OFF_AUTO_AUTO;
      object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                               loongarch_set_lsx);
      object_property_add_bool(obj, "lasx", loongarch_get_lasx,
 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.h
 +++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
  enum loongarch_features {
      LOONGARCH_FEATURE_LSX,
 +    LOONGARCH_FEATURE_LASX,
      LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
      LOONGARCH_FEATURE_PMU,
  };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
      OnOffAuto lbt;
      OnOffAuto pmu;
      OnOffAuto lsx;
 +    OnOffAuto lasx;
      /* 'compatible' string for this CPU for Linux device trees */
      const char *dtb_compatible;
 diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm.c
 +++ b/target/loongarch/kvm/kvm.c
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
- #include "trace.h"
+         }
+         return false;
- static bool cap_has_mp_state;
-+static unsigned int brk_insn;
++    case LOONGARCH_FEATURE_LASX:
- const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
++        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
-     KVM_CAP_LAST_INFO
++        attr.attr = KVM_LOONGARCH_VM_FEAT_LASX;
- };
++        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
-@@ -XXX,XX +XXX,XX @@ static void kvm_loongarch_vm_stage_change(void *opaque, bool running,
++        if (ret == 0) {
++            return true;
- int kvm_arch_init_vcpu(CPUState *cs)
++        }
  {
 +    uint64_t val;
 +
-     qemu_add_vm_change_state_handler(kvm_loongarch_vm_stage_change, cs);
++        /* Fallback to old kernel detect interface */
 +        val = 0;
 +        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
 +        /* Cpucfg2 */
 +        attr.attr  = 2;
 +        attr.addr = (uint64_t)&val;
 +        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (!ret) {
 +            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
 +            if (ret) {
 +                return false;
 +            }
 +
-+    if (!kvm_get_one_reg(cs, KVM_REG_LOONGARCH_DEBUG_INST, &val)) {
++            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX);
-+        brk_insn = val;
++            return (ret != 0);
 +        }
 +        return false;
 +
      case LOONGARCH_FEATURE_LBT:
          /*
           * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
      return 0;
  }
 +static int kvm_cpu_check_lasx(CPUState *cs, Error **errp)
 +{
 +    CPULoongArchState *env = cpu_env(cs);
 +    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
 +    bool kvm_supported;
 +
 +    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX);
 +    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0);
 +    if (cpu->lasx == ON_OFF_AUTO_ON) {
 +        if (kvm_supported) {
 +            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
 +        } else {
 +            error_setg(errp, "'lasx' feature not supported by KVM on host");
 +            return -ENOTSUP;
 +        }
 +    } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) {
 +        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
 +    }
 +
-     return 0;
- }
-@@ -XXX,XX +XXX,XX @@ bool kvm_arch_stop_on_emulation_error(CPUState *cs)
-     return true;
- }
-+void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg)
-+{
-+    if (kvm_sw_breakpoints_active(cpu)) {
-+        dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
-+    }
-+}
-+
-+int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp)
-+{
-+    if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 4, 0) ||
-+        cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&brk_insn, 4, 1)) {
-+        error_report("%s failed", __func__);
-+        return -EINVAL;
-+    }
 +    return 0;
 +}
 +
-+int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp)
+ static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
-+{
+ {
-+    static uint32_t brk;
+     CPULoongArchState *env = cpu_env(cs);
-+
+@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
-+    if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&brk, 4, 0) ||
+         error_report_err(local_err);
-+        brk != brk_insn ||
+     }
-+        cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 4, 1)) {
-+        error_report("%s failed", __func__);
++    ret = kvm_cpu_check_lasx(cs, &local_err);
-+        return -EINVAL;
++    if (ret < 0) {
-+    }
++        error_report_err(local_err);
 +    return 0;
 +}
 +
 +int kvm_arch_insert_hw_breakpoint(vaddr addr, vaddr len, int type)
 +{
 +    return -ENOSYS;
 +}
 +
 +int kvm_arch_remove_hw_breakpoint(vaddr addr, vaddr len, int type)
 +{
 +    return -ENOSYS;
 +}
 +
 +void kvm_arch_remove_all_hw_breakpoints(void)
 +{
 +}
 +
 +static bool kvm_loongarch_handle_debug(CPUState *cs, struct kvm_run *run)
 +{
 +    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
 +    CPULoongArchState *env = &cpu->env;
 +
 +    kvm_cpu_synchronize_state(cs);
 +    if (cs->singlestep_enabled) {
 +        return true;
 +    }
 +
-+    if (kvm_find_sw_breakpoint(cs, env->pc)) {
+     ret = kvm_cpu_check_lbt(cs, &local_err);
-+        return true;
+     if (ret < 0) {
-+    }
+         error_report_err(local_err);
 +
 +    return false;
 +}
 +
  int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
  {
      int ret = 0;
@@ -XXX,XX +XXX,XX @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
                           run->iocsr_io.len,
                           run->iocsr_io.is_write);
          break;
 +
 +    case KVM_EXIT_DEBUG:
 +        if (kvm_loongarch_handle_debug(cs, run)) {
 +            ret = EXCP_DEBUG;
 +        }
 +        break;
 +
      default:
          ret = -1;
          warn_report("KVM: unknown exit reason %d", run->exit_reason);
 --
-.34.1
+.43.5

-[PULL 9/9] target/loongarch: Fix cpu_reset set wrong CSR_CRMD
+Deleted patch
-After cpu_reset, DATF in CSR_CRMD is 0, DATM is 0.
-See the manual[1] 6.4.
-  [1]: https://github.com/loongson/LoongArch-Documentation/releases/download/2023.04.20/LoongArch-Vol1-v1.10-EN.pdf
-Signed-off-by: Song Gao <gaosong@loongson.cn>
-Reviewed-by: Bibo Mao <maobibo@loongson.cn>
-Message-Id: <20240705021839.1004374-2-gaosong@loongson.cn>
----
- target/loongarch/cpu.c | 6 +++---
-file changed, 3 insertions(+), 3 deletions(-)
-diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
-index XXXXXXX..XXXXXXX 100644
---- a/target/loongarch/cpu.c
-+++ b/target/loongarch/cpu.c
-@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_reset_hold(Object *obj, ResetType type)
-     env->fcsr0 = 0x0;
-     int n;
--    /* Set csr registers value after reset */
-+    /* Set csr registers value after reset, see the manual 6.4. */
-     env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, PLV, 0);
-     env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, IE, 0);
-     env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DA, 1);
-     env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, PG, 0);
--    env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DATF, 1);
--    env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DATM, 1);
-+    env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DATF, 0);
-+    env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DATM, 0);
-     env->CSR_EUEN = FIELD_DP64(env->CSR_EUEN, CSR_EUEN, FPE, 0);
-     env->CSR_EUEN = FIELD_DP64(env->CSR_EUEN, CSR_EUEN, SXE, 0);
---
-.34.1

The following changes since commit 59084feb256c617063e0dbe7e64821ae8852d7cf:

Merge tag 'pull-aspeed-20240709' of https://github.com/legoater/qemu into staging (2024-07-09 07:13:55 -0700)

are available in the Git repository at:

https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240711

for you to fetch changes up to 78341408e705e1b8dc92eaae2071ae0023d586b0:

target/loongarch: Fix cpu_reset set wrong CSR_CRMD (2024-07-11 15:56:50 +0800)

----------------------------------------------------------------
pull-loongarch-20240711

----------------------------------------------------------------
Bibo Mao (2):
      hw/loongarch/virt: Remove unused assignment
      target/loongarch/kvm: Add software breakpoint support

Dmitry Frolov (1):
      hw/loongarch/boot.c: fix out-of-bound reading

Feiyang Chen (1):
      target/loongarch: Remove avail_64 in trans_srai_w() and simplify it

Jiaxun Yang (1):
      MAINTAINERS: Add myself as a reviewer of LoongArch virt machine

Song Gao (2):
      target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values
      target/loongarch: Fix cpu_reset set wrong CSR_CRMD

Xianglai Li (2):
      hw/loongarch: Change the tpm support by default
      hw/loongarch: Modify flash block size to 256K

From: Xianglai Li <lixianglai@loongson.cn>

Add devices that support tpm by default,
Fixed incomplete tpm acpi table information.

Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240624032300.999157-1-lixianglai@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/Kconfig      | 1 +
 hw/loongarch/acpi-build.c | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/Kconfig
+++ b/hw/loongarch/Kconfig
@@ -XXX,XX +XXX,XX @@ config LOONGARCH_VIRT
     imply VIRTIO_VGA
     imply PCI_DEVICES
     imply NVDIMM
+    imply TPM_TIS_SYSBUS
     select SERIAL
     select VIRTIO_PCI
     select PLATFORM_BUS
diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/acpi-build.c
+++ b/hw/loongarch/acpi-build.c
@@ -XXX,XX +XXX,XX @@ void loongarch_acpi_setup(LoongArchVirtMachineState *lvms)
                                              build_state, tables.rsdp,
                                              ACPI_BUILD_RSDP_FILE);
 
+    fw_cfg_add_file(lvms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, tables.tcpalog->data,
+                    acpi_data_len(tables.tcpalog));
+
     qemu_register_reset(acpi_build_reset, build_state);
     acpi_build_reset(build_state);
     vmstate_register(NULL, 0, &vmstate_acpi_build, build_state);
-- 
2.34.1

From: Xianglai Li <lixianglai@loongson.cn>

loongarch added a common library for edk2 to
parse flash base addresses through fdt.
For compatibility with other architectures,
the flash block size in qemu is now changed to 256k.

Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240624033319.999631-1-lixianglai@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/loongarch/virt.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -XXX,XX +XXX,XX @@
 #define VIRT_FWCFG_BASE         0x1e020000UL
 #define VIRT_BIOS_BASE          0x1c000000UL
 #define VIRT_BIOS_SIZE          (16 * MiB)
-#define VIRT_FLASH_SECTOR_SIZE  (128 * KiB)
+#define VIRT_FLASH_SECTOR_SIZE  (256 * KiB)
 #define VIRT_FLASH0_BASE        VIRT_BIOS_BASE
 #define VIRT_FLASH0_SIZE        VIRT_BIOS_SIZE
 #define VIRT_FLASH1_BASE        0x1d000000UL
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

There is abuse usage about local variable gap. Remove
duplicated assignment and solve Coverity reported error.

Resolves: Coverity CID 1546441
Fixes: 3cc451cbce ("hw/loongarch: Refine fwcfg memory map")
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240612033637.167787-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void fw_cfg_add_memory(MachineState *ms)
         memmap_add_entry(base, gap, 1);
         size -= gap;
         base = VIRT_HIGHMEM_BASE;
-        gap = ram_size - VIRT_LOWMEM_SIZE;
     }
 
     if (size) {
@@ -XXX,XX +XXX,XX @@ static void fw_cfg_add_memory(MachineState *ms)
     }
 
     /* add fw_cfg memory map of other nodes */
-    size = ram_size - numa_info[0].node_mem;
-    gap  = VIRT_LOWMEM_BASE + VIRT_LOWMEM_SIZE;
-    if (base < gap && (base + size) > gap) {
+    if (numa_info[0].node_mem < gap && ram_size > gap) {
         /*
          * memory map for the maining nodes splited into two part
-         *   lowram:  [base, +(gap - base))
-         *   highram: [VIRT_HIGHMEM_BASE, +(size - (gap - base)))
+         * lowram:  [base, +(gap - numa_info[0].node_mem))
+         * highram: [VIRT_HIGHMEM_BASE, +(ram_size - gap))
          */
-        memmap_add_entry(base, gap - base, 1);
-        size -= gap - base;
+        memmap_add_entry(base, gap - numa_info[0].node_mem, 1);
+        size = ram_size - gap;
         base = VIRT_HIGHMEM_BASE;
+    } else {
+        size = ram_size - numa_info[0].node_mem;
     }
 
    if (size)
-- 
2.34.1

From: Bibo Mao <maobibo@loongson.cn>

With KVM virtualization, debug exception is injected to guest kernel
rather than host for normal break intruction. Here hypercall
instruction with special code is used for sw breakpoint usage,
and detailed instruction comes from kvm kernel with user API
KVM_REG_LOONGARCH_DEBUG_INST.

Now only software breakpoint is supported, and it is allowed to
insert/remove software breakpoint. We can debug guest kernel with gdb
method after kernel is loaded, hardware breakpoint will be added in later.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Tested-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240607035016.2975799-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 configs/targets/loongarch64-softmmu.mak |  1 +
 target/loongarch/kvm/kvm.c              | 76 +++++++++++++++++++++++++
 2 files changed, 77 insertions(+)

diff --git a/configs/targets/loongarch64-softmmu.mak b/configs/targets/loongarch64-softmmu.mak
index XXXXXXX..XXXXXXX 100644
--- a/configs/targets/loongarch64-softmmu.mak
+++ b/configs/targets/loongarch64-softmmu.mak
@@ -XXX,XX +XXX,XX @@
 TARGET_ARCH=loongarch64
 TARGET_BASE_ARCH=loongarch
+TARGET_KVM_HAVE_GUEST_DEBUG=y
 TARGET_SUPPORTS_MTTCG=y
 TARGET_XML_FILES= gdb-xml/loongarch-base32.xml gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml
 # all boards require libfdt
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@
 #include "trace.h"
 
 static bool cap_has_mp_state;
+static unsigned int brk_insn;
 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
     KVM_CAP_LAST_INFO
 };
@@ -XXX,XX +XXX,XX @@ static void kvm_loongarch_vm_stage_change(void *opaque, bool running,
 
 int kvm_arch_init_vcpu(CPUState *cs)
 {
+    uint64_t val;
+
     qemu_add_vm_change_state_handler(kvm_loongarch_vm_stage_change, cs);
+
+    if (!kvm_get_one_reg(cs, KVM_REG_LOONGARCH_DEBUG_INST, &val)) {
+        brk_insn = val;
+    }
+
     return 0;
 }
 
@@ -XXX,XX +XXX,XX @@ bool kvm_arch_stop_on_emulation_error(CPUState *cs)
     return true;
 }
 
+void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg)
+{
+    if (kvm_sw_breakpoints_active(cpu)) {
+        dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
+    }
+}
+
+int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp)
+{
+    if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 4, 0) ||
+        cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&brk_insn, 4, 1)) {
+        error_report("%s failed", __func__);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp)
+{
+    static uint32_t brk;
+
+    if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&brk, 4, 0) ||
+        brk != brk_insn ||
+        cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 4, 1)) {
+        error_report("%s failed", __func__);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+int kvm_arch_insert_hw_breakpoint(vaddr addr, vaddr len, int type)
+{
+    return -ENOSYS;
+}
+
+int kvm_arch_remove_hw_breakpoint(vaddr addr, vaddr len, int type)
+{
+    return -ENOSYS;
+}
+
+void kvm_arch_remove_all_hw_breakpoints(void)
+{
+}
+
+static bool kvm_loongarch_handle_debug(CPUState *cs, struct kvm_run *run)
+{
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    CPULoongArchState *env = &cpu->env;
+
+    kvm_cpu_synchronize_state(cs);
+    if (cs->singlestep_enabled) {
+        return true;
+    }
+
+    if (kvm_find_sw_breakpoint(cs, env->pc)) {
+        return true;
+    }
+
+    return false;
+}
+
 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
 {
     int ret = 0;
@@ -XXX,XX +XXX,XX @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
                          run->iocsr_io.len,
                          run->iocsr_io.is_write);
         break;
+
+    case KVM_EXIT_DEBUG:
+        if (kvm_loongarch_handle_debug(cs, run)) {
+            ret = EXCP_DEBUG;
+        }
+        break;
+
     default:
         ret = -1;
         warn_report("KVM: unknown exit reason %d", run->exit_reason);
-- 
2.34.1

From: Feiyang Chen <chris.chenfeiyang@gmail.com>

Since srai.w is a valid instruction on la32, remove the avail_64 check
and simplify trans_srai_w().

Fixes: c0c0461e3a06 ("target/loongarch: Add avail_64 to check la64-only instructions")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Feiyang Chen <chris.chenfeiyang@gmail.com>
Message-Id: <20240628033357.50027-1-chris.chenfeiyang@gmail.com>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/tcg/insn_trans/trans_shift.c.inc | 15 +++------------
 1 file changed, 3 insertions(+), 12 deletions(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_shift.c.inc b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tcg/insn_trans/trans_shift.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
@@ -XXX,XX +XXX,XX @@ static void gen_rotr_d(TCGv dest, TCGv src1, TCGv src2)
     tcg_gen_rotr_tl(dest, src1, t0);
 }
 
-static bool trans_srai_w(DisasContext *ctx, arg_srai_w *a)
+static void gen_sari_w(TCGv dest, TCGv src1, target_long imm)
 {
-    TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
-    TCGv src1 = gpr_src(ctx, a->rj, EXT_ZERO);
-
-    if (!avail_64(ctx)) {
-        return false;
-    }
-
-    tcg_gen_sextract_tl(dest, src1, a->imm, 32 - a->imm);
-    gen_set_gpr(a->rd, dest, EXT_NONE);
-
-    return true;
+    tcg_gen_sextract_tl(dest, src1, imm, 32 - imm);
 }
 
 TRANS(sll_w, ALL, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_sll_w)
@@ -XXX,XX +XXX,XX @@ TRANS(slli_w, ALL, gen_rri_c, EXT_NONE, EXT_SIGN, tcg_gen_shli_tl)
 TRANS(slli_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shli_tl)
 TRANS(srli_w, ALL, gen_rri_c, EXT_ZERO, EXT_SIGN, tcg_gen_shri_tl)
 TRANS(srli_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shri_tl)
+TRANS(srai_w, ALL, gen_rri_c, EXT_NONE, EXT_NONE, gen_sari_w)
 TRANS(srai_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_sari_tl)
 TRANS(rotri_w, 64, gen_rri_v, EXT_NONE, EXT_NONE, gen_rotr_w)
 TRANS(rotri_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_rotri_tl)
-- 
2.34.1

We set the value of register CSR_PRCFG3, but left out CSR_PRCFG1
and CSR_PRCFG2. Set CSR_PRCFG1 and CSR_PRCFG2 according to the
default values of the physical machine.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240705021839.1004374-1-gaosong@loongson.cn>
---
 target/loongarch/cpu.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
     env->cpucfg[20] = data;
 
     env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa);
+
+    env->CSR_PRCFG1 = FIELD_DP64(env->CSR_PRCFG1, CSR_PRCFG1, SAVE_NUM, 8);
+    env->CSR_PRCFG1 = FIELD_DP64(env->CSR_PRCFG1, CSR_PRCFG1, TIMER_BITS, 0x2f);
+    env->CSR_PRCFG1 = FIELD_DP64(env->CSR_PRCFG1, CSR_PRCFG1, VSMAX, 7);
+
+    env->CSR_PRCFG2 = 0x3ffff000;
+
+    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, TLB_TYPE, 2);
+    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, MTLB_ENTRY, 63);
+    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_WAYS, 7);
+    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_SETS, 8);
+
     loongarch_cpu_post_init(obj);
 }
 
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_reset_hold(Object *obj, ResetType type)
     env->CSR_MERRCTL = FIELD_DP64(env->CSR_MERRCTL, CSR_MERRCTL, ISMERR, 0);
     env->CSR_TID = cs->cpu_index;
 
-    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, TLB_TYPE, 2);
-    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, MTLB_ENTRY, 63);
-    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_WAYS, 7);
-    env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_SETS, 8);
-
     for (n = 0; n < 4; n++) {
         env->CSR_DMW[n] = FIELD_DP64(env->CSR_DMW[n], CSR_DMW, PLV0, 0);
         env->CSR_DMW[n] = FIELD_DP64(env->CSR_DMW[n], CSR_DMW, PLV1, 0);
-- 
2.34.1

After cpu_reset, DATF in CSR_CRMD is 0, DATM is 0.
See the manual[1] 6.4.

[1]: https://github.com/loongson/LoongArch-Documentation/releases/download/2023.04.20/LoongArch-Vol1-v1.10-EN.pdf

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240705021839.1004374-2-gaosong@loongson.cn>
---
 target/loongarch/cpu.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_reset_hold(Object *obj, ResetType type)
     env->fcsr0 = 0x0;
 
     int n;
-    /* Set csr registers value after reset */
+    /* Set csr registers value after reset, see the manual 6.4. */
     env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, PLV, 0);
     env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, IE, 0);
     env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DA, 1);
     env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, PG, 0);
-    env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DATF, 1);
-    env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DATM, 1);
+    env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DATF, 0);
+    env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, DATM, 0);
 
     env->CSR_EUEN = FIELD_DP64(env->CSR_EUEN, CSR_EUEN, FPE, 0);
     env->CSR_EUEN = FIELD_DP64(env->CSR_EUEN, CSR_EUEN, SXE, 0);
-- 
2.34.1

The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595:

Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500)

are available in the Git repository at:

https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227

for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424:

target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800)

----------------------------------------------------------------
pull-loongarch-20241227
v1 ... v2
  1. Modify patch auther inconsistent with SOB

----------------------------------------------------------------
Bibo Mao (5):
      target/loongarch: Use actual operand size with vbsrl check
      hw/loongarch/virt: Create fdt table on machine creation done notification
      hw/loongarch/virt: Improve fdt table creation for CPU object
      target/loongarch: Use auto method with LSX feature
      target/loongarch: Use auto method with LASX feature

Guo Hongyu (1):
      target/loongarch: Fix vldi inst

hw/loongarch/virt.c                             | 142 ++++++++++++++----------
 target/loongarch/cpu.c                          |  86 ++++++++------
 target/loongarch/cpu.h                          |   4 +
 target/loongarch/kvm/kvm.c                      | 107 ++++++++++++++++++
 target/loongarch/tcg/insn_trans/trans_vec.c.inc |   4 +-
 5 files changed, 249 insertions(+), 94 deletions(-)

From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>

Refer to the link below for a description of the vldi instructions:
https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
Fixed errors in vldi instruction implementation.

Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
Tested-by: Xianglai Li <lixianglai@loongson.cn>
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm)
         break;
     case 1:
         /* data: {2{16'0, imm[7:0], 8'0}} */
-        data = (t << 24) | (t << 8);
+        data = (t << 40) | (t << 8);
         break;
     case 2:
         /* data: {2{8'0, imm[7:0], 16'0}} */
-- 
2.43.5

Hardcoded 32 bytes is used for vbsrl emulation check, there is
problem when options lsx=on,lasx=off is used for vbsrl.v instruction
in TCG mode. It injects LASX exception rather LSX exception.

Here actual operand size is used.

Cc: qemu-stable@nongnu.org
Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve")
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz)
 {
     int i, ofs;
 
-    if (!check_vec(ctx, 32)) {
+    if (!check_vec(ctx, oprsz)) {
         return true;
     }
 
-- 
2.43.5

The same with ACPI table, fdt table is created on machine done
notification. Some objects like CPU objects can be created with cold-plug
method with command such as -smp x, -device la464-loongarch-cpu, so all
objects finish to create when machine is done.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/loongarch/virt.c | 103 ++++++++++++++++++++++++--------------------
 1 file changed, 57 insertions(+), 46 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
     }
 }
 
+static void virt_fdt_setup(LoongArchVirtMachineState *lvms)
+{
+    MachineState *machine = MACHINE(lvms);
+    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
+    int i;
+
+    create_fdt(lvms);
+    fdt_add_cpu_nodes(lvms);
+    fdt_add_memory_nodes(machine);
+    fdt_add_fw_cfg_node(lvms);
+    fdt_add_flash_node(lvms);
+
+    /* Add cpu interrupt-controller */
+    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
+    /* Add Extend I/O Interrupt Controller node */
+    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
+    /* Add PCH PIC node */
+    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
+    /* Add PCH MSI node */
+    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
+    /* Add pcie node */
+    fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle);
+
+    /*
+     * Create uart fdt node in reverse order so that they appear
+     * in the finished device tree lowest address first
+     */
+    for (i = VIRT_UART_COUNT; i-- > 0;) {
+        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
+        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
+        fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0);
+    }
+
+    fdt_add_rtc_node(lvms, &pch_pic_phandle);
+    fdt_add_ged_reset(lvms);
+    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
+                                   VIRT_PLATFORM_BUS_BASEADDRESS,
+                                   VIRT_PLATFORM_BUS_SIZE,
+                                   VIRT_PLATFORM_BUS_IRQ);
+
+    /*
+     * Since lowmem region starts from 0 and Linux kernel legacy start address
+     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
+     * access. FDT size limit with 1 MiB.
+     * Put the FDT into the memory map as a ROM image: this will ensure
+     * the FDT is copied again upon reset, even if addr points into RAM.
+     */
+    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
+    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
+                          &address_space_memory);
+    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
+            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
+}
+
 static void virt_done(Notifier *notifier, void *data)
 {
     LoongArchVirtMachineState *lvms = container_of(notifier,
                                       LoongArchVirtMachineState, machine_done);
     virt_build_smbios(lvms);
     loongarch_acpi_setup(lvms);
+    virt_fdt_setup(lvms);
 }
 
 static void virt_powerdown_req(Notifier *notifier, void *opaque)
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
 }
 
 static void virt_devices_init(DeviceState *pch_pic,
-                                   LoongArchVirtMachineState *lvms,
-                                   uint32_t *pch_pic_phandle,
-                                   uint32_t *pch_msi_phandle)
+                                   LoongArchVirtMachineState *lvms)
 {
     MachineClass *mc = MACHINE_GET_CLASS(lvms);
     DeviceState *gpex_dev;
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
         gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
     }
 
-    /* Add pcie node */
-    fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
-
     /*
      * Create uart fdt node in reverse order so that they appear
      * in the finished device tree lowest address first
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
         serial_mm_init(get_system_memory(), base, 0,
                        qdev_get_gpio_in(pch_pic, irq),
                        115200, serial_hd(i), DEVICE_LITTLE_ENDIAN);
-        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
     }
 
     /* Network init */
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
     sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
                          qdev_get_gpio_in(pch_pic,
                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
-    fdt_add_rtc_node(lvms, pch_pic_phandle);
-    fdt_add_ged_reset(lvms);
 
     /* acpi ged */
     lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     CPULoongArchState *env;
     CPUState *cpu_state;
     int cpu, pin, i, start, num;
-    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
 
     /*
      * Extended IRQ model.
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
                    sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
 
-    /* Add cpu interrupt-controller */
-    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
-
     for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
         cpu_state = qemu_get_cpu(cpu);
         cpudev = DEVICE(cpu_state);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
         }
     }
 
-    /* Add Extend I/O Interrupt Controller node */
-    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
-
     pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
     num = VIRT_PCH_PIC_IRQ_NUM;
     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
         qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
     }
 
-    /* Add PCH PIC node */
-    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
-
     pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
     start   =  num;
     num = EXTIOI_IRQS - start;
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
                               qdev_get_gpio_in(extioi, i + start));
     }
 
-    /* Add PCH MSI node */
-    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
-
-    virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
+    virt_devices_init(pch_pic, lvms);
 }
 
 static void virt_firmware_init(LoongArchVirtMachineState *lvms)
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
     }
 
-    create_fdt(lvms);
-
     /* Create IOCSR space */
     memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
                           machine, "iocsr", UINT64_MAX);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         lacpu = LOONGARCH_CPU(cpu);
         lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
     }
-    fdt_add_cpu_nodes(lvms);
-    fdt_add_memory_nodes(machine);
     fw_cfg_add_memory(machine);
 
     /* Node0 memory */
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                         memmap_table,
                         sizeof(struct memmap_entry) * (memmap_entries));
     }
-    fdt_add_fw_cfg_node(lvms);
-    fdt_add_flash_node(lvms);
 
     /* Initialize the IO interrupt subsystem */
     virt_irq_init(lvms);
-    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
-                                   VIRT_PLATFORM_BUS_BASEADDRESS,
-                                   VIRT_PLATFORM_BUS_SIZE,
-                                   VIRT_PLATFORM_BUS_IRQ);
     lvms->machine_done.notify = virt_done;
     qemu_add_machine_init_done_notifier(&lvms->machine_done);
      /* connect powerdown request */
     lvms->powerdown_notifier.notify = virt_powerdown_req;
     qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
 
-    /*
-     * Since lowmem region starts from 0 and Linux kernel legacy start address
-     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
-     * access. FDT size limit with 1 MiB.
-     * Put the FDT into the memory map as a ROM image: this will ensure
-     * the FDT is copied again upon reset, even if addr points into RAM.
-     */
-    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
-    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
-                          &address_space_memory);
-    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
-            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
-
     lvms->bootinfo.ram_size = ram_size;
     loongarch_load_kernel(machine, &lvms->bootinfo);
 }
-- 
2.43.5

For CPU object, possible_cpu_arch_ids() function is used rather than
smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus
is not accurate for all possible CPU objects, possible_cpu_arch_ids()
is used here.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/loongarch/virt.c | 39 +++++++++++++++++++++++++--------------
 1 file changed, 25 insertions(+), 14 deletions(-)

Like LBT feature, add type OnOffAuto for LSX feature setting. Also
add LSX feature detection with new VM ioctl command, fallback to old
method if it is not supported.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/cpu.c     | 38 +++++++++++++++------------
 target/loongarch/cpu.h     |  2 ++
 target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 77 insertions(+), 17 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
     CPULoongArchState *env = &cpu->env;
+    uint32_t data = 0;
     int i;
 
     for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
     cpu->dtb_compatible = "loongarch,Loongson-3A5000";
     env->cpucfg[0] = 0x14c010;  /* PRID */
 
-    uint32_t data = 0;
     data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
     CPULoongArchState *env = &cpu->env;
-
+    uint32_t data = 0;
     int i;
 
     for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
     cpu->dtb_compatible = "loongarch,Loongson-1C103";
     env->cpucfg[0] = 0x148042;  /* PRID */
 
-    uint32_t data = 0;
     data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
 
 static bool loongarch_get_lsx(Object *obj, Error **errp)
 {
-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-    bool ret;
-
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
-        ret = true;
-    } else {
-        ret = false;
-    }
-    return ret;
+    return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF;
 }
 
 static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    uint32_t val;
 
-    if (value) {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-    } else {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if (kvm_enabled()) {
+        /* kvm feature detection in function kvm_arch_init_vcpu */
+        return;
     }
+
+    /* LSX feature detection in TCG mode */
+    val = cpu->env.cpucfg[2];
+    if (cpu->lsx == ON_OFF_AUTO_ON) {
+        if (FIELD_EX32(val, CPUCFG2, LSX) == 0) {
+            error_setg(errp, "Failed to enable LSX in TCG mode");
+            return;
+        }
+    }
+
+    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
 }
 
 static bool loongarch_get_lasx(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 
+    cpu->lsx = ON_OFF_AUTO_AUTO;
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                              loongarch_set_lsx);
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
 
     } else {
         cpu->lbt = ON_OFF_AUTO_OFF;
+        cpu->pmu = ON_OFF_AUTO_OFF;
     }
 }
 
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
 #endif
 
 enum loongarch_features {
+    LOONGARCH_FEATURE_LSX,
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
     LOONGARCH_FEATURE_PMU,
 };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     uint32_t  phy_id;
     OnOffAuto lbt;
     OnOffAuto pmu;
+    OnOffAuto lsx;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
 {
     int ret;
     struct kvm_device_attr attr;
+    uint64_t val;
 
     switch (feature) {
+    case LOONGARCH_FEATURE_LSX:
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_LSX;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        if (ret == 0) {
+            return true;
+        }
+
+        /* Fallback to old kernel detect interface */
+        val = 0;
+        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
+        /* Cpucfg2 */
+        attr.attr  = 2;
+        attr.addr = (uint64_t)&val;
+        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
+        if (!ret) {
+            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
+            if (ret) {
+                return false;
+            }
+
+            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX);
+            return (ret != 0);
+        }
+        return false;
+
     case LOONGARCH_FEATURE_LBT:
         /*
          * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
     return false;
 }
 
+static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX);
+    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0);
+    if (cpu->lsx == ON_OFF_AUTO_ON) {
+        if (kvm_supported) {
+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
+        } else {
+            error_setg(errp, "'lsx' feature not supported by KVM on this host");
+            return -ENOTSUP;
+        }
+    } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) {
+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
+    }
+
+    return 0;
+}
+
 static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
 {
     CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
         brk_insn = val;
     }
 
+    ret = kvm_cpu_check_lsx(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+
     ret = kvm_cpu_check_lbt(cs, &local_err);
     if (ret < 0) {
         error_report_err(local_err);
-- 
2.43.5

Like LSX feature, add type OnOffAuto for LASX feature setting.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/cpu.c     | 50 +++++++++++++++++++++++------------
 target/loongarch/cpu.h     |  2 ++
 target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 89 insertions(+), 16 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
     uint32_t val;
 
     cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if (cpu->lsx == ON_OFF_AUTO_OFF) {
+        cpu->lasx = ON_OFF_AUTO_OFF;
+        if (cpu->lasx == ON_OFF_AUTO_ON) {
+            error_setg(errp, "Failed to disable LSX since LASX is enabled");
+            return;
+        }
+    }
+
     if (kvm_enabled()) {
         /* kvm feature detection in function kvm_arch_init_vcpu */
         return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
             error_setg(errp, "Failed to enable LSX in TCG mode");
             return;
         }
+    } else {
+        cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0);
+        val = cpu->env.cpucfg[2];
     }
 
     cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
 
 static bool loongarch_get_lasx(Object *obj, Error **errp)
 {
-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-    bool ret;
-
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
-        ret = true;
-    } else {
-        ret = false;
-    }
-    return ret;
+    return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF;
 }
 
 static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    uint32_t val;
 
-    if (value) {
-	if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
-            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-	}
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
-    } else {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) {
+        error_setg(errp, "Failed to enable LASX since lSX is disabled");
+        return;
+    }
+
+    if (kvm_enabled()) {
+        /* kvm feature detection in function kvm_arch_init_vcpu */
+        return;
     }
+
+    /* LASX feature detection in TCG mode */
+    val = cpu->env.cpucfg[2];
+    if (cpu->lasx == ON_OFF_AUTO_ON) {
+        if (FIELD_EX32(val, CPUCFG2, LASX) == 0) {
+            error_setg(errp, "Failed to enable LASX in TCG mode");
+            return;
+        }
+    }
+
+    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
 }
 
 static bool loongarch_get_lbt(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 
     cpu->lsx = ON_OFF_AUTO_AUTO;
+    cpu->lasx = ON_OFF_AUTO_AUTO;
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                              loongarch_set_lsx);
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
 
 enum loongarch_features {
     LOONGARCH_FEATURE_LSX,
+    LOONGARCH_FEATURE_LASX,
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
     LOONGARCH_FEATURE_PMU,
 };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     OnOffAuto lbt;
     OnOffAuto pmu;
     OnOffAuto lsx;
+    OnOffAuto lasx;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
         }
         return false;
 
+    case LOONGARCH_FEATURE_LASX:
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_LASX;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        if (ret == 0) {
+            return true;
+        }
+
+        /* Fallback to old kernel detect interface */
+        val = 0;
+        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
+        /* Cpucfg2 */
+        attr.attr  = 2;
+        attr.addr = (uint64_t)&val;
+        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
+        if (!ret) {
+            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
+            if (ret) {
+                return false;
+            }
+
+            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX);
+            return (ret != 0);
+        }
+        return false;
+
     case LOONGARCH_FEATURE_LBT:
         /*
          * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
     return 0;
 }
 
+static int kvm_cpu_check_lasx(CPUState *cs, Error **errp)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX);
+    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0);
+    if (cpu->lasx == ON_OFF_AUTO_ON) {
+        if (kvm_supported) {
+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
+        } else {
+            error_setg(errp, "'lasx' feature not supported by KVM on host");
+            return -ENOTSUP;
+        }
+    } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) {
+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
+    }
+
+    return 0;
+}
+
 static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
 {
     CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
         error_report_err(local_err);
     }
 
+    ret = kvm_cpu_check_lasx(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+
     ret = kvm_cpu_check_lbt(cs, &local_err);
     if (ret < 0) {
         error_report_err(local_err);
-- 
2.43.5