[PATCH v5 0/7] target/riscv: Expose RV32 cpu to RV64 QEMU

LIU Zhiwei posted 7 patches 4 months, 2 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240710022430.1306-1-zhiwei._5Fliu@linux.alibaba.com
Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bmeng.cn@gmail.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Cleber Rosa <crosa@redhat.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Wainer dos Santos Moschetta <wainersm@redhat.com>, Beraldo Leal <bleal@redhat.com>
There is a newer version of this series
configs/targets/riscv64-softmmu.mak |  2 +-
hw/riscv/boot.c                     | 35 +++++++++++++++++---------
hw/riscv/sifive_u.c                 |  3 ++-
include/hw/riscv/boot.h             |  4 ++-
include/hw/riscv/boot_opensbi.h     | 29 ++++++++++++++++++++++
target/riscv/cpu.c                  | 17 ++++++++++---
target/riscv/cpu.h                  |  5 +++-
target/riscv/cpu_helper.c           | 25 +++++++++++++------
target/riscv/pmp.c                  |  2 +-
tests/avocado/boot_linux_console.py | 38 +++++++++++++++++++++++++++++
10 files changed, 132 insertions(+), 28 deletions(-)
[PATCH v5 0/7] target/riscv: Expose RV32 cpu to RV64 QEMU
Posted by LIU Zhiwei 4 months, 2 weeks ago
From: 甲一 <lzw194868@alibaba-inc.com>

This patch set aims to expose 32-bit RISC-V cpu to RV64 QEMU. Thus
qemu-system-riscv64 can directly boot a RV32 Linux.

This patch set has been tested with 6.9.0 Linux Image.
And add an avocado test in tests/avocado.

# make check-avocado AVOCADO_TESTS=/home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
  VENVPIP install -e /home/jenkins/git/qemu/python/
/home/jenkins/git/qemu/build/pyvenv/bin/python3 -B /home/jenkins/git/qemu/python/scripts/mkvenv.py ensuregroup  --online /home/jenkins/git/qemu/pythondeps.toml avocado
mkvenv: checking for avocado-framework(>=88.1, <93.0)
mkvenv: checking for pycdlib>=1.11.0
mkvenv: installing avocado-framework==88.1, pycdlib>=1.11.0
  AVOCADO tests/avocado
Fetching asset from /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
Fetching asset from /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
JOB ID     : 8c2e1ff918d3111d078a52eba9956893afaf9e1d
JOB LOG    : /home/jenkins/git/qemu/build/tests/results/job-2024-07-10T09.55-8c2e1ff/job.log
 (1/1) /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i: PASS (17.50 s)
RESULTS    : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0
JOB TIME   : 29.50 s

v5:
  Rebase to master and add tags  

v4:
  Drop UL completely in PATCH v3 2/7, 4/7, 5/7.
  Avocado: Add "if=none" to "-drive" option in QEMU command line

v3:
  Rebase to the master branch

v2:
  Remove the line that was inadvertently left in PATCH v1 4/6.
  Add an avocado test.

v1:
  https://mail.gnu.org/archive/html/qemu-riscv/2024-06/msg00501.html

TANG Tiancheng (7):
  target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI
  target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32
  target/riscv: Correct SXL return value for RV32 in RV64 QEMU
  target/riscv: Detect sxl to set bit width for RV32 in RV64
  target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU
  target/riscv: Enable RV32 CPU support in RV64 QEMU
  tests/avocado: Add an avocado test for riscv64

 configs/targets/riscv64-softmmu.mak |  2 +-
 hw/riscv/boot.c                     | 35 +++++++++++++++++---------
 hw/riscv/sifive_u.c                 |  3 ++-
 include/hw/riscv/boot.h             |  4 ++-
 include/hw/riscv/boot_opensbi.h     | 29 ++++++++++++++++++++++
 target/riscv/cpu.c                  | 17 ++++++++++---
 target/riscv/cpu.h                  |  5 +++-
 target/riscv/cpu_helper.c           | 25 +++++++++++++------
 target/riscv/pmp.c                  |  2 +-
 tests/avocado/boot_linux_console.py | 38 +++++++++++++++++++++++++++++
 10 files changed, 132 insertions(+), 28 deletions(-)

-- 
2.25.1


Re: [PATCH v5 0/7] target/riscv: Expose RV32 cpu to RV64 QEMU
Posted by Alistair Francis 4 months, 2 weeks ago
On Wed, Jul 10, 2024 at 12:27 PM LIU Zhiwei
<zhiwei_liu@linux.alibaba.com> wrote:
>
> From: 甲一 <lzw194868@alibaba-inc.com>
>
> This patch set aims to expose 32-bit RISC-V cpu to RV64 QEMU. Thus
> qemu-system-riscv64 can directly boot a RV32 Linux.
>
> This patch set has been tested with 6.9.0 Linux Image.
> And add an avocado test in tests/avocado.
>
> # make check-avocado AVOCADO_TESTS=/home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
>   VENVPIP install -e /home/jenkins/git/qemu/python/
> /home/jenkins/git/qemu/build/pyvenv/bin/python3 -B /home/jenkins/git/qemu/python/scripts/mkvenv.py ensuregroup  --online /home/jenkins/git/qemu/pythondeps.toml avocado
> mkvenv: checking for avocado-framework(>=88.1, <93.0)
> mkvenv: checking for pycdlib>=1.11.0
> mkvenv: installing avocado-framework==88.1, pycdlib>=1.11.0
>   AVOCADO tests/avocado
> Fetching asset from /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
> Fetching asset from /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
> JOB ID     : 8c2e1ff918d3111d078a52eba9956893afaf9e1d
> JOB LOG    : /home/jenkins/git/qemu/build/tests/results/job-2024-07-10T09.55-8c2e1ff/job.log
>  (1/1) /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i: PASS (17.50 s)
> RESULTS    : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0
> JOB TIME   : 29.50 s
>
> v5:
>   Rebase to master and add tags
>
> v4:
>   Drop UL completely in PATCH v3 2/7, 4/7, 5/7.
>   Avocado: Add "if=none" to "-drive" option in QEMU command line
>
> v3:
>   Rebase to the master branch
>
> v2:
>   Remove the line that was inadvertently left in PATCH v1 4/6.
>   Add an avocado test.
>
> v1:
>   https://mail.gnu.org/archive/html/qemu-riscv/2024-06/msg00501.html
>
> TANG Tiancheng (7):
>   target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI
>   target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32
>   target/riscv: Correct SXL return value for RV32 in RV64 QEMU
>   target/riscv: Detect sxl to set bit width for RV32 in RV64
>   target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU
>   target/riscv: Enable RV32 CPU support in RV64 QEMU
>   tests/avocado: Add an avocado test for riscv64

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

>
>  configs/targets/riscv64-softmmu.mak |  2 +-
>  hw/riscv/boot.c                     | 35 +++++++++++++++++---------
>  hw/riscv/sifive_u.c                 |  3 ++-
>  include/hw/riscv/boot.h             |  4 ++-
>  include/hw/riscv/boot_opensbi.h     | 29 ++++++++++++++++++++++
>  target/riscv/cpu.c                  | 17 ++++++++++---
>  target/riscv/cpu.h                  |  5 +++-
>  target/riscv/cpu_helper.c           | 25 +++++++++++++------
>  target/riscv/pmp.c                  |  2 +-
>  tests/avocado/boot_linux_console.py | 38 +++++++++++++++++++++++++++++
>  10 files changed, 132 insertions(+), 28 deletions(-)
>
> --
> 2.25.1
>
>
Re: [PATCH v5 0/7] target/riscv: Expose RV32 cpu to RV64 QEMU
Posted by Daniel Henrique Barboza 4 months, 2 weeks ago

On 7/9/24 11:24 PM, LIU Zhiwei wrote:
> From: 甲一 <lzw194868@alibaba-inc.com>
> 
> This patch set aims to expose 32-bit RISC-V cpu to RV64 QEMU. Thus
> qemu-system-riscv64 can directly boot a RV32 Linux.
> 
> This patch set has been tested with 6.9.0 Linux Image.
> And add an avocado test in tests/avocado.

Thanks for this work and sorry for the late review.

One thing to look out as a follow-up is the 'max' CPU. It has the same name
in both 32 and 64 bits so it'll result in a conflict with the 'max' CPU for
rv64.

One easy way out is to add a new 'max32' bit CPU for riscv32, which would be an
alias for the 'max' CPU, then adding 'max32' support in rv64.


Thanks,

Daniel


> 
> # make check-avocado AVOCADO_TESTS=/home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
>    VENVPIP install -e /home/jenkins/git/qemu/python/
> /home/jenkins/git/qemu/build/pyvenv/bin/python3 -B /home/jenkins/git/qemu/python/scripts/mkvenv.py ensuregroup  --online /home/jenkins/git/qemu/pythondeps.toml avocado
> mkvenv: checking for avocado-framework(>=88.1, <93.0)
> mkvenv: checking for pycdlib>=1.11.0
> mkvenv: installing avocado-framework==88.1, pycdlib>=1.11.0
>    AVOCADO tests/avocado
> Fetching asset from /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
> Fetching asset from /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
> JOB ID     : 8c2e1ff918d3111d078a52eba9956893afaf9e1d
> JOB LOG    : /home/jenkins/git/qemu/build/tests/results/job-2024-07-10T09.55-8c2e1ff/job.log
>   (1/1) /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i: PASS (17.50 s)
> RESULTS    : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0
> JOB TIME   : 29.50 s
> 
> v5:
>    Rebase to master and add tags
> 
> v4:
>    Drop UL completely in PATCH v3 2/7, 4/7, 5/7.
>    Avocado: Add "if=none" to "-drive" option in QEMU command line
> 
> v3:
>    Rebase to the master branch
> 
> v2:
>    Remove the line that was inadvertently left in PATCH v1 4/6.
>    Add an avocado test.
> 
> v1:
>    https://mail.gnu.org/archive/html/qemu-riscv/2024-06/msg00501.html
> 
> TANG Tiancheng (7):
>    target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI
>    target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32
>    target/riscv: Correct SXL return value for RV32 in RV64 QEMU
>    target/riscv: Detect sxl to set bit width for RV32 in RV64
>    target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU
>    target/riscv: Enable RV32 CPU support in RV64 QEMU
>    tests/avocado: Add an avocado test for riscv64
> 
>   configs/targets/riscv64-softmmu.mak |  2 +-
>   hw/riscv/boot.c                     | 35 +++++++++++++++++---------
>   hw/riscv/sifive_u.c                 |  3 ++-
>   include/hw/riscv/boot.h             |  4 ++-
>   include/hw/riscv/boot_opensbi.h     | 29 ++++++++++++++++++++++
>   target/riscv/cpu.c                  | 17 ++++++++++---
>   target/riscv/cpu.h                  |  5 +++-
>   target/riscv/cpu_helper.c           | 25 +++++++++++++------
>   target/riscv/pmp.c                  |  2 +-
>   tests/avocado/boot_linux_console.py | 38 +++++++++++++++++++++++++++++
>   10 files changed, 132 insertions(+), 28 deletions(-)
> 

Re: [PATCH v5 0/7] target/riscv: Expose RV32 cpu to RV64 QEMU
Posted by LIU Zhiwei 4 months, 1 week ago
On 2024/7/12 17:57, Daniel Henrique Barboza wrote:
>
>
> On 7/9/24 11:24 PM, LIU Zhiwei wrote:
>> From: 甲一 <lzw194868@alibaba-inc.com>
>>
>> This patch set aims to expose 32-bit RISC-V cpu to RV64 QEMU. Thus
>> qemu-system-riscv64 can directly boot a RV32 Linux.
>>
>> This patch set has been tested with 6.9.0 Linux Image.
>> And add an avocado test in tests/avocado.
>
> Thanks for this work and sorry for the late review.
>
> One thing to look out as a follow-up is the 'max' CPU. It has the same 
> name
> in both 32 and 64 bits so it'll result in a conflict with the 'max' 
> CPU for
> rv64.
>
> One easy way out is to add a new 'max32' bit CPU for riscv32, which 
> would be an
> alias for the 'max' CPU, then adding 'max32' support in rv64.

I think it is good. One question is if we should also add any32 cpu for 
rv64, which has the similar conflict of 'max' CPU.

Thanks,
Zhiwei

>
>
> Thanks,
>
> Daniel
>
>
>>
>> # make check-avocado 
>> AVOCADO_TESTS=/home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
>>    VENVPIP install -e /home/jenkins/git/qemu/python/
>> /home/jenkins/git/qemu/build/pyvenv/bin/python3 -B 
>> /home/jenkins/git/qemu/python/scripts/mkvenv.py ensuregroup --online 
>> /home/jenkins/git/qemu/pythondeps.toml avocado
>> mkvenv: checking for avocado-framework(>=88.1, <93.0)
>> mkvenv: checking for pycdlib>=1.11.0
>> mkvenv: installing avocado-framework==88.1, pycdlib>=1.11.0
>>    AVOCADO tests/avocado
>> Fetching asset from 
>> /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
>> Fetching asset from 
>> /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i
>> JOB ID     : 8c2e1ff918d3111d078a52eba9956893afaf9e1d
>> JOB LOG    : 
>> /home/jenkins/git/qemu/build/tests/results/job-2024-07-10T09.55-8c2e1ff/job.log
>>   (1/1) 
>> /home/jenkins/git/qemu/tests/avocado/boot_linux_console.py:BootLinuxConsole.test_riscv64_virt_rv32i: 
>> PASS (17.50 s)
>> RESULTS    : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 
>> 0 | CANCEL 0
>> JOB TIME   : 29.50 s
>>
>> v5:
>>    Rebase to master and add tags
>>
>> v4:
>>    Drop UL completely in PATCH v3 2/7, 4/7, 5/7.
>>    Avocado: Add "if=none" to "-drive" option in QEMU command line
>>
>> v3:
>>    Rebase to the master branch
>>
>> v2:
>>    Remove the line that was inadvertently left in PATCH v1 4/6.
>>    Add an avocado test.
>>
>> v1:
>> https://mail.gnu.org/archive/html/qemu-riscv/2024-06/msg00501.html
>>
>> TANG Tiancheng (7):
>>    target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI
>>    target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32
>>    target/riscv: Correct SXL return value for RV32 in RV64 QEMU
>>    target/riscv: Detect sxl to set bit width for RV32 in RV64
>>    target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU
>>    target/riscv: Enable RV32 CPU support in RV64 QEMU
>>    tests/avocado: Add an avocado test for riscv64
>>
>>   configs/targets/riscv64-softmmu.mak |  2 +-
>>   hw/riscv/boot.c                     | 35 +++++++++++++++++---------
>>   hw/riscv/sifive_u.c                 |  3 ++-
>>   include/hw/riscv/boot.h             |  4 ++-
>>   include/hw/riscv/boot_opensbi.h     | 29 ++++++++++++++++++++++
>>   target/riscv/cpu.c                  | 17 ++++++++++---
>>   target/riscv/cpu.h                  |  5 +++-
>>   target/riscv/cpu_helper.c           | 25 +++++++++++++------
>>   target/riscv/pmp.c                  |  2 +-
>>   tests/avocado/boot_linux_console.py | 38 +++++++++++++++++++++++++++++
>>   10 files changed, 132 insertions(+), 28 deletions(-)
>>