On 2024/7/9 14:18, CLEMENT MATHIEU--DRIF wrote:
> From: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
>
> These 2 macros are for high 64-bit of the FRCD registers.
> Declarations have to be moved accordingly.
>
> Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
> Reviewed-by: Minwoo Im <minwoo.im@samsung.com>
> ---
> hw/i386/intel_iommu_internal.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Yi Liu <yi.l.liu@intel.com>
>
> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
> index cbc4030031..faea23e8d6 100644
> --- a/hw/i386/intel_iommu_internal.h
> +++ b/hw/i386/intel_iommu_internal.h
> @@ -264,10 +264,10 @@
> #define VTD_FRCD_FR(val) (((val) & 0xffULL) << 32)
> #define VTD_FRCD_SID_MASK 0xffffULL
> #define VTD_FRCD_SID(val) ((val) & VTD_FRCD_SID_MASK)
> -/* For the low 64-bit of 128-bit */
> -#define VTD_FRCD_FI(val) ((val) & ~0xfffULL)
> #define VTD_FRCD_PV(val) (((val) & 0xffffULL) << 40)
> #define VTD_FRCD_PP(val) (((val) & 0x1ULL) << 31)
> +/* For the low 64-bit of 128-bit */
> +#define VTD_FRCD_FI(val) ((val) & ~0xfffULL)
> #define VTD_FRCD_IR_IDX(val) (((val) & 0xffffULL) << 48)
>
> /* DMA Remapping Fault Conditions */
--
Regards,
Yi Liu