[v3] support AST2700 network

[PATCH v3 0/8] support AST2700 network

Jamin Lin via posted 8 patches 2 months ago

Diff against v2
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240704082922.1464317-1-jamin._5Flin@aspeedtech.com

Maintainers: "Cédric Le Goater" <clg@kaod.org>, Peter Maydell <peter.maydell@linaro.org>, Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>, Jamin Lin <jamin_lin@aspeedtech.com>, Andrew Jeffery <andrew@codeconstruct.com.au>, Joel Stanley <joel@jms.id.au>, Alistair Francis <alistair@alistair23.me>, Kevin Wolf <kwolf@redhat.com>, Hanna Reitz <hreitz@redhat.com>, Jason Wang <jasowang@redhat.com>, Cleber Rosa <crosa@redhat.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Wainer dos Santos Moschetta <wainersm@redhat.com>, Beraldo Leal <bleal@redhat.com>

hw/arm/aspeed_ast27x0.c         |   3 +
hw/block/m25p80.c               |  16 ++++
hw/net/ftgmac100.c              | 147 +++++++++++++++++++++++++++-----
include/hw/net/ftgmac100.h      |  17 ++--
tests/avocado/machine_aspeed.py |  12 +--
5 files changed, 162 insertions(+), 33 deletions(-)

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[PATCH v3 0/8] support AST2700 network

Posted by Jamin Lin via 2 months ago

change from v1:
- ftgmac100
 - fix coding style
 - support 64 bits dma dram address for AST2700

change from v2:
- ftgmac100: update memory region size to 0x200.
- ftgmac100: introduce a new class(ftgmac100_high),
    class attribute and memop handlers, for FTGMAC100_*_HIGH regs read/write.
- aspeed_ast27x0: update network model to ftgmac100_high to support
  64 bits dram address DMA.
- m25p80: support quad mode for w25q01jvq

change from v3:
- ftgmac100: update memory region size to 64KB.
- ftgmac100: using a property to activate the region for new registers,
  instead of a class
- ftgmac100: introduce TX and RX ring base address high registers
- ftgmac100: split standalone patch for easy review
- ftgmac100: update TX and RX packet buffers address to 64 bits
- aspeed_ast27x0: set dma64 property for AST2700 ftgmac100
- machine_aspeed.py: update to test sdk v09.02 and network for AST2700

Jamin Lin (8):
  hw/net:ftgmac100: update memory region size to 64KB
  hw/net:ftgmac100: update ring base address to 64 bits
  hw/net:ftgmac100: introduce TX and RX ring base address high registers
    to support 64 bits
  hw/net:ftgmac100: update TX and RX packet buffers address to 64 bits
  aspeed/soc: set dma64 property for AST2700 ftgmac100
  hw/block: m25p80: support quad mode for w25q01jvq
  machine_aspeed.py: update to test ASPEED OpenBMC SDK v09.02 for
    AST2700
  machine_aspeed.py: update to test network for AST2700

 hw/arm/aspeed_ast27x0.c         |   3 +
 hw/block/m25p80.c               |  16 ++++
 hw/net/ftgmac100.c              | 147 +++++++++++++++++++++++++++-----
 include/hw/net/ftgmac100.h      |  17 ++--
 tests/avocado/machine_aspeed.py |  12 +--
 5 files changed, 162 insertions(+), 33 deletions(-)

-- 
2.34.1

Re: [PATCH v3 0/8] support AST2700 network

Posted by Cédric Le Goater 2 months ago

On 7/4/24 10:29 AM, Jamin Lin wrote:
> change from v1:
> - ftgmac100
>   - fix coding style
>   - support 64 bits dma dram address for AST2700
> 
> change from v2:
> - ftgmac100: update memory region size to 0x200.
> - ftgmac100: introduce a new class(ftgmac100_high),
>      class attribute and memop handlers, for FTGMAC100_*_HIGH regs read/write.
> - aspeed_ast27x0: update network model to ftgmac100_high to support
>    64 bits dram address DMA.
> - m25p80: support quad mode for w25q01jvq
> 
> change from v3:
> - ftgmac100: update memory region size to 64KB.
> - ftgmac100: using a property to activate the region for new registers,
>    instead of a class
> - ftgmac100: introduce TX and RX ring base address high registers
> - ftgmac100: split standalone patch for easy review
> - ftgmac100: update TX and RX packet buffers address to 64 bits
> - aspeed_ast27x0: set dma64 property for AST2700 ftgmac100
> - machine_aspeed.py: update to test sdk v09.02 and network for AST2700
> 
> Jamin Lin (8):
>    hw/net:ftgmac100: update memory region size to 64KB
>    hw/net:ftgmac100: update ring base address to 64 bits
>    hw/net:ftgmac100: introduce TX and RX ring base address high registers
>      to support 64 bits
>    hw/net:ftgmac100: update TX and RX packet buffers address to 64 bits
>    aspeed/soc: set dma64 property for AST2700 ftgmac100
>    hw/block: m25p80: support quad mode for w25q01jvq
>    machine_aspeed.py: update to test ASPEED OpenBMC SDK v09.02 for
>      AST2700
>    machine_aspeed.py: update to test network for AST2700
> 
>   hw/arm/aspeed_ast27x0.c         |   3 +
>   hw/block/m25p80.c               |  16 ++++
>   hw/net/ftgmac100.c              | 147 +++++++++++++++++++++++++++-----
>   include/hw/net/ftgmac100.h      |  17 ++--
>   tests/avocado/machine_aspeed.py |  12 +--
>   5 files changed, 162 insertions(+), 33 deletions(-)
> 


Applied to aspeed-next.

Thanks,

C.