From: Brad Smith <brad@comstyle.com>
Signed-off-by: Brad Smith <brad@comstyle.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <ZneEh51XKhxgZKpp@humpty.home.comstyle.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
util/cpuinfo-aarch64.c | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/util/cpuinfo-aarch64.c b/util/cpuinfo-aarch64.c
index 4c8a005715..8ca775a14b 100644
--- a/util/cpuinfo-aarch64.c
+++ b/util/cpuinfo-aarch64.c
@@ -20,6 +20,12 @@
#ifdef CONFIG_DARWIN
# include <sys/sysctl.h>
#endif
+#ifdef __OpenBSD__
+# include <machine/armreg.h>
+# include <machine/cpu.h>
+# include <sys/types.h>
+# include <sys/sysctl.h>
+#endif
unsigned cpuinfo;
@@ -72,6 +78,36 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
info |= sysctl_for_bool("hw.optional.arm.FEAT_PMULL") * CPUINFO_PMULL;
info |= sysctl_for_bool("hw.optional.arm.FEAT_BTI") * CPUINFO_BTI;
#endif
+#ifdef __OpenBSD__
+ int mib[2];
+ uint64_t isar0;
+ uint64_t pfr1;
+ size_t len;
+
+ mib[0] = CTL_MACHDEP;
+ mib[1] = CPU_ID_AA64ISAR0;
+ len = sizeof(isar0);
+ if (sysctl(mib, 2, &isar0, &len, NULL, 0) != -1) {
+ if (ID_AA64ISAR0_ATOMIC(isar0) >= ID_AA64ISAR0_ATOMIC_IMPL) {
+ info |= CPUINFO_LSE;
+ }
+ if (ID_AA64ISAR0_AES(isar0) >= ID_AA64ISAR0_AES_BASE) {
+ info |= CPUINFO_AES;
+ }
+ if (ID_AA64ISAR0_AES(isar0) >= ID_AA64ISAR0_AES_PMULL) {
+ info |= CPUINFO_PMULL;
+ }
+ }
+
+ mib[0] = CTL_MACHDEP;
+ mib[1] = CPU_ID_AA64PFR1;
+ len = sizeof(pfr1);
+ if (sysctl(mib, 2, &pfr1, &len, NULL, 0) != -1) {
+ if (ID_AA64PFR1_BT(pfr1) >= ID_AA64PFR1_BT_IMPL) {
+ info |= CPUINFO_BTI;
+ }
+ }
+#endif
cpuinfo = info;
return info;
--
2.34.1