[PATCH] hw/arm/xilinx_zynq: Fix IRQ/FIQ routing

Sebastian Huber posted 1 patch 1 month ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240610052906.4432-1-sebastian.huber@embedded-brains.de
Maintainers: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Alistair Francis <alistair@alistair23.me>, Peter Maydell <peter.maydell@linaro.org>
hw/arm/xilinx_zynq.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
[PATCH] hw/arm/xilinx_zynq: Fix IRQ/FIQ routing
Posted by Sebastian Huber 1 month ago
Fix the system bus interrupt line to CPU core assignment.

Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
---
 hw/arm/xilinx_zynq.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 7f7a3d23fb..c79661bbc1 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -252,10 +252,11 @@ static void zynq_init(MachineState *machine)
     zynq_binfo.gic_cpu_if_addr = MPCORE_PERIPHBASE + 0x100;
     sysbus_create_varargs("l2x0", MPCORE_PERIPHBASE + 0x2000, NULL);
     for (n = 0; n < smp_cpus; n++) {
+        /* See "hw/intc/arm_gic.h" for the IRQ line association */
         DeviceState *cpudev = DEVICE(zynq_machine->cpu[n]);
-        sysbus_connect_irq(busdev, (2 * n) + 0,
+        sysbus_connect_irq(busdev, n,
                            qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
-        sysbus_connect_irq(busdev, (2 * n) + 1,
+        sysbus_connect_irq(busdev, smp_cpus + n,
                            qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
     }
 
-- 
2.35.3
Re: [PATCH] hw/arm/xilinx_zynq: Fix IRQ/FIQ routing
Posted by Peter Maydell 1 month ago
On Mon, 10 Jun 2024 at 06:29, Sebastian Huber
<sebastian.huber@embedded-brains.de> wrote:
>
> Fix the system bus interrupt line to CPU core assignment.
>
> Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
> ---
>  hw/arm/xilinx_zynq.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
> index 7f7a3d23fb..c79661bbc1 100644
> --- a/hw/arm/xilinx_zynq.c
> +++ b/hw/arm/xilinx_zynq.c
> @@ -252,10 +252,11 @@ static void zynq_init(MachineState *machine)
>      zynq_binfo.gic_cpu_if_addr = MPCORE_PERIPHBASE + 0x100;
>      sysbus_create_varargs("l2x0", MPCORE_PERIPHBASE + 0x2000, NULL);
>      for (n = 0; n < smp_cpus; n++) {
> +        /* See "hw/intc/arm_gic.h" for the IRQ line association */
>          DeviceState *cpudev = DEVICE(zynq_machine->cpu[n]);
> -        sysbus_connect_irq(busdev, (2 * n) + 0,
> +        sysbus_connect_irq(busdev, n,
>                             qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
> -        sysbus_connect_irq(busdev, (2 * n) + 1,
> +        sysbus_connect_irq(busdev, smp_cpus + n,
>                             qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
>      }


Applied to target-arm.next, thanks.

-- PMM
Re: [PATCH] hw/arm/xilinx_zynq: Fix IRQ/FIQ routing
Posted by Philippe Mathieu-Daudé 1 month ago
On 10/6/24 07:29, Sebastian Huber wrote:
> Fix the system bus interrupt line to CPU core assignment.
> 
> Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
> ---
>   hw/arm/xilinx_zynq.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>