| 1 | The following changes since commit db2feb2df8d19592c9859efb3f682404e0052957: | 1 | The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595: |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Merge tag 'pull-misc-20240605' of https://gitlab.com/rth7680/qemu into staging (2024-06-05 14:17:01 -0700) | 3 | Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500) |
| 4 | 4 | ||
| 5 | are available in the Git repository at: | 5 | are available in the Git repository at: |
| 6 | 6 | ||
| 7 | https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240606 | 7 | https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227 |
| 8 | 8 | ||
| 9 | for you to fetch changes up to 78f932ea1f7b3b9b0ac628dc2a91281318fe51fa: | 9 | for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424: |
| 10 | 10 | ||
| 11 | target/loongarch: fix a wrong print in cpu dump (2024-06-06 11:58:06 +0800) | 11 | target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800) |
| 12 | 12 | ||
| 13 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
| 14 | pull-loongarch-20240606 | 14 | pull-loongarch-20241227 |
| 15 | v1 ... v2 | ||
| 16 | 1. Modify patch auther inconsistent with SOB | ||
| 15 | 17 | ||
| 16 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
| 17 | Bibo Mao (2): | 19 | Bibo Mao (5): |
| 18 | tests/libqos: Add loongarch virt machine node | 20 | target/loongarch: Use actual operand size with vbsrl check |
| 19 | tests/qtest: Add numa test for loongarch system | 21 | hw/loongarch/virt: Create fdt table on machine creation done notification |
| 22 | hw/loongarch/virt: Improve fdt table creation for CPU object | ||
| 23 | target/loongarch: Use auto method with LSX feature | ||
| 24 | target/loongarch: Use auto method with LASX feature | ||
| 20 | 25 | ||
| 21 | Song Gao (3): | 26 | Guo Hongyu (1): |
| 22 | hw/intc/loongarch_extioi: Add extioi virt extension definition | 27 | target/loongarch: Fix vldi inst |
| 23 | hw/loongarch/virt: Use MemTxAttrs interface for misc ops | ||
| 24 | hw/loongarch/virt: Enable extioi virt extension | ||
| 25 | 28 | ||
| 26 | lanyanzhi (1): | 29 | hw/loongarch/virt.c | 142 ++++++++++++++---------- |
| 27 | target/loongarch: fix a wrong print in cpu dump | 30 | target/loongarch/cpu.c | 86 ++++++++------ |
| 28 | 31 | target/loongarch/cpu.h | 4 + | |
| 29 | hw/intc/loongarch_extioi.c | 88 ++++++++++++- | 32 | target/loongarch/kvm/kvm.c | 107 ++++++++++++++++++ |
| 30 | hw/loongarch/virt.c | 184 +++++++++++++++++++++++----- | 33 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 4 +- |
| 31 | include/hw/intc/loongarch_extioi.h | 21 ++++ | 34 | 5 files changed, 249 insertions(+), 94 deletions(-) |
| 32 | include/hw/loongarch/virt.h | 1 + | ||
| 33 | target/loongarch/cpu.c | 2 +- | ||
| 34 | target/loongarch/cpu.h | 1 + | ||
| 35 | tests/qtest/libqos/loongarch-virt-machine.c | 114 +++++++++++++++++ | ||
| 36 | tests/qtest/libqos/meson.build | 1 + | ||
| 37 | tests/qtest/meson.build | 2 +- | ||
| 38 | tests/qtest/numa-test.c | 53 ++++++++ | ||
| 39 | 10 files changed, 428 insertions(+), 39 deletions(-) | ||
| 40 | create mode 100644 tests/qtest/libqos/loongarch-virt-machine.c | diff view generated by jsdifflib |
| 1 | On LoongArch, IRQs can be routed to four vcpus with hardware extended | 1 | From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn> |
|---|---|---|---|
| 2 | IRQ model. This patch adds the virt extension definition so that | ||
| 3 | the IRQ can route to 256 vcpus. | ||
| 4 | 2 | ||
| 5 | 1.Extended IRQ model: | 3 | Refer to the link below for a description of the vldi instructions: |
| 6 | | | 4 | https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88 |
| 7 | +-----------+ +-------------|--------+ +-----------+ | 5 | Fixed errors in vldi instruction implementation. |
| 8 | | IPI/Timer | --> | CPUINTC(0-3)|(4-255) | <-- | IPI/Timer | | ||
| 9 | +-----------+ +-------------|--------+ +-----------+ | ||
| 10 | ^ | | ||
| 11 | | | ||
| 12 | +---------+ | ||
| 13 | | EIOINTC | | ||
| 14 | +---------+ | ||
| 15 | ^ ^ | ||
| 16 | | | | ||
| 17 | +---------+ +---------+ | ||
| 18 | | PCH-PIC | | PCH-MSI | | ||
| 19 | +---------+ +---------+ | ||
| 20 | ^ ^ ^ | ||
| 21 | | | | | ||
| 22 | +--------+ +---------+ +---------+ | ||
| 23 | | UARTs | | Devices | | Devices | | ||
| 24 | +--------+ +---------+ +---------+ | ||
| 25 | 6 | ||
| 26 | 2.Virt extended IRQ model: | 7 | Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn> |
| 8 | Tested-by: Xianglai Li <lixianglai@loongson.cn> | ||
| 9 | Signed-off-by: Xianglai Li <lixianglai@loongson.cn> | ||
| 10 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | ||
| 11 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
| 12 | --- | ||
| 13 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +- | ||
| 14 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
| 27 | 15 | ||
| 28 | +-----+ +---------------+ +-------+ | 16 | diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
| 29 | | IPI |--> | CPUINTC(0-255)| <-- | Timer | | ||
| 30 | +-----+ +---------------+ +-------+ | ||
| 31 | ^ | ||
| 32 | | | ||
| 33 | +-----------+ | ||
| 34 | | V-EIOINTC | | ||
| 35 | +-----------+ | ||
| 36 | ^ ^ | ||
| 37 | | | | ||
| 38 | +---------+ +---------+ | ||
| 39 | | PCH-PIC | | PCH-MSI | | ||
| 40 | +---------+ +---------+ | ||
| 41 | ^ ^ ^ | ||
| 42 | | | | | ||
| 43 | +--------+ +---------+ +---------+ | ||
| 44 | | UARTs | | Devices | | Devices | | ||
| 45 | +--------+ +---------+ +---------+ | ||
| 46 | |||
| 47 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 48 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | ||
| 49 | Message-Id: <20240528083855.1912757-2-gaosong@loongson.cn> | ||
| 50 | --- | ||
| 51 | hw/intc/loongarch_extioi.c | 88 ++++++++++++++++++++++++++++-- | ||
| 52 | hw/loongarch/virt.c | 60 +++++++++++++------- | ||
| 53 | include/hw/intc/loongarch_extioi.h | 21 +++++++ | ||
| 54 | 3 files changed, 146 insertions(+), 23 deletions(-) | ||
| 55 | |||
| 56 | diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c | ||
| 57 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
| 58 | --- a/hw/intc/loongarch_extioi.c | 18 | --- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
| 59 | +++ b/hw/intc/loongarch_extioi.c | 19 | +++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
| 60 | @@ -XXX,XX +XXX,XX @@ static inline void extioi_update_sw_coremap(LoongArchExtIOI *s, int irq, | 20 | @@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm) |
| 61 | 21 | break; | |
| 62 | for (i = 0; i < 4; i++) { | 22 | case 1: |
| 63 | cpu = val & 0xff; | 23 | /* data: {2{16'0, imm[7:0], 8'0}} */ |
| 64 | - cpu = ctz32(cpu); | 24 | - data = (t << 24) | (t << 8); |
| 65 | - cpu = (cpu >= 4) ? 0 : cpu; | 25 | + data = (t << 40) | (t << 8); |
| 66 | val = val >> 8; | 26 | break; |
| 67 | 27 | case 2: | |
| 68 | + if (!(s->status & BIT(EXTIOI_ENABLE_CPU_ENCODE))) { | 28 | /* data: {2{8'0, imm[7:0], 16'0}} */ |
| 69 | + cpu = ctz32(cpu); | ||
| 70 | + cpu = (cpu >= 4) ? 0 : cpu; | ||
| 71 | + } | ||
| 72 | + | ||
| 73 | if (s->sw_coremap[irq + i] == cpu) { | ||
| 74 | continue; | ||
| 75 | } | ||
| 76 | @@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps extioi_ops = { | ||
| 77 | .endianness = DEVICE_LITTLE_ENDIAN, | ||
| 78 | }; | ||
| 79 | |||
| 80 | +static MemTxResult extioi_virt_readw(void *opaque, hwaddr addr, uint64_t *data, | ||
| 81 | + unsigned size, MemTxAttrs attrs) | ||
| 82 | +{ | ||
| 83 | + LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque); | ||
| 84 | + | ||
| 85 | + switch (addr) { | ||
| 86 | + case EXTIOI_VIRT_FEATURES: | ||
| 87 | + *data = s->features; | ||
| 88 | + break; | ||
| 89 | + case EXTIOI_VIRT_CONFIG: | ||
| 90 | + *data = s->status; | ||
| 91 | + break; | ||
| 92 | + default: | ||
| 93 | + g_assert_not_reached(); | ||
| 94 | + } | ||
| 95 | + | ||
| 96 | + return MEMTX_OK; | ||
| 97 | +} | ||
| 98 | + | ||
| 99 | +static MemTxResult extioi_virt_writew(void *opaque, hwaddr addr, | ||
| 100 | + uint64_t val, unsigned size, | ||
| 101 | + MemTxAttrs attrs) | ||
| 102 | +{ | ||
| 103 | + LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque); | ||
| 104 | + | ||
| 105 | + switch (addr) { | ||
| 106 | + case EXTIOI_VIRT_FEATURES: | ||
| 107 | + return MEMTX_ACCESS_ERROR; | ||
| 108 | + | ||
| 109 | + case EXTIOI_VIRT_CONFIG: | ||
| 110 | + /* | ||
| 111 | + * extioi features can only be set at disabled status | ||
| 112 | + */ | ||
| 113 | + if ((s->status & BIT(EXTIOI_ENABLE)) && val) { | ||
| 114 | + return MEMTX_ACCESS_ERROR; | ||
| 115 | + } | ||
| 116 | + | ||
| 117 | + s->status = val & s->features; | ||
| 118 | + break; | ||
| 119 | + default: | ||
| 120 | + g_assert_not_reached(); | ||
| 121 | + } | ||
| 122 | + return MEMTX_OK; | ||
| 123 | +} | ||
| 124 | + | ||
| 125 | +static const MemoryRegionOps extioi_virt_ops = { | ||
| 126 | + .read_with_attrs = extioi_virt_readw, | ||
| 127 | + .write_with_attrs = extioi_virt_writew, | ||
| 128 | + .impl.min_access_size = 4, | ||
| 129 | + .impl.max_access_size = 4, | ||
| 130 | + .valid.min_access_size = 4, | ||
| 131 | + .valid.max_access_size = 8, | ||
| 132 | + .endianness = DEVICE_LITTLE_ENDIAN, | ||
| 133 | +}; | ||
| 134 | + | ||
| 135 | static void loongarch_extioi_realize(DeviceState *dev, Error **errp) | ||
| 136 | { | ||
| 137 | LoongArchExtIOI *s = LOONGARCH_EXTIOI(dev); | ||
| 138 | @@ -XXX,XX +XXX,XX @@ static void loongarch_extioi_realize(DeviceState *dev, Error **errp) | ||
| 139 | memory_region_init_io(&s->extioi_system_mem, OBJECT(s), &extioi_ops, | ||
| 140 | s, "extioi_system_mem", 0x900); | ||
| 141 | sysbus_init_mmio(sbd, &s->extioi_system_mem); | ||
| 142 | + | ||
| 143 | + if (s->features & BIT(EXTIOI_HAS_VIRT_EXTENSION)) { | ||
| 144 | + memory_region_init_io(&s->virt_extend, OBJECT(s), &extioi_virt_ops, | ||
| 145 | + s, "extioi_virt", EXTIOI_VIRT_SIZE); | ||
| 146 | + sysbus_init_mmio(sbd, &s->virt_extend); | ||
| 147 | + s->features |= EXTIOI_VIRT_HAS_FEATURES; | ||
| 148 | + } else { | ||
| 149 | + s->status |= BIT(EXTIOI_ENABLE); | ||
| 150 | + } | ||
| 151 | + | ||
| 152 | s->cpu = g_new0(ExtIOICore, s->num_cpu); | ||
| 153 | if (s->cpu == NULL) { | ||
| 154 | error_setg(errp, "Memory allocation for ExtIOICore faile"); | ||
| 155 | @@ -XXX,XX +XXX,XX @@ static void loongarch_extioi_finalize(Object *obj) | ||
| 156 | g_free(s->cpu); | ||
| 157 | } | ||
| 158 | |||
| 159 | +static void loongarch_extioi_reset(DeviceState *d) | ||
| 160 | +{ | ||
| 161 | + LoongArchExtIOI *s = LOONGARCH_EXTIOI(d); | ||
| 162 | + | ||
| 163 | + s->status = 0; | ||
| 164 | +} | ||
| 165 | + | ||
| 166 | static int vmstate_extioi_post_load(void *opaque, int version_id) | ||
| 167 | { | ||
| 168 | LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque); | ||
| 169 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_extioi_core = { | ||
| 170 | |||
| 171 | static const VMStateDescription vmstate_loongarch_extioi = { | ||
| 172 | .name = TYPE_LOONGARCH_EXTIOI, | ||
| 173 | - .version_id = 2, | ||
| 174 | - .minimum_version_id = 2, | ||
| 175 | + .version_id = 3, | ||
| 176 | + .minimum_version_id = 3, | ||
| 177 | .post_load = vmstate_extioi_post_load, | ||
| 178 | .fields = (const VMStateField[]) { | ||
| 179 | VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOI, EXTIOI_IRQS_GROUP_COUNT), | ||
| 180 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_loongarch_extioi = { | ||
| 181 | |||
| 182 | VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOI, num_cpu, | ||
| 183 | vmstate_extioi_core, ExtIOICore), | ||
| 184 | + VMSTATE_UINT32(features, LoongArchExtIOI), | ||
| 185 | + VMSTATE_UINT32(status, LoongArchExtIOI), | ||
| 186 | VMSTATE_END_OF_LIST() | ||
| 187 | } | ||
| 188 | }; | ||
| 189 | |||
| 190 | static Property extioi_properties[] = { | ||
| 191 | DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOI, num_cpu, 1), | ||
| 192 | + DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOI, features, | ||
| 193 | + EXTIOI_HAS_VIRT_EXTENSION, 0), | ||
| 194 | DEFINE_PROP_END_OF_LIST(), | ||
| 195 | }; | ||
| 196 | |||
| 197 | @@ -XXX,XX +XXX,XX @@ static void loongarch_extioi_class_init(ObjectClass *klass, void *data) | ||
| 198 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
| 199 | |||
| 200 | dc->realize = loongarch_extioi_realize; | ||
| 201 | + dc->reset = loongarch_extioi_reset; | ||
| 202 | device_class_set_props(dc, extioi_properties); | ||
| 203 | dc->vmsd = &vmstate_loongarch_extioi; | ||
| 204 | } | ||
| 205 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | ||
| 206 | index XXXXXXX..XXXXXXX 100644 | ||
| 207 | --- a/hw/loongarch/virt.c | ||
| 208 | +++ b/hw/loongarch/virt.c | ||
| 209 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
| 210 | uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle; | ||
| 211 | |||
| 212 | /* | ||
| 213 | - * The connection of interrupts: | ||
| 214 | - * +-----+ +---------+ +-------+ | ||
| 215 | - * | IPI |--> | CPUINTC | <-- | Timer | | ||
| 216 | - * +-----+ +---------+ +-------+ | ||
| 217 | - * ^ | ||
| 218 | - * | | ||
| 219 | - * +---------+ | ||
| 220 | - * | EIOINTC | | ||
| 221 | - * +---------+ | ||
| 222 | - * ^ ^ | ||
| 223 | - * | | | ||
| 224 | - * +---------+ +---------+ | ||
| 225 | - * | PCH-PIC | | PCH-MSI | | ||
| 226 | - * +---------+ +---------+ | ||
| 227 | - * ^ ^ ^ | ||
| 228 | - * | | | | ||
| 229 | - * +--------+ +---------+ +---------+ | ||
| 230 | - * | UARTs | | Devices | | Devices | | ||
| 231 | - * +--------+ +---------+ +---------+ | ||
| 232 | + * Extended IRQ model. | ||
| 233 | + * | | ||
| 234 | + * +-----------+ +-------------|--------+ +-----------+ | ||
| 235 | + * | IPI/Timer | --> | CPUINTC(0-3)|(4-255) | <-- | IPI/Timer | | ||
| 236 | + * +-----------+ +-------------|--------+ +-----------+ | ||
| 237 | + * ^ | | ||
| 238 | + * | | ||
| 239 | + * +---------+ | ||
| 240 | + * | EIOINTC | | ||
| 241 | + * +---------+ | ||
| 242 | + * ^ ^ | ||
| 243 | + * | | | ||
| 244 | + * +---------+ +---------+ | ||
| 245 | + * | PCH-PIC | | PCH-MSI | | ||
| 246 | + * +---------+ +---------+ | ||
| 247 | + * ^ ^ ^ | ||
| 248 | + * | | | | ||
| 249 | + * +--------+ +---------+ +---------+ | ||
| 250 | + * | UARTs | | Devices | | Devices | | ||
| 251 | + * +--------+ +---------+ +---------+ | ||
| 252 | + * | ||
| 253 | + * Virt extended IRQ model. | ||
| 254 | + * | ||
| 255 | + * +-----+ +---------------+ +-------+ | ||
| 256 | + * | IPI |--> | CPUINTC(0-255)| <-- | Timer | | ||
| 257 | + * +-----+ +---------------+ +-------+ | ||
| 258 | + * ^ | ||
| 259 | + * | | ||
| 260 | + * +-----------+ | ||
| 261 | + * | V-EIOINTC | | ||
| 262 | + * +-----------+ | ||
| 263 | + * ^ ^ | ||
| 264 | + * | | | ||
| 265 | + * +---------+ +---------+ | ||
| 266 | + * | PCH-PIC | | PCH-MSI | | ||
| 267 | + * +---------+ +---------+ | ||
| 268 | + * ^ ^ ^ | ||
| 269 | + * | | | | ||
| 270 | + * +--------+ +---------+ +---------+ | ||
| 271 | + * | UARTs | | Devices | | Devices | | ||
| 272 | + * +--------+ +---------+ +---------+ | ||
| 273 | */ | ||
| 274 | |||
| 275 | /* Create IPI device */ | ||
| 276 | diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h | ||
| 277 | index XXXXXXX..XXXXXXX 100644 | ||
| 278 | --- a/include/hw/intc/loongarch_extioi.h | ||
| 279 | +++ b/include/hw/intc/loongarch_extioi.h | ||
| 280 | @@ -XXX,XX +XXX,XX @@ | ||
| 281 | #define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET) | ||
| 282 | #define EXTIOI_SIZE 0x800 | ||
| 283 | |||
| 284 | +#define EXTIOI_VIRT_BASE (0x40000000) | ||
| 285 | +#define EXTIOI_VIRT_SIZE (0x1000) | ||
| 286 | +#define EXTIOI_VIRT_FEATURES (0x0) | ||
| 287 | +#define EXTIOI_HAS_VIRT_EXTENSION (0) | ||
| 288 | +#define EXTIOI_HAS_ENABLE_OPTION (1) | ||
| 289 | +#define EXTIOI_HAS_INT_ENCODE (2) | ||
| 290 | +#define EXTIOI_HAS_CPU_ENCODE (3) | ||
| 291 | +#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \ | ||
| 292 | + | BIT(EXTIOI_HAS_ENABLE_OPTION) \ | ||
| 293 | + | BIT(EXTIOI_HAS_INT_ENCODE) \ | ||
| 294 | + | BIT(EXTIOI_HAS_CPU_ENCODE)) | ||
| 295 | +#define EXTIOI_VIRT_CONFIG (0x4) | ||
| 296 | +#define EXTIOI_ENABLE (1) | ||
| 297 | +#define EXTIOI_ENABLE_INT_ENCODE (2) | ||
| 298 | +#define EXTIOI_ENABLE_CPU_ENCODE (3) | ||
| 299 | +#define EXTIOI_VIRT_COREMAP_START (0x40) | ||
| 300 | +#define EXTIOI_VIRT_COREMAP_END (0x240) | ||
| 301 | + | ||
| 302 | typedef struct ExtIOICore { | ||
| 303 | uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; | ||
| 304 | DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS); | ||
| 305 | @@ -XXX,XX +XXX,XX @@ OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI) | ||
| 306 | struct LoongArchExtIOI { | ||
| 307 | SysBusDevice parent_obj; | ||
| 308 | uint32_t num_cpu; | ||
| 309 | + uint32_t features; | ||
| 310 | + uint32_t status; | ||
| 311 | /* hardware state */ | ||
| 312 | uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2]; | ||
| 313 | uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT]; | ||
| 314 | @@ -XXX,XX +XXX,XX @@ struct LoongArchExtIOI { | ||
| 315 | qemu_irq irq[EXTIOI_IRQS]; | ||
| 316 | ExtIOICore *cpu; | ||
| 317 | MemoryRegion extioi_system_mem; | ||
| 318 | + MemoryRegion virt_extend; | ||
| 319 | }; | ||
| 320 | #endif /* LOONGARCH_EXTIOI_H */ | ||
| 321 | -- | 29 | -- |
| 322 | 2.34.1 | 30 | 2.43.5 | diff view generated by jsdifflib |
| 1 | From: lanyanzhi <lanyanzhi22b@ict.ac.cn> | 1 | Hardcoded 32 bytes is used for vbsrl emulation check, there is |
|---|---|---|---|
| 2 | problem when options lsx=on,lasx=off is used for vbsrl.v instruction | ||
| 3 | in TCG mode. It injects LASX exception rather LSX exception. | ||
| 2 | 4 | ||
| 3 | description: | 5 | Here actual operand size is used. |
| 4 | loongarch_cpu_dump_state() want to dump all loongarch cpu | ||
| 5 | state registers, but there is a tiny typographical error when | ||
| 6 | printing "PRCFG2". | ||
| 7 | 6 | ||
| 8 | Cc: qemu-stable@nongnu.org | 7 | Cc: qemu-stable@nongnu.org |
| 9 | Signed-off-by: lanyanzhi <lanyanzhi22b@ict.ac.cn> | 8 | Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve") |
| 9 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | ||
| 10 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | 10 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
| 11 | Reviewed-by: Song Gao <gaosong@loongson.cn> | 11 | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> |
| 12 | Message-Id: <20240604073831.666690-1-lanyanzhi22b@ict.ac.cn> | ||
| 13 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 14 | --- | 12 | --- |
| 15 | target/loongarch/cpu.c | 2 +- | 13 | target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +- |
| 16 | 1 file changed, 1 insertion(+), 1 deletion(-) | 14 | 1 file changed, 1 insertion(+), 1 deletion(-) |
| 17 | 15 | ||
| 18 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c | 16 | diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
| 19 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
| 20 | --- a/target/loongarch/cpu.c | 18 | --- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
| 21 | +++ b/target/loongarch/cpu.c | 19 | +++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc |
| 22 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) | 20 | @@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz) |
| 23 | qemu_fprintf(f, "EENTRY=%016" PRIx64 "\n", env->CSR_EENTRY); | 21 | { |
| 24 | qemu_fprintf(f, "PRCFG1=%016" PRIx64 ", PRCFG2=%016" PRIx64 "," | 22 | int i, ofs; |
| 25 | " PRCFG3=%016" PRIx64 "\n", | 23 | |
| 26 | - env->CSR_PRCFG1, env->CSR_PRCFG3, env->CSR_PRCFG3); | 24 | - if (!check_vec(ctx, 32)) { |
| 27 | + env->CSR_PRCFG1, env->CSR_PRCFG2, env->CSR_PRCFG3); | 25 | + if (!check_vec(ctx, oprsz)) { |
| 28 | qemu_fprintf(f, "TLBRENTRY=%016" PRIx64 "\n", env->CSR_TLBRENTRY); | 26 | return true; |
| 29 | qemu_fprintf(f, "TLBRBADV=%016" PRIx64 "\n", env->CSR_TLBRBADV); | 27 | } |
| 30 | qemu_fprintf(f, "TLBRERA=%016" PRIx64 "\n", env->CSR_TLBRERA); | 28 | |
| 31 | -- | 29 | -- |
| 32 | 2.34.1 | 30 | 2.43.5 |
| 31 | |||
| 32 | diff view generated by jsdifflib |
| 1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | The same with ACPI table, fdt table is created on machine done |
|---|---|---|---|
| 2 | 2 | notification. Some objects like CPU objects can be created with cold-plug | |
| 3 | Add loongarch virt machine to the graph. It is a modified copy of | 3 | method with command such as -smp x, -device la464-loongarch-cpu, so all |
| 4 | the existing riscv virtmachine in riscv-virt-machine.c | 4 | objects finish to create when machine is done. |
| 5 | |||
| 6 | It contains a generic-pcihost controller, and an extra function | ||
| 7 | loongarch_config_qpci_bus() to configure GPEX pci host controller | ||
| 8 | information, such as ecam and pio_base addresses. | ||
| 9 | |||
| 10 | Also hotplug handle checking about TYPE_VIRTIO_IOMMU_PCI device is | ||
| 11 | added on loongarch virt machine, since virtio_mmu_pci device requires | ||
| 12 | it. | ||
| 13 | 5 | ||
| 14 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 15 | Acked-by: Thomas Huth <thuth@redhat.com> | 7 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
| 16 | Message-Id: <20240528082053.938564-1-maobibo@loongson.cn> | ||
| 17 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 18 | --- | 8 | --- |
| 19 | hw/loongarch/virt.c | 2 + | 9 | hw/loongarch/virt.c | 103 ++++++++++++++++++++++++-------------------- |
| 20 | tests/qtest/libqos/loongarch-virt-machine.c | 114 ++++++++++++++++++++ | 10 | 1 file changed, 57 insertions(+), 46 deletions(-) |
| 21 | tests/qtest/libqos/meson.build | 1 + | ||
| 22 | 3 files changed, 117 insertions(+) | ||
| 23 | create mode 100644 tests/qtest/libqos/loongarch-virt-machine.c | ||
| 24 | 11 | ||
| 25 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | 12 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c |
| 26 | index XXXXXXX..XXXXXXX 100644 | 13 | index XXXXXXX..XXXXXXX 100644 |
| 27 | --- a/hw/loongarch/virt.c | 14 | --- a/hw/loongarch/virt.c |
| 28 | +++ b/hw/loongarch/virt.c | 15 | +++ b/hw/loongarch/virt.c |
| 29 | @@ -XXX,XX +XXX,XX @@ | 16 | @@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms) |
| 30 | #include "sysemu/tpm.h" | 17 | } |
| 31 | #include "sysemu/block-backend.h" | 18 | } |
| 32 | #include "hw/block/flash.h" | 19 | |
| 33 | +#include "hw/virtio/virtio-iommu.h" | 20 | +static void virt_fdt_setup(LoongArchVirtMachineState *lvms) |
| 34 | #include "qemu/error-report.h" | ||
| 35 | |||
| 36 | static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, | ||
| 37 | @@ -XXX,XX +XXX,XX @@ static HotplugHandler *virt_get_hotplug_handler(MachineState *machine, | ||
| 38 | MachineClass *mc = MACHINE_GET_CLASS(machine); | ||
| 39 | |||
| 40 | if (device_is_dynamic_sysbus(mc, dev) || | ||
| 41 | + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || | ||
| 42 | memhp_type_supported(dev)) { | ||
| 43 | return HOTPLUG_HANDLER(machine); | ||
| 44 | } | ||
| 45 | diff --git a/tests/qtest/libqos/loongarch-virt-machine.c b/tests/qtest/libqos/loongarch-virt-machine.c | ||
| 46 | new file mode 100644 | ||
| 47 | index XXXXXXX..XXXXXXX | ||
| 48 | --- /dev/null | ||
| 49 | +++ b/tests/qtest/libqos/loongarch-virt-machine.c | ||
| 50 | @@ -XXX,XX +XXX,XX @@ | ||
| 51 | +/* | ||
| 52 | + * libqos driver framework | ||
| 53 | + * | ||
| 54 | + * Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com> | ||
| 55 | + * | ||
| 56 | + * This library is free software; you can redistribute it and/or | ||
| 57 | + * modify it under the terms of the GNU Lesser General Public | ||
| 58 | + * License version 2.1 as published by the Free Software Foundation. | ||
| 59 | + * | ||
| 60 | + * This library is distributed in the hope that it will be useful, | ||
| 61 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 62 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 63 | + * Lesser General Public License for more details. | ||
| 64 | + * | ||
| 65 | + * You should have received a copy of the GNU Lesser General Public | ||
| 66 | + * License along with this library; if not, see <http://www.gnu.org/licenses/> | ||
| 67 | + */ | ||
| 68 | + | ||
| 69 | +#include "qemu/osdep.h" | ||
| 70 | +#include "../libqtest.h" | ||
| 71 | +#include "qemu/module.h" | ||
| 72 | +#include "libqos-malloc.h" | ||
| 73 | +#include "qgraph.h" | ||
| 74 | +#include "virtio-mmio.h" | ||
| 75 | +#include "generic-pcihost.h" | ||
| 76 | +#include "hw/pci/pci_regs.h" | ||
| 77 | + | ||
| 78 | +#define LOONGARCH_PAGE_SIZE 0x1000 | ||
| 79 | +#define LOONGARCH_VIRT_RAM_ADDR 0x100000 | ||
| 80 | +#define LOONGARCH_VIRT_RAM_SIZE 0xFF00000 | ||
| 81 | + | ||
| 82 | +#define LOONGARCH_VIRT_PIO_BASE 0x18000000 | ||
| 83 | +#define LOONGARCH_VIRT_PCIE_PIO_OFFSET 0x4000 | ||
| 84 | +#define LOONGARCH_VIRT_PCIE_PIO_LIMIT 0x10000 | ||
| 85 | +#define LOONGARCH_VIRT_PCIE_ECAM_BASE 0x20000000 | ||
| 86 | +#define LOONGARCH_VIRT_PCIE_MMIO32_BASE 0x40000000 | ||
| 87 | +#define LOONGARCH_VIRT_PCIE_MMIO32_LIMIT 0x80000000 | ||
| 88 | + | ||
| 89 | +typedef struct QVirtMachine QVirtMachine; | ||
| 90 | + | ||
| 91 | +struct QVirtMachine { | ||
| 92 | + QOSGraphObject obj; | ||
| 93 | + QGuestAllocator alloc; | ||
| 94 | + QVirtioMMIODevice virtio_mmio; | ||
| 95 | + QGenericPCIHost bridge; | ||
| 96 | +}; | ||
| 97 | + | ||
| 98 | +static void virt_destructor(QOSGraphObject *obj) | ||
| 99 | +{ | 21 | +{ |
| 100 | + QVirtMachine *machine = (QVirtMachine *) obj; | 22 | + MachineState *machine = MACHINE(lvms); |
| 101 | + alloc_destroy(&machine->alloc); | 23 | + uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle; |
| 24 | + int i; | ||
| 25 | + | ||
| 26 | + create_fdt(lvms); | ||
| 27 | + fdt_add_cpu_nodes(lvms); | ||
| 28 | + fdt_add_memory_nodes(machine); | ||
| 29 | + fdt_add_fw_cfg_node(lvms); | ||
| 30 | + fdt_add_flash_node(lvms); | ||
| 31 | + | ||
| 32 | + /* Add cpu interrupt-controller */ | ||
| 33 | + fdt_add_cpuic_node(lvms, &cpuintc_phandle); | ||
| 34 | + /* Add Extend I/O Interrupt Controller node */ | ||
| 35 | + fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); | ||
| 36 | + /* Add PCH PIC node */ | ||
| 37 | + fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle); | ||
| 38 | + /* Add PCH MSI node */ | ||
| 39 | + fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle); | ||
| 40 | + /* Add pcie node */ | ||
| 41 | + fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle); | ||
| 42 | + | ||
| 43 | + /* | ||
| 44 | + * Create uart fdt node in reverse order so that they appear | ||
| 45 | + * in the finished device tree lowest address first | ||
| 46 | + */ | ||
| 47 | + for (i = VIRT_UART_COUNT; i-- > 0;) { | ||
| 48 | + hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE; | ||
| 49 | + int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE; | ||
| 50 | + fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0); | ||
| 51 | + } | ||
| 52 | + | ||
| 53 | + fdt_add_rtc_node(lvms, &pch_pic_phandle); | ||
| 54 | + fdt_add_ged_reset(lvms); | ||
| 55 | + platform_bus_add_all_fdt_nodes(machine->fdt, "/platic", | ||
| 56 | + VIRT_PLATFORM_BUS_BASEADDRESS, | ||
| 57 | + VIRT_PLATFORM_BUS_SIZE, | ||
| 58 | + VIRT_PLATFORM_BUS_IRQ); | ||
| 59 | + | ||
| 60 | + /* | ||
| 61 | + * Since lowmem region starts from 0 and Linux kernel legacy start address | ||
| 62 | + * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer | ||
| 63 | + * access. FDT size limit with 1 MiB. | ||
| 64 | + * Put the FDT into the memory map as a ROM image: this will ensure | ||
| 65 | + * the FDT is copied again upon reset, even if addr points into RAM. | ||
| 66 | + */ | ||
| 67 | + qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size); | ||
| 68 | + rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE, | ||
| 69 | + &address_space_memory); | ||
| 70 | + qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds, | ||
| 71 | + rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size)); | ||
| 102 | +} | 72 | +} |
| 103 | + | 73 | + |
| 104 | +static void *virt_get_driver(void *object, const char *interface) | 74 | static void virt_done(Notifier *notifier, void *data) |
| 105 | +{ | 75 | { |
| 106 | + QVirtMachine *machine = object; | 76 | LoongArchVirtMachineState *lvms = container_of(notifier, |
| 107 | + if (!g_strcmp0(interface, "memory")) { | 77 | LoongArchVirtMachineState, machine_done); |
| 108 | + return &machine->alloc; | 78 | virt_build_smbios(lvms); |
| 109 | + } | 79 | loongarch_acpi_setup(lvms); |
| 110 | + | 80 | + virt_fdt_setup(lvms); |
| 111 | + fprintf(stderr, "%s not present in loongarch/virtio\n", interface); | 81 | } |
| 112 | + g_assert_not_reached(); | 82 | |
| 113 | +} | 83 | static void virt_powerdown_req(Notifier *notifier, void *opaque) |
| 114 | + | 84 | @@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic) |
| 115 | +static QOSGraphObject *virt_get_device(void *obj, const char *device) | 85 | } |
| 116 | +{ | 86 | |
| 117 | + QVirtMachine *machine = obj; | 87 | static void virt_devices_init(DeviceState *pch_pic, |
| 118 | + if (!g_strcmp0(device, "generic-pcihost")) { | 88 | - LoongArchVirtMachineState *lvms, |
| 119 | + return &machine->bridge.obj; | 89 | - uint32_t *pch_pic_phandle, |
| 120 | + } else if (!g_strcmp0(device, "virtio-mmio")) { | 90 | - uint32_t *pch_msi_phandle) |
| 121 | + return &machine->virtio_mmio.obj; | 91 | + LoongArchVirtMachineState *lvms) |
| 122 | + } | 92 | { |
| 123 | + | 93 | MachineClass *mc = MACHINE_GET_CLASS(lvms); |
| 124 | + fprintf(stderr, "%s not present in loongarch/virt\n", device); | 94 | DeviceState *gpex_dev; |
| 125 | + g_assert_not_reached(); | 95 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, |
| 126 | +} | 96 | gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); |
| 127 | + | 97 | } |
| 128 | +static void loongarch_config_qpci_bus(QGenericPCIBus *qpci) | 98 | |
| 129 | +{ | 99 | - /* Add pcie node */ |
| 130 | + qpci->gpex_pio_base = LOONGARCH_VIRT_PIO_BASE; | 100 | - fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle); |
| 131 | + qpci->bus.pio_alloc_ptr = LOONGARCH_VIRT_PCIE_PIO_OFFSET; | 101 | - |
| 132 | + qpci->bus.pio_limit = LOONGARCH_VIRT_PCIE_PIO_LIMIT; | 102 | /* |
| 133 | + qpci->bus.mmio_alloc_ptr = LOONGARCH_VIRT_PCIE_MMIO32_BASE; | 103 | * Create uart fdt node in reverse order so that they appear |
| 134 | + qpci->bus.mmio_limit = LOONGARCH_VIRT_PCIE_MMIO32_LIMIT; | 104 | * in the finished device tree lowest address first |
| 135 | + qpci->ecam_alloc_ptr = LOONGARCH_VIRT_PCIE_ECAM_BASE; | 105 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, |
| 136 | +} | 106 | serial_mm_init(get_system_memory(), base, 0, |
| 137 | + | 107 | qdev_get_gpio_in(pch_pic, irq), |
| 138 | +static void *qos_create_machine_loongarch_virt(QTestState *qts) | 108 | 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); |
| 139 | +{ | 109 | - fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0); |
| 140 | + QVirtMachine *machine = g_new0(QVirtMachine, 1); | 110 | } |
| 141 | + | 111 | |
| 142 | + alloc_init(&machine->alloc, 0, | 112 | /* Network init */ |
| 143 | + LOONGARCH_VIRT_RAM_ADDR, | 113 | @@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic, |
| 144 | + LOONGARCH_VIRT_RAM_ADDR + LOONGARCH_VIRT_RAM_SIZE, | 114 | sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE, |
| 145 | + LOONGARCH_PAGE_SIZE); | 115 | qdev_get_gpio_in(pch_pic, |
| 146 | + | 116 | VIRT_RTC_IRQ - VIRT_GSI_BASE)); |
| 147 | + qos_create_generic_pcihost(&machine->bridge, qts, &machine->alloc); | 117 | - fdt_add_rtc_node(lvms, pch_pic_phandle); |
| 148 | + loongarch_config_qpci_bus(&machine->bridge.pci); | 118 | - fdt_add_ged_reset(lvms); |
| 149 | + | 119 | |
| 150 | + machine->obj.get_device = virt_get_device; | 120 | /* acpi ged */ |
| 151 | + machine->obj.get_driver = virt_get_driver; | 121 | lvms->acpi_ged = create_acpi_ged(pch_pic, lvms); |
| 152 | + machine->obj.destructor = virt_destructor; | 122 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) |
| 153 | + return machine; | 123 | CPULoongArchState *env; |
| 154 | +} | 124 | CPUState *cpu_state; |
| 155 | + | 125 | int cpu, pin, i, start, num; |
| 156 | +static void virt_machine_register_nodes(void) | 126 | - uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle; |
| 157 | +{ | 127 | |
| 158 | + qos_node_create_machine_args("loongarch64/virt", | 128 | /* |
| 159 | + qos_create_machine_loongarch_virt, | 129 | * Extended IRQ model. |
| 160 | + " -cpu la464"); | 130 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) |
| 161 | + qos_node_contains("loongarch64/virt", "generic-pcihost", NULL); | 131 | memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR, |
| 162 | +} | 132 | sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); |
| 163 | + | 133 | |
| 164 | +libqos_init(virt_machine_register_nodes); | 134 | - /* Add cpu interrupt-controller */ |
| 165 | diff --git a/tests/qtest/libqos/meson.build b/tests/qtest/libqos/meson.build | 135 | - fdt_add_cpuic_node(lvms, &cpuintc_phandle); |
| 166 | index XXXXXXX..XXXXXXX 100644 | 136 | - |
| 167 | --- a/tests/qtest/libqos/meson.build | 137 | for (cpu = 0; cpu < ms->smp.cpus; cpu++) { |
| 168 | +++ b/tests/qtest/libqos/meson.build | 138 | cpu_state = qemu_get_cpu(cpu); |
| 169 | @@ -XXX,XX +XXX,XX @@ libqos_srcs = files( | 139 | cpudev = DEVICE(cpu_state); |
| 170 | 'ppc64_pseries-machine.c', | 140 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) |
| 171 | 'x86_64_pc-machine.c', | 141 | } |
| 172 | 'riscv-virt-machine.c', | 142 | } |
| 173 | + 'loongarch-virt-machine.c', | 143 | |
| 174 | ) | 144 | - /* Add Extend I/O Interrupt Controller node */ |
| 175 | 145 | - fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); | |
| 176 | if have_virtfs | 146 | - |
| 147 | pch_pic = qdev_new(TYPE_LOONGARCH_PIC); | ||
| 148 | num = VIRT_PCH_PIC_IRQ_NUM; | ||
| 149 | qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); | ||
| 150 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
| 151 | qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); | ||
| 152 | } | ||
| 153 | |||
| 154 | - /* Add PCH PIC node */ | ||
| 155 | - fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle); | ||
| 156 | - | ||
| 157 | pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); | ||
| 158 | start = num; | ||
| 159 | num = EXTIOI_IRQS - start; | ||
| 160 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
| 161 | qdev_get_gpio_in(extioi, i + start)); | ||
| 162 | } | ||
| 163 | |||
| 164 | - /* Add PCH MSI node */ | ||
| 165 | - fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle); | ||
| 166 | - | ||
| 167 | - virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle); | ||
| 168 | + virt_devices_init(pch_pic, lvms); | ||
| 169 | } | ||
| 170 | |||
| 171 | static void virt_firmware_init(LoongArchVirtMachineState *lvms) | ||
| 172 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
| 173 | cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); | ||
| 174 | } | ||
| 175 | |||
| 176 | - create_fdt(lvms); | ||
| 177 | - | ||
| 178 | /* Create IOCSR space */ | ||
| 179 | memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL, | ||
| 180 | machine, "iocsr", UINT64_MAX); | ||
| 181 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
| 182 | lacpu = LOONGARCH_CPU(cpu); | ||
| 183 | lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id; | ||
| 184 | } | ||
| 185 | - fdt_add_cpu_nodes(lvms); | ||
| 186 | - fdt_add_memory_nodes(machine); | ||
| 187 | fw_cfg_add_memory(machine); | ||
| 188 | |||
| 189 | /* Node0 memory */ | ||
| 190 | @@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine) | ||
| 191 | memmap_table, | ||
| 192 | sizeof(struct memmap_entry) * (memmap_entries)); | ||
| 193 | } | ||
| 194 | - fdt_add_fw_cfg_node(lvms); | ||
| 195 | - fdt_add_flash_node(lvms); | ||
| 196 | |||
| 197 | /* Initialize the IO interrupt subsystem */ | ||
| 198 | virt_irq_init(lvms); | ||
| 199 | - platform_bus_add_all_fdt_nodes(machine->fdt, "/platic", | ||
| 200 | - VIRT_PLATFORM_BUS_BASEADDRESS, | ||
| 201 | - VIRT_PLATFORM_BUS_SIZE, | ||
| 202 | - VIRT_PLATFORM_BUS_IRQ); | ||
| 203 | lvms->machine_done.notify = virt_done; | ||
| 204 | qemu_add_machine_init_done_notifier(&lvms->machine_done); | ||
| 205 | /* connect powerdown request */ | ||
| 206 | lvms->powerdown_notifier.notify = virt_powerdown_req; | ||
| 207 | qemu_register_powerdown_notifier(&lvms->powerdown_notifier); | ||
| 208 | |||
| 209 | - /* | ||
| 210 | - * Since lowmem region starts from 0 and Linux kernel legacy start address | ||
| 211 | - * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer | ||
| 212 | - * access. FDT size limit with 1 MiB. | ||
| 213 | - * Put the FDT into the memory map as a ROM image: this will ensure | ||
| 214 | - * the FDT is copied again upon reset, even if addr points into RAM. | ||
| 215 | - */ | ||
| 216 | - qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size); | ||
| 217 | - rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE, | ||
| 218 | - &address_space_memory); | ||
| 219 | - qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds, | ||
| 220 | - rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size)); | ||
| 221 | - | ||
| 222 | lvms->bootinfo.ram_size = ram_size; | ||
| 223 | loongarch_load_kernel(machine, &lvms->bootinfo); | ||
| 224 | } | ||
| 177 | -- | 225 | -- |
| 178 | 2.34.1 | 226 | 2.43.5 | diff view generated by jsdifflib |
| 1 | Use MemTxAttrs interface read_with_attrs/write_with_attrs | 1 | For CPU object, possible_cpu_arch_ids() function is used rather than |
|---|---|---|---|
| 2 | for virt_iocsr_misc_ops. | 2 | smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus |
| 3 | is not accurate for all possible CPU objects, possible_cpu_arch_ids() | ||
| 4 | is used here. | ||
| 3 | 5 | ||
| 4 | Signed-off-by: Song Gao <gaosong@loongson.cn> | 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 5 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | 7 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
| 6 | Message-Id: <20240528083855.1912757-3-gaosong@loongson.cn> | ||
| 7 | --- | 8 | --- |
| 8 | hw/loongarch/virt.c | 36 ++++++++++++++++++++++++------------ | 9 | hw/loongarch/virt.c | 39 +++++++++++++++++++++++++-------------- |
| 9 | 1 file changed, 24 insertions(+), 12 deletions(-) | 10 | 1 file changed, 25 insertions(+), 14 deletions(-) |
| 10 | 11 | ||
| 11 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | 12 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c |
| 12 | index XXXXXXX..XXXXXXX 100644 | 13 | index XXXXXXX..XXXXXXX 100644 |
| 13 | --- a/hw/loongarch/virt.c | 14 | --- a/hw/loongarch/virt.c |
| 14 | +++ b/hw/loongarch/virt.c | 15 | +++ b/hw/loongarch/virt.c |
| 15 | @@ -XXX,XX +XXX,XX @@ static void virt_firmware_init(LoongArchVirtMachineState *lvms) | 16 | @@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms) |
| 17 | static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) | ||
| 18 | { | ||
| 19 | int num; | ||
| 20 | - const MachineState *ms = MACHINE(lvms); | ||
| 21 | - int smp_cpus = ms->smp.cpus; | ||
| 22 | + MachineState *ms = MACHINE(lvms); | ||
| 23 | + MachineClass *mc = MACHINE_GET_CLASS(ms); | ||
| 24 | + const CPUArchIdList *possible_cpus; | ||
| 25 | + LoongArchCPU *cpu; | ||
| 26 | + CPUState *cs; | ||
| 27 | + char *nodename, *map_path; | ||
| 28 | |||
| 29 | qemu_fdt_add_subnode(ms->fdt, "/cpus"); | ||
| 30 | qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1); | ||
| 31 | qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); | ||
| 32 | |||
| 33 | /* cpu nodes */ | ||
| 34 | - for (num = smp_cpus - 1; num >= 0; num--) { | ||
| 35 | - char *nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
| 36 | - LoongArchCPU *cpu = LOONGARCH_CPU(qemu_get_cpu(num)); | ||
| 37 | - CPUState *cs = CPU(cpu); | ||
| 38 | + possible_cpus = mc->possible_cpu_arch_ids(ms); | ||
| 39 | + for (num = 0; num < possible_cpus->len; num++) { | ||
| 40 | + cs = possible_cpus->cpus[num].cpu; | ||
| 41 | + if (cs == NULL) { | ||
| 42 | + continue; | ||
| 43 | + } | ||
| 44 | + | ||
| 45 | + nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
| 46 | + cpu = LOONGARCH_CPU(cs); | ||
| 47 | |||
| 48 | qemu_fdt_add_subnode(ms->fdt, nodename); | ||
| 49 | qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu"); | ||
| 50 | qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", | ||
| 51 | cpu->dtb_compatible); | ||
| 52 | - if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) { | ||
| 53 | + if (possible_cpus->cpus[num].props.has_node_id) { | ||
| 54 | qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id", | ||
| 55 | - ms->possible_cpus->cpus[cs->cpu_index].props.node_id); | ||
| 56 | + possible_cpus->cpus[num].props.node_id); | ||
| 57 | } | ||
| 58 | qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num); | ||
| 59 | qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", | ||
| 60 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) | ||
| 61 | |||
| 62 | /*cpu map */ | ||
| 63 | qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map"); | ||
| 64 | + for (num = 0; num < possible_cpus->len; num++) { | ||
| 65 | + cs = possible_cpus->cpus[num].cpu; | ||
| 66 | + if (cs == NULL) { | ||
| 67 | + continue; | ||
| 68 | + } | ||
| 69 | |||
| 70 | - for (num = smp_cpus - 1; num >= 0; num--) { | ||
| 71 | - char *cpu_path = g_strdup_printf("/cpus/cpu@%d", num); | ||
| 72 | - char *map_path; | ||
| 73 | - | ||
| 74 | + nodename = g_strdup_printf("/cpus/cpu@%d", num); | ||
| 75 | if (ms->smp.threads > 1) { | ||
| 76 | map_path = g_strdup_printf( | ||
| 77 | "/cpus/cpu-map/socket%d/core%d/thread%d", | ||
| 78 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms) | ||
| 79 | num % ms->smp.cores); | ||
| 80 | } | ||
| 81 | qemu_fdt_add_path(ms->fdt, map_path); | ||
| 82 | - qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path); | ||
| 83 | + qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", nodename); | ||
| 84 | |||
| 85 | g_free(map_path); | ||
| 86 | - g_free(cpu_path); | ||
| 87 | + g_free(nodename); | ||
| 88 | } | ||
| 16 | } | 89 | } |
| 17 | 90 | ||
| 18 | |||
| 19 | -static void virt_iocsr_misc_write(void *opaque, hwaddr addr, | ||
| 20 | - uint64_t val, unsigned size) | ||
| 21 | +static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr, | ||
| 22 | + uint64_t val, unsigned size, | ||
| 23 | + MemTxAttrs attrs) | ||
| 24 | { | ||
| 25 | + return MEMTX_OK; | ||
| 26 | } | ||
| 27 | |||
| 28 | -static uint64_t virt_iocsr_misc_read(void *opaque, hwaddr addr, unsigned size) | ||
| 29 | +static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, | ||
| 30 | + uint64_t *data, | ||
| 31 | + unsigned size, MemTxAttrs attrs) | ||
| 32 | { | ||
| 33 | - uint64_t ret; | ||
| 34 | + uint64_t ret = 0; | ||
| 35 | |||
| 36 | switch (addr) { | ||
| 37 | case VERSION_REG: | ||
| 38 | - return 0x11ULL; | ||
| 39 | + ret = 0x11ULL; | ||
| 40 | + break; | ||
| 41 | case FEATURE_REG: | ||
| 42 | ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI); | ||
| 43 | if (kvm_enabled()) { | ||
| 44 | ret |= BIT(IOCSRF_VM); | ||
| 45 | } | ||
| 46 | - return ret; | ||
| 47 | + break; | ||
| 48 | case VENDOR_REG: | ||
| 49 | - return 0x6e6f73676e6f6f4cULL; /* "Loongson" */ | ||
| 50 | + ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */ | ||
| 51 | + break; | ||
| 52 | case CPUNAME_REG: | ||
| 53 | - return 0x303030354133ULL; /* "3A5000" */ | ||
| 54 | + ret = 0x303030354133ULL; /* "3A5000" */ | ||
| 55 | + break; | ||
| 56 | case MISC_FUNC_REG: | ||
| 57 | - return BIT_ULL(IOCSRM_EXTIOI_EN); | ||
| 58 | + ret = BIT_ULL(IOCSRM_EXTIOI_EN); | ||
| 59 | + break; | ||
| 60 | + default: | ||
| 61 | + g_assert_not_reached(); | ||
| 62 | } | ||
| 63 | - return 0ULL; | ||
| 64 | + | ||
| 65 | + *data = ret; | ||
| 66 | + return MEMTX_OK; | ||
| 67 | } | ||
| 68 | |||
| 69 | static const MemoryRegionOps virt_iocsr_misc_ops = { | ||
| 70 | - .read = virt_iocsr_misc_read, | ||
| 71 | - .write = virt_iocsr_misc_write, | ||
| 72 | + .read_with_attrs = virt_iocsr_misc_read, | ||
| 73 | + .write_with_attrs = virt_iocsr_misc_write, | ||
| 74 | .endianness = DEVICE_LITTLE_ENDIAN, | ||
| 75 | .valid = { | ||
| 76 | .min_access_size = 4, | ||
| 77 | -- | 91 | -- |
| 78 | 2.34.1 | 92 | 2.43.5 | diff view generated by jsdifflib |
| 1 | This patch adds a new board attribute 'v-eiointc'. | 1 | Like LBT feature, add type OnOffAuto for LSX feature setting. Also |
|---|---|---|---|
| 2 | A value of true enables the virt extended I/O interrupt controller. | 2 | add LSX feature detection with new VM ioctl command, fallback to old |
| 3 | VMs working in kvm mode have 'v-eiointc' enabled by default. | 3 | method if it is not supported. |
| 4 | 4 | ||
| 5 | Signed-off-by: Song Gao <gaosong@loongson.cn> | 5 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 6 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> | 6 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
| 7 | Message-Id: <20240528083855.1912757-4-gaosong@loongson.cn> | ||
| 8 | --- | 7 | --- |
| 9 | hw/loongarch/virt.c | 88 +++++++++++++++++++++++++++++++++++-- | 8 | target/loongarch/cpu.c | 38 +++++++++++++++------------ |
| 10 | include/hw/loongarch/virt.h | 1 + | 9 | target/loongarch/cpu.h | 2 ++ |
| 11 | target/loongarch/cpu.h | 1 + | 10 | target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++ |
| 12 | 3 files changed, 87 insertions(+), 3 deletions(-) | 11 | 3 files changed, 77 insertions(+), 17 deletions(-) |
| 13 | 12 | ||
| 14 | diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c | 13 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c |
| 15 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
| 16 | --- a/hw/loongarch/virt.c | 15 | --- a/target/loongarch/cpu.c |
| 17 | +++ b/hw/loongarch/virt.c | 16 | +++ b/target/loongarch/cpu.c |
| 18 | @@ -XXX,XX +XXX,XX @@ | 17 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj) |
| 19 | #include "hw/boards.h" | 18 | { |
| 20 | #include "hw/char/serial.h" | 19 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
| 21 | #include "sysemu/kvm.h" | 20 | CPULoongArchState *env = &cpu->env; |
| 22 | +#include "sysemu/tcg.h" | 21 | + uint32_t data = 0; |
| 23 | #include "sysemu/sysemu.h" | 22 | int i; |
| 24 | #include "sysemu/qtest.h" | 23 | |
| 25 | #include "sysemu/runstate.h" | 24 | for (i = 0; i < 21; i++) { |
| 26 | @@ -XXX,XX +XXX,XX @@ | 25 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj) |
| 27 | #include "hw/virtio/virtio-iommu.h" | 26 | cpu->dtb_compatible = "loongarch,Loongson-3A5000"; |
| 28 | #include "qemu/error-report.h" | 27 | env->cpucfg[0] = 0x14c010; /* PRID */ |
| 29 | 28 | ||
| 30 | +static bool virt_is_veiointc_enabled(LoongArchVirtMachineState *lvms) | 29 | - uint32_t data = 0; |
| 31 | +{ | 30 | data = FIELD_DP32(data, CPUCFG1, ARCH, 2); |
| 32 | + if (lvms->veiointc == ON_OFF_AUTO_OFF) { | 31 | data = FIELD_DP32(data, CPUCFG1, PGMMU, 1); |
| 33 | + return false; | 32 | data = FIELD_DP32(data, CPUCFG1, IOCSR, 1); |
| 33 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj) | ||
| 34 | { | ||
| 35 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 36 | CPULoongArchState *env = &cpu->env; | ||
| 37 | - | ||
| 38 | + uint32_t data = 0; | ||
| 39 | int i; | ||
| 40 | |||
| 41 | for (i = 0; i < 21; i++) { | ||
| 42 | @@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj) | ||
| 43 | cpu->dtb_compatible = "loongarch,Loongson-1C103"; | ||
| 44 | env->cpucfg[0] = 0x148042; /* PRID */ | ||
| 45 | |||
| 46 | - uint32_t data = 0; | ||
| 47 | data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */ | ||
| 48 | data = FIELD_DP32(data, CPUCFG1, PGMMU, 1); | ||
| 49 | data = FIELD_DP32(data, CPUCFG1, IOCSR, 1); | ||
| 50 | @@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) | ||
| 51 | |||
| 52 | static bool loongarch_get_lsx(Object *obj, Error **errp) | ||
| 53 | { | ||
| 54 | - LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 55 | - bool ret; | ||
| 56 | - | ||
| 57 | - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { | ||
| 58 | - ret = true; | ||
| 59 | - } else { | ||
| 60 | - ret = false; | ||
| 61 | - } | ||
| 62 | - return ret; | ||
| 63 | + return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF; | ||
| 64 | } | ||
| 65 | |||
| 66 | static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | ||
| 67 | { | ||
| 68 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 69 | + uint32_t val; | ||
| 70 | |||
| 71 | - if (value) { | ||
| 72 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1); | ||
| 73 | - } else { | ||
| 74 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0); | ||
| 75 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0); | ||
| 76 | + cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
| 77 | + if (kvm_enabled()) { | ||
| 78 | + /* kvm feature detection in function kvm_arch_init_vcpu */ | ||
| 79 | + return; | ||
| 80 | } | ||
| 81 | + | ||
| 82 | + /* LSX feature detection in TCG mode */ | ||
| 83 | + val = cpu->env.cpucfg[2]; | ||
| 84 | + if (cpu->lsx == ON_OFF_AUTO_ON) { | ||
| 85 | + if (FIELD_EX32(val, CPUCFG2, LSX) == 0) { | ||
| 86 | + error_setg(errp, "Failed to enable LSX in TCG mode"); | ||
| 87 | + return; | ||
| 88 | + } | ||
| 34 | + } | 89 | + } |
| 35 | + return true; | 90 | + |
| 36 | +} | 91 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value); |
| 37 | + | 92 | } |
| 38 | +static void virt_get_veiointc(Object *obj, Visitor *v, const char *name, | 93 | |
| 39 | + void *opaque, Error **errp) | 94 | static bool loongarch_get_lasx(Object *obj, Error **errp) |
| 40 | +{ | 95 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) |
| 41 | + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); | 96 | { |
| 42 | + OnOffAuto veiointc = lvms->veiointc; | 97 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
| 43 | + | 98 | |
| 44 | + visit_type_OnOffAuto(v, name, &veiointc, errp); | 99 | + cpu->lsx = ON_OFF_AUTO_AUTO; |
| 45 | +} | 100 | object_property_add_bool(obj, "lsx", loongarch_get_lsx, |
| 46 | + | 101 | loongarch_set_lsx); |
| 47 | +static void virt_set_veiointc(Object *obj, Visitor *v, const char *name, | 102 | object_property_add_bool(obj, "lasx", loongarch_get_lasx, |
| 48 | + void *opaque, Error **errp) | 103 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) |
| 49 | +{ | 104 | |
| 50 | + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); | 105 | } else { |
| 51 | + | 106 | cpu->lbt = ON_OFF_AUTO_OFF; |
| 52 | + visit_type_OnOffAuto(v, name, &lvms->veiointc, errp); | 107 | + cpu->pmu = ON_OFF_AUTO_OFF; |
| 53 | +} | ||
| 54 | + | ||
| 55 | static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, | ||
| 56 | const char *name, | ||
| 57 | const char *alias_prop_name) | ||
| 58 | @@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) | ||
| 59 | /* Create EXTIOI device */ | ||
| 60 | extioi = qdev_new(TYPE_LOONGARCH_EXTIOI); | ||
| 61 | qdev_prop_set_uint32(extioi, "num-cpu", ms->smp.cpus); | ||
| 62 | + if (virt_is_veiointc_enabled(lvms)) { | ||
| 63 | + qdev_prop_set_bit(extioi, "has-virtualization-extension", true); | ||
| 64 | + } | ||
| 65 | sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal); | ||
| 66 | memory_region_add_subregion(&lvms->system_iocsr, APIC_BASE, | ||
| 67 | - sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); | ||
| 68 | + sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); | ||
| 69 | + if (virt_is_veiointc_enabled(lvms)) { | ||
| 70 | + memory_region_add_subregion(&lvms->system_iocsr, EXTIOI_VIRT_BASE, | ||
| 71 | + sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 1)); | ||
| 72 | + } | ||
| 73 | |||
| 74 | /* | ||
| 75 | * connect ext irq to the cpu irq | ||
| 76 | @@ -XXX,XX +XXX,XX @@ static void virt_firmware_init(LoongArchVirtMachineState *lvms) | ||
| 77 | } | 108 | } |
| 78 | } | 109 | } |
| 79 | 110 | ||
| 80 | - | ||
| 81 | static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr, | ||
| 82 | uint64_t val, unsigned size, | ||
| 83 | MemTxAttrs attrs) | ||
| 84 | { | ||
| 85 | + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); | ||
| 86 | + uint64_t features; | ||
| 87 | + | ||
| 88 | + switch (addr) { | ||
| 89 | + case MISC_FUNC_REG: | ||
| 90 | + if (!virt_is_veiointc_enabled(lvms)) { | ||
| 91 | + return MEMTX_OK; | ||
| 92 | + } | ||
| 93 | + | ||
| 94 | + features = address_space_ldl(&lvms->as_iocsr, | ||
| 95 | + EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, | ||
| 96 | + attrs, NULL); | ||
| 97 | + if (val & BIT_ULL(IOCSRM_EXTIOI_EN)) { | ||
| 98 | + features |= BIT(EXTIOI_ENABLE); | ||
| 99 | + } | ||
| 100 | + if (val & BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE)) { | ||
| 101 | + features |= BIT(EXTIOI_ENABLE_INT_ENCODE); | ||
| 102 | + } | ||
| 103 | + | ||
| 104 | + address_space_stl(&lvms->as_iocsr, | ||
| 105 | + EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, | ||
| 106 | + features, attrs, NULL); | ||
| 107 | + break; | ||
| 108 | + default: | ||
| 109 | + g_assert_not_reached(); | ||
| 110 | + } | ||
| 111 | + | ||
| 112 | return MEMTX_OK; | ||
| 113 | } | ||
| 114 | |||
| 115 | @@ -XXX,XX +XXX,XX @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, | ||
| 116 | uint64_t *data, | ||
| 117 | unsigned size, MemTxAttrs attrs) | ||
| 118 | { | ||
| 119 | + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); | ||
| 120 | uint64_t ret = 0; | ||
| 121 | + int features; | ||
| 122 | |||
| 123 | switch (addr) { | ||
| 124 | case VERSION_REG: | ||
| 125 | @@ -XXX,XX +XXX,XX @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, | ||
| 126 | ret = 0x303030354133ULL; /* "3A5000" */ | ||
| 127 | break; | ||
| 128 | case MISC_FUNC_REG: | ||
| 129 | - ret = BIT_ULL(IOCSRM_EXTIOI_EN); | ||
| 130 | + if (!virt_is_veiointc_enabled(lvms)) { | ||
| 131 | + ret |= BIT_ULL(IOCSRM_EXTIOI_EN); | ||
| 132 | + break; | ||
| 133 | + } | ||
| 134 | + | ||
| 135 | + features = address_space_ldl(&lvms->as_iocsr, | ||
| 136 | + EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, | ||
| 137 | + attrs, NULL); | ||
| 138 | + if (features & BIT(EXTIOI_ENABLE)) { | ||
| 139 | + ret |= BIT_ULL(IOCSRM_EXTIOI_EN); | ||
| 140 | + } | ||
| 141 | + if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) { | ||
| 142 | + ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE); | ||
| 143 | + } | ||
| 144 | break; | ||
| 145 | default: | ||
| 146 | g_assert_not_reached(); | ||
| 147 | @@ -XXX,XX +XXX,XX @@ static void virt_initfn(Object *obj) | ||
| 148 | { | ||
| 149 | LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); | ||
| 150 | |||
| 151 | + if (tcg_enabled()) { | ||
| 152 | + lvms->veiointc = ON_OFF_AUTO_OFF; | ||
| 153 | + } | ||
| 154 | lvms->acpi = ON_OFF_AUTO_AUTO; | ||
| 155 | lvms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); | ||
| 156 | lvms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); | ||
| 157 | @@ -XXX,XX +XXX,XX @@ static void virt_class_init(ObjectClass *oc, void *data) | ||
| 158 | NULL, NULL); | ||
| 159 | object_class_property_set_description(oc, "acpi", | ||
| 160 | "Enable ACPI"); | ||
| 161 | + object_class_property_add(oc, "v-eiointc", "OnOffAuto", | ||
| 162 | + virt_get_veiointc, virt_set_veiointc, | ||
| 163 | + NULL, NULL); | ||
| 164 | + object_class_property_set_description(oc, "v-eiointc", | ||
| 165 | + "Enable Virt Extend I/O Interrupt Controller."); | ||
| 166 | machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); | ||
| 167 | #ifdef CONFIG_TPM | ||
| 168 | machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); | ||
| 169 | diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h | ||
| 170 | index XXXXXXX..XXXXXXX 100644 | ||
| 171 | --- a/include/hw/loongarch/virt.h | ||
| 172 | +++ b/include/hw/loongarch/virt.h | ||
| 173 | @@ -XXX,XX +XXX,XX @@ struct LoongArchVirtMachineState { | ||
| 174 | Notifier machine_done; | ||
| 175 | Notifier powerdown_notifier; | ||
| 176 | OnOffAuto acpi; | ||
| 177 | + OnOffAuto veiointc; | ||
| 178 | char *oem_id; | ||
| 179 | char *oem_table_id; | ||
| 180 | DeviceState *acpi_ged; | ||
| 181 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h | 111 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h |
| 182 | index XXXXXXX..XXXXXXX 100644 | 112 | index XXXXXXX..XXXXXXX 100644 |
| 183 | --- a/target/loongarch/cpu.h | 113 | --- a/target/loongarch/cpu.h |
| 184 | +++ b/target/loongarch/cpu.h | 114 | +++ b/target/loongarch/cpu.h |
| 185 | @@ -XXX,XX +XXX,XX @@ | 115 | @@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB; |
| 186 | #define CPUNAME_REG 0x20 | 116 | #endif |
| 187 | #define MISC_FUNC_REG 0x420 | 117 | |
| 188 | #define IOCSRM_EXTIOI_EN 48 | 118 | enum loongarch_features { |
| 189 | +#define IOCSRM_EXTIOI_INT_ENCODE 49 | 119 | + LOONGARCH_FEATURE_LSX, |
| 190 | 120 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ | |
| 191 | #define IOCSR_MEM_SIZE 0x428 | 121 | LOONGARCH_FEATURE_PMU, |
| 192 | 122 | }; | |
| 123 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { | ||
| 124 | uint32_t phy_id; | ||
| 125 | OnOffAuto lbt; | ||
| 126 | OnOffAuto pmu; | ||
| 127 | + OnOffAuto lsx; | ||
| 128 | |||
| 129 | /* 'compatible' string for this CPU for Linux device trees */ | ||
| 130 | const char *dtb_compatible; | ||
| 131 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | ||
| 132 | index XXXXXXX..XXXXXXX 100644 | ||
| 133 | --- a/target/loongarch/kvm/kvm.c | ||
| 134 | +++ b/target/loongarch/kvm/kvm.c | ||
| 135 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | ||
| 136 | { | ||
| 137 | int ret; | ||
| 138 | struct kvm_device_attr attr; | ||
| 139 | + uint64_t val; | ||
| 140 | |||
| 141 | switch (feature) { | ||
| 142 | + case LOONGARCH_FEATURE_LSX: | ||
| 143 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; | ||
| 144 | + attr.attr = KVM_LOONGARCH_VM_FEAT_LSX; | ||
| 145 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | ||
| 146 | + if (ret == 0) { | ||
| 147 | + return true; | ||
| 148 | + } | ||
| 149 | + | ||
| 150 | + /* Fallback to old kernel detect interface */ | ||
| 151 | + val = 0; | ||
| 152 | + attr.group = KVM_LOONGARCH_VCPU_CPUCFG; | ||
| 153 | + /* Cpucfg2 */ | ||
| 154 | + attr.attr = 2; | ||
| 155 | + attr.addr = (uint64_t)&val; | ||
| 156 | + ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); | ||
| 157 | + if (!ret) { | ||
| 158 | + ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); | ||
| 159 | + if (ret) { | ||
| 160 | + return false; | ||
| 161 | + } | ||
| 162 | + | ||
| 163 | + ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX); | ||
| 164 | + return (ret != 0); | ||
| 165 | + } | ||
| 166 | + return false; | ||
| 167 | + | ||
| 168 | case LOONGARCH_FEATURE_LBT: | ||
| 169 | /* | ||
| 170 | * Return all if all the LBT features are supported such as: | ||
| 171 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | ||
| 172 | return false; | ||
| 173 | } | ||
| 174 | |||
| 175 | +static int kvm_cpu_check_lsx(CPUState *cs, Error **errp) | ||
| 176 | +{ | ||
| 177 | + CPULoongArchState *env = cpu_env(cs); | ||
| 178 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); | ||
| 179 | + bool kvm_supported; | ||
| 180 | + | ||
| 181 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX); | ||
| 182 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0); | ||
| 183 | + if (cpu->lsx == ON_OFF_AUTO_ON) { | ||
| 184 | + if (kvm_supported) { | ||
| 185 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); | ||
| 186 | + } else { | ||
| 187 | + error_setg(errp, "'lsx' feature not supported by KVM on this host"); | ||
| 188 | + return -ENOTSUP; | ||
| 189 | + } | ||
| 190 | + } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) { | ||
| 191 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); | ||
| 192 | + } | ||
| 193 | + | ||
| 194 | + return 0; | ||
| 195 | +} | ||
| 196 | + | ||
| 197 | static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) | ||
| 198 | { | ||
| 199 | CPULoongArchState *env = cpu_env(cs); | ||
| 200 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs) | ||
| 201 | brk_insn = val; | ||
| 202 | } | ||
| 203 | |||
| 204 | + ret = kvm_cpu_check_lsx(cs, &local_err); | ||
| 205 | + if (ret < 0) { | ||
| 206 | + error_report_err(local_err); | ||
| 207 | + } | ||
| 208 | + | ||
| 209 | ret = kvm_cpu_check_lbt(cs, &local_err); | ||
| 210 | if (ret < 0) { | ||
| 211 | error_report_err(local_err); | ||
| 193 | -- | 212 | -- |
| 194 | 2.34.1 | 213 | 2.43.5 | diff view generated by jsdifflib |
| 1 | From: Bibo Mao <maobibo@loongson.cn> | 1 | Like LSX feature, add type OnOffAuto for LASX feature setting. |
|---|---|---|---|
| 2 | |||
| 3 | Add numa test case for loongarch system, it passes to run | ||
| 4 | with command "make check-qtest". | ||
| 5 | 2 | ||
| 6 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> | 3 | Signed-off-by: Bibo Mao <maobibo@loongson.cn> |
| 7 | Acked-by: Thomas Huth <thuth@redhat.com> | 4 | Reviewed-by: Bibo Mao <maobibo@loongson.cn> |
| 8 | Tested-by: Song Gao <gaosong@loongson.cn> | ||
| 9 | Message-Id: <20240528082155.938586-1-maobibo@loongson.cn> | ||
| 10 | Signed-off-by: Song Gao <gaosong@loongson.cn> | ||
| 11 | --- | 5 | --- |
| 12 | tests/qtest/meson.build | 2 +- | 6 | target/loongarch/cpu.c | 50 +++++++++++++++++++++++------------ |
| 13 | tests/qtest/numa-test.c | 53 +++++++++++++++++++++++++++++++++++++++++ | 7 | target/loongarch/cpu.h | 2 ++ |
| 14 | 2 files changed, 54 insertions(+), 1 deletion(-) | 8 | target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++ |
| 9 | 3 files changed, 89 insertions(+), 16 deletions(-) | ||
| 15 | 10 | ||
| 16 | diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build | 11 | diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c |
| 17 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
| 18 | --- a/tests/qtest/meson.build | 13 | --- a/target/loongarch/cpu.c |
| 19 | +++ b/tests/qtest/meson.build | 14 | +++ b/target/loongarch/cpu.c |
| 20 | @@ -XXX,XX +XXX,XX @@ qtests_hppa = ['boot-serial-test'] + \ | 15 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) |
| 21 | (config_all_devices.has_key('CONFIG_VGA') ? ['display-vga-test'] : []) | 16 | uint32_t val; |
| 22 | 17 | ||
| 23 | qtests_loongarch64 = qtests_filter + \ | 18 | cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; |
| 24 | - ['boot-serial-test'] | 19 | + if (cpu->lsx == ON_OFF_AUTO_OFF) { |
| 25 | + ['boot-serial-test', 'numa-test'] | 20 | + cpu->lasx = ON_OFF_AUTO_OFF; |
| 26 | 21 | + if (cpu->lasx == ON_OFF_AUTO_ON) { | |
| 27 | qtests_m68k = ['boot-serial-test'] + \ | 22 | + error_setg(errp, "Failed to disable LSX since LASX is enabled"); |
| 28 | qtests_filter | 23 | + return; |
| 29 | diff --git a/tests/qtest/numa-test.c b/tests/qtest/numa-test.c | ||
| 30 | index XXXXXXX..XXXXXXX 100644 | ||
| 31 | --- a/tests/qtest/numa-test.c | ||
| 32 | +++ b/tests/qtest/numa-test.c | ||
| 33 | @@ -XXX,XX +XXX,XX @@ static void aarch64_numa_cpu(const void *data) | ||
| 34 | qtest_quit(qts); | ||
| 35 | } | ||
| 36 | |||
| 37 | +static void loongarch64_numa_cpu(const void *data) | ||
| 38 | +{ | ||
| 39 | + QDict *resp; | ||
| 40 | + QList *cpus; | ||
| 41 | + QObject *e; | ||
| 42 | + QTestState *qts; | ||
| 43 | + g_autofree char *cli = NULL; | ||
| 44 | + | ||
| 45 | + cli = make_cli(data, "-machine " | ||
| 46 | + "smp.cpus=2,smp.sockets=2,smp.cores=1,smp.threads=1 " | ||
| 47 | + "-numa node,nodeid=0,memdev=ram -numa node,nodeid=1 " | ||
| 48 | + "-numa cpu,node-id=0,socket-id=1,core-id=0,thread-id=0 " | ||
| 49 | + "-numa cpu,node-id=1,socket-id=0,core-id=0,thread-id=0"); | ||
| 50 | + qts = qtest_init(cli); | ||
| 51 | + cpus = get_cpus(qts, &resp); | ||
| 52 | + g_assert(cpus); | ||
| 53 | + | ||
| 54 | + while ((e = qlist_pop(cpus))) { | ||
| 55 | + QDict *cpu, *props; | ||
| 56 | + int64_t socket, core, thread, node; | ||
| 57 | + | ||
| 58 | + cpu = qobject_to(QDict, e); | ||
| 59 | + g_assert(qdict_haskey(cpu, "props")); | ||
| 60 | + props = qdict_get_qdict(cpu, "props"); | ||
| 61 | + | ||
| 62 | + g_assert(qdict_haskey(props, "node-id")); | ||
| 63 | + node = qdict_get_int(props, "node-id"); | ||
| 64 | + g_assert(qdict_haskey(props, "socket-id")); | ||
| 65 | + socket = qdict_get_int(props, "socket-id"); | ||
| 66 | + g_assert(qdict_haskey(props, "core-id")); | ||
| 67 | + core = qdict_get_int(props, "core-id"); | ||
| 68 | + g_assert(qdict_haskey(props, "thread-id")); | ||
| 69 | + thread = qdict_get_int(props, "thread-id"); | ||
| 70 | + | ||
| 71 | + if (socket == 0 && core == 0 && thread == 0) { | ||
| 72 | + g_assert_cmpint(node, ==, 1); | ||
| 73 | + } else if (socket == 1 && core == 0 && thread == 0) { | ||
| 74 | + g_assert_cmpint(node, ==, 0); | ||
| 75 | + } else { | ||
| 76 | + g_assert(false); | ||
| 77 | + } | 24 | + } |
| 78 | + qobject_unref(e); | ||
| 79 | + } | 25 | + } |
| 80 | + | 26 | + |
| 81 | + qobject_unref(resp); | 27 | if (kvm_enabled()) { |
| 82 | + qtest_quit(qts); | 28 | /* kvm feature detection in function kvm_arch_init_vcpu */ |
| 29 | return; | ||
| 30 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | ||
| 31 | error_setg(errp, "Failed to enable LSX in TCG mode"); | ||
| 32 | return; | ||
| 33 | } | ||
| 34 | + } else { | ||
| 35 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0); | ||
| 36 | + val = cpu->env.cpucfg[2]; | ||
| 37 | } | ||
| 38 | |||
| 39 | cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value); | ||
| 40 | @@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp) | ||
| 41 | |||
| 42 | static bool loongarch_get_lasx(Object *obj, Error **errp) | ||
| 43 | { | ||
| 44 | - LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 45 | - bool ret; | ||
| 46 | - | ||
| 47 | - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) { | ||
| 48 | - ret = true; | ||
| 49 | - } else { | ||
| 50 | - ret = false; | ||
| 51 | - } | ||
| 52 | - return ret; | ||
| 53 | + return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF; | ||
| 54 | } | ||
| 55 | |||
| 56 | static void loongarch_set_lasx(Object *obj, bool value, Error **errp) | ||
| 57 | { | ||
| 58 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 59 | + uint32_t val; | ||
| 60 | |||
| 61 | - if (value) { | ||
| 62 | - if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { | ||
| 63 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1); | ||
| 64 | - } | ||
| 65 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1); | ||
| 66 | - } else { | ||
| 67 | - cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0); | ||
| 68 | + cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | ||
| 69 | + if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) { | ||
| 70 | + error_setg(errp, "Failed to enable LASX since lSX is disabled"); | ||
| 71 | + return; | ||
| 72 | + } | ||
| 73 | + | ||
| 74 | + if (kvm_enabled()) { | ||
| 75 | + /* kvm feature detection in function kvm_arch_init_vcpu */ | ||
| 76 | + return; | ||
| 77 | } | ||
| 78 | + | ||
| 79 | + /* LASX feature detection in TCG mode */ | ||
| 80 | + val = cpu->env.cpucfg[2]; | ||
| 81 | + if (cpu->lasx == ON_OFF_AUTO_ON) { | ||
| 82 | + if (FIELD_EX32(val, CPUCFG2, LASX) == 0) { | ||
| 83 | + error_setg(errp, "Failed to enable LASX in TCG mode"); | ||
| 84 | + return; | ||
| 85 | + } | ||
| 86 | + } | ||
| 87 | + | ||
| 88 | + cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value); | ||
| 89 | } | ||
| 90 | |||
| 91 | static bool loongarch_get_lbt(Object *obj, Error **errp) | ||
| 92 | @@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj) | ||
| 93 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); | ||
| 94 | |||
| 95 | cpu->lsx = ON_OFF_AUTO_AUTO; | ||
| 96 | + cpu->lasx = ON_OFF_AUTO_AUTO; | ||
| 97 | object_property_add_bool(obj, "lsx", loongarch_get_lsx, | ||
| 98 | loongarch_set_lsx); | ||
| 99 | object_property_add_bool(obj, "lasx", loongarch_get_lasx, | ||
| 100 | diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h | ||
| 101 | index XXXXXXX..XXXXXXX 100644 | ||
| 102 | --- a/target/loongarch/cpu.h | ||
| 103 | +++ b/target/loongarch/cpu.h | ||
| 104 | @@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB; | ||
| 105 | |||
| 106 | enum loongarch_features { | ||
| 107 | LOONGARCH_FEATURE_LSX, | ||
| 108 | + LOONGARCH_FEATURE_LASX, | ||
| 109 | LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ | ||
| 110 | LOONGARCH_FEATURE_PMU, | ||
| 111 | }; | ||
| 112 | @@ -XXX,XX +XXX,XX @@ struct ArchCPU { | ||
| 113 | OnOffAuto lbt; | ||
| 114 | OnOffAuto pmu; | ||
| 115 | OnOffAuto lsx; | ||
| 116 | + OnOffAuto lasx; | ||
| 117 | |||
| 118 | /* 'compatible' string for this CPU for Linux device trees */ | ||
| 119 | const char *dtb_compatible; | ||
| 120 | diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c | ||
| 121 | index XXXXXXX..XXXXXXX 100644 | ||
| 122 | --- a/target/loongarch/kvm/kvm.c | ||
| 123 | +++ b/target/loongarch/kvm/kvm.c | ||
| 124 | @@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) | ||
| 125 | } | ||
| 126 | return false; | ||
| 127 | |||
| 128 | + case LOONGARCH_FEATURE_LASX: | ||
| 129 | + attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; | ||
| 130 | + attr.attr = KVM_LOONGARCH_VM_FEAT_LASX; | ||
| 131 | + ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); | ||
| 132 | + if (ret == 0) { | ||
| 133 | + return true; | ||
| 134 | + } | ||
| 135 | + | ||
| 136 | + /* Fallback to old kernel detect interface */ | ||
| 137 | + val = 0; | ||
| 138 | + attr.group = KVM_LOONGARCH_VCPU_CPUCFG; | ||
| 139 | + /* Cpucfg2 */ | ||
| 140 | + attr.attr = 2; | ||
| 141 | + attr.addr = (uint64_t)&val; | ||
| 142 | + ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); | ||
| 143 | + if (!ret) { | ||
| 144 | + ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); | ||
| 145 | + if (ret) { | ||
| 146 | + return false; | ||
| 147 | + } | ||
| 148 | + | ||
| 149 | + ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX); | ||
| 150 | + return (ret != 0); | ||
| 151 | + } | ||
| 152 | + return false; | ||
| 153 | + | ||
| 154 | case LOONGARCH_FEATURE_LBT: | ||
| 155 | /* | ||
| 156 | * Return all if all the LBT features are supported such as: | ||
| 157 | @@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp) | ||
| 158 | return 0; | ||
| 159 | } | ||
| 160 | |||
| 161 | +static int kvm_cpu_check_lasx(CPUState *cs, Error **errp) | ||
| 162 | +{ | ||
| 163 | + CPULoongArchState *env = cpu_env(cs); | ||
| 164 | + LoongArchCPU *cpu = LOONGARCH_CPU(cs); | ||
| 165 | + bool kvm_supported; | ||
| 166 | + | ||
| 167 | + kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX); | ||
| 168 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0); | ||
| 169 | + if (cpu->lasx == ON_OFF_AUTO_ON) { | ||
| 170 | + if (kvm_supported) { | ||
| 171 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1); | ||
| 172 | + } else { | ||
| 173 | + error_setg(errp, "'lasx' feature not supported by KVM on host"); | ||
| 174 | + return -ENOTSUP; | ||
| 175 | + } | ||
| 176 | + } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) { | ||
| 177 | + env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1); | ||
| 178 | + } | ||
| 179 | + | ||
| 180 | + return 0; | ||
| 83 | +} | 181 | +} |
| 84 | + | 182 | + |
| 85 | static void pc_dynamic_cpu_cfg(const void *data) | 183 | static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) |
| 86 | { | 184 | { |
| 87 | QObject *e; | 185 | CPULoongArchState *env = cpu_env(cs); |
| 88 | @@ -XXX,XX +XXX,XX @@ int main(int argc, char **argv) | 186 | @@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs) |
| 89 | aarch64_numa_cpu); | 187 | error_report_err(local_err); |
| 90 | } | 188 | } |
| 91 | 189 | ||
| 92 | + if (!strcmp(arch, "loongarch64")) { | 190 | + ret = kvm_cpu_check_lasx(cs, &local_err); |
| 93 | + qtest_add_data_func("/numa/loongarch64/cpu/explicit", args, | 191 | + if (ret < 0) { |
| 94 | + loongarch64_numa_cpu); | 192 | + error_report_err(local_err); |
| 95 | + } | 193 | + } |
| 96 | + | 194 | + |
| 97 | out: | 195 | ret = kvm_cpu_check_lbt(cs, &local_err); |
| 98 | return g_test_run(); | 196 | if (ret < 0) { |
| 99 | } | 197 | error_report_err(local_err); |
| 100 | -- | 198 | -- |
| 101 | 2.34.1 | 199 | 2.43.5 | diff view generated by jsdifflib |