The Linux DT docs for imsic [1] predicts an 'interrupt-controller@addr'
node, not 'imsic@addr', given this node inherits the
'interrupt-controller' node.

[1] Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml

Reported-by: Conor Dooley <conor@kernel.org>
Fixes: 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine")
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
 hw/riscv/virt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 0a18547c6d..56d7e945c6 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -538,7 +538,8 @@ static void create_fdt_one_imsic(RISCVVirtState *s, hwaddr base_addr,
         }
     }
 
-    imsic_name = g_strdup_printf("/soc/imsics@%lx", (unsigned long)base_addr);
+    imsic_name = g_strdup_printf("/soc/interrupt-controller@%lx",
+                                 (unsigned long)base_addr);
     qemu_fdt_add_subnode(ms->fdt, imsic_name);
     qemu_fdt_setprop_string(ms->fdt, imsic_name, "compatible", "riscv,imsics");
     qemu_fdt_setprop_cell(ms->fdt, imsic_name, "#interrupt-cells",
-- 
2.45.1

On Sat, Jun 1, 2024 at 6:30 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> The Linux DT docs for imsic [1] predicts an 'interrupt-controller@addr'
> node, not 'imsic@addr', given this node inherits the
> 'interrupt-controller' node.
>
> [1] Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml
>
> Reported-by: Conor Dooley <conor@kernel.org>
> Fixes: 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine")
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/riscv/virt.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 0a18547c6d..56d7e945c6 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -538,7 +538,8 @@ static void create_fdt_one_imsic(RISCVVirtState *s, hwaddr base_addr,
>          }
>      }
>
> -    imsic_name = g_strdup_printf("/soc/imsics@%lx", (unsigned long)base_addr);
> +    imsic_name = g_strdup_printf("/soc/interrupt-controller@%lx",
> +                                 (unsigned long)base_addr);
>      qemu_fdt_add_subnode(ms->fdt, imsic_name);
>      qemu_fdt_setprop_string(ms->fdt, imsic_name, "compatible", "riscv,imsics");
>      qemu_fdt_setprop_cell(ms->fdt, imsic_name, "#interrupt-cells",
> --
> 2.45.1
>
>