Hi; most of this is the first half of the A64 simd decodetree
conversion; the rest is a mix of fixes from the last couple of weeks.
v2 uses patches from the v2 decodetree series to avoid a few
regressions in some A32 insns.
(Richard: I'm still planning to review the second half of the
v2 decodetree series; I just wanted to get the respin of this
pullreq out today...)
thanks
-- PMM
The following changes since commit ad10b4badc1dd5b28305f9b9f1168cf0aa3ae946:
Merge tag 'pull-error-2024-05-27' of https://repo.or.cz/qemu/armbru into staging (2024-05-27 06:40:42 -0700)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240528
for you to fetch changes up to f240df3c31b40e4cf1af1f156a88efc1a1df406c:
target/arm: Convert disas_simd_3same_logic to decodetree (2024-05-28 14:29:01 +0100)
----------------------------------------------------------------
target-arm queue:
* xlnx_dpdma: fix descriptor endianness bug
* hvf: arm: Fix encodings for ID_AA64PFR1_EL1 and debug System registers
* hw/arm/npcm7xx: remove setting of mp-affinity
* hw/char: Correct STM32L4x5 usart register CR2 field ADD_0 size
* hw/intc/arm_gic: Fix handling of NS view of GICC_APR<n>
* hw/input/tsc2005: Fix -Wchar-subscripts warning in tsc2005_txrx()
* hw: arm: Remove use of tabs in some source files
* docs/system: Remove ADC from raspi documentation
* target/arm: Start of the conversion of A64 SIMD to decodetree
----------------------------------------------------------------
Alexandra Diupina (1):
xlnx_dpdma: fix descriptor endianness bug
Andrey Shumilin (1):
hw/intc/arm_gic: Fix handling of NS view of GICC_APR<n>
Dorjoy Chowdhury (1):
hw/arm/npcm7xx: remove setting of mp-affinity
Inès Varhol (1):
hw/char: Correct STM32L4x5 usart register CR2 field ADD_0 size
Philippe Mathieu-Daudé (1):
hw/input/tsc2005: Fix -Wchar-subscripts warning in tsc2005_txrx()
Rayhan Faizel (1):
docs/system: Remove ADC from raspi documentation
Richard Henderson (34):
target/arm: Use PLD, PLDW, PLI not NOP for t32
target/arm: Zero-extend writeback for fp16 FCVTZS (scalar, integer)
target/arm: Fix decode of FMOV (hp) vs MOVI
target/arm: Verify sz=0 for Advanced SIMD scalar pairwise (fp16)
target/arm: Split out gengvec.c
target/arm: Split out gengvec64.c
target/arm: Convert Cryptographic AES to decodetree
target/arm: Convert Cryptographic 3-register SHA to decodetree
target/arm: Convert Cryptographic 2-register SHA to decodetree
target/arm: Convert Cryptographic 3-register SHA512 to decodetree
target/arm: Convert Cryptographic 2-register SHA512 to decodetree
target/arm: Convert Cryptographic 4-register to decodetree
target/arm: Convert Cryptographic 3-register, imm2 to decodetree
target/arm: Convert XAR to decodetree
target/arm: Convert Advanced SIMD copy to decodetree
target/arm: Convert FMULX to decodetree
target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree
target/arm: Convert FMAX, FMIN, FMAXNM, FMINNM to decodetree
target/arm: Introduce vfp_load_reg16
target/arm: Expand vfp neg and abs inline
target/arm: Convert FNMUL to decodetree
target/arm: Convert FMLA, FMLS to decodetree
target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree
target/arm: Convert FABD to decodetree
target/arm: Convert FRECPS, FRSQRTS to decodetree
target/arm: Convert FADDP to decodetree
target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree
target/arm: Use gvec for neon faddp, fmaxp, fminp
target/arm: Convert ADDP to decodetree
target/arm: Use gvec for neon padd
target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree
target/arm: Use gvec for neon pmax, pmin
target/arm: Convert FMLAL, FMLSL to decodetree
target/arm: Convert disas_simd_3same_logic to decodetree
Tanmay Patil (1):
hw: arm: Remove use of tabs in some source files
Zenghui Yu (1):
hvf: arm: Fix encodings for ID_AA64PFR1_EL1 and debug System registers
docs/system/arm/raspi.rst | 1 -
target/arm/helper.h | 68 +-
target/arm/tcg/helper-a64.h | 12 +
target/arm/tcg/translate-a64.h | 4 +
target/arm/tcg/translate.h | 51 +
target/arm/tcg/a64.decode | 315 +++-
target/arm/tcg/t32.decode | 25 +-
hw/arm/boot.c | 8 +-
hw/arm/npcm7xx.c | 3 -
hw/char/omap_uart.c | 49 +-
hw/char/stm32l4x5_usart.c | 2 +-
hw/dma/xlnx_dpdma.c | 68 +-
hw/gpio/zaurus.c | 59 +-
hw/input/tsc2005.c | 135 +-
hw/intc/arm_gic.c | 4 +-
target/arm/hvf/hvf.c | 130 +-
target/arm/tcg/gengvec.c | 1672 +++++++++++++++++++++
target/arm/tcg/gengvec64.c | 190 +++
target/arm/tcg/neon_helper.c | 5 -
target/arm/tcg/translate-a64.c | 3137 +++++++++++++--------------------------
target/arm/tcg/translate-neon.c | 136 +-
target/arm/tcg/translate-sve.c | 145 +-
target/arm/tcg/translate-vfp.c | 93 +-
target/arm/tcg/translate.c | 1592 +-------------------
target/arm/tcg/vec_helper.c | 221 ++-
target/arm/vfp_helper.c | 30 -
target/arm/tcg/meson.build | 2 +
27 files changed, 3860 insertions(+), 4297 deletions(-)
create mode 100644 target/arm/tcg/gengvec.c
create mode 100644 target/arm/tcg/gengvec64.c